JPH1065103A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which has improved counter noise characteristics and electric characteristics, rediffusion is unnecessary and the number of optimum power sources or earthing terminals can be set by the switching of bonding only. SOLUTION: A power source pad 103 is connected to a terminal lead 109 in a one-to-one state, and an earthing pad 105 is connected to a terminal lead 110 in a one-to-one state. However, a power source pad 104 and a functional pad 101 are formed in a pair, and the bonding connection with a terminal lead 108 can be selectively conducted. Also, an earthing pad 106 and a functional pad 102 are formed in a pair, and they can be selectively bonding-connected with a terminal lead 107. Terminal leads 107 and 108 are connected to the functional pads 101 and 102 respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit according to an information processing apparatus, and more particularly, to a semiconductor integrated circuit such as a memory and a microcomputer.

[0002]

2. Description of the Related Art In a conventional semiconductor integrated circuit, as shown in FIG. 7 (a block diagram showing an example of a conventional semiconductor integrated circuit), each terminal (power supply terminals 301, 302, 303, 304) is uniquely defined. It is decided. Then, the power supply system is divided into several parts in the integrated circuit to prevent one noise from propagating to another. 7, reference numeral 301 denotes a power terminal to the outer peripheral portion 305, 302 denotes a power terminal to the CPU 306, 303 denotes a power terminal to the digital peripheral function unit, and 304 denotes a power terminal to the analog peripheral function unit.

By the way, the function terminals are determined by the function specifications incorporated in the integrated circuit. The power terminals and the ground terminals are obtained by subtracting the function terminals from the total number of terminals operating simultaneously and the switching frequency and the total number of terminals of the entire chip. Often determined by number.

There is no problem if a sufficient number of power supply terminals and ground terminals are secured in advance by simulation or the like, but it may not always be possible due to restrictions on the package. In addition, it is difficult to determine the optimal number of power supply terminals and ground terminals from the beginning of design because the precision of the simulation and the noise characteristics of the mounting board are greatly affected. From the point of view of the user, it is desired that the total number of terminals is as small as possible, but the number of functional terminals is as large as possible, that is, the number of power / ground terminals is as small as possible. There is also a constraint that it must be secured.

In order to satisfy the conflicting demands, the following has been considered in order to obtain the maximum effect with limited power supply / ground terminals even in an integrated circuit. For example,
As described above (as shown in FIG. 7 (a block diagram showing an example of a conventional semiconductor integrated circuit)), the power supply system is divided into several parts in the integrated circuit, and one noise propagates to the other. It is configured to prevent that.

As described above, in the conventional semiconductor circuit, generally, the outer peripheral portion 30 where noise is likely to be generated by the input / output buffer.
The analog section 308 that is easily affected by the noise 5 and noise is configured to be separated from other power supply systems (see FIG. 7). In addition, as shown in FIG. 8 (a block diagram showing another example of a conventional semiconductor integrated circuit), there are many cases where a device such as bonding from one power supply terminal to a plurality of power supply pads is reinforced. In FIG. 8, the power supply terminals 301, 3
7, reference numeral 301 denotes a power supply terminal to the outer peripheral portion 305, reference numeral 302 denotes a power supply terminal to the CPU unit 306, reference numeral 303 denotes a power supply terminal to the digital system peripheral function unit, and reference numeral 304 denotes an analog system. This is a power supply terminal to the peripheral function unit.

[0007]

As described above, noise countermeasures have conventionally been taken, but there are cases where sufficient effects cannot be obtained. In particular, the conventional semiconductor integrated circuit has a problem that it is difficult to improve the noise immunity characteristics by increasing the number of power / ground terminals because the number of function terminals and the number of power / ground terminals are fixed in advance. ing.

Also, when the number of power / ground terminals is increased by changing the specifications (by reducing the number of functional terminals), a large layout change is required for the integrated circuit once manufactured, and the layout correction and re-spreading are required. There was a disadvantage that it took time.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems and disadvantages, and has as its object to provide a semiconductor integrated circuit capable of improving noise immunity characteristics and electrical characteristics. Another object of the present invention is to provide a semiconductor integrated circuit which does not require re-layout and re-spreading and can set an optimal number of power supply or ground terminals only by switching bonding.

[0010]

A semiconductor integrated circuit according to the present invention has a structure having a power supply pad for applying power or a ground pad for ground potential, the connection of which can be changed by bonding switching with a function pad. Accordingly, the object of the present invention is to provide a semiconductor integrated circuit.

That is, the present invention provides a semiconductor integrated circuit having a power pad for applying power, a ground pad for ground potential, and a function pad for inputting and outputting a function signal. And a ground pad in a "pair", and a specific terminal can be switched between a power terminal and a functional terminal or a ground terminal and a functional terminal by bonding switching. " The gist of the present invention is (claim 1). According to the present invention, in the semiconductor integrated circuit, a power supply pad / grounding pad group for bonding switching is arranged in a staggered manner outside the functional pad.
(Claim 2).

[0012]

Next, the present invention will be described in detail including embodiments of the present invention. In the semiconductor integrated circuit according to the present invention, the number of power / ground pads is larger than the number of terminals in the design stage, and the functional terminal and the power / ground terminal can be changed by bonding switching according to the result of the electrical characteristic evaluation including the noise characteristic. This point is different from the conventional technology.

[0013] It has been conventionally possible to "also use the operation mode switching terminal depending on whether or not the power supply pad is bonded" (see Japanese Patent Application Laid-Open No. Hei 3-217051). In such a semiconductor integrated circuit, by enabling general-purpose function terminals and bonding switching,
There is an advantage that there is more freedom and the number of power / ground terminals is not limited.

[0014]

Next, an embodiment of a semiconductor integrated circuit according to the present invention will be described with reference to FIGS. 1 to 6, but the present invention is not limited to the following embodiment, and Various modifications and changes can be made within the scope of the present invention.

(Embodiment 1) FIGS. 1 to 4 show a first embodiment of the present invention.
FIG. 4 is a diagram for explaining the embodiment (Embodiment 1) of the present invention, and is a block diagram and connection diagram of a semiconductor integrated circuit showing each example of bonding connection. 1 to 4, 100 is a semiconductor integrated circuit, 101 and 102 are functional pads, 103 and 104 are power supply pads, 10
5, 106 are ground pads, and 107 to 110 are terminal leads. In addition, it has a plurality of functional pads (not shown).

The power supply pad 103 is connected to the terminal lead 109 on a one-to-one basis, and the ground pad 105 is connected to the terminal lead 110 and the terminal lead 109.
The power supply pad 104 is paired with the function pad 101, and is configured to be able to select a bonding connection with the terminal lead 108.
Similarly, the ground pad 106 is "paired" with the functional pad 102, and is configured so that the bonding connection with the terminal lead 107 can be selected. Hereinafter, each example of this bonding connection will be described with reference to FIGS.

In FIG. 1 (an example of bonding connection), terminal leads 108 and 107 capable of bonding connection are connected to functional pads 101 and 102, respectively.
At 0, one power supply terminal 109 and one ground terminal 110 are provided.

In FIG. 2 (another example of bonding connection), a terminal lead 108 capable of bonding connection is a functional pad 101.
The terminal leads 107 are connected to the ground pads 106, respectively. In the semiconductor integrated circuit 100, one power supply terminal 109 is provided, and two ground terminals 110 and 107 are provided.

In FIG. 3 (another example of bonding connection), a terminal lead 107 capable of bonding connection is connected to a function pad 102, and the same terminal lead 108 is connected to a power supply pad 104, respectively. In 100, two power supply terminals 108 and 109 are provided, and one ground terminal 110 is provided.

FIG. 4 (still another example of bonding connection)
The terminal lead 108 capable of bonding connection is connected to the power supply pad 104, and the terminal lead 107 is connected to the ground pad 106. The two power supply terminals 108 and 109 in the semiconductor integrated circuit 100 are grounded. There are two terminals 110 and 107.

As described above, in the first embodiment, the number of the power supply terminals and the number of the ground terminals in the semiconductor integrated circuit 100 are bonded by providing the power supply pad and the function pad or the ground pad and the function pad in “pair”. It can be made variable by switching (see FIGS. 1 to 4 described above). Further, in the first embodiment, the power supply /
Four types of chips having different numbers of ground terminals can be configured. After the evaluation of the noise characteristics and the evaluation of the electrical characteristics are performed using these four types of chips, there is an advantage that the optimal number of power supply terminals and ground terminals can be determined.

Furthermore, in the first embodiment, the terminal leads 107
Although it cannot be determined until after the evaluation whether the terminals 108 and 108 will be functional terminals or power / ground terminals, even if this functional terminal is removed from the product specifications as a port function, it will not have a relatively large effect. This can be avoided by assigning it to a terminal. The input from the function pad that is no longer used as a function terminal due to the switching is fixed to an inactive level by a pull-up / pull-down resistor.

(Embodiment 2) FIG. 5 is a block diagram showing a conventional semiconductor integrated circuit according to a second embodiment of the present invention.
FIG. 6 is a reference diagram for explaining (Embodiment 2), and FIG. 6 is a block diagram of a semiconductor integrated circuit for explaining a second embodiment (Embodiment 2) of the present invention. 5 and 6, 201 denotes the inside of the integrated circuit, 202 denotes the dead space (FIG. 5), and 203 denotes the power supply /
Each of the ground pad groups (FIG. 6) is shown.

In the semiconductor integrated circuit according to the present invention, it is necessary to arrange more pads than the number of terminals of the chip so that the bonding can be switched. Therefore, as shown in FIG. 5 (a block diagram showing a conventional semiconductor integrated circuit), there is a possibility that a dead space 202 which is an extra space outside the integrated circuit 201 is generated.

In the second embodiment, such a dead space
As shown in FIG. 6, a power supply / ground pad group 203 for bonding switching is used to eliminate the pad 202 (pad neck).
Are arranged in a staggered manner outside the functional pad, which has the advantage that extra space can be eliminated and the chip size can be minimized.

[0026]

As described in detail above, the semiconductor integrated circuit according to the present invention has a structure in which a power supply pad or a ground pad is provided in advance as a "pair" with a function pad. This can be changed to a ground terminal, and the effect of improving noise elimination characteristics and electrical characteristics can be obtained.

In the conventional semiconductor integrated circuit, it takes about 3 to 6 months to increase the number of power supply terminals and ground terminals because it is necessary to perform diffusion after changing the layout. According to the semiconductor integrated circuit, it can be changed in several hours only by switching the bonding.

In particular, since the noise immunity characteristic greatly differs depending on the board to be mounted, in the case of an integrated circuit for a specific user such as a custom product, several types of chips having different numbers of power supply / ground terminals are required. After performing the mounting evaluation, the number of power supply / ground terminals optimal for the user can be determined, so that the terminal can be used most effectively.

[Brief description of the drawings]

FIG. 1 is a block diagram and a connection diagram of a semiconductor integrated circuit showing “an example of bonding connection” according to a first embodiment (embodiment 1) of the present invention.

FIG. 2 is a block diagram and a connection diagram of a semiconductor integrated circuit showing “another example of bonding connection” according to the first embodiment (embodiment 1) of the present invention.

FIG. 3 is a block diagram and a connection diagram of a semiconductor integrated circuit showing “another example of bonding connection” in the first embodiment (Embodiment 1) of the present invention.

FIG. 4 is a block diagram and a connection diagram of a semiconductor integrated circuit showing “still another example of bonding connection” in the first embodiment (Embodiment 1) of the present invention.

FIG. 5 is a block diagram showing a conventional semiconductor integrated circuit, and is a reference diagram for explaining a second embodiment (Embodiment 2) of the present invention.

FIG. 6 is a block diagram of a semiconductor integrated circuit illustrating a second embodiment (Embodiment 2) of the present invention.

FIG. 7 is a block diagram showing an example of a conventional semiconductor integrated circuit.

FIG. 8 is a block diagram showing another example of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 semiconductor integrated circuit 101, 102 function pad 103, 104 power pad 105, 106 ground pad 107-110 terminal lead 201 inside integrated circuit 202 dead space 203 power / ground pad group 301-304 power terminal 305 outer peripheral portion 306 CPU Section 307 Digital section 308 Analog section

Claims (2)

[Claims] 1. A semiconductor integrated circuit having a power supply pad for applying power, a ground pad for ground potential, and a function pad for inputting / outputting a function signal.
Alternatively, a semiconductor having a configuration in which a functional pad and a ground pad are provided in a “pair” and a specific terminal can be switched between a power supply terminal and a functional terminal or a ground terminal and a functional terminal by bonding switching. Integrated circuit. 2. The semiconductor integrated circuit according to claim 1, wherein a power supply pad / grounding pad group for bonding switching is arranged in a staggered manner outside the function pad.