JPH104171A - Lead frame for semiconductor package and lead frame stop - Google Patents

Abstract

PROBLEM TO BE SOLVED: To absorb a residual stress at the time of forming downset parts to minimize the deformation of a lead frame, by a method wherein diverse shapes of stress absorbing means are formed in the vicinities of an area where downset parts of fuse leads are to be formed. SOLUTION: Diverse shapes of stress absorbing means 5 are formed in the vicinities of downset parts 4 formed on fuse leads 3 in a lead frame 1 for semiconductor package. The fuse leads 3 are made to couple integrally with a semiconductor chip mounting plate 2 and a siderail. Owing to this, the curve or twisting phenomenon of the lead frame 1 or the strips of the lead frame 1 can be prevented from being generated by making a residual stress, which is generated at the time of a processing of the downset parts, absorb or relax by the means 5. Moreover, a coupling force between a molding resin and the lead frame can be made to enhance, by a method wherein a silver-plated region for ground bonding is formed on each one part of the means 5 and the relative ratio of the whole area of the silver-plated regions to the whole area of the fuse leads is minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor package, and more particularly to a lead frame for a heat release and a ground. The present invention relates to a lead frame for a semiconductor package provided with a stress absorbing means having various shapes.

[0002]

2. Description of the Related Art In recent years, as the trend toward higher integration of semiconductor chips and the trend toward miniaturization of electronic devices using semiconductor chips have been accelerated, limited units have been used in lead frames widely used in plastic semiconductor packages. The formation of more leads per area is required.
In order to cope with such a trend, the thickness of the lead frame, the width of each lead and the interval between the leads have to be minimized, so that the structure of the lead frame becomes more and more complicated. However, in spite of such a tendency of the lead frame structure becoming more complicated, the reliability of the semiconductor package accompanying the high precision of the lead frame has been further emphasized at present. Stamping method or etching (Et) used
Even if any method such as the ching method is used, it becomes increasingly difficult to obtain the required precise shape or pattern.

As a typical example of such a situation, in a plastic semiconductor package using various types of lead frames including a code flat (QuadFlat) semiconductor package in which leads are extended in four directions, the package is light and thin. In order to reduce the height of the package after mounting the semiconductor chip, it is usual to lower the height of the package after mounting the semiconductor chip by lowering the semiconductor chip mounting plate on the lead frame slightly lower than the height of the lead. When the number of fuse leads connected to the plate is large, the residual stress generated by the downset processing causes the lead frame strip and / or the lead frame to bend and reduce the flatness, thereby making it difficult to perform subsequent processing or It causes problems such as reduced reliability of completed semiconductor packages. There was sorrow.

As shown in FIG. 8A, in a conventional lead frame strip 100 composed of a conventional unit lead frame 1 'having a fuse lead 3, the unit lead frame 1' is connected to the semiconductor chip mounting plate 2 , Connected to this and extended radially outward,
It is composed of a large number of fuse leads 3 on which the downset portion 4 is formed, a large number of leads 8 short-circuited from the semiconductor chip mounting plate 2, and a dam bar 9. A large number of unit lead frames 1 ′ into one lead frame strip 100.
To be configured.

[0005]

In such a conventional ordinary lead frame 1 ', AA of FIG.
As shown in FIG. 9 which is a cross-sectional view taken along the line, (the fuse lead 3 for heat emission and ground connected to the semiconductor chip mounting plate 2 has only the downset portion 4 without forming the stress absorbing means. When the downset is formed, the lead frame 1 ') may be deformed due to residual stress. Further, as shown in FIG. 8B, which is an enlarged view of the downset unit 4 in FIG.
Are formed not obliquely to both sides of the fuse lead 3 but obliquely, that is, in parallel with the side of the semiconductor chip mounting plate 2 or the extension formed by the tip of the lead. The length of the bent portion is longer than that of the bent portion, so that the residual stress is increased, and the lead frame 1 ′ may be deformed.

Accordingly, a conventional lead frame strip 1 made of such a conventional unit lead frame 1 'is provided.
FIG. 10 shows the residual stress during downset processing,
Coil Set in the longitudinal direction as shown in
The possibility of occurrence of the phenomenon and / or the cross bow phenomenon in the width direction increases. As explained earlier,
The occurrence of such a phenomenon may reduce the flatness of the lead frame and / or its strip, thereby reducing the precision of its shape or pattern, so that the subsequent process of processing the semiconductor package becomes difficult or completed. There is a problem that the reliability of the semiconductor package is reduced.

Accordingly, a first object of the present invention is to form various types of stress absorbing means near a portion where a fuse lead is to be formed with a downset, thereby absorbing a residual stress when the downset is formed. An object of the present invention is to provide a lead frame for a semiconductor package capable of minimizing deformation of the lead frame.

A second object of the present invention is to provide a lead frame strip for a semiconductor package comprising a plurality of lead frames according to the first object of the present invention and capable of minimizing a coil set and a cross bow phenomenon.

A third object of the present invention is to form a plastic sealing portion by forming a silver-plated region for ground bonding in a part of the stress absorbing means formed near the downset portion of the fuse lead. A lead for a semiconductor package in which the bonding ratio between the molding resin and the lead frame can be further improved by minimizing a relative ratio of a silver plating area having poor bonding strength with the molding resin to the entire area of the fuse lead. Is to provide a frame.

[0010] A fourth object of the present invention is to form a downset portion by forming two bent portions defining a downset portion of the fuse lead in a width direction perpendicular to both sides of the fuse lead so as to have the shortest length. It is an object of the present invention to provide a lead frame for a semiconductor package in which residual stress due to the above is reduced.

[0011]

According to the present invention, there is provided a semiconductor chip mounting plate, comprising: a side rail;
A large number of fuse leads integrally connected to the semiconductor chip mounting plate and the side rails and having stress absorbing means formed near the downset portion; and a short circuit from the semiconductor chip mounting plate integrally connected to the side rails. And
A plurality of leads located between the plurality of fuse leads, wherein a stress absorbing means formed on the fuse leads absorbs residual stress generated by downsetting of the fuse leads to prevent deformation of the lead frame. Provided is a lead frame for a semiconductor package.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. FIG. 1A shows a fuse lead 3.
FIG. 4 is a plan view of a lead frame 1 for a semiconductor package according to a preferred embodiment of the present invention in which stress absorbing means 5 of various shapes are formed near a downset portion 4 formed in FIG.
The lead frame 1 includes a semiconductor chip mounting plate 2, fuse leads 3 and leads 8.

The fuse lead 3 is a semiconductor chip mounting plate 2
And a side rail (formed at a position adjacent to the outside of the dam bar 9 to integrally connect and support the lead 8 and the fuse lead 3 and cut and removed together with the dam bar 9 after molding of a plastic resin for manufacturing a semiconductor package) And a function of supporting the semiconductor chip mounting plate 2 on the side rails, and a function of efficiently releasing heat generated during operation of the semiconductor chip 10 to the outside after the semiconductor package is manufactured, and a function of a ground. Fulfill.

A downset portion 4 defined by two bent portions is formed on the fuse lead 3 (see FIG. 9), whereby the semiconductor chip mounting plate 2 is separated from the lead 8 and another plane below the side rail. When the semiconductor chip 10 is mounted for manufacturing a semiconductor package, it contributes to a reduction in the thickness of the semiconductor package.

A fuse lead 3 in a semiconductor package lead frame 1 according to a preferred embodiment of the present invention.
Are formed with various shapes of stress absorbing means in the vicinity of the downset portion 4, thereby absorbing or relaxing residual stress during downset processing, thereby bending or twisting the lead frame 1 or its strip. The phenomenon can be prevented.

The position of the stress absorbing means 5 formed on the fuse lead 3 is in front and / or behind the downset portion 4 (that is, between the downset portion 4 and the semiconductor chip mounting plate 2 and / or the downset portion 4). And between dam bar 9)
The position may be selected according to the design of the lead frame 1.

The stress absorbing means 5 is formed integrally with the fuse lead 3 on the same plane. The shape of the stress absorbing means 5 may be a "V" shape, a "U" shape, or any one of a square, a rectangle, an ellipse, and a rhombus with pores 6 formed therein. In the case of the lead frame 1 according to the present invention, the various shapes are selected and formed in a complex manner, and in the present invention, such selection is optional. Stress absorbing means 5 having various shapes as described above
Can be formed randomly on each of the fuse leads 3, but it is necessary to form the same shape of the stress absorbing means 5 on the fuse leads 3 having a mutually symmetrical relationship. Is preferred because it can be uniformly dispersed. Further, the stress absorbing means 5 having various shapes can be selectively formed in front of or behind the downset portion, but can also be appropriately formed so as to be located both in front and rear of the downset portion. On the other hand, square, rectangular, elliptical or rhombic stress absorbing means 5
The pores 6 formed in the semiconductor package have the advantages of absorbing the stress generated during down-setting and strengthening the bonding force with the molding resin during molding into a semiconductor package.

Further, the ground bonding region 7 can be formed by silver plating the position region of the stress absorbing means 5. Such a ground bonding is performed by bonding a wire 20 between a bond pad 11 of a semiconductor chip 10 to be mounted and a ground bonding area 7 plated with silver to improve conductivity in manufacturing a semiconductor package. (FIG. 1A shows only one wire bonding for convenience). In this case, the fuse lead 3 is formed by the stress absorbing means 5 having the above-described shape.
Therefore, even if the area of the silver-plated ground bonding region 7 is constant, the ratio of the relative area decreases. Accordingly, since the area ratio of the silver-plated region having poor bonding strength with the molding resin for manufacturing the package is reduced, the bonding strength with the molding resin at the time of manufacturing the package is improved.

FIG. 1B is an enlarged view of the downset portion 4 shown in FIG. 1A, and is provided on both sides of the fuse lead 3 so that the two bent portions defining the downset portion 4 have the shortest length. Although it can be shown that it can be formed in a width direction that is at right angles, this is optional rather than limiting in the present invention.
1 (B), when it is formed in parallel with the side of the semiconductor chip mounting plate 2 or the extension formed by the tips of a large number of leads 8 (that is, two bent portions of the fuse lead 3 are formed). FIG. 8 formed in an inclined direction with respect to both sides
(B), the residual stress due to downset can be reduced.

FIGS. 2 to 4 show fuse leads 3 respectively.
FIG. 2 is a plan view of a semiconductor package lead frame 1a to 1e according to a preferred embodiment of the present invention in which a stress absorbing means 5 having a predetermined shape is formed in front of a downset portion 4 formed in FIG. 1A is substantially the same as the semiconductor package lead frame 1 shown in FIG. 1A except for differences in shape and position.

The shapes of the stress absorbing means 5 formed on the fuse leads 3 in the semiconductor package lead frames 1a to 1e shown in FIGS. 2 to 4 are "V" -shaped, "U" -shaped, and the pores 6, respectively. , A rhombus with pores 6, and an elongated single shape with a reduced width of the fuse lead 3. The position of the stress absorbing means 5 is in front of the downset portion 4, that is, It is between the semiconductor chip mounting plate 2 and the downset unit 4. Other items are basically the same as those described with reference to FIG.

FIGS. 5 and 6 show fuse leads 3 respectively.
Is a plan view of a semiconductor package lead frame 1f to 1i according to a preferred embodiment of the present invention in which a stress absorbing means 5 of a fixed shape is formed behind the downset portion 4 formed in FIG. 1A is substantially the same as the semiconductor package lead frame 1 shown in FIG. 1A except for differences in shape and position.

The shapes of the stress absorbing means 5 formed on the fuse leads 3 in the semiconductor package lead frames 1f to 1i shown in FIGS. 5 and 6 are "V" -shaped, "U" -shaped, and fine holes 6, respectively. The stress absorbing means 5 is located at the rear of the downset part 4, that is, between the downset part 4 and the dam bar 9. . Other items are basically the same as those described with reference to FIG.

FIG. 7 shows a wire connection between the bond pad 11 of the semiconductor chip 10 mounted on the semiconductor package lead frame 1c of FIG. 3A and the ground bonding area 7 formed on the stress absorbing means 5 of the fuse lead 3. FIG. 2 is a diagram illustrating an example of a state of being electrically connected at 20. A part of the stress absorbing means 5 is silver-plated to form a ground bonding area 7, and is used to improve conductivity with bond pads 11 of the semiconductor chip 10. A wire 20 is bonded to the silver-plated ground bonding region 7 (only ground bonding to the fuse lead 3 is shown in the drawing). As described with reference to FIG. 1A, such a configuration results in an improvement in bonding strength with a molding resin during package manufacturing by minimizing a silver plating area during ground bonding. At the time of ground bonding to the ground bonding area 7 formed on the stress absorbing means 5, the bonding angle of the wire 20 to be bonded is smaller than the wire bonding angle at the time of bonding on the semiconductor chip mounting plate 2; 20 is less likely to be short-circuited by an impact in the manufacturing process or a resin inflow pressure during molding.

Such ground bonding can be applied to all lead frames for semiconductor packages according to the present invention. Although not shown in the drawings, by forming a lead strip by connecting a plurality of rows of a lead frame for a semiconductor package according to the present invention, a coil set phenomenon and a cross bow phenomenon can be minimized. The manufacturing process can be facilitated and the reliability of the final product can be improved.

As described above, according to the present invention, there are provided a plurality of semiconductor chip mounting plates, side rails, and a plurality of stress absorbing means which are integrally connected to the semiconductor chip mounting plate and the side rails and which are formed near the downset portion. Fuse leads,
A plurality of leads which are integrally connected to the side rails, are short-circuited from the semiconductor chip mounting plate, and are located between the plurality of fuse leads; It is characterized in that the residual stress generated by the set is absorbed to prevent the deformation of the lead frame.

Further, the stress absorbing means is formed on a fuse lead between the semiconductor chip mounting plate and the downset portion.

Further, the stress absorbing means is formed on a fuse lead between the downset portion and the side rail.

Further, the invention is characterized in that the stress absorbing means formed on the fuse lead is integrally formed in a "V" shape on the same plane as the lead.

Further, the invention is characterized in that the stress absorbing means formed on the fuse lead is integrally formed in a "U" shape on the same plane as the lead.

Further, the invention is characterized in that the stress absorbing means formed in the fuse lead is integrally formed in a square or a rectangle having pores on the same plane as the lead.

[0032] The stress absorbing means formed on the fuse lead is integrally formed in a rhombus having pores on the same plane as the lead.

Further, the stress absorbing means formed on the fuse lead is integrally formed in an elongated shape with a reduced width on the same plane as the lead.

The stress absorbing means formed on the fuse lead is selected from the group consisting of a "V" shape, a "U" shape, and a square, a rectangle, an ellipse, and a rhombus having pores formed therein. It is characterized by including at least two or more shapes.

Further, in the shape of the stress absorbing means of the fuse lead, the symmetrical fuse leads are the same.

Further, the stress absorbing means is formed in a distributed manner between the semiconductor chip mounting plate and the downset portion and between the downset portion and the side rail.

Further, a part of the stress absorbing means is silver-plated so that the bonding area between the molding resin and the lead frame is improved by reducing the relative area ratio of the silver-plated area to the entire area of the fuse lead. A ground bonding region is formed.

In order to reduce the residual stress due to the downset, the two bent portions defining the downset portion are formed in the width direction perpendicular to both sides of the fuse lead so as to have the shortest length. I do.

A dam bar for integrally connecting and supporting the lead and the fuse lead is formed at a position adjacent to the side rail between the side rail and the semiconductor chip mounting plate.

A semiconductor chip mounting plate, a side rail,
A plurality of fuse leads integrally formed with the semiconductor chip mounting plate and the side rails, and formed with a stress absorbing means formed near the downset portion for absorbing residual stress generated at the time of downsetting and preventing deformation of the frame; And a plurality of leads which are integrally connected to the side rails, are short-circuited from the semiconductor chip mounting plate and are located between the plurality of fuse leads, and wherein the fuse leads have stress absorbing means formed therein. It is characterized in that the lead frames are arranged in a line.

[0041]

As described above, the lead frame for a semiconductor package according to the present invention can uniformly absorb and disperse the residual stress generated by down-setting by forming various shapes of stress absorbing means on the fuse lead. hand,
Forming a ground bonding area in a partial area of the stress absorbing means located at a position separated from the semiconductor chip mounting plate and performing wire bonding while minimizing deformation of the lead frame, coil set of the lead frame strip or crossbow phenomenon. Thus, the present invention is a novel and useful invention capable of improving the bonding force with the molding resin and improving the wire bonding strength.

[Brief description of the drawings]

FIG. 1A is a plan view of a lead frame for a semiconductor package according to a preferred embodiment of the present invention, having stress absorbing means of various shapes in front and rear of a downset portion formed in a fuse lead; () Is an enlarged view of the downset portion of FIG.

FIGS. 2A and 2B are plan views of a lead frame for a semiconductor package according to a preferred embodiment of the present invention, each having a predetermined shape of stress absorbing means in front of a downset portion formed in a fuse lead; is there.

FIGS. 3A and 3B are plan views of a lead frame for a semiconductor package according to a preferred embodiment of the present invention having a predetermined shape of stress absorbing means in front of a downset portion formed in a fuse lead. is there.

FIG. 4 is a plan view of a lead frame for a semiconductor package according to a preferred embodiment of the present invention, having a predetermined shape of stress absorbing means in front of a downset portion formed on a fuse lead;

FIGS. 5A and 5B are plan views of a lead frame for a semiconductor package according to a preferred embodiment of the present invention, each having a stress absorbing means having a predetermined shape behind a downset portion formed in a fuse lead; is there.

FIGS. 6A and 6B are plan views of a lead frame for a semiconductor package according to a preferred embodiment of the present invention having a predetermined shape of stress absorbing means respectively behind a downset portion formed in a fuse lead; is there.

FIG. 7 is an example showing a state in which a bond pad of the semiconductor chip mounted on the lead frame of FIG. 3A and a ground bonding region formed in the stress absorbing means of the fuse lead are electrically connected by a wire. FIG.

8 (A) is a schematic plan view of a conventional lead frame strip of a number of conventional unit lead frames having fuse leads, and FIG. 8 (B) is an enlarged view of a downset portion of FIG. 8 (A).

FIG. 9 is a cross-sectional view taken along line AA of FIG.

FIG. 10 is an explanatory view illustrating deformation of a conventional lead frame strip due to mechanical stress when forming a downset portion on a fuse lead.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1, 1a-1i The lead frame for semiconductor packages of this invention 2 Semiconductor chip mounting board 3 Fuse lead 4 Downset part 5 Stress absorption means 6 Pores 7 Ground bonding area 8 Lead 9 Dam bar 10 Semiconductor chip 11 Bond pad 20 Wire 100 Many Lead frame strip composed of conventional unit frames

Claims (15)

[Claims] A semiconductor chip mounting plate, side rails, and a plurality of fuse leads integrally connected to the semiconductor chip mounting plate and the side rails, and having a stress absorbing means formed near a downset portion; A plurality of leads which are integrally connected to a side rail, are short-circuited from the semiconductor chip mounting plate, and are located between the plurality of fuse leads; A lead frame for a semiconductor package, wherein the lead frame is prevented from being deformed by absorbing residual stress generated by the lead frame. 2. The lead frame for a semiconductor package according to claim 1, wherein said stress absorbing means is formed in a fuse lead between said semiconductor chip mounting plate and said downset portion. 3. The lead frame for a semiconductor package according to claim 1, wherein said stress absorbing means is formed in a fuse lead between a downset portion and a side rail. 4. The semiconductor package lead according to claim 2, wherein the stress absorbing means formed on the fuse lead is integrally formed in a “V” shape on the same plane as the lead. flame. 5. The semiconductor package lead according to claim 2, wherein the stress absorbing means formed on the fuse lead is integrally formed in a “U” shape on the same plane as the lead. flame. 6. The method according to claim 2, wherein the stress absorbing means formed on the fuse lead is integrally formed in a square or a rectangle having pores on the same plane as the lead. Lead frame for semiconductor package. 7. The method according to claim 2, wherein the stress absorbing means formed on the fuse lead is integrally formed with a rhombus having a pore formed on the same plane as the lead.
The lead frame for a semiconductor package described in the above. 8. The method according to claim 2, wherein the stress absorbing means formed on the fuse lead is integrally formed in an elongated shape with a reduced width on the same plane as the lead.
The lead frame for a semiconductor package described in the above. 9. The stress absorbing means formed on the fuse lead is selected from the group consisting of a "V" shape, a "U" shape, and a square, a rectangle, an ellipse, and a rhombus having pores formed therein. 4. The lead frame for a semiconductor package according to claim 1, wherein the lead frame includes at least two or more shapes. 10. The lead frame for a semiconductor package according to claim 9, wherein the shape of the stress absorbing means of the fuse lead is such that the symmetrical fuse leads are the same. 11. The lead frame for a semiconductor package according to claim 8, wherein the stress absorbing means is formed in a distributed manner between the semiconductor chip mounting plate and the downset portion and between the downset portion and the side rail. . 12. A partial area of the stress absorbing means is silver-plated so that the bonding area between the molding resin and the lead frame is improved by reducing the relative area ratio of the silver-plated area to the entire area of the fuse lead. 4. The lead frame for a semiconductor package according to claim 1, wherein a ground bonding region is formed. 13. In order to reduce residual stress due to downset, two bent portions defining the downset portion are formed in a width direction perpendicular to both sides of the fuse lead so as to have the shortest length. Claims 1 to 3
The lead frame for a semiconductor package according to any one of the above. 14. A dam bar for integrally connecting and supporting a lead and a fuse lead at a position adjacent to the side rail between the side rail and the semiconductor chip mounting plate. Lead frame for semiconductor package. 15. A semiconductor chip mounting plate, a side rail, and a stress absorbing member integrally connected to the semiconductor chip mounting plate and the side rail for absorbing residual stress generated at the time of downset and preventing deformation of the frame. The means comprises a plurality of fuse leads formed near the downset portion, and a plurality of leads integrally connected to the side rail, short-circuited from the semiconductor chip mounting plate, and located between the plurality of fuse leads. A lead frame strip, wherein a lead frame for a semiconductor package in which stress absorbing means is formed on a fuse lead is arranged in a line.