JPH10335824A - Multilayered wiring board and its manufacture - Google Patents

Multilayered wiring board and its manufacture

Info

Publication number
JPH10335824A
JPH10335824A JP15309497A JP15309497A JPH10335824A JP H10335824 A JPH10335824 A JP H10335824A JP 15309497 A JP15309497 A JP 15309497A JP 15309497 A JP15309497 A JP 15309497A JP H10335824 A JPH10335824 A JP H10335824A
Authority
JP
Japan
Prior art keywords
hole
wiring board
via hole
layer
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15309497A
Other languages
Japanese (ja)
Inventor
Keiichi Kishimoto
圭一 岸本
Masaki Uemae
昌己 上前
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Carbide Industries Co Inc
Original Assignee
Nippon Carbide Industries Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Carbide Industries Co Inc filed Critical Nippon Carbide Industries Co Inc
Priority to JP15309497A priority Critical patent/JPH10335824A/en
Publication of JPH10335824A publication Critical patent/JPH10335824A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To execute drilling with a prescribed condition and to set wiring density to be high by forming the hole of a large diameter in a connection desiring place with a through-hole and/or a via hole, formed on a wiring board and electrically connecting conductor layers via the hole. SOLUTION: This wiring board constituted of the through-hole 11 and the circuit of the conductor layer 2 is generated in an insulating resin layer 1, a graphitization is executed, and a resin body with a copper foil 3 is stacked. Copper plating is executed on the surface of a copper foil 5a and the inner wall side of the hole 13 and the via hole 13, which is electrically connected with the conductor layers 5 and 2, is formed. Next, the hole whose diameter is larger than the via hole is formed above the via hole 13 by the irradiation with a laser. The via hole 14 which is electrically connected with the conductor layers 6 and 5 is formed, and a circuit pattern is formed. In the multilayered wiring board which is thus generated, drilling work is easy and the reliability of electrical connections is high.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、多層配線板のスルホー
ル、ビアホールなどの形成に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the formation of through holes, via holes and the like in a multilayer wiring board.

【0002】[0002]

【従来の技術】近年、電子機器の小型化に伴い、銅張り
の多層配線板の小型化、高密度化、軽量化などのために
多層配線板の導体幅、導体間隙、スルホール、ビアホー
ルなどの微細化、小径化などが求められている。これら
の要求のうちスルホール、ビアホールが積層された多層
配線板の表面から加工、形成されている。
2. Description of the Related Art In recent years, with the miniaturization of electronic equipment, the conductor width, conductor gap, through hole, via hole and the like of a multilayer wiring board have been developed in order to reduce the size, density, and weight of a copper-clad multilayer wiring board. Miniaturization and small diameter are required. Of these requirements, the through hole and the via hole are processed and formed from the surface of the multilayer wiring board on which the through hole is laminated.

【0003】たとえば、積層された多層配線板の表面か
らドリルにより貫通孔をあける、ドリルにより途中まで
孔あけする。積層された多層配線板の表面からレーザに
より貫通孔、非貫通孔を形成するなどである。
[0003] For example, a through hole is drilled from the surface of a laminated multilayer wiring board by a drill, and a hole is partially drilled by a drill. For example, through holes and non-through holes are formed by laser from the surface of the laminated multilayer wiring board.

【0004】[0004]

【発明が解決しようとする課題】上記のような従来の多
層配線板の孔あけ加工の方法では製造工程に問題があ
る。ドリルによる方法においては、孔径が大きい、絶縁
層が薄い多層配線板の厚さ方向の途中で孔あけを終了す
る孔あけ加工工程が非常に難しいなどの問題がある。レ
ーザによる方法においては、積層した導体層および絶縁
樹脂層並びに内装の導体層および内装の絶縁樹脂層の孔
あけ被材料の異種層に孔あけ加工工程のレーザの加工条
件コントロールが非常に困難である問題がある。また、
下層、上層のするホールおよび/またはビアホールの位
置が異なる場所に形成されていて、接続のための広い面
積が必要とされている。図2のA寸法(一個のときの約
二倍)となり丸形のランドにおいては一個のときのラン
ドに対して二乗の四倍面積となる。本発明に係る多層配
線板およびその製造方法は、これらの孔あけ加工工程の
困難さを解決すること、配線密度を高密度にすることで
ある。
However, the conventional method for forming a hole in a multilayer wiring board as described above has a problem in the manufacturing process. In the method using a drill, there are problems such as a very large hole diameter, and a very difficult drilling process for completing the drilling in the thickness direction of a multilayer wiring board having a thin insulating layer. In the method using a laser, it is very difficult to control the processing conditions of the laser in the drilling process for different layers of the material to be drilled for the laminated conductor layer and the insulating resin layer, and for the inner conductor layer and the interior insulating resin layer. There's a problem. Also,
Since the positions of the lower and upper holes and / or via holes are different from each other, a large area is required for connection. The dimension A in FIG. 2 (approximately twice as large as one piece) becomes four times the square of a single land. A multilayer wiring board and a method of manufacturing the same according to the present invention are to solve these difficulties of the drilling process and to increase the wiring density.

【0005】[0005]

【課題を解決するための手段】本発明は、導体層間を接
続するスルホール、ビアホールを有する多層配線板およ
びその製造方法において、スルホールおよび/またはビ
アホールを形成した配線基板に絶縁樹脂層および導体層
を積層し、積層した該導体層および該絶縁樹脂層の該配
線基板に形成した該スルホールおよび/または該ビアホ
ールとの接続所望位置に該スルホールおよび/または該
ビアホールの径よりも大きい径の孔を形成し、該孔を介
して該配線基板の該スルホールおよび/または該ビアホ
ール並びに積層した該導体層を電気接続することであ
り、最外層の導体層および絶縁樹脂層を孔あけするのみ
であり一定の条件で孔あけできるコントロールの安易
な、また配線密度が高密度な多層配線板およびその製造
方法を提供することである。
SUMMARY OF THE INVENTION The present invention relates to a multilayer wiring board having through holes and via holes for connecting conductive layers and a method of manufacturing the same, comprising the steps of forming an insulating resin layer and a conductive layer on a wiring board having through holes and / or via holes formed therein. A hole having a diameter larger than the diameter of the through hole and / or the via hole is formed at a desired position of connection between the laminated conductor layer and the insulating resin layer with the through hole and / or the via hole formed in the wiring board. And electrically connecting the through-hole and / or the via-hole of the wiring board and the laminated conductor layer through the hole, and merely forms a hole in the outermost conductor layer and the insulating resin layer. By providing a multi-layered wiring board with high wiring density and easy control, which can be drilled under conditions, and a method of manufacturing the same. That.

【0006】以下、本発明に係る多層配線板およびその
製造方法について詳述する。図1は、本発明に係る多層
配線板およびその製造方法の一実施態様を示す工程別断
面図である。図1(a)はスルホールを形成した配線基
板の断面図である。図1(b)は配線基板に絶縁樹脂層
および導体層を積層する過程の断面図である。図1
(c)は(b)で積層した絶縁樹脂層および導体層にビ
アホールを形成した断面図である。図1(d)は(c)
に絶縁樹脂層および導体層を積層し、更にビアホールを
形成した断面図である。
Hereinafter, a multilayer wiring board and a method of manufacturing the same according to the present invention will be described in detail. FIG. 1 is a cross-sectional view illustrating a multilayer wiring board and a method for manufacturing the same according to an embodiment of the present invention. FIG. 1A is a cross-sectional view of a wiring board in which a through hole is formed. FIG. 1B is a cross-sectional view showing a process of laminating an insulating resin layer and a conductor layer on a wiring board. FIG.
(C) is a sectional view in which via holes are formed in the insulating resin layer and the conductor layer laminated in (b). FIG. 1 (d) is (c)
FIG. 4 is a cross-sectional view in which an insulating resin layer and a conductor layer are laminated on each other, and a via hole is further formed.

【0007】本発明に係る多層配線板およびその製造方
法は、図1に示す如くコア・ボードとなる配線基板の所
望に応じて孔あけを行い、サブトラクティブ方法、アデ
ィティブ方法などのそれ自体公知の方法で配線パターン
を形成し、該配線基板の片面または両面に絶縁樹脂層お
よび導体層をそれ自体公知の方法で積層し、該導体層お
よび該絶縁樹脂層に該配線基板のスルホールおよび/ま
たはビアホールの径よりも大きい孔をレーザを用いて孔
あけ加工し(該絶縁樹脂層の下層に位置する配線基板の
導体層を孔あけすることなく)、該孔に無電解メッキ方
法、電解メッキ方法により導体層間を電気接続するビア
ホールを形成し、エッチング方法により配線パターンを
形成して多層配線板を作成する。更に、所望により絶縁
樹脂層、導体層を積層し、レーザによる孔あけを行い、
電気接続を行い、配線パターンを形成して、より層数の
多い多層配線基板を作成することができる。
As shown in FIG. 1, a multilayer wiring board and a method of manufacturing the same according to the present invention perform perforation as required on a wiring board serving as a core board, and employ a known method such as a subtractive method or an additive method. A wiring pattern is formed by a method, an insulating resin layer and a conductor layer are laminated on one or both surfaces of the wiring board by a method known per se, and a through hole and / or a via hole of the wiring board are formed on the conductor layer and the insulating resin layer. Hole is formed by using a laser (without drilling a conductor layer of a wiring board located below the insulating resin layer), and the hole is formed by an electroless plating method or an electrolytic plating method. Via holes for electrically connecting the conductor layers are formed, and a wiring pattern is formed by an etching method to form a multilayer wiring board. Further, if desired, an insulating resin layer and a conductor layer are laminated, and a hole is formed by a laser,
Electrical connection is made, a wiring pattern is formed, and a multilayer wiring board having more layers can be produced.

【0008】本発明に係る多層配線板およびその製造方
法における導体層は特に限定するものではないが銅、ス
テンレス、ニクロム、タングステン、アルミニウムなど
の金属箔が好ましい。更に好ましくは、銅、ステンレス
の金属箔である。特に好ましくは、圧延銅箔、電解銅箔
であり、電解銅箔は絶縁樹脂との接着・密着により優れ
ている。また金属箔の厚みを特に限定するものではない
が0.5〜50μmであることが好ましい。更に好まし
くは1〜40μmである。特に好ましくは3〜20μm
である。このような厚みの金属箔は、柔軟でレーザ加
工、食刻が容易である。
The conductor layer in the multilayer wiring board and the method of manufacturing the same according to the present invention is not particularly limited, but is preferably a metal foil such as copper, stainless steel, nichrome, tungsten and aluminum. More preferably, it is a metal foil of copper or stainless steel. Particularly preferred are a rolled copper foil and an electrolytic copper foil, and the electrolytic copper foil is more excellent in adhesion and adhesion to an insulating resin. The thickness of the metal foil is not particularly limited, but is preferably 0.5 to 50 μm. More preferably, it is 1 to 40 μm. Particularly preferably, 3 to 20 μm
It is. The metal foil having such a thickness is flexible and easily laser-processed and etched.

【0009】本発明に係る多層配線板およびその製造方
法における絶縁樹脂層は特に限定するものではないが好
ましくは、エポキシ、ポリイミド、ボリエステル、フェ
ノール、ポリフェニレンエーテル、ポリフェニレンオキ
シド、ビスマレイミド・トリアジンなどの少なくとも一
種類を主成分とする樹脂類である。また該絶縁樹脂層
は、ガラス、アラミド、紙、多孔質ポリテトラフルオロ
エチレン、クォーツなどの不織布、織布などに樹脂類を
含浸させた絶縁樹脂でもよい。また該絶縁樹脂層には樹
脂ビーズ、アルミナ粉、酸化チタン粉、炭酸カルシウム
粉などの有機、無機の充填剤が充填されていてもよい。
The insulating resin layer in the multilayer wiring board and the method of manufacturing the same according to the present invention is not particularly limited, but is preferably at least one of epoxy, polyimide, polyester, phenol, polyphenylene ether, polyphenylene oxide, bismaleimide triazine and the like. Resins mainly composed of one type. The insulating resin layer may be an insulating resin obtained by impregnating a nonwoven fabric such as glass, aramid, paper, porous polytetrafluoroethylene, or quartz, or a woven fabric with a resin. The insulating resin layer may be filled with an organic or inorganic filler such as resin beads, alumina powder, titanium oxide powder, and calcium carbonate powder.

【0010】本発明に係る多層配線板およびその製造方
法における積層した導体層及び絶縁樹脂層への孔の形成
は、下層に形成されたスルホールおよび/またはビアホ
ールの径よりも大きい径の孔をレーザにより形成するこ
とである。孔の形成位置は、下層に形成されたスルホー
ルおよび/またはビアホールの同位置に形成する(ビア
・オン・ビア方法)。このように形成される孔は、積層
した導体層および絶縁樹脂層並びに下層に形成されたス
ルホールおよび/またはビアホール内の樹脂をレーザに
より溶融、気化、分解などして形成される。
In the multilayer wiring board and the method for manufacturing the same according to the present invention, the holes in the laminated conductor layer and insulating resin layer are formed by using a hole having a diameter larger than the diameter of the through hole and / or via hole formed in the lower layer. It is formed by. The holes are formed at the same positions as the through holes and / or via holes formed in the lower layer (via-on-via method). The holes formed in this manner are formed by melting, vaporizing, decomposing, or the like the resin in the laminated conductor layer and insulating resin layer and the resin in the through hole and / or via hole formed in the lower layer using a laser.

【0011】従来の下層、上層での異なる位置にスルホ
ールおよび/またはビアホールを形成するのに比較し
て、ビア・オン・ビア方法でスルホールおよび/または
ビアホールの形成によるランドの面積が広くなることな
く配線を高密度にできる。下層、上層の孔の位置が異な
る場合、図2のようにランド幅(A)がビア・オン・ビ
ア方法の約二倍となり、ランドが丸形の場合には面積が
約四倍となる。
Compared with the conventional method of forming through holes and / or via holes at different positions in the lower layer and the upper layer, the via-on-via method does not increase the land area due to the formation of the through holes and / or via holes. Wiring density can be increased. When the positions of the holes in the lower layer and the upper layer are different, the land width (A) is about twice that of the via-on-via method as shown in FIG. 2, and the area is about four times when the land is round.

【0012】大きい径の孔を形成すべくレーザを照射す
るため下層のスルホールおよび/またはビアホールの内
面に存在する樹脂がきれいに除去され、且つ下層の導体
層が露出されるためメッキ方法などにより積層した該導
体層および下層の該導体層が完全・容易に電気接続でき
る。
Since laser is irradiated to form a hole having a large diameter, the resin existing on the inner surface of the lower through hole and / or via hole is removed cleanly, and the lower conductive layer is exposed. The conductor layer and the lower conductor layer can be completely and easily electrically connected.

【0013】形成されるランドは、形状・寸法など限定
するものではないが、高密度化のためレーザ加工による
微細なランドであることが好ましい、たとえば1mm〜
0.03mmである。さらに好ましくは、0.7mm〜
0.05mmである。特に好ましくは、0.5mm〜
0.1mmである。
The land to be formed is not limited in shape and size, but is preferably a fine land formed by laser processing for high density, for example, from 1 mm to 1 mm.
0.03 mm. More preferably, 0.7 mm ~
It is 0.05 mm. Particularly preferably, 0.5 mm or more
0.1 mm.

【0014】レーザにより孔あけする導体層の表面処理
を特に限定するものでないが、導体層の表面にレーザエ
ネルギーの吸収率の高い処理を施すこと、または、導体
層にあらかじめ孔をあけておくことが好ましい。特に好
ましくは、導体の表面にレーザエネルギーの吸収率の高
い処理を施すことである。レーザエネルギーの吸収率の
高い処理としては、酸化ニッケル、酸化銅、酸化鉄、な
どを主成分とする金属酸化物による処理、コンゴーレッ
ド、メチルバイオレットなどの染料、カーボンなどの顔
料で被覆する処理が例示できる。
The surface treatment of the conductor layer to be perforated by a laser is not particularly limited, but the surface of the conductor layer is subjected to a treatment having a high absorption rate of laser energy, or the conductor layer is previously perforated. Is preferred. Particularly preferably, the surface of the conductor is subjected to a treatment having a high laser energy absorption rate. Treatments with high laser energy absorption include treatment with metal oxides containing nickel oxide, copper oxide, iron oxide, etc. as a main component, treatment with dyes such as Congo red and methyl violet, and pigments such as carbon. Can be illustrated.

【0015】レーザの種類としては、炭酸ガスレーザ、
Xeレーザ、エキシマノーザ、YAGレーザ、Arレー
ザ、紫外線レーザなどが例示できる。レーザエネルギー
としては、導体層及び絶縁樹脂層により変化させること
ができる。
As the type of laser, a carbon dioxide laser,
An Xe laser, an excimer laser, a YAG laser, an Ar laser, an ultraviolet laser and the like can be exemplified. Laser energy can be changed by the conductor layer and the insulating resin layer.

【0016】このように作成された本発明に係る多層配
線板およびその製造方法は、下層部のスルホールおよび
/またはビアホールより大きい径の孔あけを行うため下
層部の該スルホールおよび/または該ビアホールの内部
の絶縁樹脂の除去が完全であり、電気接続の信頼性が高
く、スルホールおよび/またはビアホールのランドが広
くならなく配線密度が高密度である。
The multilayer wiring board and the method of manufacturing the same according to the present invention, which are formed as described above, are used for forming a hole having a diameter larger than that of the lower through hole and / or the via hole. The removal of the insulating resin inside is complete, the reliability of the electrical connection is high, the land of the through hole and / or the via hole is not wide, and the wiring density is high.

【0017】[0017]

【実施例】以下、本発明に係る多層配線板およびその製
造方法の実施例を説明する。尚、本発明に係る多層配線
板およびその製造方法は以下の実施例に限られるもので
はない。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a multilayer wiring board and a method of manufacturing the same according to the present invention will be described below. The multilayer wiring board and the method of manufacturing the same according to the present invention are not limited to the following embodiments.

【0018】(実施例1)先ず、エポキシ樹脂1の両面
に厚さ18μmの銅箔2aをラミネートした銅張り両面
板に貫通孔11を形成し、銅箔表面および貫通孔の内壁
面にメッキ銅2bを析出させ、フォトエッチング方法に
より回路パターンを形成して絶縁樹脂層1にスルホール
11および導体層2の回路より成る配線基板を作成し
た。この後、該配線基板に黒化処理を施し酸化銅層を形
成後、該酸化銅層を金属銅に化学還元する処理を施し
た。図1(a)
(Embodiment 1) First, a through-hole 11 was formed in a copper-clad double-sided board obtained by laminating a copper foil 2a having a thickness of 18 μm on both sides of an epoxy resin 1, and plated copper 2b was deposited, and a circuit pattern was formed by a photo-etching method to prepare a wiring board including the circuit of the through hole 11 and the conductor layer 2 in the insulating resin layer 1. Thereafter, the wiring substrate was subjected to a blackening process to form a copper oxide layer, and then subjected to a process of chemically reducing the copper oxide layer to metallic copper. FIG. 1 (a)

【0019】次に、銅箔付き樹脂体3(約50μmの絶
縁樹脂層4(エポキシ樹脂)を付着させた厚み約12μ
mの銅箔5a)を該配線基板の両面に配置・位置合わせ
を行い(図1(b))積層した(圧力25Kg、温度1
80度、120分)。
Next, a resin body 3 with a copper foil (about 12 μm thick with an insulating resin layer 4 (epoxy resin) of about 50 μm attached)
m copper foil 5a) was placed and aligned on both sides of the wiring board (FIG. 1 (b)) and laminated (pressure 25 kg, temperature 1).
80 degrees, 120 minutes).

【0020】次に、ビアホール13形成用の孔の形成位
置にレーザの照射径より20μm小さい円形状の黒化処
理を該銅箔5aの表面に形成した。
Next, a circular blackening process smaller by 20 μm than the laser irradiation diameter was formed on the surface of the copper foil 5a at the position where the hole for forming the via hole 13 was formed.

【0021】次に、炭酸ガスレーザ装置の加工テーブル
に多層配線板を位置決めセットし、レーザ(パルス幅2
5μs、周波数100Hz)を照射して、銅箔5aおよ
び絶縁樹脂層4に0.1mmの孔13の孔あけ加工をし
た。
Next, the multilayer wiring board is positioned and set on the processing table of the carbon dioxide laser device, and the laser (pulse width 2) is set.
5 μs, a frequency of 100 Hz) to form a 0.1 mm hole 13 in the copper foil 5 a and the insulating resin layer 4.

【0022】次に、過マンガン酸カリウム法により該孔
13の内部のスミア処理を行い、該銅箔5aの表面およ
び該孔13の内側壁面に銅メッキを施し導体層5および
導体層2と電気接続したビアホール13を形成し、フォ
トエッチング方法により回路パターンを形成した。ビア
ホール13に形成されたランドは0.4mmの丸形であ
った。(図1(c))
Next, the inside of the hole 13 is subjected to a smear treatment by a potassium permanganate method, and the surface of the copper foil 5a and the inner wall surface of the hole 13 are plated with copper to electrically connect the conductor layers 5 and 2 to each other. A connected via hole 13 was formed, and a circuit pattern was formed by a photoetching method. The land formed in the via hole 13 was a 0.4 mm round shape. (Fig. 1 (c))

【0023】次に、導体層5の表面に黒化処理を施し酸
化銅層を形成後、該酸化銅層を金属銅に化学還元する処
理を施し、銅箔付き樹脂体を更に積層した。
Next, after the surface of the conductor layer 5 was subjected to a blackening treatment to form a copper oxide layer, the copper oxide layer was subjected to a chemical reduction treatment to metallic copper, and a resin body with a copper foil was further laminated.

【0024】次に、導体層6の銅箔表面に黒化処理を施
し、レーザの照射によりビアホール13の上位置に該ビ
アホール13より大きい径の0.2mmの孔14を形成
した。該孔14は、ビアホール13の内部の絶縁樹脂も
除去していた。次に、孔の内部のスミア処理を行い銅メ
ッキを施し導体層6および導体層5と電気接続したビア
ホール14を形成し、フォトエッチング方法により回路
パターンを形成した。ビアホール14のランドは0.4
mmの丸形であった。(図1(d))
Next, the surface of the copper foil of the conductive layer 6 was subjected to blackening treatment, and a hole 14 having a diameter larger than the via hole 13 and having a diameter of 0.2 mm was formed above the via hole 13 by laser irradiation. The hole 14 also removed the insulating resin inside the via hole 13. Next, the inside of the hole was smeared and plated with copper to form a via hole 14 electrically connected to the conductor layer 6 and the conductor layer 5, and a circuit pattern was formed by a photoetching method. Land of via hole 14 is 0.4
mm round. (Fig. 1 (d))

【0025】次に、表面の配線導体を保護するレジスト
を半田付けのエリアを除いて印刷・乾燥・硬化して多層
配線板を製作した。
Next, a resist for protecting the wiring conductors on the surface was printed, dried and cured except for the soldering area, to produce a multilayer wiring board.

【0026】このように製作された該多層配線基板は、
孔あけ加工が容易であり電気接続の信頼性も高く、スル
ホールおよび/またはビアホールのランドがほとんど広
くなることがなかった。
The multilayer wiring board thus manufactured is
Drilling was easy, the reliability of electrical connection was high, and the land of the through hole and / or via hole was hardly widened.

【0027】(実施例2)実施例1におけるレーザの照
射径より20μm小さい円形状の黒化処理を施すことな
く、また、炭酸ガスレーザ装置を紫外線レーザ装置(N
d:YAGの波長355μmを利用した個体UVレー
ザ)に変更して孔あけ加工をする以外は実施例1の製造
工程と略同様にして多層配線基板を製作した。
(Embodiment 2) A circular carbon black laser apparatus was used without performing a circular blackening process smaller than the laser irradiation diameter in the embodiment 1 by 20 μm, and an ultraviolet laser apparatus (N
d: A multilayer wiring board was manufactured in substantially the same manner as in the manufacturing process of Example 1 except that a hole was formed by changing to a solid UV laser using a wavelength of 355 μm of YAG.

【0028】このように製作された多層配線基板は、レ
ーザのコントロールが安易であり、導電体層へのダメー
ジがなく、小径の孔あけ加工が容易であり、絶縁樹脂層
はレーザにより化学変化を起こして分解除去されるため
炭素化することがなくカーボンの残渣問題がなく、配線
密度が高密度であり、層間密着性が良好であり、電気接
続の信頼性が高かった。
The multilayer wiring board manufactured in this manner is easy to control the laser, has no damage to the conductor layer, is easy to drill a small diameter hole, and the insulating resin layer is chemically changed by the laser. Since it was raised and decomposed and removed, it did not carbonize, there was no carbon residue problem, the wiring density was high, the interlayer adhesion was good, and the reliability of electrical connection was high.

【0029】[0029]

【発明の効果】本発明に係る多層配線板およびその製造
方法では、最外層の導体層および絶縁樹脂層に孔あけす
ることでありコントロールが安易である。特にレーザに
よる孔あけにおいては、次層の導体層で孔が停止させ、
下層部のスルホールおよび/またはビアホールより大き
い径の孔のため位置ズレをカバーして電気接続が可能で
ある。また、下層のスルホールおよび/またはビアホー
ルと同じ位置にレーザによる孔あけを行うためスルホー
ルおよび/またはビアホールの占める面積が広くなるこ
となく形成できる。などの加工工程の困難さを除いた多
層配線板およびその製造方法を提供できる。
In the multilayer wiring board and the method of manufacturing the same according to the present invention, the outermost conductor layer and the insulating resin layer are perforated, so that the control is easy. Especially in drilling by laser, the hole stops at the next conductor layer,
Due to the hole having a larger diameter than the through hole and / or the via hole in the lower layer portion, it is possible to cover the positional deviation and make an electrical connection. Further, since the laser drilling is performed at the same position as the lower layer through hole and / or via hole, it can be formed without increasing the area occupied by the through hole and / or via hole. It is possible to provide a multilayer wiring board and a method of manufacturing the same, which eliminate the difficulty of processing steps such as the above.

【0030】[0030]

【図面の簡単な説明】[Brief description of the drawings]

図1(a)〜(d)は、本発明に係る多層配線板および
その製造方法の一実施態様を示す工程別の断面図であ
る。図2は、従来の方法による断面図である。
1 (a) to 1 (d) are cross-sectional views showing steps of an embodiment of a multilayer wiring board and a method of manufacturing the same according to the present invention. FIG. 2 is a cross-sectional view according to a conventional method.

【0031】[0031]

【符号の説明】[Explanation of symbols]

1 絶縁樹脂層1 2 導体層2 2a 銅箔2a 2b メッキ銅2b 3 銅箔付き樹脂体 4 絶縁樹脂層4 5 導体層5 5a 銅箔5a 6 導体層6 11 スルホール11 13 ビアホール13 14 ビアホール14 REFERENCE SIGNS LIST 1 insulating resin layer 1 2 conductor layer 2 2a copper foil 2a 2b plated copper 2b 3 resin body with copper foil 4 insulating resin layer 4 5 conductor layer 5 5a copper foil 5a 6 conductor layer 6 11 through hole 11 13 via hole 13 14 via hole 14

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成9年7月22日[Submission date] July 22, 1997

【手続補正1】[Procedure amendment 1]

【補正対象書類名】図面[Document name to be amended] Drawing

【補正対象項目名】図2[Correction target item name] Figure 2

【補正方法】追加[Correction method] Added

【補正内容】[Correction contents]

【図2】 FIG. 2

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 導体層間を接続するスルホール、ビアホ
ールを有する多層配線板およびその製造方法において、
スルホールおよび/またはビアホールを形成した配線基
板に絶縁樹脂層および導体層を積層し、積層した該導体
層および該絶縁樹脂層の該配線基板に形成した該スルホ
ールおよび/または該ビアホールとの接続所望位置に該
スルホールおよび/または該ビアホールの径よりも大き
い径の孔を形成し、該孔を介して該配線基板の該スルホ
ールおよび/または該ビアホール並びに積層した該導体
層を電気接続してなることを特徴とする多層配線板およ
びその製造方法。
1. A multilayer wiring board having through holes and via holes for connecting conductive layers and a method of manufacturing the same.
An insulating resin layer and a conductor layer are laminated on a wiring board having a through hole and / or a via hole formed thereon, and a desired connection position of the laminated conductor layer and the insulating resin layer with the through hole and / or the via hole formed on the wiring board is provided. Forming a hole having a diameter larger than the diameter of the through hole and / or the via hole, and electrically connecting the through hole and / or the via hole of the wiring board and the laminated conductor layer through the hole. A multilayer wiring board and a method of manufacturing the same.
JP15309497A 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture Pending JPH10335824A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15309497A JPH10335824A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15309497A JPH10335824A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JPH10335824A true JPH10335824A (en) 1998-12-18

Family

ID=15554850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15309497A Pending JPH10335824A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JPH10335824A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
JP2001007526A (en) * 1999-06-18 2001-01-12 Ibiden Co Ltd Multilayer buildup wiring board and its manufacture
JP2001308529A (en) * 2000-04-21 2001-11-02 Ibiden Co Ltd Laminated wiring board and its manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
JP2001007526A (en) * 1999-06-18 2001-01-12 Ibiden Co Ltd Multilayer buildup wiring board and its manufacture
JP2001308529A (en) * 2000-04-21 2001-11-02 Ibiden Co Ltd Laminated wiring board and its manufacturing method

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