JPH1187930A - Manufacture of multilayered printed circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve electrical connection reliability by filling heat resistant conductive paste or the like in a penetrating through-hole and a hole of a via through-hole, smoothing the paste, then forming a copper-plating layer, and forming a land on a conductive via through-hole and a land on the conductive penetrating through-hole. SOLUTION: Copper-plating layers 34, 35 are executed by an electrolytic copper plating method form via through-holes 42A, 42B and a penetrating through-hole 36, and solderless type nonconductor filler-contained insulating paste 37 or heat resistant conductive paste 38 is filled in the hole. Thereafter, the pastes 37, 38 projected from peripheries of the holes 42A, 42B and the hole 36 are emitted by a laser beam, smoothed, and then copper-plating layers 40, 41 are formed by an electrolytic copper-plating method. Then, the conductive via through-holes 42A, 42B, a conductive penetrating through-hole 36A, a land on the conductive via through hole, and a land on the conductive penetrating through-hole are formed by a photoetching method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board having an inner layer circuit and an outermost layer circuit on a land on a conductive via hole and a land on a conductive through-hole hole, and more particularly to an improvement in the density of surface-mounted components and an increase in speed. The present invention relates to a method for manufacturing a multilayer printed wiring board.

[0002]

2. Description of the Related Art Recently, with the advancement of electronic equipment and package technology, printed wiring boards are rapidly required to be compatible with high-density mounting and high-speed, and multilayer wiring is being performed. In particular, a multilayer printed wiring board having a dedicated conductive hole (hereinafter, referred to as a via through hole) for selectively connecting only the outermost wiring circuit and an inner layer circuit adjacent thereto is manufactured by the following manufacturing method. Hereinafter, a conventional manufacturing method will be described with reference to FIGS. 7A to 7C, FIGS. 8D to 8E, FIG. 9F, and FIG.

In the first example, first, as shown in FIG. 7A, an inner copper-clad insulating substrate 64 formed of inner copper foils 61 and 62 and an insulating substrate 63 is obtained.

[0007] Next, as shown in FIG. 7 (b), interlayer connection pads 65 and 66 and inner layer circuits 67 and 68 are formed on the inner layer copper-clad insulating substrate 64 by a known photoetching method to form an inner layer wiring board. 64A is obtained.

Next, as shown in FIG. 7 (c), the inner wiring board 64A and an adhesive resin are impregnated and dried with a glass cloth (hereinafter, referred to as prepregs 71 and 72) and a copper foil 6 for the outermost layer.
9 and 70 are combined and heated and pressed.

[0008] Next, as shown in FIG. 8 (d), a semi-through hole 73 and a through hole 75 having a depth sufficient to reach the inner connection pad 65 from the surface using a drill are formed. More similarly, the semi-through hole 74 is formed.

[0008] Next, as shown in FIG. 8 (e), copper plating layers 76 and 77 are formed by using both chemical plating and electrolytic plating.

Next, as shown in FIG. 9 (f), a circuit is formed on the front and back surfaces by a photoetching method, and via through holes 79 and 80, through through holes 78, outermost wiring circuits 87 and 88 are formed. , Drawer lands 85 and 86 for via-through holes and drawer lands 8 for through-holes
This is a method 90 for manufacturing a multilayer printed wiring board according to the prior art, in which the effective area 89 of the surface mount component having 3, 84 is large.

Further, as shown in FIG. 10, in a multilayer printed wiring board prepared by the above-mentioned conventional manufacturing method,
A schematic view in which the effective area 89 of the surface mount component is largely occupied and the lead-out lands 83 and 84 for through-holes and the lead-out lands 85 and 86 for via-holes are formed, and the surface mount component 89A is soldered thereto. Yes,
This is because it is difficult to increase the mounting density because the effective area 89 on which the surface mount component 89A can be mounted is made large, and the electrical connection between the via through holes 79 and 80 and the connection pads 65 and 66 is increased. Also have problems.

[0010]

However, in the method 90 for manufacturing a multilayer printed wiring board according to the prior art, the lead-out lands 85 and 86 for via-through holes and the lead-out for through-holes for fixing the surface mount component 89A. In order to form the lands 83 and 84, the conventional technology shown in FIG.
As shown in the figure, the effective area 89 of the surface mount component is occupied greatly. For this reason, there have been major problems in miniaturization, high-density mounting, rationalization of design, and compatibility with high-speed circuits of multilayer printed wiring boards. In addition, there is a problem that small via-through holes 79 and 80 cannot be formed because only known drill holes having a diameter of 0.2 mm or more can be formed in processing the via half-through holes 73 and 74.

Accordingly, the present invention has been made in view of the above circumstances, and an object thereof is to occupy the effective area 48, 49 of a surface mount component as small as possible, and to achieve a vapor reflow temperature of 260 ° C. In addition, the connection reliability can be improved between the conductive through-hole 36A and the lands 44, 45 on the conductive through-hole and the lands 42, 43 on the conductive via-hole, and the pads 5, 6 for interlayer connection. An object of the present invention is to provide a method 53 for manufacturing an excellent multilayer printed wiring board suitable for high-speed circuits by reducing the wiring length and the high-density mounting.

[0012]

According to the present invention, an outermost layer circuit 4 is provided.
6, 47 and land 42, 4 on the conductive via through hole hole
3. In the multilayer printed wiring board having the lands 44 and 45 on the conductive through-holes and the inner circuits 7 and 8, the lands 42 and 43 on the conductive via-holes are connected at predetermined positions of the inner circuits 7 and 8. Interlayer connection pad 5,
Forming the inner layer wiring board 4A provided with the inner layer wiring 6 by a known photo-circuit forming method, and applying an oxidation-reduction treatment to the surfaces of the inner layer circuits 7 and 8 formed on the inner layer wiring board 4A, Forming a layer and interlayer adhesives 11 and 12; and the single-sided copper-clad insulating substrates 19 and 2 with the outermost layer adhesive.
0, the inner layer wiring board 4A is combined, and heated and pressed to form a multilayer structure 21 and 22, and the interlayer connection is made to the multilayer outermost copper foils 13 and 14 in the multilayer structure 21 and 22. Outer copper foil openings 2 at predetermined positions of pads 5 and 6
4, 25, which can be provided with metal masks 24A, 25A.
A known carbon dioxide laser beam is used to pierce the via semi-through holes 26, 27, and then the adhesives 11, 12, 17, 1 attached to the surfaces of the interlayer connection pads 5, 6 are formed.
A step of irradiating the excimer laser beam on the eight layers and a step of performing desmearing, and then forming the first copper plating layers 34 and 35 by using a horizontal transport type direct electrolytic copper plating method,
Via through holes 42A and 42B and through through hole 3
6, a step of filling and forming a solvent-free type heat-resistant conductive paste 38 or an insulating paste 37 containing a non-conductive filler in the through-hole 36 and the via-holes 42A and 42B; A step of irradiating an excimer laser beam on the heat-resistant conductive paste 38 or the insulating paste 37 containing a non-conductive filler protruding around the holes 42A and 42B and the through-hole 36 to smooth the same; A step of forming the second copper plating layers 40 and 41 using a plating method, and forming the outermost layer circuits 46 and 47, conductive via through holes 43A and 43B, conductive through through holes 36A and conductive via through holes in the outermost layer. Upper land 42, 4
3 and a process 53 of forming lands 44 and 45 on the conductive through-holes.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION In a method 53 for manufacturing a multilayer printed wiring board according to the present invention, interlayer connection pads 5 and 6 for connecting to via through holes 42A and 42B may be provided at predetermined positions of the inner layer circuits 7 and 8, respectively. Forming the inner wiring board 4A by a known photo circuit forming method;

Next, the single-sided copper-clad insulating substrates 19, 20 with the outermost adhesive and the adhesives 11, 12, and the inner wiring board 4A with an insulating layer are combined and heated by a hot press machine.
Pressurizing and forming a multilayer structure 21 or 22;

Next, outer layer copper foil openings 24, 25 are formed by photo-etching at predetermined positions of the interlayer connection pads 5, 6 on the outermost layer copper foils 13, 14 formed by the multilayers 21, 22. It is formed, and the metal mask 24A, 25A of the pulse oscillation type carbon dioxide laser processing is used as a jig.
Via semi-through holes 26, 2 up to interlayer connection pads 5, 6
7, and then the adhesives 11, 12, 17, and 17 on the surface portions of the interlayer connection pads 5 and 6 in the fine holes 26 and 27.
Using a krF excimer laser beam to remove 18 resin and a step of performing desmearing;

Next, the first copper plating layers 34 and 35 are applied by a horizontal transfer type direct electrolytic copper plating method to form via through holes 42A and 42B and a through through hole 36, and a solventless non-conductive type is formed in these holes. After filling and forming the filler-containing insulating paste 37 or the heat-resistant conductive paste 38, krF excimer laser light is applied to the 37 or 38 protruding around the conductive via through holes 43A and 43B and the conductive through through hole 36A. , Smoothing,

Thereafter, the second copper plating layers 40, 41
Forming using a horizontal transfer system direct electrolytic copper plating method,

Next, the outermost layer circuits 46 and 47 and the conductive via through hole 43 having a small effective area 48 and 49 for fixing the surface mount component 50 are formed on the outermost layer by photoetching.
A, 43B and land 42, 4 above conductive via through hole hole
The process of forming the land 3, the conductive through-hole 36A and the lands 44, 45 on the conductive through-hole is intended to solve the problems of the prior art.

[0019]

2 (a) to 2 (b), 3 (c) to 3 (e), and 4 (f) to 4 (f) show a manufacturing method according to an embodiment of the present invention.
(G), FIG. 5 (h), FIG. 6 and FIG.

(Embodiment 1) First, as shown in FIG. 2 (a), a low dielectric constant (4. 4) composed of inner copper foils 1 and 2 (18 μm and 35 μm in thickness) and an insulating substrate (FR-4) 3. 0) Inner layer copper-clad insulating substrate 4.

As shown in FIG. 2 (b), interlayer connection pads 5 and 6, which are connected to via-through holes 42A and 42B, and an inner layer circuit at arbitrary positions on the inner layer copper-clad insulating substrate 4 by a known photoetching method. 7 and 8 are formed to obtain an inner wiring board 4A. As the material of the insulating substrate (FR-4) 3, a resin containing glass cloth is used. However, epoxy, modified epoxy, polyimide, aramid, phenol, Teflon and its resin can be used.

Next, as shown in FIG. 3C, an oxidation-reduction treatment for preventing oxidation is performed on the surfaces of the interlayer connection pads 5 and 6 and the inner layer circuits 7 and 8 formed on the inner layer wiring board 4A. And then, using an automatic printing device, the insulating resin 9,
10 is applied and cured, and after the guide drilling step, adhesives 11 and 12 are applied using a curtain coater machine and cured using a drying furnace.

Next, as shown in FIG. 3 (d), the single-sided copper-clad insulating substrates 19, 20 with the adhesive and the inner layer wiring board 4 are formed.
Combine A.

Next, as shown in FIG.
In (d), in combination with a heat press machine or a pinhole air void and a vacuum heat press machine, heating, press molding, and multilayer construction 21 and 22 are performed. After that, the outer layer copper foil openings 24 and 25 can be formed on the outermost layer copper foils 13 and 14 at predetermined positions of the interlayer connection pads 5 and 6 by a known photoetching method. , 27 are drilled to the surface of the interlayer connection pads 5, 6 using metal masks 24A, 25A, and the via holes 26, 27 arranged in the wiring design are punched by the metal masks 24A, 25A.

Next, the via semi-through holes 26 and 27 are machined in a pulse oscillation type using a carbon dioxide laser beam machine with a laser wavelength in the range of 9.0 to 10.7 μm, the optimum being 10.6 μm. This wavelength is 9 μm or less or 1
Under the processing condition of 0.7 μm or more, the semi-through holes 26 and 27
Are not suitable, the quality of which cannot be guaranteed, and none of them are suitable.

Next, when the difference between the upper diameter 30 of the via-hole hole and the bottom diameter 29 of the via-hole hole is in the range of 1 to 11%, the optimum value is preferably in the range of 1 to 5%. Problems may occur. Also, via half through hole 2
The taper angle 28 with respect to the axis of the hole on the wall surface of each of the walls 6 and 27 is in the range of 1 to 9 degrees, and optimally in the range of 1 to 4 degrees (see FIG. 6).
If the angle is 9 degrees or more, a problem may occur in the electrical conduction connection.

Next, the upper diameter 30 of the via through hole is 0.04 to 0.04.
In the range of 0.15 mm, the optimum diameter is in the range of 0.06 to 0.1 mm, and the surface roughness of the inner walls of the via semi-through holes 26 and 27 is 4 to 25.
In the μm range, the optimum may be in the range of 5 to 15 μm (see FIG. 6).

Next, a through hole 31 is formed using a diamond drill and an automatic numerical drilling machine. This through hole 31
The diameter may range from 0.25 to 0.6 mm.

Next, the adhesives 11, 1 adhered to the upper surfaces of the interlayer connection pads 5, 6 in the via semi-through holes 26, 27.
The KrF excimer laser light is applied to the 2, 17, 18 resin 32, 33 layers to remove them to enhance the electrical continuity.

Next, the wavelength of the krF excimer laser is processed in the range of 225 to 275 nm.
As a means for removing the resins 32 and 33, a desmear treatment method can be used. However, when the fine vias are used as the semi-through holes 26 and 27, the inside of the via through holes 26 and 27 becomes desmear. Since the resin cannot be completely washed with the processing solution, a part of the resin remains as a residue and may cause non-precipitation when copper plating is performed.
Not suitable for less than 2mm. Therefore, when the laser processing and the desmearing process are used together, it can be further removed.

Next, as shown in FIG. 4 (f), a horizontal transfer type
m first copper plating layers 34 and 35 to form through through holes 36 and via through holes 42A and 42B.
A non-solvent type insulating paste 37 containing a non-conductive filler or a heat-resistant conductive paste 38 is filled in the via-through holes 42A and 42B and the through-holes 36 using a printing technique squeegee and dried to form the conductive via-through holes 43A and 43B. A conductive through-hole 36A is formed.

Thereafter, the conductive via through holes 43A, 43
3B and the paste 37 and 38 protruding around the hole of the conductive through-hole 36A using a KrF excimer laser, and the optimum is 2 in the wavelength range of 225 to 275 nm.
This is irradiated well at 48 nm, removed, and smoothed.

Next, the heat-resistant conductive paste 38 is
Formed from heat-resistant thermosetting resin and conductive filler, this heat-resistant thermosetting resin is epoxy resin, modified epoxy resin,
Polyimide resin, at least one resin selected from modified polyimide resin may be, and the conductive filler,
At least one metal fine particle selected from gold, silver, copper, nickel, and palladium tin may be used.
The shape of the particle size may be spherical or flake in the range of ３０30 μm.

The content of the conductor filler is 50 to 96.
In the range of weight%, the optimum may be 85 to 96 weight%, and the remainder is formed of a heat-resistant thermosetting resin.

The non-conductive filler-containing insulating paste 37 is formed of an insulating resin and a non-conductive filler, and the insulating resin is at least one selected from an epoxy resin, a modified epoxy resin, a polyimide resin, and a modified polyimide resin. Resin may be used, and the non-conductive filler may be at least one filler selected from silica powder, talc powder, and glass powder, and has an average particle size of 3.0 to 50 μm.
, A suitable average particle size may be in the range of 5.0 to 10 μm, and the particle size may be spherical or flake.

Next, the content of the non-conductive filler is as follows:
In the range of 50 to 90% by weight, the remainder is formed of an insulating resin, and the preferable content is in the range of 80 to 90% by weight.

Next, as shown in FIG. 4 (g), a horizontal transfer type direct electrolytic copper plating method was used to obtain a thickness of 10 to 15 μm.
Then, a second copper plating thickness of 40.41 m is formed.

Next, as shown in FIG. 5 (h), a known photo-etching method (dry film; H-N240, developing solution; Na ₂ Ca ₃ , ferric chloride solution, NaOH aqueous solution) is used. The outer layer circuits 46 and 47, the lands 44 and 45 on the conductive through-holes, and the lands 42 and 43 on the conductive via-holes are formed.
0 occupies a small effective area 48, 49, and does not require the conventional lead-out lands 83, 84, 85, 86. The multilayer wiring of the present invention enables high-density mounting, high-speed circuit support, and design flexibility. A plate manufacturing method 53 is obtained.

Next, as shown in FIG. 6, the pulse oscillation type carbon dioxide laser processing is performed when the via half through holes 26 and 27 in FIG. 3E are positioned up to the surface of the interlayer connection pads 5 and 6. When the difference between the upper diameter 30 of the via through hole and the bottom diameter 29 of the via through hole is in the range of 1 to 11%,
It is a schematic diagram performed when the taper angle 28 with respect to the axis | shaft of the hole of 6,27 wall surfaces is 1-9 degree.

Further, as shown in FIG. 1, the surface mount components 5 are provided on the lands 44 and 45 on the conductive through-hole holes and the lands 43A and 43B on the conductive via-hole holes in FIG.
0, which can be fixed with the solder 51, occupies a smaller effective area 48, 49 of the surface mount component, and has a high-density mounting and a high-speed circuit compatible manufacturing method 53 of the present invention for a multilayer printed wiring board. It is.

[0041]

【The invention's effect】

(1) According to the manufacturing method of the present invention, the lands 42 and 43 on the conductive via-hole holes and the lands 44 on the conductive through-hole holes are formed by using the heat-resistant conductive paste 38, the direct electrolytic copper plating method and the laser processing method. , 45 layers, the paper reflow temperature 260 ° C. for fixing the surface-mounted component 50 can be passed three times, and then electrical connection can be made. The lands 85 and 86 and the through-hole extraction lands 83 and 84 do not need to be provided, so that the effective surfaces 48 and 49 of the surface mount component can be reduced by about 1 unit.
It can be occupied 5% smaller, and the density of the surface-mounted component 50 can be increased and the speed can be increased.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.

FIGS. 2A and 2B are cross-sectional views illustrating a manufacturing method according to an embodiment of the present invention in the order of steps for explaining the manufacturing method.

FIGS. 3 (c) to 3 (e) are cross-sectional views showing a manufacturing method according to an embodiment of the present invention in the order of steps.

FIGS. 4 (f) to (g) are cross-sectional views shown in the order of steps for explaining a manufacturing method according to an embodiment of the present invention.

FIG. 5H is a cross-sectional view showing a manufacturing method according to the embodiment of the present invention in the order of steps for explaining the manufacturing method.

FIG. 6 is a schematic view showing a shape of a half via hole in a manufacturing method according to an embodiment of the present invention.

FIGS. 7A to 7C are cross-sectional views shown in the order of steps for explaining an embodiment of a manufacturing method according to a conventional technique.

FIGS. 8D to 8E are cross-sectional views shown in the order of steps for explaining an example of a manufacturing method according to a conventional technique.

FIG. 9 (f) is a sectional view illustrating an example of a manufacturing method according to the related art in the order of steps for explaining the example.

FIG. 10 is a schematic cross-sectional view showing a large effective area 89 of a surface mount component in an embodiment of a manufacturing method according to a conventional technique.

[Explanation of symbols]

1, 2 ... Inner copper foil 3 ... Insulating board (FR-4) 4 ... Inner copper clad insulating board 4A ... Inner wiring board 5,6 ... Interlayer connection pad 7,8
... Inner layer circuit 9,10 ... Insulating resin (inner layer) 11,12 ... Adhesive (inner layer) 13,14 ... Copper foil for outermost layer 15,16 ... Insulating resin (outer layer) 17,18 ... Adhesive (outer layer) 19, 20: Single-sided copper-clad insulating substrate with outermost layer adhesive 2
1, 22: multilayer structure 24, 25: outer layer copper foil opening 24A, 25A: metal mask 26, 27: via half-through hole 28: taper angle 29: via through hole hole bottom diameter 30: via through hole hole upper diameter DESCRIPTION OF SYMBOLS 31 ... Through-hole 32, 33 ... Resin on connection pad 34, 35 ... First plating layer 36 ... Through-hole 36A ... Conductive through-hole 37 ... Insulating paste containing non-conductive filler 38 ... Heat-resistant conductive paste 40, 41 ... 2nd copper plating layer 42A, 42B ... Via through hole 42, 43 ... Land on conductive via through hole hole 43A, 43B ... Conductive via through hole 44, 45 ... Land on conductive through through hole hole 46, 47 ... Outer layer circuit 48 Reference numerals 49, 49: Effective area of surface mount components 50: Surface mount components (with electrodes) 51: Solder 53: Multilayer printed wiring board of the present invention Production method 61, 62
... Inner layer copper foil 63 ... Insulating substrate 64 ... Inner layer copper-clad insulating substrate 64A ...
Inner layer wiring board 65, 66 ... connection pad 67, 68 ... inner layer circuit 69, 70 ... outermost layer copper foil 71, 72 ... prepreg
73, 74: Semi-through hole 75: Through hole 76, 77 ... Copper plating layer 78: Through through hole 79, 80 ... Via through hole 83, 84 ... Land for drawing out through through hole 85, 86 ... Land for drawing out via through hole 87,
88 ... Outermost layer wiring circuit 89 ... Effective area of surface mounting parts 89A ... Surface mounting parts (with electrodes) 89B ... Solder 90 ... Manufacturing method of multilayer printed wiring board according to prior art

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] September 19, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 2

[Correction method] Change

[Correction contents]

2. The via-hole upper diameter according to claim 1, wherein the via semi-through holes (26) and (27) are processed using a carbon dioxide laser beam in a laser wavelength range of 9.0 to 10.7 μm. When the difference between (30) and the diameter of the via-through hole (29) is in the range of 1 to 11%, the taper angle (2) with respect to the axis of the hole on the wall surface of the via (26) (27)
8) a step performed in a range of 1 to 9 degrees, and a step (30) in which the upper diameter of the via-through hole is 0.04 to 0.15 mm;
The via semi-through holes (26) and (27) have an inner wall surface roughness of 4 to
A method (53) for producing a multilayer printed wiring board according to the present invention, comprising a step of performing the process in a range of 25 μm.

[Procedure amendment]

[Submission date] October 23, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 2

[Correction method] Change

[Correction contents]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0025

[Correction method] Change

[Correction contents]

[0025] Then, the laser waves using a carbon dioxide gas laser processing machine pulsed oscillation of the via semi through-hole 26, 27
A length for machining in 8.5~11.5μm range but optimal
A 9.5μm on than, the wavelength is less or <br/> 8.5 .mu.m is inhibited the shape of the via-half through holes 26 and 27 in the above beam processing conditions 11.5 .mu.m, both can not be guaranteed the quality phenomenon All of them are not suitable.

Claims (3)

[Claims] An outer layer circuit (46) (47), a land (43A) (43B) on a conductive via-through hole, a land (44) (45) on a conductive through-hole, and an inner layer circuit (7) (8). ), The interlayer connection pads (5) (6) connected to the conductive via through hole hole lands (42) (43) at predetermined positions of the inner layer circuits (7) (8). Forming the inner wiring board (4A) provided with the above by a known photocircuit forming method, and performing an oxidation-reduction treatment on the surface of the inner circuit (7) (8) formed on the inner wiring board (4A). Forming an insulating resin (9) (10) layer and an interlayer adhesive (11) (12) layer; the single-sided copper-clad insulating substrate (19) (20) with the outermost adhesive; and the inner layer wiring board (4A) ), Heat and pressure molding to form a multi-layer structure ( 21) and (22), the outermost copper foil (13) having the multilayer structure (21) or (22).
In the (14) layer, outer layer copper foil openings (24) and (25) can be provided at predetermined positions of the interlayer connection pads (5) and (6), and these are known as metal masks (24A) and (25A). Via semi-through hole using carbon dioxide laser beam (26)
After drilling (27), the interlayer connection pad (5)
(6) Adhesive (11) (12) (1)
7) A step of irradiating the layer (18) with excimer laser light and a step of performing desmearing, and then using a horizontal transfer type direct electrolytic copper plating method to form a first copper plating layer (34) (3).
5) to form via through holes (42A) and (42B) and through through holes (36), and thereafter, the through through holes (36) and via through holes (42).
A) (42B) Solvent-free heat-resistant conductive paste (38) or insulating paste containing non-conductive filler (3)
7), and a heat-resistant conductive paste (38) or an insulating paste containing a nonconductive filler (37) protruding above the holes of the via-through holes (42A) (42B) and the through-hole (36). ) Is irradiated with an excimer laser beam to smooth it, and a second copper plating layer (40) is formed by using a horizontal transfer type direct electrolytic copper plating method.
Performing step (41), and providing the outermost layer circuit (4
6) (47) and conductive via through hole (43A) (43)
B), conductive through-holes (36A), conductive via-through-hole lands (42) and (43), and conductive through-hole lands (44) and (45). A method (53) for manufacturing a multilayer printed wiring board according to the present invention. 2. The via-hole upper diameter according to claim 1, wherein the via semi-through holes (26) and (27) are processed using a carbon dioxide laser beam in a laser wavelength range of 9.0 to 10.7 μm. When the difference between (30) and the bottom diameter of the via through hole (29) is in the range of 1 to 11%, the taper angle (2) with respect to the axis of the hole of the via semi-through hole (26) (27)
8) a step performed in a range of 1 to 9 degrees, and a method in which the upper diameter (30) of the via-through hole is in a range of 0.04 to 0.15 mm; (53) The method for producing a multilayer printed wiring board according to the present invention (53), comprising the step of performing the process in the range of 4 to 25 µm. 3. The heat-resistant conductive paste (38) according to claim 1, wherein the heat-resistant conductive paste of the solventless type comprises a heat-resistant thermosetting resin and a conductive filler, and the heat-resistant thermosetting resin is a solventless type, and is an epoxy resin. , A modified epoxy resin, a modified polyimide resin, and the conductive filler is at least one fine particle selected from gold, silver, copper, nickel, palladium, and tin. The particle size is in the range of 0.1 to 30 μm, and the particle shape may be spherical or flake. The content of the conductor filler is in the range of 50 to 96% by weight, and the remainder is heat resistant heat. The method for producing a multilayer printed wiring board according to the present invention, which can be formed of a curable resin (5)
3).