JPH10335828A - Multilayered wiring board and its manufacture - Google Patents

Multilayered wiring board and its manufacture

Info

Publication number
JPH10335828A
JPH10335828A JP15309397A JP15309397A JPH10335828A JP H10335828 A JPH10335828 A JP H10335828A JP 15309397 A JP15309397 A JP 15309397A JP 15309397 A JP15309397 A JP 15309397A JP H10335828 A JPH10335828 A JP H10335828A
Authority
JP
Japan
Prior art keywords
hole
wiring board
holes
layer
conductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15309397A
Other languages
Japanese (ja)
Inventor
Keiichi Kishimoto
圭一 岸本
Masaki Uemae
昌己 上前
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Carbide Industries Co Inc
Original Assignee
Nippon Carbide Industries Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Carbide Industries Co Inc filed Critical Nippon Carbide Industries Co Inc
Priority to JP15309397A priority Critical patent/JPH10335828A/en
Publication of JPH10335828A publication Critical patent/JPH10335828A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To execute drilling with a prescribed condition by forming holes whose diameters are similar or smaller to/than those of a through-hole and/or via holes and electrically connecting the through-hole and/or the via holes of a wiring board and conductor layers which are stacked through the hole. SOLUTION: The wiring board constituted of a through-hole 11 and the circuit of a conductor layer 2 is generated in an insulating resin layer 1, and a resin body with copper foil 3 is stacked. Copper plating is executed on the surface of cooper foil 5a, and the inner wall face of the hole and the via hole 13 and 12 which are electrically connected with the conductor layers 5 and 2 are formed. Then, a graphitization is executed on the surface of the copper foil of the conductor layer 6. The hole whose diameter is smaller than that of the via hole 13 is formed at a position above the via hole 13 by the irradiation with a laser, a via hole 14 which is electrically connected with the conductor layers 6 and 5 is formed, and a circuit pattern is formed. In the multilayered wiring board which is thus generated, drilling work of the small diameter is easy and the reliability of electrical connections is high.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、多層配線板のスルホー
ル、ビアホールなどの形成に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the formation of through holes, via holes and the like in a multilayer wiring board.

【0002】[0002]

【従来の技術】近年、電子機器の小型化に伴い、銅張り
の多層配線板小型化、高密度化、軽量化などのために多
層配線板の導体幅、導体間隙、スルホール、ビアホール
などの微細化、小径化などが求められている。これらの
要求のうちスルホール、ビアホールが積層された多層配
線板の表面から加工、形成されている。
2. Description of the Related Art In recent years, with the miniaturization of electronic equipment, miniaturization of conductor width, conductor gap, through hole, via hole, etc. of a multilayer wiring board to reduce the size, density, and weight of a copper-clad multilayer wiring board. There is a demand for downsizing and downsizing. Of these requirements, the through hole and the via hole are processed and formed from the surface of the multilayer wiring board on which the through hole is laminated.

【0003】たとえば、積層された多層配線板の表面か
らドリルにより貫通孔をあける、ドリルにより途中まで
孔あけする。積層された多層配線板の表面からレーザに
より貫通孔、非貫通孔を形成するなどである。
[0003] For example, a through hole is drilled from the surface of a laminated multilayer wiring board by a drill, and a hole is partially drilled by a drill. For example, through holes and non-through holes are formed by laser from the surface of the laminated multilayer wiring board.

【0004】[0004]

【発明が解決しようとする課題】上記のような従来の多
層配線板の孔あけ加工の方法では製造工程に問題があ
る。ドリルによる方法においては、孔径が大きい、絶縁
層が薄い多層配線板の途中で孔あけを終了することが非
常に難しいなどの問題がある。レーザによる方法におい
ては、積層した導体層および絶縁樹脂層並びに内装の導
体層および内装の絶縁層の孔あけ加工のコントロールが
非常に困難である問題がある。また、下層、上層のスル
ホールおよび/またはビアホールの位置が異なる場所に
形成されていて、接続のための広い面積が必要とされて
いる。図2のA寸法(一個のときの約二倍)となり丸形
のランドにおいては一個のときのランドに対して二乗の
四倍面積となる。本発明に係る多層配線板およびその製
造方法は、これらの孔あけ加工工程の困難さを解決する
こと、配線密度を高密度にすることである。
However, the conventional method for forming a hole in a multilayer wiring board as described above has a problem in the manufacturing process. In the method using a drill, there are problems that it is very difficult to complete the drilling in the middle of a multilayer wiring board having a large hole diameter and a thin insulating layer. The laser method has a problem that it is very difficult to control the drilling of the laminated conductor layer and insulating resin layer, and the interior conductor layer and interior insulation layer. In addition, lower holes and / or upper holes are formed at different positions of through holes and / or via holes, and a large area for connection is required. The dimension A in FIG. 2 (approximately twice as large as one piece) becomes four times the square of a single land. A multilayer wiring board and a method of manufacturing the same according to the present invention are to solve these difficulties of the drilling process and to increase the wiring density.

【0005】[0005]

【課題を解決するための手段】本発明は、導体層間を接
続するスルホール、ビアホールを有する多層配線板およ
びその製造方法において、スルホールおよび/またはビ
アホールを形成した配線基板に絶縁樹脂層および導体層
を積層し、積層した該導体層および該絶縁樹脂層の該配
線基板に形成した該スルホールおよび/または該ビアホ
ールとの接続所望位置に該スルホールおよび/または該
ビアホールの径と同じ又は小さい径の孔を形成し、該孔
を介して該配線基板の該スルホールおよび/または該ビ
アホール並びに積層した該導体層を電気接続することで
あり、最外層の導体層および絶縁樹脂層を孔あけするの
みであり一定の条件で孔あけできるレーザのコントロー
ルの安易な、また配線密度が高密度な多層配線板および
その製造方法を提供することである。
SUMMARY OF THE INVENTION The present invention relates to a multilayer wiring board having through holes and via holes for connecting conductive layers and a method of manufacturing the same, comprising the steps of forming an insulating resin layer and a conductive layer on a wiring board having through holes and / or via holes formed therein. A hole having a diameter equal to or smaller than the diameter of the through hole and / or the via hole is provided at a desired position of connection between the laminated conductor layer and the insulating resin layer with the through hole and / or the via hole formed on the wiring board. Formed, and electrically connects the through hole and / or the via hole of the wiring board and the laminated conductor layer through the hole, and only a hole is formed in the outermost conductor layer and the insulating resin layer. To provide a multilayer wiring board with easy laser control and high wiring density that can be drilled under the following conditions, and a method of manufacturing the same. It is to be.

【0006】以下、本発明に係る多層配線板およびその
製造方法について詳述する。図1は、本発明に係る多層
配線板およびその製造方法の一実施態様を示す工程別断
面図である。図1(a)はスルホールを形成した配線基
板の断面図である。図1(b)は配線基板に絶縁樹脂層
および導体層を積層する過程の断面図である。図1
(c)は(b)で積層した絶縁樹脂層および導体層にス
ルホール、ビアホールを形成した断面図である。図1
(d)は(c)に絶縁樹脂層および導体層を積層し、更
にビアホールを形成した断面図である。
Hereinafter, a multilayer wiring board and a method of manufacturing the same according to the present invention will be described in detail. FIG. 1 is a cross-sectional view illustrating a multilayer wiring board and a method for manufacturing the same according to an embodiment of the present invention. FIG. 1A is a cross-sectional view of a wiring board in which a through hole is formed. FIG. 1B is a cross-sectional view showing a process of laminating an insulating resin layer and a conductor layer on a wiring board. FIG.
(C) is a sectional view in which through holes and via holes are formed in the insulating resin layer and the conductor layer laminated in (b). FIG.
(D) is a sectional view in which an insulating resin layer and a conductor layer are laminated on (c), and a via hole is further formed.

【0007】本発明に係る多層配線板およびその製造方
法は、図1に示す如くコア・ボードとなる配線基板の所
望に応じて孔あけを行い、サブトラクティブ方法、アデ
ィティブ方法などのそれ自体公知の方法で配線パターン
を形成し、該配線基板の片面または両面に絶縁樹脂層お
よび導体層をそれ自体公知の方法で積層し、該導体層お
よび該絶縁樹脂層に該配線基板のスルホールおよび/ま
たはビアホールの径と同じまたは小さい孔をレーザを用
いて孔あけ加工し(該絶縁樹脂層の下層に位置する配線
基板の導体層を孔あけすることなく)、該孔に無電解メ
ッキ方法・電解メッキ方法により導体層間を電気接続す
るスルホール、ビアホールを形成し、エッチング方法に
より配線パターンを形成して多層配線板を作成する。更
に、所望により絶縁樹脂層・導体層を積層し、レーザに
よる孔あけを行い、電気接続を行い、配線パターンを形
成して、より層数の多い多層配線基板を作成することが
できる。
As shown in FIG. 1, a multilayer wiring board and a method of manufacturing the same according to the present invention perform perforation as required on a wiring board serving as a core board, and employ a known method such as a subtractive method or an additive method. A wiring pattern is formed by a method, an insulating resin layer and a conductor layer are laminated on one or both surfaces of the wiring board by a method known per se, and a through hole and / or a via hole of the wiring board are formed on the conductor layer and the insulating resin layer. Holes having the same or smaller diameters are formed by using a laser (without drilling a conductor layer of a wiring board located below the insulating resin layer), and electroless plating and electrolytic plating are performed on the holes. To form through holes and via holes for electrical connection between conductor layers, and form a wiring pattern by an etching method to form a multilayer wiring board. Further, if desired, an insulating resin layer and a conductor layer are laminated, a hole is formed by a laser, an electrical connection is made, and a wiring pattern is formed, whereby a multilayer wiring board having a larger number of layers can be manufactured.

【0008】本発明に係る多層配線板およびその製造方
法における導体層は特に限定するものではないが銅、ス
テンレス、ニクロム、タングステン、アルミニウムなど
の金属箔が好ましい。更に好ましくは、銅、ステンレス
の金属箔である。特に好ましくは、圧延銅箔、電解銅箔
であり、電解銅箔は絶縁樹脂との接着・密着により優れ
ている。また金属箔の厚みを特に限定するものではない
が0.5〜50μmであることが好ましい。更に好まし
くは1〜40μmである。特に好ましくは3〜20μm
である。このような厚みの金属箔は、柔軟でレーザ加
工、食刻が容易である。
The conductor layer in the multilayer wiring board and the method of manufacturing the same according to the present invention is not particularly limited, but is preferably a metal foil such as copper, stainless steel, nichrome, tungsten and aluminum. More preferably, it is a metal foil of copper or stainless steel. Particularly preferred are a rolled copper foil and an electrolytic copper foil, and the electrolytic copper foil is more excellent in adhesion and adhesion to an insulating resin. The thickness of the metal foil is not particularly limited, but is preferably 0.5 to 50 μm. More preferably, it is 1 to 40 μm. Particularly preferably, 3 to 20 μm
It is. The metal foil having such a thickness is flexible and easily laser-processed and etched.

【0009】本発明に係る多層配線板およびその製造方
法における絶縁樹脂層は特に限定するものではないが好
ましくは、エポキシ、ポリイミド、ボリエステル、フェ
ノール、ポリフェニレンエーテル、ポリフェニレンオキ
シド、ビスマレイミド・トリアジンなどの少なくとも一
種類を主成分とする樹脂類である。また該絶縁樹脂層
は、ガラス、アラミド、紙、多孔質ポリテトラフルオロ
エチレン、クォーツなどの不織布、織布などに樹脂類を
含浸させた絶縁樹脂でもよい。また該絶縁樹脂層には樹
脂ビーズ、アルミナ粉、酸化チタン粉、炭酸カルシウム
粉などの有機、無機の充填剤が充填されていてもよい。
The insulating resin layer in the multilayer wiring board and the method of manufacturing the same according to the present invention is not particularly limited, but is preferably at least one of epoxy, polyimide, polyester, phenol, polyphenylene ether, polyphenylene oxide, bismaleimide triazine and the like. Resins mainly composed of one type. The insulating resin layer may be an insulating resin obtained by impregnating a nonwoven fabric such as glass, aramid, paper, porous polytetrafluoroethylene, or quartz, or a woven fabric with a resin. The insulating resin layer may be filled with an organic or inorganic filler such as resin beads, alumina powder, titanium oxide powder, and calcium carbonate powder.

【0010】本発明に係る多層配線板およびその製造方
法における積層した導体層及び絶縁樹脂層への孔の形成
は、下層に形成されたスルホールおよび/またはビアホ
ールの径と同じまたは小さい径の孔をレーザにより形成
することである。好ましくは、小さい径の孔をレーザに
より形成することである。孔の形成位置は、下層に形成
されたスルホールおよび/またはビアホールの同位置に
形成する(ピア・オン・ビア方法)。このように形成さ
れる孔は、積層した導体層および絶縁樹脂層並びに下層
に形成されたスルホールおよび/またはビアホール内の
樹脂をレーザにより溶融、気化、分解などして形成され
る。
In the multilayer wiring board and the method for manufacturing the same according to the present invention, the holes in the laminated conductor layer and insulating resin layer are formed by forming holes having the same or smaller diameters as through holes and / or via holes formed in the lower layer. It is formed by a laser. Preferably, a small diameter hole is formed by a laser. The holes are formed at the same positions as the through holes and / or via holes formed in the lower layer (peer-on-via method). The holes formed in this manner are formed by melting, vaporizing, decomposing, or the like the resin in the laminated conductor layer and insulating resin layer and the resin in the through hole and / or via hole formed in the lower layer using a laser.

【0011】従来の上層、下層での異なる位置にスルホ
ールおよび/またはビアホールを形成するのに比較し
て、ビア・オン・ビア方法でスルホールおよび/または
ビアホールを同じ位置に形成するためにスルホールおよ
び/またはビアホールの形成によるランドの面積が広く
なることなく配線を高密度にできる。下層、上層の孔の
位置が異なる場合、図2のようにランド幅(A)がビア
・オン・ビア方法の約二倍となり、ランドが丸形の場合
には面積が約四倍となる。
Compared with the conventional formation of through holes and / or via holes at different positions in the upper and lower layers, the through holes and / or via holes are formed at the same position by the via-on-via method. Alternatively, the density of wiring can be increased without increasing the land area due to the formation of via holes. When the positions of the holes in the lower layer and the upper layer are different, the land width (A) is about twice that of the via-on-via method as shown in FIG. 2, and the area is about four times when the land is round.

【0012】形成されるランドは、形状・寸法など限定
するものではないが、高密度化のためのレーザ加工によ
る微細なランドであることが好ましい、たとえば1mm
〜0.03mmである。さらに好ましくは、0.7mm
〜0.05mmである。特に好ましくは、0.5mm〜
0.1mmである。
The land to be formed is not limited in shape and size, but is preferably a fine land formed by laser processing for high density, for example, 1 mm.
0.03 mm. More preferably, 0.7 mm
0.050.05 mm. Particularly preferably, 0.5 mm or more
0.1 mm.

【0013】同じまたは小さい径の孔を形成すべくレー
ザを照射するため下層のスルホールおよび/またはビア
ホールの内面に存在する樹脂がきれいに除去され、若し
くは内面に樹脂を残す形で孔があけられ、且つ下層の導
体層が露出されるためメッキ方法などにより積層した該
導体層および下層の該導体層が完全、容易に電気接続で
きる。
In order to form a hole having the same or smaller diameter, the resin existing on the inner surface of the lower through hole and / or the via hole is removed so as to irradiate a laser, or the hole is formed so as to leave the resin on the inner surface. Since the lower conductive layer is exposed, the conductive layer laminated by a plating method and the lower conductive layer can be completely and easily electrically connected.

【0014】レーザによる孔あけする導体層の表面処理
を特に限定するものでないが、導体層の表面にレーザエ
ネルギーの吸収率の高い処理を施すこと、または、導体
層にあらかじめ孔をあけておくことが好ましい。特に好
ましくは、導体の表面にレーザエネルギーの吸収率の高
い処理を施すことである。レーザエネルギーの吸収率の
高い処理としては、酸化ニッケル、酸化銅、酸化鉄、な
どを主成分とする金属酸化物による処理、コンゴーレッ
ド、メチルバイオレットなどの染料、カーボンなどの顔
料で被覆する処理が例示できる。
The surface treatment of the conductor layer to be perforated by a laser is not particularly limited, but the surface of the conductor layer is subjected to a treatment having a high absorption rate of laser energy, or the conductor layer is preliminarily perforated. Is preferred. Particularly preferably, the surface of the conductor is subjected to a treatment having a high laser energy absorption rate. Treatments with high laser energy absorption include treatment with metal oxides containing nickel oxide, copper oxide, iron oxide, etc. as a main component, treatment with dyes such as Congo red and methyl violet, and pigments such as carbon. Can be illustrated.

【0015】レーザの種類としては、炭酸ガスレーザ、
Xeレーザ、エキシマノーザ、YAGレーザ、Arレー
ザ、紫外線レーザなどが例示できる。レーザエネルギー
としては、導体層および絶縁樹脂層により変化させるこ
ともできる。
As the type of laser, a carbon dioxide laser,
An Xe laser, an excimer laser, a YAG laser, an Ar laser, an ultraviolet laser and the like can be exemplified. The laser energy can be changed by the conductor layer and the insulating resin layer.

【0016】このように作成された本発明に係る多層配
線板およびその製造方法は、下層部のスルホールおよび
/またはビアホールと同じまたは小さい径の孔あけを行
うため下層部の該スルホールおよび/または該ビアホー
ルの内部の絶縁樹脂に孔あけがなされ更に電気接続の信
頼性が高く、スルホールおよび/またはビアホールのラ
ンドが広くならなく配線密度が高密度である。
The multilayer wiring board and the method of manufacturing the same according to the present invention, which are formed as described above, are used to form holes having the same or smaller diameters as the through holes and / or via holes in the lower layer. A hole is formed in the insulating resin inside the via hole, and the reliability of the electrical connection is high. Further, the land of the through hole and / or the via hole is not wide and the wiring density is high.

【0017】[0017]

【実施例】以下、本発明に係る多層配線板およびその製
造方法の実施例を説明する。尚、本発明に係る多層配線
板およびその製造方法は以下の実施例に限られるもので
はない。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a multilayer wiring board and a method of manufacturing the same according to the present invention will be described below. The multilayer wiring board and the method of manufacturing the same according to the present invention are not limited to the following embodiments.

【0018】(実施例1)先ず、エポキシ樹脂1の両面
に厚さ18μmの銅箔2aをラミネートした銅張り両面
板に貫通孔11を形成し、銅箔表面および貫通孔の内壁
面にメッキ銅2bを析出させ、フォトエッチング方法に
より回路パターンを形成して絶縁樹脂層1にスルホール
11および導体層2の回路より成る配線基板を作成し
た。この後、該配線基板に黒化処理を施し酸化銅層を形
成後、該酸化銅層を金属銅に化学還元する処理を施し
た。図1(a)
(Embodiment 1) First, a through-hole 11 was formed in a copper-clad double-sided board obtained by laminating a copper foil 2a having a thickness of 18 μm on both sides of an epoxy resin 1, and plated copper 2b was deposited, and a circuit pattern was formed by a photo-etching method to prepare a wiring board including the circuit of the through hole 11 and the conductor layer 2 in the insulating resin layer 1. Thereafter, the wiring substrate was subjected to a blackening process to form a copper oxide layer, and then subjected to a process of chemically reducing the copper oxide layer to metallic copper. FIG. 1 (a)

【0019】次に、銅箔付き樹脂体3(約50μmの絶
縁樹脂層4(エポキシ樹脂)を付着させた厚み約12μ
mの銅箔5a)を該配線基板の両面に配置・位置合わせ
を行い(図1(b))積層した(圧力25Kg、温度1
80度、120分)。
Next, a resin body 3 with a copper foil (about 12 μm thick with an insulating resin layer 4 (epoxy resin) of about 50 μm attached)
m copper foil 5a) was placed and aligned on both sides of the wiring board (FIG. 1 (b)) and laminated (pressure 25 kg, temperature 1).
80 degrees, 120 minutes).

【0020】次に、ビアホール13およびビアホール1
2の形成用の孔の形成位置にレーザの照射径より20μ
m小さい円形状の黒化処理を該銅箔5aの表面に形成し
た。
Next, the via hole 13 and the via hole 1
20 μm from the laser irradiation diameter at the formation position of the hole for forming 2
A circular blackening treatment having a small diameter of m was formed on the surface of the copper foil 5a.

【0021】次に、炭酸ガスレーザ装置の加工テーブル
に多層配線板を位置決めセットし、レーザ(パルス幅2
5μs、周波数100Hz)を照射して、銅箔5aおよ
び絶縁樹脂層4に約0.2mmの孔13の孔あけ加工
し、更にスルホール11とほぼ同じ径の約0.15mm
の孔12の孔あけ加工をした。
Next, the multilayer wiring board is positioned and set on the processing table of the carbon dioxide laser device, and the laser (pulse width 2) is set.
5 μs, a frequency of 100 Hz) to form a hole 13 of about 0.2 mm in the copper foil 5 a and the insulating resin layer 4, and further, about 0.15 mm having the same diameter as the through hole 11.
Hole 12 was drilled.

【0022】次に、過マンガン酸カリウム法により該孔
13および該孔12の内部のスミア処理を行い、該銅箔
5aの表面、該孔13および該孔12の内側壁面に銅メ
ッキを施し導体層5および導体層2と電気接続したビア
ホール13およびビアホール12を形成し、フォトエッ
チング方法により回路パターンを形成した。ビアホール
13、12に形成されたランドは0.4mmの丸形で引
き出し信号線を伴っていた。(図1(c))
Next, the inside of the hole 13 and the hole 12 is subjected to a smear treatment by a potassium permanganate method, and the surface of the copper foil 5a and the inner wall surface of the hole 13 and the hole 12 are plated with copper to form a conductor. Via holes 13 and via holes 12 electrically connected to the layer 5 and the conductor layer 2 were formed, and a circuit pattern was formed by a photoetching method. The lands formed in the via holes 13 and 12 had a round shape of 0.4 mm and were accompanied by lead signal lines. (Fig. 1 (c))

【0023】次に、導体層5の表面に黒化処理を施し酸
化銅層を形成後、該酸化銅層を金属銅に化学還元する処
理を施し、銅箔付き樹脂体を更に積層した。
Next, after the surface of the conductor layer 5 was subjected to a blackening treatment to form a copper oxide layer, the copper oxide layer was subjected to a chemical reduction treatment to metallic copper, and a resin body with a copper foil was further laminated.

【0024】次に、導体層6の銅箔表面に黒化処理を施
し、レーザの照射によりビアホール13の上位置に該ビ
アホール13より小さい径の約0.1mmの孔14を形
成した。該孔14は、ビアホール13の内部の絶縁樹脂
に孔を形成していた。次に、孔の内部のスミア処理を行
い銅メッキを施し導体層6および導体層5と電気接続し
たビアホール14を形成し、フォトエッチング方法によ
り回路パターンを形成した。ビアホール14のランドは
0.3mmの丸形であった。(図1(d))
Next, the surface of the copper foil of the conductor layer 6 was subjected to a blackening treatment, and a hole 14 having a diameter smaller than the via hole 13 and having a diameter of about 0.1 mm was formed above the via hole 13 by laser irradiation. The hole 14 formed a hole in the insulating resin inside the via hole 13. Next, the inside of the hole was smeared and plated with copper to form a via hole 14 electrically connected to the conductor layer 6 and the conductor layer 5, and a circuit pattern was formed by a photoetching method. The land of the via hole 14 had a round shape of 0.3 mm. (Fig. 1 (d))

【0025】次に、表面の配線導体を保護するレジスト
を半田付けのエリアを除いて印刷・乾燥・硬化して多層
配線板を製作した。
Next, a resist for protecting the wiring conductors on the surface was printed, dried and cured except for the soldering area, to produce a multilayer wiring board.

【0026】このように製作された該多層配線基板は、
小径の孔あけ加工が容易であり、電気接続の信頼性が高
く、スルホールおよび/またはビアホールのランドが広
がることなく配線密度が高密度であった。
The multilayer wiring board thus manufactured is
Drilling with a small diameter was easy, the reliability of electrical connection was high, and the wiring density was high without spreading the land of the through hole and / or via hole.

【0027】(実施例2)実施例1におけるレーザの照
射径より20μm小さい円形状の黒化処理を銅箔に施す
ことなく、炭酸ガスレーザ装置を紫外線レーザ装置(N
d:YAGの波長355nmを利用した個体UVレー
ザ)に変更して孔あけ加工をする以外は実施例1の製造
工程と略同様にして多層配線板を製作した。
(Embodiment 2) The carbon dioxide gas laser apparatus was replaced with an ultraviolet laser apparatus (N) without subjecting the copper foil to a circular blackening treatment that was smaller by 20 μm than the laser irradiation diameter in the embodiment 1.
d: Solid-state UV laser using a wavelength of 355 nm of YAG), and a multilayer wiring board was manufactured in substantially the same manner as in the manufacturing process of Example 1 except that the holes were drilled.

【0028】このように製作された該多層配線基板は、
レーザのコントロールが安易であり、導電体層へのダメ
ージがなく、小径の孔あけ加工が容易であり、絶縁樹脂
層はレーザにより化学変化を起こして分解除去されるた
め炭素化することがなくカーボンの残渣問題がなく、配
線密度が高密度であり、層間密着性が良好であり、電気
接続の信頼性が高かった。
The multilayer wiring board thus manufactured is
Laser control is easy, there is no damage to the conductor layer, small-diameter drilling is easy, and the insulating resin layer undergoes a chemical change by the laser and is decomposed and removed. There was no residue problem, the wiring density was high, the interlayer adhesion was good, and the reliability of electrical connection was high.

【0029】[0029]

【発明の効果】本発明に係る多層配線板およびその製造
方法では、最外層の導体層および絶縁樹脂層に孔あけす
ることでありコントロールが安易である。特にレーザに
よる孔あけにおいては、次層の導体層で孔を停止させ、
スルホールおよび/またはビアホールと同じまたは小さ
い径の孔のため位置ズレをカバーして電気接続が可能で
ある。また、下層のスルホールおよび/またはビアホー
ルと同じ位置にレーザによる孔あけを行うためスルホー
ルおよび/またはビアホールの占める面積が広くなるこ
となく形成できる。などの加工工程の困難さを除いた、
また高密度な多層配線板およびその製造方法を提供でき
る。
In the multilayer wiring board and the method of manufacturing the same according to the present invention, the outermost conductor layer and the insulating resin layer are perforated, so that the control is easy. Especially in drilling by laser, stop the hole in the next conductor layer,
Due to the holes having the same or smaller diameters as the through holes and / or via holes, the positional displacement can be covered and the electrical connection can be made. Further, since the laser drilling is performed at the same position as the lower layer through hole and / or via hole, it can be formed without increasing the area occupied by the through hole and / or via hole. Excluding the difficulty of the processing process such as
In addition, a high-density multilayer wiring board and a method for manufacturing the same can be provided.

【0030】[0030]

【図面の簡単な説明】[Brief description of the drawings]

図1(a)〜(d)は、本発明に係る多層配線板および
その製造方法の一実施態様を示す工程別の断面図であ
る。図2は、従来の方法による断面図である。
1 (a) to 1 (d) are cross-sectional views showing steps of an embodiment of a multilayer wiring board and a method of manufacturing the same according to the present invention. FIG. 2 is a cross-sectional view according to a conventional method.

【0031】[0031]

【符号の説明】[Explanation of symbols]

1 絶縁樹脂層1 2 導体層2 2a 銅箔2a 2b メッキ銅2b 3 銅箔付き樹脂体 4 絶縁樹脂層4 5 導体層5 5a 銅箔5a 6 導体層6 11 スルホール11 12 ビアホール12 13 ビアホール13 14 ビアホール14 REFERENCE SIGNS LIST 1 insulating resin layer 1 2 conductor layer 2 2a copper foil 2a 2b plated copper 2b 3 resin body with copper foil 4 insulating resin layer 4 5 conductor layer 5 5a copper foil 5a 6 conductor layer 6 11 through hole 11 12 via hole 12 13 via hole 13 14 Via hole 14

─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成9年7月22日[Submission date] July 22, 1997

【手続補正1】[Procedure amendment 1]

【補正対象書類名】図面[Document name to be amended] Drawing

【補正対象項目名】図2[Correction target item name] Figure 2

【補正方法】追加[Correction method] Added

【補正内容】[Correction contents]

【図2】 FIG. 2

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 導体層間を接続するスルホール、ビアホ
ールを有する多層配線板およびその製造方法において、
スルホールおよび/またはビアホールを形成した配線基
板に絶縁樹脂層および導体層を積層し、積層した該導体
層および該絶縁樹脂層の該配線基板に形成した該スルホ
ールおよび/または該ビアホールとの接続所望位置に該
スルホールおよび/または該ビアホールの径と同じ又は
小さい径の孔を形成し、該孔を介して該配線基板の該ス
ルホールおよび/または該ビアホール並びに積層した該
導体層を電気接続してなることを特徴とする多層配線板
およびその製造方法。
1. A multilayer wiring board having through holes and via holes for connecting conductive layers and a method of manufacturing the same.
An insulating resin layer and a conductor layer are laminated on a wiring board having a through hole and / or a via hole formed thereon, and a desired connection position of the laminated conductor layer and the insulating resin layer with the through hole and / or the via hole formed on the wiring board is provided. Forming a hole having a diameter equal to or smaller than the diameter of the through hole and / or the via hole, and electrically connecting the through hole and / or the via hole of the wiring board and the laminated conductor layer via the hole. And a method for manufacturing the same.
JP15309397A 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture Pending JPH10335828A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15309397A JPH10335828A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15309397A JPH10335828A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Publications (1)

Publication Number Publication Date
JPH10335828A true JPH10335828A (en) 1998-12-18

Family

ID=15554829

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15309397A Pending JPH10335828A (en) 1997-05-28 1997-05-28 Multilayered wiring board and its manufacture

Country Status (1)

Country Link
JP (1) JPH10335828A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
EP1259102A1 (en) * 2001-05-14 2002-11-20 Oki Printed Circuits Co., Ltd. Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same
US6492007B1 (en) 2000-03-14 2002-12-10 Oki Printed Circuits Co., Ltd. Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000041447A1 (en) * 1999-01-05 2000-07-13 Ppc Electronic Ag Method for producing a multilayer printed circuit board
US6492007B1 (en) 2000-03-14 2002-12-10 Oki Printed Circuits Co., Ltd. Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same
KR100734582B1 (en) * 2000-03-14 2007-07-02 오키 프린티드 서킷 가부시키가이샤 Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same
EP1259102A1 (en) * 2001-05-14 2002-11-20 Oki Printed Circuits Co., Ltd. Multi-layer printed circuit bare board enabling higher density wiring and a method of manufacturing the same

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