JPH10335386A - Semiconductor mounting method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor mounting method, with which the installed state of a flip chip mounted bear chip can be stabilized, a mounting process can be simplified and furthermore, the range of resin selection to be used for mounting can be widened. SOLUTION: When mounting a bear chip 1 for the memory cut out of a semiconductor wafer on a flip chip, a resin layer 8 of a prescribed thickness is previously formed on a module substrate 2. Next, a pad 3 for the chip and a pad 4 for the substrate are aligned, so as to face and be pressed to sandwich the bear chip 1 for memory and the module substrate 2 between pressure plates 11 and 12, while being heated from a heat source 13. Because of heating and pressing, a solder plating 6 formed on the pad 4 for substrate is stuck on a bump 5 of gold balls formed on the pad 3 for the chip and because of the subsequent cooling, the resin layer 8 is set by forming a bonding part from the bump 5 of gold balls and the solder plating 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor mounting method for mounting a bare chip on a substrate.

[0002]

2. Description of the Related Art Generally, a memory bare chip and a processor bare chip cut out of a semiconductor wafer are mounted on a printed circuit board or the like in a packaged state. However, since the external dimensions of the package are considerably larger than the size of various bare chips, there are certain restrictions on the number of memory packages and the like that can be mounted on a printed circuit board or the like.

On the other hand, recently, a technique for performing high-density mounting by directly mounting a bare chip on a substrate by wire bonding or flip chip mounting has been developed. In particular, flip-chip mounting has advantages such as miniaturization of mounting area, good noise resistance, and high connection reliability.

[0004]

In the flip chip mounting described above, a bare chip pad and a substrate pad are arranged to face each other, and a conductive member such as a gold ball formed on the bare chip pad is formed on the substrate pad. The solder plating is heated to attach the solder to the conductive member, thereby making an electrical and mechanical connection. That is, since the bare chip is fixed to the substrate only through the conductive member and the solder, for example, the pads of the bare chip are arranged on a straight line almost parallel to the long side direction of the bare chip as in a DRAM or the like. In such a case, the installation state of the bare chip in the short side direction becomes unstable. For this reason, a measure for stabilizing the installation state of the bare chip is required.

Further, in order to stabilize the installation state of the bare chip, after the bare chip is mounted on the substrate, it is necessary to pour and fill a resin called an underfiller between the bare chip and the substrate. Since the gap is narrow, it is necessary to pour the resin utilizing the capillary phenomenon, and it is not easy to reliably fill the resin, and the process becomes complicated. Further, since a resin having a high viscosity cannot be used, there is a problem that usable resins are limited.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to stabilize the installation state of a flip chip mounted bare chip and to simplify a mounting process. Another object of the present invention is to provide a semiconductor mounting method capable of expanding a range of selection of a resin used at the time of mounting.

[0007]

In order to solve the above-mentioned problems, according to the semiconductor mounting method of the present invention, first, a gold ball bump or the like is provided on one of a chip pad on a bare chip or a substrate pad on a substrate. Is formed (first step), and a resin layer is formed on the substrate (second step)
After that, the bare chip is flip-chip mounted on the substrate with the resin layer interposed (third step). When bonding the chip pad and the substrate pad with the conductive member, it is necessary to heat and pressurize and then cool (fourth step), but at the same time, the resin layer can be cured by the heating and cooling. In addition, the installation state (mounting state) of the bare chip can be stabilized simultaneously with the electrical connection between the bare chip and the substrate. In particular, when chip pads are formed in a row on a bare chip such as a DRAM, the installation state immediately after mounting becomes unstable. However, according to the present invention, the installation state is hardened by curing the resin layer. Stabilization becomes possible.

In addition, since a resin layer is formed on the surface of the bare chip, a complicated process is not required as compared with a case where resin is injected into a narrow gap, and the process can be simplified. Also,
As the resin layer formed on the surface of the bare chip, a highly viscous material can be used, so that the range of material selection can be expanded.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a memory module which is a semiconductor device according to an embodiment of the present invention will be specifically described with reference to the drawings.

FIG. 1 is a view schematically showing one surface of the memory bare chip 1 which is to be mounted on a module substrate. The memory bare chip 1 is, for example, a DRAM having a memory capacity of 4M × 4 bits. As shown in the figure, the memory bare chip 1 has a rectangular shape,
At the center, a plurality of chip pads 3 are formed in a row substantially parallel to the long side of the memory bare chip 1. These chip pads 3 are electrodes for making electrical connection with the module substrate.

FIG. 2 is a view schematically showing one surface of the module substrate 2 on which the memory bare chip 1 is mounted. The module substrate 2 is an SO-DIMM (Small
Outline Dual Inline Memory Module) has external dimensions that can be mounted on a board or the like, and a plurality of board pads 4 are formed in two rows substantially parallel to the long side of the module board 2 as shown in FIG. . These substrate pads 4 are electrodes for making electrical connection with the memory bare chip 1. In flip-chip mounting, the plurality of substrate pads 4 are formed at positions facing the plurality of chip pads 3. A plurality of external connection terminals 9 formed in a concave shape are provided on the outer surface of the short side of the module substrate 2, and these external connection terminals 9 are electrically connected to the substrate pads 4. LCC (Leadless Chip Carrier)
The solder is poured into these concave portions of the external connection terminals 9 by the method, so that the module substrate 2 and the SO-D
Electrical connection and mechanical connection (fixation) with the IMM substrate and the like are performed.

FIG. 3 is a schematic view of the memory module 10, showing a surface on which the memory bare chip 1 is mounted by flip chip mounting. As shown in FIG.
Two rows of memory bare chips 1 are mounted on the module board 2 in the long side direction and two rows in the short side direction of the module board 2, and a total of four memory bare chips 1 are mounted. When the memory bare chip 1 is, for example, a DRAM having a memory capacity of 4M × 4 bits, the memory capacity of the memory module 10 is 8 Mbytes.

FIG. 4 is an enlarged view of a portion where the chip pads 3 of the memory bare chip 1 are formed. As shown in FIG. 1, a bump 5 of a gold ball as a conductive member is formed on a chip pad 3 formed on one surface of a bare memory chip 1. Gold ball bump 5
Are bonded to the chip pads 3 by soldering or the like. The electrical connection between the bare memory chip 1 and the module substrate 2 is made by the bumps 5.

FIG. 5 is an enlarged view of a portion of the module substrate 2 where the substrate pads 4 are formed. As shown in FIG. 1, solder plating 6 is formed on the surface of the substrate pad 4 formed on one surface of the module substrate 2.
The electrical connection with the memory bare chip 1 is made by solder plating 6
Done by

FIG. 6 is an enlarged view of a connection portion between the chip pad 3 and the substrate pad 4 when the memory bare chip 1 is mounted on the module substrate 2 by flip chip mounting. As shown in the figure, in flip-chip mounting, bumps 5 of gold balls formed on chip pads 3 are formed.
The solder plating 6 formed on the surface of the substrate pad 4 adheres to the surface of the pad 4.
Form an eutectic, thereby electrically connecting the memory bare chip 1 and the module substrate 2 to each other. In such flip chip mounting,
A gap corresponding to the height of the joint 7 formed by the bump 5 of the gold ball and the solder plating 6 is formed between the memory bare chip 1 and the module substrate 2. Moreover, the plurality of chip pads 3 are formed in a row in the long side direction of the memory bare chip 1, and the memory bare chip is formed via the gold ball bumps 5 on the plurality of chip pads 3 formed in the row. 1 and the module substrate 2 come into contact with each other, so that the memory bare chip 1 is mounted (installed state).
Becomes unstable.

Therefore, in this embodiment, at least the memory bare chip 1 on the surface on which the substrate pads 4 are formed is formed.
Before the memory bare chip 1 is mounted, a resin layer 8 having a thickness corresponding to the height of the joint 7 is formed on the surface on which is mounted. As the resin layer 8, for example, various thermosetting resin materials such as an epoxy resin having excellent insulating properties, strength, and ease of molding may be used. Can not avoid. When the resin layer 8 expands due to heat, a stress is generated in the joint 7, and the joint 7 may be damaged, which may cause a connection failure between the memory bare chip 1 and the module substrate 2. As a countermeasure, a filler is added to reduce the coefficient of linear expansion of the resin material used for the resin layer 8. For example, since fused silica has a small coefficient of linear expansion, by using a resin material in which this is blended as a filler for the resin layer 8, expansion of the resin layer 8 due to heat can be suppressed.

The resin layer 8 formed in this way fills the gap between the memory bare chip 1 and the module substrate 2 generated by the height of the joint 7, and the resin layer 8 supports the memory bare chip 1 from below. Therefore, the installation state of the memory bare chip 1 can be stabilized. Further, the formation of the resin layer 8 makes it possible to ensure a state of insulation from the outside.

Next, a process for mounting the memory bare chip 1 on the module substrate 2 by flip-chip mounting according to the present embodiment will be described.

FIGS. 7 to 12 are views showing steps of mounting the memory bare chip 1 on the module substrate 2 by flip chip mounting. First, as shown in FIG. 7, a bump 5 of a gold ball is formed on a chip pad 3 of a memory bare chip 1 (first step). The bumps 5 are joined to the chip pads 3 by soldering or the like.

Next, as shown in FIG. 8, the module substrate 2 is introduced into the pressure plate 11 such that the surface on which the substrate pads 4 are formed faces upward, and a resin layer 8 is formed on the surface (second).
Process). In addition, the filler described above is blended in the resin material used for the resin layer 8 to suppress the expansion of the resin layer 8 due to heat.

Next, as shown in FIG. 9, the memory bare chip 1 is introduced into the upper part of the module substrate 2. further,
The surface on which the chip pads 3 are formed and the surface on which the substrate pads 4 are formed are heated by a heat source 13 such as a heater, and are pressed vertically (third step). When the memory bare chip 1 is introduced into the upper part of the module substrate 2, it is introduced so that the surface on which the chip pads 3 are formed faces downward, and the chip pads 3 and the substrate pads 4 are arranged so as to face each other. Adjust the position. Also, pressurization is performed after the alignment is completed.
By introducing another pressure plate 12 onto the upper surface of the memory bare chip 1 together with the heating, the pressing is performed so that the memory bare chip 1 and the module substrate 2 are sandwiched between the pressure plates 11 and 12.

By performing the heating and pressurizing, FIG.
As shown in FIG. 0, the bumps 5 of the gold balls formed on the chip pads 3 break through the resin layer 8 formed on the surface of the module substrate 2 and reach the solder plating 6 formed on the substrate pads 4. Since the solder plating 6 is reflowed by heating, the solder plating 6 adheres to the bumps 5 of the gold balls, and a part of the bumps 5 of the gold balls is diffused into the solder plating 6.

After the attachment, the heat source 13 is removed, and cooling is performed while maintaining the pressurized state as shown in FIG. 11 (fourth step). By the cooling, the bonding portion 7 formed by the bump 5 of the gold ball and the solder plating 6 is formed. Further, a part of the bump 5 of the gold ball and a part of the solder plating 6 form an eutectic. Further, the resin layer 8 interposed in the gap between the memory bare chip 1 and the module substrate 2 is cured.

After being sufficiently cooled to about room temperature, FIG.
As shown in FIG.
Remove.

In this manner, the memory bare chip 1 can be mounted on the module substrate 2, and the gap between the memory bare chip 1 and the module substrate 2 generated by the height of the joint 7 is filled with the resin layer 8. Since the layer 8 supports the memory bare chip 1 from below, the installation state of the memory bare chip 1 can be stabilized.

Since the resin layer 8 is formed on the surface of the module substrate 2 before the memory bare chip 1 is mounted on the module substrate 2, the memory bare chip 1 is mounted on the module substrate 2 after the memory bare chip 1 is mounted on the module substrate 2. In comparison with the method of pouring a resin into the gap between the module and the module substrate 2 by a capillary phenomenon, a complicated process is not required and the process can be simplified. Further, since only the resin layer 8 is formed on the surface of the module substrate 2, a resin having a high viscosity can be used as the material of the resin layer 8, and the range of selection of the resin material is widened.

In the flip chip mounting of this embodiment described above, the bumps 5 of gold balls are formed on the substrate 3 for the chip, and the solder plating 6 is formed on the pads 4 for the substrate. 6, the same effect can be obtained by forming the gold ball bumps 5 on the substrate pads 4.

In the above-described embodiment, heating and pressurizing are performed simultaneously. However, similar effects can be obtained by performing heating and then pressurizing in this order.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention. For example, in the above-described embodiment, an example in which the plurality of chip pads 3 of the memory bare chip 1 are formed in a straight line in parallel with the long side of the memory bare chip 1 has been described, as shown in FIG. The present invention can also be applied to a case where the memory bare chip 1 in which a plurality of chip pads 3 are formed in a row in parallel with the short side is flip-chip mounted on another substrate.

In the above-described embodiment, as shown in FIG. 1, a plurality of chip pads 3 of the memory bare chip 1 are provided.
Are described in a line, but FIG. 14 and FIG.
As shown in FIG. 5, a plurality of chip pads 3 may be formed in a plurality of rows. In these cases, the stability of the installation state of the memory bare chip 1 is ensured, but since the memory bare chip 1 and the module substrate 2 need to be sealed with a resin or the like in order to secure the insulating state, Similar effects can be obtained.

In the above-described embodiment, the heat source 13 is installed on the side surfaces of the memory bare chip 1 and the module substrate 2 and heating is performed. However, the place where the heat source 13 is installed is not limited to these side surfaces. Heating may be performed by installing a heat source 13 on the upper surface of the module 1 and the lower surface of the module substrate 2.

In the above-described embodiment, an example in which four memory bare chips 1 are mounted on the module substrate 2 as shown in FIG. 3 has been described. However, the number of memory bare chips mounted on the module substrate 2 is four. Not limited to individual.

In the above embodiment, the module substrate 2
Although the example in which a DRAM is mounted as the memory bare chip 1 has been described above, the present invention can be applied to a case where another type of memory bare chip 1 such as an SRAM or a flash ROM or a bare chip other than a memory is mounted. it can.

In the embodiment described above, the example in which the memory bare chip 1 is mounted on the module substrate 2 has been described. However, the memory bare chip 1 may be mounted on a package.
Further, the memory bare chip 1 or the like may be directly mounted on a memory board such as an SO-DIMM board or a mother board or a daughter board.

[0035]

As described above, according to the present invention, a resin layer having a predetermined thickness is formed on a surface of a substrate on which pads are formed, and then a bare chip is flip-chip mounted.
The electrical connection between the substrate and the bare chip and the curing of the resin layer are simultaneously performed. Therefore, since the bare chip is supported by the resin layer when the bare chip is mounted, the installation state of the bare chip can be always stabilized irrespective of the formation position of the chip pad. In addition, the resin layer is only formed on the substrate surface, and a complicated process is not required as compared with a case where the resin layer is injected into a narrow gap, and the process can be simplified. Can be used as the material, and the range of choice of the resin material can be expanded.

[Brief description of the drawings]

FIG. 1 is a diagram showing a surface of a memory bare chip on which pads are formed.

FIG. 2 is a diagram illustrating a surface of a module substrate on which pads are formed.

FIG. 3 is a diagram showing a state in which a bare chip is mounted on a module substrate.

FIG. 4 is a view showing a state in which gold ball bumps are formed on bare chip pads.

FIG. 5 is a diagram showing a state in which solder plating is formed on pads of a module substrate and a resin layer is formed on the surface of the substrate.

FIG. 6 is a diagram showing a connection portion when a bare chip is mounted on a module substrate by flip chip mounting.

FIG. 7 is a diagram showing a step of forming a bump of a gold ball on a bare chip in flip chip mounting.

FIG. 8 is a view showing a step of introducing a module substrate into a pressure plate and forming a resin layer on a surface in flip-chip mounting.

FIG. 9 is a view showing a step of introducing another pressurizing plate on the upper surface of the bare chip and heating the bare chip and the module substrate with a heat source while vertically pressing the module in the flip chip mounting.

FIG. 10 is a diagram showing a process of forming a bonding portion by solder plating with a bump of a gold ball in flip chip mounting.

FIG. 11 is a view showing a step of removing a heat source and cooling after maintaining a pressurized state after a bonding portion formed by solder bumps and gold ball bumps is formed in flip-chip mounting.

FIG. 12 is a diagram showing a step of removing a pressure plate on the upper surface of a bare chip after cooling in flip-chip mounting.

FIG. 13 is a diagram showing a bare chip having pads formed substantially parallel to the short sides.

FIG. 14 is a diagram showing a bare chip in which pads are formed in two rows substantially parallel to a long side.

FIG. 15 is a diagram showing a bare chip in which pads are formed in two rows substantially parallel to a short side.

[Explanation of symbols]

 Reference Signs List 1 bare chip for memory 2 module substrate 3 pad for chip 4 pad for substrate 5 bump of gold ball 6 solder plating 8 resin layer 11, 12 pressure plate 13 heat source

Claims (4)

[Claims] 1. A semiconductor mounting method for flip-chip mounting a bare chip cut from a semiconductor wafer on a substrate, wherein a first step of attaching a conductive member to a plurality of chip pads formed on the surface of the bare chip; A second step of forming a resin layer on one surface of the substrate on which the bare chip is mounted; and the plurality of chip pads on the bare chip and the plurality of substrate pads formed on the substrate correspond to each other. A third step of pressing the bare chip onto one surface of the substrate via the resin layer and heating, and cooling the bare chip and the substrate while maintaining the pressed state of the third step A semiconductor mounting method, comprising: 2. A semiconductor mounting method for flip-chip mounting a bare chip cut out from a semiconductor wafer on a substrate, wherein a first step of attaching a conductive member to a plurality of substrate pads formed on the surface of the substrate; A second step of forming a resin layer on one surface of the substrate on which the plurality of substrate pads are formed; and a plurality of chip pads formed on a surface of the bare chip and the plurality of chip pads formed on the substrate. A third step of pressing the bare chip against one surface of the substrate via the resin layer so that a plurality of substrate pads correspond to each other, and heating, while maintaining the pressed state of the third step; A fourth step of cooling the bare chip and the substrate. 3. The method according to claim 1, wherein the resin layer is formed using a thermosetting resin, and the heat treatment in the third step and the cooling treatment in the fourth step are performed. A semiconductor mounting method, wherein electrical connection between the bare chip and the substrate and solidification of a resin layer interposed between the bare chip and the substrate are simultaneously performed. 4. The semiconductor mounting method according to claim 1, wherein the plurality of chip pads are formed in a line on one surface of the bare chip.