JPH10326912A - Production of non-dislocated gan substrate and gan base material - Google Patents

Production of non-dislocated gan substrate and gan base material

Info

Publication number
JPH10326912A
JPH10326912A JP35070197A JP35070197A JPH10326912A JP H10326912 A JPH10326912 A JP H10326912A JP 35070197 A JP35070197 A JP 35070197A JP 35070197 A JP35070197 A JP 35070197A JP H10326912 A JPH10326912 A JP H10326912A
Authority
JP
Japan
Prior art keywords
gan
layer
mask
substrate
dislocation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35070197A
Other languages
Japanese (ja)
Inventor
Kazumasa Hiramatsu
和政 平松
Kazuyuki Tadatomo
一行 只友
Hiroaki Okagawa
広明 岡川
Yoichiro Ouchi
洋一郎 大内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Cable Industries Ltd
Original Assignee
Mitsubishi Cable Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Cable Industries Ltd filed Critical Mitsubishi Cable Industries Ltd
Priority to JP35070197A priority Critical patent/JPH10326912A/en
Publication of JPH10326912A publication Critical patent/JPH10326912A/en
Pending legal-status Critical Current

Links

Landscapes

  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a non-dislocation GaN substrate manufacturing method, capable of attaining the growth of a GaN semiconductor material of a thick film and excluding dislocation defects. SOLUTION: The surface of a base substrate 1 is partially covered with a 1st mask layer 2, consisting of a material substantially not to grow as crystal from its own surface and then a 1st GaN layer 3 is allowed to grow up to cover the surface of the layer 2 from the non-masked part 11 on the surface of the substrate 1 as a start point to obtain a GaN base material M. The surface of the GaN base material is regarded as the surface of the base substrate 1 in the process mentioned above, a 2nd mask layer 21 is similarly formed, and a 2nd GaN layer 31 is allowed to grow. The layer 21 is formed so as to cover the non-masked part 11. Consequently the 2nd GaN layer 31 can be formed as a non-dislocated semiconductor layer.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えばGaN系発
光素子の製造に好適な無転位GaN基板の製造方法及び
GaN基材に関するものである。
The present invention relates to a method for producing a dislocation-free GaN substrate and a GaN substrate suitable for producing, for example, a GaN-based light-emitting device.

【0002】[0002]

【従来の技術】一般的なGaN半導体材料の厚膜成長手
段としては、サファイア基板上にZnO等のバッファ層
を形成し、その上にHVPE法でGaN半導体材料を成
長させる方法がある。また、その改良技術として、サフ
ァイア基板に代え、スピネル、LGO、LAO、Zn
O、SiC等の基板を用いたり、易劈開性の基板を用い
たり、或いは基板表面にマスクを設けその上に選択成長
させる方法等がある。
2. Description of the Related Art As a general means for growing a thick film of a GaN semiconductor material, there is a method of forming a buffer layer of ZnO or the like on a sapphire substrate and growing the GaN semiconductor material thereon by HVPE. In addition, as an improved technology, spinel, LGO, LAO, Zn
There are a method of using a substrate of O, SiC, or the like, a method of using an easily cleavable substrate, a method of providing a mask on the surface of the substrate, and performing selective growth thereon.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、GaN
半導体材料を厚膜成長させると、GaNとサファイア基
板との格子定数及び熱膨張係数の違いから界面に多大の
ストレスが掛かり、GaNが割れ大型基板が得られない
といった問題点があった。また、転位密度が極めて大き
い(1×109 cm-2〜1×1010cm-2)基板しか得られ
ないといった問題点があった。ここで転位とは、基板上
に半導体層を成長させるときに、格子定数が合致してい
ない(格子不整合)状態で成長させた場合に発生する欠
陥であり、これら転位は結晶欠陥であるため非発光再結
合中心として働いたり、そこが電流のパスとして働き漏
れ電流の原因になるなど、当該GaN半導体材料を発光
素子に用いた場合に発光特性や寿命特性を低下させる原
因となる。
SUMMARY OF THE INVENTION However, GaN
When a semiconductor material is grown in a thick film, a large stress is applied to an interface due to a difference in lattice constant and a thermal expansion coefficient between GaN and a sapphire substrate, and GaN is broken, and a large substrate cannot be obtained. Further, there is a problem that only a substrate having an extremely large dislocation density (1 × 10 9 cm −2 to 1 × 10 10 cm −2 ) can be obtained. Here, dislocations are defects that occur when a semiconductor layer is grown on a substrate in a state where lattice constants do not match (lattice mismatch), and these dislocations are crystal defects. When the GaN semiconductor material is used for a light-emitting element, it functions as a non-radiative recombination center or functions as a current path and causes a leakage current.

【0004】従って本発明は、厚膜のGaN半導体材料
の成長が可能で、しかも転位欠陥を内包しない無転位G
aN基板の製造方法及びGaN基材を提供することを目
的とする。
Accordingly, the present invention provides a method for growing a GaN semiconductor material having a large thickness, and having no dislocation-free G that does not include dislocation defects.
An object of the present invention is to provide a method of manufacturing an aN substrate and a GaN substrate.

【0005】[0005]

【発明を解決するための手段】本発明の無転位GaN基
板の製造方法は、ベース基板の表面を、それ自身の表面
からは実質的に結晶成長し得ない材料からなるマスク層
で部分的に覆い、次いでベース基板表面の非マスク部を
出発点として前記マスク層上を覆うまでGaN層を成長
させてGaN母材を得る第一の工程と、該GaN母材表
面を前記第一の工程におけるベース基板表面とみなし
て、同様にマスク層形成及びGaN層の成長を行う第二
の工程とからなることを特徴とするものである。
According to the method of manufacturing a dislocation-free GaN substrate of the present invention, a surface of a base substrate is partially covered with a mask layer made of a material that cannot substantially grow crystals from its own surface. Covering, and then growing a GaN layer to cover the mask layer from the non-mask portion of the base substrate surface as a starting point to obtain a GaN base material, and forming the GaN base material surface in the first step. The method is characterized by comprising a second step of similarly forming a mask layer and growing a GaN layer assuming the surface of the base substrate.

【0006】また、本発明のGaN基材は、ベース基板
と、このベース基板の表面を部分的に覆う第一のマスク
層と、その上に成長され、ベース基板表面の非マスク部
と直接接触する部位を有すると共に前記マスク層上を覆
う第一のGaN層とからなるGaN母材部分と、該Ga
N母材の表面を部分的に覆う第二のマスク層と、その上
に成長され、GaN母材表面の非マスク部と直接接触す
る部位を有し前記第二のマスク層上を覆う第二のGaN
層とからなる無転位GaN部分とを具備することを特徴
とするものである。
Further, the GaN substrate of the present invention comprises a base substrate, a first mask layer partially covering the surface of the base substrate, and a first mask layer grown on the base substrate and directly in contact with a non-mask portion on the surface of the base substrate. A GaN base material portion comprising a first GaN layer having a portion to be covered and covering the mask layer;
A second mask layer partially covering the surface of the N base material; and a second mask layer grown on the second mask layer and having a portion directly in contact with the non-mask portion of the GaN base material surface and covering the second mask layer. GaN
And a dislocation-free GaN portion comprising a layer.

【0007】[0007]

【作用】本明細書では、GaN系結晶やサファイア基板
などの六方格子結晶の格子面を4つのミラー指数(hk
il)によって指定する場合があれば、記載の便宜上、
指数が負のときには、その指数の前にマイナス記号を付
けて表記するものとし、この負の指数に関する表記方法
以外は、一般的なミラー指数の表記方法に準じる。従っ
て、GaN系結晶の場合では、C軸に平行なプリズム面
(特異面)は6面あるが、例えば、その1つの面は(1
−100)と表記し、6面を等価な面としてまとめる場
合には{1−100}と表記する。また、前記{1−1
00}面に垂直でかつC軸に平行な面を等価的にまとめ
て{11−20}と表記する。また、(1−100)面
に垂直な方向は〔1−100〕、それと等価な方向の集
合を〈1−100〉とし、(11−20)面に垂直な方
向は〔11−20〕、それと等価な方向の集合を〈11
−20〉と表記する。但し、図面にミラー指数を記入す
る場合があれば、指数が負のときには、その指数の上に
マイナス記号を付けて表記し、ミラー指数の一般的な表
記方法に全て準じる。本発明でいう結晶方位は、全て、
ベース基板上にC軸を厚み方向として成長したGaNの
結晶を基準とする方位である。
In this specification, the lattice plane of a hexagonal lattice crystal such as a GaN-based crystal or a sapphire substrate has four Miller indices (hk
il), for convenience of description,
When an exponent is negative, the exponent is preceded by a minus sign, and the notation method for the negative exponent is the same as that of the general Miller index. Therefore, in the case of a GaN-based crystal, there are six prism surfaces (singular surfaces) parallel to the C-axis. For example, one of the surfaces is (1)
−100), and {1-100} when the six surfaces are grouped as equivalent surfaces. In addition, the above-mentioned Δ1-1
The planes perpendicular to the 00 plane and parallel to the C-axis are equivalently collectively denoted as {11-20}. The direction perpendicular to the (1-100) plane is [1-100], the set of equivalent directions is <1-100>, and the direction perpendicular to the (11-20) plane is [11-20]. The set of equivalent directions is <11
−20>. However, if there is a case where the Miller index is written in the drawing, if the index is negative, the index is indicated by adding a minus sign to the index, and all of the general Miller index notations are followed. The crystal orientations referred to in the present invention are all
The orientation is based on a GaN crystal grown on the base substrate with the C axis as the thickness direction.

【0008】本明細書でいう「無転位」とは、転位が全
く存在しない理想的な状態(理論上存在する状態)だけ
を意味するのではなく、サファイア基板上にバッファー
層を介してGaN系結晶を成長させた場合における通常
の転位密度に比べて、産業上その転位の影響を無視し得
る程十分に低い転位密度とされた状態を意味する。
[0008] The term "dislocation-free" as used herein means not only an ideal state in which dislocations do not exist at all (state theoretically present), but also a GaN-based layer on a sapphire substrate via a buffer layer. This means a state in which the dislocation density is sufficiently low so that the influence of the dislocation can be neglected industrially as compared with a normal dislocation density when a crystal is grown.

【0009】本発明者らは、先にGaNとサファイア基
板との格子定数及び熱膨張係数の違いに起因するGaN
層のクラック対策として、図5に示すように、ベース基
板1上に格子状にパターニングしたマスク層2を施し、
基板露出部へ点在的にチップサイズのGaN層30を成
長させることを提案している(特開平7−273367
号公報)。
[0009] The inventors of the present invention have previously made GaN and sapphire substrates different in lattice constant and thermal expansion coefficient.
As a countermeasure against layer cracks, as shown in FIG. 5, a mask layer 2 patterned in a grid pattern is applied on a base substrate 1,
It has been proposed to grow a chip-sized GaN layer 30 intermittently on an exposed portion of the substrate (Japanese Patent Laid-Open No. 7-273667).
No.).

【0010】その後本発明者らがさらに研究を重ねた結
果、点在的に成長させたGaN層30をさらに成長させ
ると、図1に示す如く厚さ方向だけでなく、各GaN層
30からマスク層2上へ向けての横方向へも成長が行わ
れることが確認された。しかも、成長条件によっては結
晶方位依存性を有することが判明した。
As a result of further studies conducted by the present inventors, when the GaN layer 30 which has been scattered is further grown, the GaN layer 30 is masked not only in the thickness direction as shown in FIG. It was confirmed that the growth was also performed in the lateral direction on the layer 2. In addition, it has been found that there is a crystal orientation dependency depending on the growth conditions.

【0011】さらに、前述の結晶中に存在する転位は、
基板を含む下地から継承するか、何れかの成長界面で発
生し、結晶成長と共に成長する特性がある。非マスク部
を出発点としマスク層を覆うまでGaN結晶を成長させ
た場合、マスク層を覆うのに要する厚み、低転位領域の
形成される場所は、マスク層の方向(マスク層と非マス
ク部との境界線の方向)・GaN結晶を成長させる時の
ガス雰囲気により変化することを見いだした。また、上
述の横方向の成長をさらに進めると、図2に示すよう
に、マスク層2を完全に埋め込み、非常に欠陥の少ない
平坦でクラックの無い大型且つ厚膜のGaN層3が得ら
れる事を見出した。クラックが発生しないのは、マスク
層2界面とGaN層3との界面が分離しているためにス
トレスが緩和されていることが原因と思われる。
Further, the dislocations existing in the above-mentioned crystal are:
It has the property of being inherited from a base including a substrate or being generated at any growth interface and growing together with crystal growth. When a GaN crystal is grown from the non-mask portion as a starting point to cover the mask layer, the thickness required to cover the mask layer and the location where the low dislocation region is formed are determined in the direction of the mask layer (the mask layer and the non-mask portion). Direction of the boundary line between the GaN crystal and the GaN crystal). Further, when the above-described lateral growth is further advanced, as shown in FIG. 2, the mask layer 2 is completely buried, and a flat, crack-free, large and thick GaN layer 3 with very few defects can be obtained. Was found. It is considered that the reason why cracks are not generated is that stress is reduced because the interface between the mask layer 2 and the GaN layer 3 is separated.

【0012】しかしながら、図2に示すように、この状
態ではマスク層2の上には低転位領域が形成されるもの
の、それ以外の領域では転位は低減されない。そこで本
発明は図3に示すように、このような積層体を母材Mと
し、その上に同様にしてマスク層21を形成することで
転位線の延伸を遮断し、さらにその上にGaN層22を
成長させることで、より無転位状態に近いGaN基板を
得るものである。
However, as shown in FIG. 2, in this state, although low dislocation regions are formed on the mask layer 2, dislocations are not reduced in other regions. Therefore, as shown in FIG. 3, the present invention uses such a laminate as a base material M, and forms a mask layer 21 thereon in the same manner to prevent dislocation lines from being stretched. By growing 22, a GaN substrate closer to a dislocation-free state is obtained.

【0013】[0013]

【発明の実施の形態】以下図面を参照しながら、本発明
の実施の形態につき説明する。図1〜図3は、本発明に
かかる無転位GaN基板の製造方法のプロセスの一例を
示す断面図である。同図では、転位が上層側へ伝搬する
態様のうち、非マスク部から上方に向かって直線的に伝
搬する場合の例を模式的に示している。図1、図2にお
いて、1はベース基板、2は該ベース基板1の表面を部
分的に覆うマスク層(第一のマスク層)、3はベース基
板1の非マスク部11と直接接触する部位を有すると共
に前記マスク層2上を覆うGaN層(第一のGaN層)
である。なお、この第一のGaN層3は、図1に示す点
在状のGaN層30をさらに成長させて形成されるもの
である。
Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are sectional views showing an example of a process of a method for manufacturing a dislocation-free GaN substrate according to the present invention. FIG. 4 schematically shows an example in which the dislocation propagates upward from the non-mask portion in a manner of propagating to the upper layer side. 1 and 2, 1 is a base substrate, 2 is a mask layer (first mask layer) that partially covers the surface of the base substrate 1, and 3 is a portion that directly contacts the non-mask portion 11 of the base substrate 1. A GaN layer (first GaN layer) having a mask and covering the mask layer 2
It is. The first GaN layer 3 is formed by further growing the dotted GaN layer 30 shown in FIG.

【0014】そして上記で得られた積層体をGaN母材
Mとして、次段のGaN層の形成が行われる。即ち、G
aN母材Mの表面を前工程におけるベース基板とみなし
て同様の工程、つまり第一のGaN層3の表面に、該表
面を部分的に覆う第二のマスク層21を設け、その上に
第二のGaN層31を成長させるものである。
Then, using the laminate obtained above as a GaN base material M, a next-stage GaN layer is formed. That is, G
A similar process is performed by regarding the surface of the aN base material M as a base substrate in the previous process, that is, a second mask layer 21 that partially covers the surface is provided on the surface of the first GaN layer 3, and a second mask layer 21 is formed thereon. The second GaN layer 31 is grown.

【0015】本発明で用いるベース基板1としては特に
制限はなく、従来からGaN層を成長させる際に汎用さ
れている、例えばサファイア、水晶、SiC等を用いる
ことができる。なかでも、サファイアのC面、A面、6
H−SiC基板、特にC面サファイア基板が好ましい。
またこれら材料の表面に、GaN層との格子定数や熱膨
張係数の違いを緩和するためのZnO、MgOやAlN
等のバッファ層を設けたものであっても良い。
The base substrate 1 used in the present invention is not particularly limited. For example, sapphire, quartz, SiC, etc., which have been conventionally used for growing a GaN layer, can be used. Above all, sapphire C side, A side, 6
An H-SiC substrate, particularly a C-plane sapphire substrate, is preferred.
In addition, ZnO, MgO or AlN for reducing the difference in lattice constant and thermal expansion coefficient from the GaN layer is formed on the surface of these materials.
And the like may be provided with a buffer layer.

【0016】特に、後に成長させるGaN結晶となるべ
く格子定数が近く、且つ熱膨張係数ができるだけ近いも
のを選択することが、転位などの欠陥を本来的に少なく
する点及びクラック等をより生じにくくする点で望まし
い。また、後述するマスク層2の薄膜形成の際における
高熱やエッチングに対する耐性に優れることが好まし
い。このようなベース基板1として、少なくともその表
層(GaN層3が成長される側の面の表層)がInX
Y AlZ N(0≦X≦1,0≦Y≦1,0≦Z≦1,
X+Y+Z=1)からなるものが挙げられる。具体的に
は、比較的厚肉のサファイア基板上に、MOVPE法に
よりZnOやAlN等のバッファ層、及びGaN又はG
aAlNの薄層を順次成膜したものが好適に用い得る。
In particular, selecting a GaN crystal having a lattice constant as close as possible to a GaN crystal to be grown later and having a thermal expansion coefficient as close as possible makes reduction of defects such as dislocations and generation of cracks more difficult. Desirable in point. Further, it is preferable to have excellent resistance to high heat and etching when forming a thin film of the mask layer 2 described later. As such a base substrate 1, at least the surface layer (the surface layer on the side on which the GaN layer 3 is grown) is made of In x G
a Y Al Z N (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ Z ≦ 1,
X + Y + Z = 1). Specifically, on a relatively thick sapphire substrate, a buffer layer such as ZnO or AlN, and a GaN or G
The one in which a thin layer of aAlN is sequentially formed can be suitably used.

【0017】上記第一、第二のマスク層2、21は、ベ
ース基板1表面における第一のGaN層3の成長可能領
域、及び第一のGaN層3表面における第二のGaN層
30の成長可能領域を実質的に制限することを目的とす
る層であるので、該マスク層を構成する材料としては、
それ自身の表面からは実質的に結晶が成長し得ないもの
であることが必要である。このような材料として例えば
非晶質体が例示され、さらにこの非晶質体としてSi、
Ti、Ta、Zr等の窒化物や酸化物、即ち、Si
2 、SiNX 、SiO1-X X 、TiO2 、ZrO2
等が例示される。とりわけ、耐熱性に優れると共に成膜
及びエッチング除去が比較的容易なSiO2、Si
X 、SiO1-X X が適しており、またこれら材料の
多層構造でもよい。
The first and second mask layers 2 and 21 are formed on the surface of the base substrate 1 where the first GaN layer 3 can be grown and on the surface of the first GaN layer 3 where the second GaN layer 30 is grown. Since the layer is intended to substantially limit the possible area, as a material constituting the mask layer,
It is necessary that crystals cannot grow substantially from its own surface. As such a material, for example, an amorphous body is exemplified, and further, as this amorphous body, Si,
Nitrides or oxides of Ti, Ta, Zr, etc., ie, Si
O 2 , SiN x , SiO 1-x N x , TiO 2 , ZrO 2
Etc. are exemplified. In particular, SiO 2 and Si which are excellent in heat resistance and relatively easy to form and remove by etching.
N x and SiO 1-x N x are suitable, and a multilayer structure of these materials may be used.

【0018】該マスク層2、21は、例えばMOVP
E、スパッタ、CVD等の方法により基板全表面を覆う
ように形成した後、通常のフォトリソグラフィー技術に
よって光感光性レジストのパターニングを行い、エッチ
ングによって基板の一部を露出させる等の手段で形成さ
れる。
The mask layers 2 and 21 are, for example, MOVP
E, after being formed so as to cover the entire surface of the substrate by a method such as sputtering or CVD, the photosensitive resist is patterned by a normal photolithography technique, and is formed by means such as exposing a part of the substrate by etching. You.

【0019】マスク層2、21の形成パターンについて
は特に限定はなく、格子状、ストライプ状、ドット状等
であって良いが、格子状とすればベース基板1表面積を
有効に使用できるため好ましい。格子状マスキングを採
用する場合、ベース基板1の露出パターンの形状は四角
形、その他多角形、円形でも構わない。しかし、横方向
の結晶成長速度はGaN層の〈1−100〉方向よりも
GaN層の〈11−20〉方向が速いという性質がある
ため、図4に示すようにGaN層の〈11−20〉方向
の格子幅AとGaN層の〈1−100〉方向の格子幅B
とを、0≦A≦Bの関係とし、マスク上の結晶性が良好
である特徴を最大限生かすようにすることが望ましい。
なお、格子の幅は1μm〜2mm程度、露出パターンは
四角形の場合は1μm〜2mm角程度とするのが好まし
い。
The pattern for forming the mask layers 2 and 21 is not particularly limited, and may be a lattice shape, a stripe shape, a dot shape, or the like. The lattice shape is preferable because the surface area of the base substrate 1 can be effectively used. When lattice masking is employed, the shape of the exposed pattern of the base substrate 1 may be square, other polygonal, or circular. However, since the crystal growth rate in the lateral direction is higher in the <11-20> direction of the GaN layer than in the <1-100> direction of the GaN layer, as shown in FIG. > A and the lattice width B of the GaN layer in the <1-100> direction.
Is preferably in a relationship of 0 ≦ A ≦ B, and it is desirable to make the best use of the feature of good crystallinity on the mask.
The width of the grating is preferably about 1 μm to 2 mm, and the exposed pattern is preferably about 1 μm to 2 mm square in the case of a square.

【0020】本発明においては、マスク層2で部分的に
覆われたベース基坂1の上には、第一のGaN層3が結
晶成長によって形成される。この場合、GaN結晶はベ
ース基板1の非マスク部のみが出発点となって成長が始
まる。即ち、GaN層3とベース基板1との直接接触部
位は、非マスク部のみとなる。さらに成長を続けると、
マスク層2の非マスク部キャビティを完全に埋め、ほど
なくマスク層2上に膨出する。なお成長を行うと、Ga
N結晶は厚さ方向だけでなく、前記膨出部の側面を出発
点として横方向への成長が始まり、やがて他の非マスク
部を出発点とする成長結晶と合流し、ついにはマスク層
2上を完全に覆うと共に厚さ方向への成長が継続して行
き、第一のGaN層3が形成されるものである。
In the present invention, a first GaN layer 3 is formed on a base substrate 1 partially covered with a mask layer 2 by crystal growth. In this case, the GaN crystal starts growing only from the non-mask portion of the base substrate 1. That is, the direct contact portion between the GaN layer 3 and the base substrate 1 is only the non-mask portion. As we continue to grow,
The non-mask portion cavity of the mask layer 2 is completely filled and swells on the mask layer 2 soon. In addition, when the growth is performed, Ga
The N crystal starts growing not only in the thickness direction but also in the lateral direction starting from the side surface of the bulging portion, and eventually merges with the growing crystal starting from the other non-mask portion, and finally the mask layer 2. The first GaN layer 3 is formed while completely covering the top and continuing to grow in the thickness direction.

【0021】このようにしてGaN層が非マスク部を出
発点として結晶成長しマスク層を覆うまでに要する厚
み、低転位領域が形成される場所は、マスク層の方向
(マスク層と非マスク部との境界線の方向)・GaN結
晶を成長させる時のガス雰囲気により変化する。マスク
層の長手方向を〈11−20〉方向にした場合、横方向
成長速度に対しC軸方向の成長速度が早いため、{1−
101}面などの斜めファセットが形成され易い。よっ
て、ピラミッド状の形状が先ず形成されてから平坦化す
る。このため平坦に埋め込むにはある程度の厚みが必要
となる。一方、マスク層の長手方向を〈1−100〉方
向にした場合、横方向成長速度が速くなるため{1−1
01}面などの斜めファセットは形成され難い。この結
果、平坦に埋め込むのが〈11−20〉に比べて薄くて
済む。
The thickness and low dislocation region required for the GaN layer to grow from the non-mask portion as a starting point for crystal growth and to cover the mask layer are determined in the direction of the mask layer (the mask layer and the non-mask portion). (The direction of the boundary line between the two) changes depending on the gas atmosphere when the GaN crystal is grown. When the longitudinal direction of the mask layer is set to the <11-20> direction, the growth rate in the C-axis direction is higher than the growth rate in the lateral direction.
Oblique facets such as the 101 ° plane are easily formed. Therefore, the pyramid shape is first formed and then flattened. For this reason, a certain thickness is required for flat embedding. On the other hand, when the longitudinal direction of the mask layer is set to the <1-100> direction, the growth rate in the lateral direction is increased, and therefore, {1-1}.
It is difficult to form oblique facets such as the 01 ° plane. As a result, flat embedding can be made thinner than <11-20>.

【0022】GaN層を非マスク部を出発点としてマス
ク層上を覆うように成長させる時の成長雰囲気ガスは、
水素・窒素・アルゴン・ヘリウム等が挙げられるが、形
状等を制御する上で水素・窒素が望ましい。水素と窒素
では、C軸方向と横方向の速度比が変動するため、目的
に応じ適時使い分けると素子設計の幅が広がる。基板−
成長層界面を起点とし上に伝搬する転位線(貫通転位)
の形成のされ方は、マスク層の開口部上に{1−10
1}面などの斜めファセットが出る場合、この面で曲げ
られるため、マスク層上に転位が形成され、この結果、
非マスク部(開口部)の上方が低転位領域となる。一
方、横方向成長速度が速く、{1−101}面などの斜
めファセットが形成され難い場合は、転位線はC軸方向
に伝搬する。この場合、マスク層の上方が低転位領域と
なる。この様に、成長条件を変化させることで、マスク
層を埋め込むまでに要する厚さ・低転位領域の位置を制
御できるために、デバイス設計の自由度が上がる。ま
た、GaN層とベース基板との直接接触部位は非マスク
部のみで接触面積は小さく、両者の熱膨張係数の相違の
影響をあまり受けないことから、厚肉のGaN層が容易
に成長させ得るという利点もある。
The growth atmosphere gas for growing the GaN layer so as to cover the mask layer from the non-mask portion as a starting point is as follows:
Examples thereof include hydrogen, nitrogen, argon, and helium, and hydrogen and nitrogen are preferable for controlling the shape and the like. Since the speed ratio of hydrogen and nitrogen changes in the C-axis direction and in the lateral direction, if they are used properly according to the purpose, the range of element design can be widened. Substrate
Dislocation lines propagating upward from the growth layer interface (threading dislocations)
Is formed on the opening of the mask layer by {1-10}.
When an oblique facet such as a 1} plane appears, the plane is bent at this plane, and dislocations are formed on the mask layer.
Above the non-mask portion (opening) is a low dislocation region. On the other hand, when the lateral growth rate is high and an oblique facet such as the {1-101} plane is difficult to form, the dislocation line propagates in the C-axis direction. In this case, a region above the mask layer is a low dislocation region. As described above, by changing the growth conditions, the thickness and the position of the low dislocation region required for embedding the mask layer can be controlled, so that the degree of freedom in device design increases. In addition, the direct contact portion between the GaN layer and the base substrate is only the non-mask portion and the contact area is small, and the GaN layer and the base substrate are not significantly affected by the difference in the thermal expansion coefficient between the two, so that a thick GaN layer can be easily grown. There is also an advantage.

【0023】しかし、上記のように、非マスク部11か
ら第一のGaN層3内には転位等の欠陥が継承されるこ
とがあるために、この第一のGaN層3は完全な無転位
結晶とは言えない。そこで、第一のGaN層3の上に第
二のマスク層21を設け、この第二のマスク層21によ
って第一のGaN層3内を伝搬してきた転位線(残留転
位線)を止めることによって該転位線の延伸を遮断した
状態とし、その上に第二のGaN層31を成長させるこ
とで、より無転位結晶に近いGaN結晶を得んとするも
のである。従って、この第二のGaN層31の上に同様
にしてマスク層及びGaN層を形成する工程をさらに繰
り返す程、完全無転位結晶に近いGaN結晶を得ること
ができる。
However, as described above, since defects such as dislocations may be inherited from the non-mask portion 11 into the first GaN layer 3, the first GaN layer 3 is completely dislocation-free. Not a crystal. Therefore, a second mask layer 21 is provided on the first GaN layer 3 to stop dislocation lines (remaining dislocation lines) propagating in the first GaN layer 3 by the second mask layer 21. The GaN crystal closer to a dislocation-free crystal is obtained by growing the second GaN layer 31 thereon while keeping the dislocation lines from being stretched. Therefore, as the steps of forming a mask layer and a GaN layer on the second GaN layer 31 in the same manner are further repeated, a GaN crystal closer to a completely dislocation-free crystal can be obtained.

【0024】また、転位線が第一のGaN層3内を非マ
スク部の上方へ直線的に伝搬する場合には、第二のマス
ク層21を、第一の工程において非マスク部11とされ
た部位の直上をカバーするようにして、GaN母材Mの
表面部位に形成すれば、前記残留転位線の遮断を効果的
に行うことができるので、マスク層及びGaN層を形成
する工程を何回も操り返さずとも高品質なGaN結晶を
得ることが可能となるという利点がある。
When dislocation lines propagate linearly in the first GaN layer 3 above the non-mask portion, the second mask layer 21 is used as the non-mask portion 11 in the first step. If it is formed on the surface portion of the GaN base material M so as to cover the portion directly above the portion that has been set, the residual dislocation lines can be effectively cut off. There is an advantage that a high-quality GaN crystal can be obtained without repeating the operation.

【0025】GaN層3、31の形成材料としては、G
aNだけでなく、GaN系半導体材料も使用でき、例え
ば式InX GaY AlZ N(0≦X≦1,0≦Y≦1,
0≦Z≦1,X+Y+Z=1)で示される材料を使用で
きる。かかるGaN層3の成長方法については制限はな
く、HVPE法、MOCVD法、MBE法等などがよ
い。C軸方向に高速に成長させて厚膜を形成する場合は
HVPE法が好ましいが、薄膜を形成する場合はMOC
VD法が好ましい。
The material for forming the GaN layers 3 and 31 is G
aN well, can be used GaN-based semiconductor material, such as those of the formula In X Ga Y Al Z N ( 0 ≦ X ≦ 1,0 ≦ Y ≦ 1,
A material represented by 0 ≦ Z ≦ 1, X + Y + Z = 1) can be used. There is no limitation on the method of growing the GaN layer 3, and an HVPE method, a MOCVD method, an MBE method, or the like is preferable. The HVPE method is preferable for forming a thick film by growing at a high speed in the C-axis direction.
The VD method is preferred.

【0026】本発明により得られた無転位GaN基板、
即ち厚肉に成長させた第二のGaN層31を基板とし
て、その上にクラッド層と活性層とからなる発光部等及
び電極を形成することで、LEDやLD等の発光素子を
製造することができる。
A dislocation-free GaN substrate obtained by the present invention,
That is, a light emitting element such as an LED or an LD is manufactured by forming a light emitting portion or the like including a clad layer and an active layer and an electrode on the second GaN layer 31 grown thickly as a substrate. Can be.

【0027】[0027]

【実施例】【Example】

(実施例1)直径2インチ、厚さ330μm、C面サフ
ァイア基板上に、MOVPE装置を使って、厚さ20n
mのAlNバッファ層を低温成長させ、続いて1.5μ
mのGaN薄層を成長させ、ベース基板とした。このベ
ース基板の表面にマスク材料としてSiO2 薄膜をスパ
ッタリング法で形成し、さらにエッチングによって、線
幅100μmで200μmピッチの格子状のパターンの
マスク層とした。即ち、100μm角の正方形の露出部
分が100μm間隔で並ぶ形状となる。これを新たな基
板としてHVPE装置に装填し、300μmの第一のn
型GaN層を成長させた。マスク層は完全に埋め込ま
れ、表面の平坦性は良好であり、2インチ径のn型Ga
N母材が得られた。
(Example 1) On a C-plane sapphire substrate having a diameter of 2 inches and a thickness of 330 μm, using a MOVPE apparatus, a thickness of 20 n was used.
m AlN buffer layer was grown at low temperature followed by 1.5 μm
A m-GaN thin layer was grown and used as a base substrate. A SiO 2 thin film was formed as a mask material on the surface of the base substrate by a sputtering method, and was further etched to form a mask layer having a lattice pattern with a line width of 100 μm and a pitch of 200 μm. That is, a 100 μm square exposed portion is arranged at 100 μm intervals. This is loaded into the HVPE apparatus as a new substrate, and the first n of 300 μm is set.
A type GaN layer was grown. The mask layer is completely buried, the surface flatness is good, and n-type Ga
An N base material was obtained.

【0028】このn型GaN母材の表面に、同機にマス
ク材料としてSiO2 薄膜をスパッタリング法で形成
し、線幅100μmで200μmピッチの格子状のパタ
ーンにマスク材料を残し第二のマスク層を形成した。な
お、このマスクパターンニングは、先の工程で非マスク
部とした部位の直上をカバーするものとした。そしてこ
れをHVPE装置に装填し、300μmの第二のn型G
aN層を成長させた。得られたn型GaN基材の第二の
n型GaN層をTEMで評価した結果、転位密度は1×
102 cm-2以下であった。
On the surface of the n-type GaN base material, a SiO 2 thin film is formed as a mask material by sputtering using the same machine, and the mask material is left in a lattice pattern having a line width of 100 μm and a pitch of 200 μm to form a second mask layer. Formed. Note that this mask patterning covers the area immediately above the non-mask portion in the previous step. Then, this is loaded into an HVPE apparatus, and a second n-type G
An aN layer was grown. As a result of evaluating the second n-type GaN layer of the obtained n-type GaN base material by TEM, the dislocation density was 1 ×
It was 10 2 cm -2 or less.

【0029】(実施例2)実施例1で作製したベース基
板の表面にマスク材料として厚さ500nmのSiO2
薄膜をスパッタリング法で形成し、線幅200μmの直
線状パターンが400μmピッチで並ぶストライプ状の
パターンにマスク材料を残しマスク層とした。即ち、2
00μm幅の直線の露出部分が、200μm間隔で並ぶ
形状となる。ストライプの方向はGaN層の〈1−10
0〉方向とした。これを新たな基板としてHVPE装置
に装填し、300μmのn型GaN層を成長させた。マ
スク材料は完全に埋め込まれ、クラックの発生は見られ
ず、表面の平坦性の良好な2インチ径のn型GaN母材
が得られた。
Example 2 A 500-nm-thick SiO 2 film was used as a mask material on the surface of the base substrate fabricated in Example 1.
A thin film was formed by a sputtering method, and the mask material was left as a mask layer in a striped pattern in which linear patterns having a line width of 200 μm were arranged at a pitch of 400 μm. That is, 2
The exposed portions of a straight line having a width of 00 μm are arranged at intervals of 200 μm. The direction of the stripe is <1-10 of the GaN layer.
0> direction. This was loaded into an HVPE apparatus as a new substrate, and a 300 μm n-type GaN layer was grown. The mask material was completely embedded, no cracks were observed, and a 2-inch diameter n-type GaN base material having good surface flatness was obtained.

【0030】このn型GaN母材の表面に、同様にマス
ク材料としてSiO2 薄膜をスパッタリング法で形成
し、同じパターンにマスク材料を残し第二のマスク層を
形成した。なお、このマスクパターンニングは、先の工
程で非マスク部とした部位の直上をカバーするものとし
た。そしてこれをHVPE装置に装填し、300μmの
第二のn型GaN層を成長させ、GaN基材を得た。
An SiO 2 thin film was similarly formed as a mask material on the surface of the n-type GaN base material by a sputtering method, and a second mask layer was formed while leaving the mask material in the same pattern. Note that this mask patterning covers the area immediately above the non-mask portion in the previous step. Then, this was loaded into an HVPE apparatus, and a second n-type GaN layer having a thickness of 300 μm was grown to obtain a GaN base material.

【0031】(実施例3)結晶構造が6H型であるSi
C基板(0001)上に、マスク材料として厚さ150
nmのSiO2 薄膜を熱CVD法で形成し、10μm径
の円形の露出部分が100μmピッチで並ぶドット状の
パターンにマスク材料を残しマスク層とした。即ち、1
00μm間隔の格子点上に上記の円形露出部分が並んだ
形状となる。これを新たな基板としてHVPE装置に装
填し、300μmのn型GaN層を成長させた。マスク
材料は完全に埋め込まれ、クラックの発生は見られず、
表面の平坦性の良好な2インチ径のn型GaN母材が得
られた。
Example 3 Si having a crystal structure of 6H type
On a C substrate (0001), a mask material having a thickness of 150
A SiO 2 thin film having a thickness of 10 nm was formed by a thermal CVD method, and the mask material was left as a mask layer in a dot pattern in which circular exposed portions having a diameter of 10 μm were arranged at a pitch of 100 μm. That is, 1
The circular exposed portions are arranged on the grid points at intervals of 00 μm. This was loaded into an HVPE apparatus as a new substrate, and a 300 μm n-type GaN layer was grown. The mask material is completely embedded, no cracks are seen,
A 2-inch diameter n-type GaN base material having good surface flatness was obtained.

【0032】このn型GaN母材の表面に、同様にマス
ク材料としてSiO2 薄膜をスパッタリング法で形成
し、同じパターンにマスク材料を残し第二のマスク層を
形成した。なお、このマスクパターンニングは、先の工
程で非マスク部とした部位の直上をカバーするものとし
た。そしてこれをHVPE装置に装填し、350μmの
第二のn型GaN層を成長させ、GaN基材を得た。
On the surface of the n-type GaN base material, an SiO 2 thin film was similarly formed as a mask material by a sputtering method, and a second mask layer was formed while leaving the mask material in the same pattern. Note that this mask patterning covers the area immediately above the non-mask portion in the previous step. Then, this was loaded into an HVPE apparatus, and a second n-type GaN layer of 350 μm was grown to obtain a GaN base material.

【0033】(実施例4)マスク層の仕様およびGaN
層の形成方法を次のようにしたこと以外は、実施例1と
同様に第一のn型GaN層を成長させた。マスク層は、
材料をSiO2 とし、形成パターンをストライプ状とし
た。該ストライプは長手方向をGaN層の〈1−10
0〉方向とし、帯状のマスク層の幅、非マスク部の幅
(マスク層同士の隙間)を共に4μmとした。GaN層
の成長は、MOCVD法を用い、雰囲気ガスは水素とし
た。
Example 4 Specification of Mask Layer and GaN
A first n-type GaN layer was grown in the same manner as in Example 1 except that the method of forming the layer was as follows. The mask layer is
The material was SiO 2 , and the formed pattern was a stripe shape. The stripe has a longitudinal direction of <1-10 of the GaN layer.
0> direction, and the width of the strip-shaped mask layer and the width of the non-mask portion (gap between the mask layers) were both 4 μm. The GaN layer was grown by MOCVD, and the atmosphere gas was hydrogen.

【0034】非マスク部を結晶成長の出発点として、マ
スク層を覆って上面が平坦になるまでGaNを結晶成長
させたところ、上面が平坦になった時点でのGaN層の
厚みは3μmであった。このとき低転位領域はマスク層
の上方に位置していた。また、GaN層の表面の平坦性
は良好であり、2インチ径のGaN基材が得られた。
Using the non-mask portion as a starting point for crystal growth, GaN was grown until the upper surface became flat covering the mask layer. When the upper surface became flat, the thickness of the GaN layer was 3 μm. Was. At this time, the low dislocation region was located above the mask layer. In addition, the flatness of the surface of the GaN layer was good, and a GaN substrate having a diameter of 2 inches was obtained.

【0035】得られたGaN基材を新たな基板とし、そ
の表面に、GaN層の〈1−100〉方向を長手方向と
するストライプ状の形成パターンにて、かつ下層側の非
マスク部上にマスク層が位置するように、第二のマスク
層を形成した。
The obtained GaN base material is used as a new substrate, and its surface is formed on the surface of the GaN layer in the form of a stripe having a longitudinal direction in the <1-100> direction and on the lower non-mask portion. A second mask layer was formed such that the mask layer was located.

【0036】非マスク部を結晶成長の出発点とし、第二
のマスク層を覆って上面が平坦になるまで第二のGaN
層を成長させたところ、上面が平坦になった時点でのG
aN層の厚みは3μmであった。最初の基板から伝搬し
ていた転位線は第二のマスク層によって遮られており、
結果として総厚6μmのGaN層の成長によって、表面
全体が低転位なGaN基材が得られた。
Using the non-mask portion as a starting point for crystal growth, the second GaN layer is covered with the second mask layer until the upper surface becomes flat.
When the layer is grown, G at the point where the upper surface becomes flat
The thickness of the aN layer was 3 μm. Dislocation lines propagating from the first substrate are blocked by the second mask layer,
As a result, the growth of the GaN layer having a total thickness of 6 μm yielded a GaN substrate having low dislocations on the entire surface.

【0037】[0037]

【発明の効果】以上説明した通りの本発明の無転位Ga
N基板の製造方法及びGaN基材によれば、厚膜のGa
N半導体材料の成長が可能で、しかも転位欠陥を実質的
内包しない無転位GaN基板の作成が可能となる。従
って本発明で得られたGaN基板を発光素子の構成材料
として用いた場合、無転位であるので非発光再結合中心
の生成や漏れ電流の発生の問題は生じず、当該発光素子
の発光特性や寿命特性を低下させることがないという優
れた効果を奏する。
As described above, the dislocation-free Ga of the present invention is used.
According to the method of manufacturing the N substrate and the GaN substrate,
N semiconductor material can be grown, and dislocation defects are substantially eliminated.
It is possible to create a dislocation-free GaN substrate that is not included in the GaN substrate. Therefore, when the GaN substrate obtained by the present invention is used as a constituent material of a light-emitting element, since there is no dislocation, there is no problem of generation of a non-radiative recombination center or generation of a leakage current, An excellent effect is obtained in that the life characteristics are not reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るGaN基材の成長途中の状態を示
す断面図である。
FIG. 1 is a sectional view showing a state in which a GaN substrate according to the present invention is growing.

【図2】本発明に係るGaN基材の次段階の成長途中の
状態を示す断面図である。
FIG. 2 is a cross-sectional view showing a state in which a GaN substrate according to the present invention is being grown in the next stage.

【図3】本発明に係るGaN基材を示す断面図である。FIG. 3 is a sectional view showing a GaN substrate according to the present invention.

【図4】本発明におけるマスク層パターンの一例を示す
上面図である。
FIG. 4 is a top view showing an example of a mask layer pattern according to the present invention.

【図5】従来のGaN基材を示す断面図である。FIG. 5 is a sectional view showing a conventional GaN substrate.

【符号の説明】[Explanation of symbols]

1 ベース基板 11 非マスク部 2 第一のマスク層 21 第二のマスク層 3 第一のGaN層 31 第二のGaN層 M GaN母材 Reference Signs List 1 base substrate 11 non-mask portion 2 first mask layer 21 second mask layer 3 first GaN layer 31 second GaN layer M GaN base material

───────────────────────────────────────────────────── フロントページの続き (72)発明者 大内 洋一郎 兵庫県伊丹市池尻4丁目3番地 三菱電線 工業株式会社伊丹製作所内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yoichiro Ouchi 4-3 Ikejiri, Itami-shi, Hyogo Mitsubishi Electric Cable Industry Co., Ltd. Itami Works

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 ベース基板の表面を、それ自身の表面か
らは実質的に結晶成長し得ない材料からなるマスク層で
部分的に覆い、次いでベース基板表面の非マスク部を出
発点として前記マスク層上を覆うまでGaN層を成長さ
せてGaN母材を得る第一の工程と、 該GaN母材表面を前記第一の工程におけるベース基板
表面とみなして、同様にマスク層形成及びGaN層の成
長を行う第二の工程とからなることを特徴とする無転位
GaN基板の製造方法。
1. A method according to claim 1, wherein the surface of the base substrate is partially covered with a mask layer made of a material that cannot substantially grow crystals from the surface of the base substrate. A first step of growing a GaN layer to cover the layer to obtain a GaN preform; and treating the GaN preform surface as a base substrate surface in the first step, similarly forming a mask layer and forming a GaN layer. A method for producing a dislocation-free GaN substrate, comprising a second step of growing.
【請求項2】 上記第二の工程の終了後、さらに同様な
工程を所要回数繰り返すことを特徴とする請求項1記載
の無転位GaN基板の製造方法。
2. The method of manufacturing a dislocation-free GaN substrate according to claim 1, wherein the same step is repeated a required number of times after the completion of the second step.
【請求項3】 上記第二の工程で形成されるマスク層
は、第一の工程において非マスク部とされた部位に対応
するGaN母材の表面部位に形成されることを特徴とす
る請求項1記載の無転位GaN基坂の製造方法。
3. The method according to claim 1, wherein the mask layer formed in the second step is formed on a surface portion of the GaN base material corresponding to the non-masked portion in the first step. 2. The method for producing a dislocation-free GaN substrate according to 1.
【請求項4】 GaN層の成長が、HVPE法、MOC
VD法、MBE法のいずれかによって行われることを特
徴とする請求項1記載の無転位GaN基板の製造方法。
4. The method according to claim 1, wherein the GaN layer is grown by HVPE or MOC.
The method for producing a dislocation-free GaN substrate according to claim 1, wherein the method is performed by one of a VD method and an MBE method.
【請求項5】 ベース基板と、このベース基板の表面を
部分的に覆う第一のマスク層と、その上に成長され、ベ
ース基板表面の非マスク部と直接接触する部位を有する
と共に前記マスク層上を覆う第一のGaN層とからなる
GaN母材部分と、 該GaN母材の表面を部分的に覆う第二のマスク層と、
その上に成長され、GaN母材表面の非マスク部と直接
接触する部位を有し前記第二のマスク層上を覆う第二の
GaN層とからなる無転位GaN部分とを具備すること
を特徴とするGaN基材。
5. A mask substrate having a base substrate, a first mask layer partially covering the surface of the base substrate, a portion grown thereon and in direct contact with a non-mask portion of the base substrate surface, and A GaN base material portion including a first GaN layer covering the top, a second mask layer partially covering a surface of the GaN base material,
A dislocation-free GaN portion comprising a second GaN layer grown thereon and having a portion directly in contact with the non-mask portion of the GaN base material surface and covering the second mask layer. GaN base material.
【請求項6】 上記無転位GaN部分が、複数層形成さ
れていることを特徴とする請求項5記載のGaN基材。
6. The GaN substrate according to claim 5, wherein the dislocation-free GaN portion is formed in a plurality of layers.
JP35070197A 1997-03-25 1997-12-19 Production of non-dislocated gan substrate and gan base material Pending JPH10326912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35070197A JPH10326912A (en) 1997-03-25 1997-12-19 Production of non-dislocated gan substrate and gan base material

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP9-91512 1997-03-25
JP9151297 1997-03-25
JP35070197A JPH10326912A (en) 1997-03-25 1997-12-19 Production of non-dislocated gan substrate and gan base material

Publications (1)

Publication Number Publication Date
JPH10326912A true JPH10326912A (en) 1998-12-08

Family

ID=26432947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35070197A Pending JPH10326912A (en) 1997-03-25 1997-12-19 Production of non-dislocated gan substrate and gan base material

Country Status (1)

Country Link
JP (1) JPH10326912A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163404A (en) * 1997-11-25 1999-06-18 Toyoda Gosei Co Ltd Gan-based semiconductor
JP2001158698A (en) * 1999-12-01 2001-06-12 Sony Corp Method for producing crystal of nitride-based iii-v compound, crystal substrate of nitride-based iii-v compound, film of nitride-based iii-v compound and method for producing device
JP2002505519A (en) * 1998-02-27 2002-02-19 ノース・キャロライナ・ステイト・ユニヴァーシティ Method for producing gallium nitride semiconductor layer by lateral overgrowth through mask and gallium nitride semiconductor structure produced thereby
KR100464296B1 (en) * 1998-02-05 2005-03-08 삼성전자주식회사 Method for growing single crystalline thin film to grow high quality single crystal without crystal defect
JP2006324680A (en) * 2006-06-08 2006-11-30 Sony Corp Crystal film, crystal substrate, and semiconductor device
JP2007043037A (en) * 2005-06-27 2007-02-15 Toshiba Corp Substrate for semiconductor layer deposition, field effect semiconductor device, and manufacturing method thereof
US7727331B2 (en) 2001-01-18 2010-06-01 Sony Corporation Crystal firm, crystal substrate, and semiconductor device
JP2010222174A (en) * 2009-03-23 2010-10-07 Nippon Telegr & Teleph Corp <Ntt> Nitride semiconductor structure
JP2012182459A (en) * 2012-03-06 2012-09-20 Nippon Telegr & Teleph Corp <Ntt> Nitride semiconductor structure
JP2012209533A (en) * 2011-03-29 2012-10-25 Qinghua Univ Epitaxial structure and method for making the same
US8906788B2 (en) 2011-01-12 2014-12-09 Tsinghua University Method for making epitaxial structure

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163404A (en) * 1997-11-25 1999-06-18 Toyoda Gosei Co Ltd Gan-based semiconductor
KR100464296B1 (en) * 1998-02-05 2005-03-08 삼성전자주식회사 Method for growing single crystalline thin film to grow high quality single crystal without crystal defect
JP2002505519A (en) * 1998-02-27 2002-02-19 ノース・キャロライナ・ステイト・ユニヴァーシティ Method for producing gallium nitride semiconductor layer by lateral overgrowth through mask and gallium nitride semiconductor structure produced thereby
JP2001158698A (en) * 1999-12-01 2001-06-12 Sony Corp Method for producing crystal of nitride-based iii-v compound, crystal substrate of nitride-based iii-v compound, film of nitride-based iii-v compound and method for producing device
US7727331B2 (en) 2001-01-18 2010-06-01 Sony Corporation Crystal firm, crystal substrate, and semiconductor device
US8741451B2 (en) 2001-01-18 2014-06-03 Sony Corporation Crystal film, crystal substrate, and semiconductor device
JP2007043037A (en) * 2005-06-27 2007-02-15 Toshiba Corp Substrate for semiconductor layer deposition, field effect semiconductor device, and manufacturing method thereof
JP2006324680A (en) * 2006-06-08 2006-11-30 Sony Corp Crystal film, crystal substrate, and semiconductor device
JP2010222174A (en) * 2009-03-23 2010-10-07 Nippon Telegr & Teleph Corp <Ntt> Nitride semiconductor structure
US8906788B2 (en) 2011-01-12 2014-12-09 Tsinghua University Method for making epitaxial structure
JP2012209533A (en) * 2011-03-29 2012-10-25 Qinghua Univ Epitaxial structure and method for making the same
JP2012182459A (en) * 2012-03-06 2012-09-20 Nippon Telegr & Teleph Corp <Ntt> Nitride semiconductor structure

Similar Documents

Publication Publication Date Title
JPH1143398A (en) Substrate for growing gallium nitride-based crystal and use thereof
KR100700677B1 (en) Semiconductor thin film, semiconductor element and semiconductor device, and fabrication methods thereof
US6294440B1 (en) Semiconductor substrate, light-emitting device, and method for producing the same
EP0874405A2 (en) GaN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof
JP3620269B2 (en) GaN-based semiconductor device manufacturing method
US20140127848A1 (en) Nitride semiconductor light-emittting device and process for producing the same
JP2000277437A (en) Growth method for nitride semiconductor and element thereof
JPH10326912A (en) Production of non-dislocated gan substrate and gan base material
JP4322187B2 (en) Nitride semiconductor light emitting device
JP2003055097A (en) Unit substrate comprising nitride semiconductor and method of producing the same
JPH11274082A (en) Group iii nitride semiconductor and fabrication thereof, and group iii nitride semiconductor device
JPH11130597A (en) Control of dislocation line in transmission direction and its use
JP2000174393A (en) Group iii nitride semiconductor, its manufacture and group iii nitride semiconductor device
JP4581478B2 (en) Manufacturing method of nitride semiconductor
JP3650531B2 (en) GaN-based crystal substrate and method for producing the same
JP3462370B2 (en) GaN-based crystal growth substrate and its use
JP3416042B2 (en) GaN substrate and method of manufacturing the same
JPH11145515A (en) Gan semiconductor light-emitting element and manufacture thereof
JP3645994B2 (en) GaN-based semiconductor light emitting device
JPH1192296A (en) Substrate for growing gallium nitride crystal and its use
JP2003077841A (en) Nitride semiconductor substrate and growth method therefor
JP2001345281A (en) Method of manufacturing nitride-based iii group compound semiconductor and nitride-based iii group compound semiconductor element
JP3569111B2 (en) Manufacturing method of GaN-based crystal substrate
JP2004158500A (en) Nitride semiconductor, nitride semiconductor substrate, nitride semiconductor device, and method of manufacturing them
JP2000173929A (en) Substrate to grow gallium nitride crystal and its use

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20031216