JPH10322031A - Manufacture of multilayered wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the manufacture of a multilayered wiring board where electronic parts such as a semiconductor element, a capacitive element, etc., can be firmly connected to a bonding pad without causing change in the prop erty. SOLUTION: A multilayered wiring board is constituted by stacking organic resin insulating layers 2a and film wiring conductor layers 3 alternately and also, electrically connecting the film wiring conductor layer 3 positioned above and below with each other through a through hole conductor provided in the organic resin insulating layer 2a, and here a bonding pad 11 which electrically connects with the film wiring conductor layer 3 and to which the electrode of outside electronic parts A is connected is made in the hole 10 provided in the uppermost organic resin insulating layer 2a. At this time, the topside of the uppermost conductive organic resin insulating layer 2a and the inner flank of the hole 10 are coated with a conductive resin layer 13, and with this conductive resin layer 13 as an electrode line, the surface of the bonding pad 11 is coated with a solder layer to form a solder bump.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board used for a hybrid integrated circuit device, a semiconductor element housing package for housing a semiconductor element, and the like.

[0002]

2. Description of the Related Art Conventionally, a multilayer wiring board used for a hybrid integrated circuit device, a package for accommodating a semiconductor element, or the like, has its wiring conductor formed by a thick film forming technique such as the Mo-Mn method.

[0003] This Mo-Mn method is generally used for tungsten,
Organic solvents for high melting point metal powders such as molybdenum and manganese,
A solvent is added and mixed, and a paste-like metal paste is applied by printing on the outer surface of the green ceramic body in a predetermined pattern by a screen printing method. This is a method of sintering and integrating a metal powder and a green ceramic body.

The ceramic body on which the wiring conductor is formed is usually an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or an aluminum nitride having an oxide film deposited on the surface. Non-oxide ceramics such as a porous sintered body and a silicon carbide sintered body are used.

However, when the wiring conductor is formed by using the Mo-Mn method, the wiring conductor is formed by screen-printing a metal paste. Had the drawback that it could not be done.

In order to solve the above-mentioned drawbacks, a multi-layer wiring board formed using a thin film forming technique capable of miniaturization instead of forming the wiring conductor by the conventional thick film forming technique is used. It has become.

A multilayer wiring board in which such wiring conductors are formed by a thin film forming technique is provided on a substrate made of a glass epoxy resin or the like formed by impregnating a cloth woven with a bismaleimide triazine resin or glass fiber with an epoxy resin. Adopt organic resin insulation layer made of epoxy resin formed by spin coating method and thermosetting treatment, and thin film forming technology such as electroless plating and vapor deposition of metal such as copper and aluminum, and photolithography technology. And the thin film wiring conductor layers formed by the above are alternately laminated, and the upper and lower thin film wiring conductor layers are electrically connected via the through-hole conductors attached to the inner walls of the through holes provided in the organic resin insulating layer. Having a connection structure, and a bonding pad electrically connected to the thin film wiring conductor layer on the upper surface of the uppermost organic resin insulating layer. Forming a Ingupaddo advance, so as to connect through the active component, a capacitor such as a semiconductor element, the passive components of the electrode of the resistor such as solder on the bonding pads.

The connection between the bonding pad of the multilayer wiring board and the electrode of the electronic component is performed by forming a bump made of solder in advance on the surface of the bonding pad and the electrode surface of the electronic component, and connecting the bonding pad of the multilayer wiring board to the bonding pad. This is performed by bringing the solder bumps of the electronic component into contact with the solder bumps that have been applied, and then subjecting the solder bumps to heat treatment to melt both solder bumps.

Also, the method of applying solder bumps to the bonding pad surface of the multilayer wiring board is disclosed in
No. 6196, specifically, first, a solder resist is applied onto the uppermost organic resin insulating layer on which the bonding pads are formed, leaving the bonding pads, and then the solder resist is applied. A copper layer is applied on the surface and the surface of the bonding pad by a chemical plating method, and the copper layer applied on the solder resist surface is covered with a plating resist, and then on the copper layer applied on the bonding pad. This is performed by depositing solder by electrolytic plating and finally removing the copper layer deposited on the surfaces of the plating resist and the solder resist.

[0010]

However, in the above-described multilayer wiring board, the solder bumps attached to the bonding pads are formed by applying a solder to the surface of a copper layer formed by a chemical plating method by an electrolytic plating method. When the solder bumps are heated and melted to connect the bonding pads of the multilayer wiring board to the electrodes of the electronic component, the underlying copper diffuses into the solder, increasing the melting point of the solder bumps and increasing the solder bumps. The mechanical strength of the bumps is weakened, and as a result, the heat of heating and melting the solder bumps changes the characteristics of the electronic components, causing the electronic components to malfunction and after connecting the electronic components to the bonding pad When an external force is applied to the electronic component, the external force may damage the solder connecting the bonding pad and the electronic component. Occurs, has the disadvantage that the reliability of connection to the bonding pads of the electronic components is significantly reduced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and has as its object to provide a multilayer wiring board capable of firmly connecting electronic components such as semiconductor elements and capacitance elements to bonding pads without causing a change in characteristics. It is to provide a manufacturing method of.

[0012]

According to the present invention, there is provided a through-hole in which an organic resin insulating layer and a thin film wiring conductor layer are alternately laminated on a substrate, and thin film wiring conductor layers positioned vertically above and below are provided in the organic resin insulating layer. Electrically connected through conductors,
And a multilayer wiring board in which a bonding pad electrically connected to the thin film wiring conductor layer and an electrode of an external electronic component is formed in a hole provided in the uppermost organic resin insulating layer. A solder bump is applied to the bonding pad by the following steps (a) to (d).

(A) a step of applying a conductive resin layer to the upper surface of the uppermost organic resin insulating layer and the inner surface of the hole; and (b)
A step of coating the conductive resin layer adhered to the upper surface of the uppermost organic resin insulating layer with a plating resist film,
(C) forming a conductive resin layer on the surface of the conductive resin layer covering the inner surface of the hole provided in the uppermost organic resin insulating layer and the surface of the bonding pad exposed in the hole; A step of applying a solder layer as an electrode wire by an electrolytic plating method; and (d) a step of removing the conductive resin layer and the plating resist film. According to the method of manufacturing a multilayer wiring board of the present invention, the solder bumps are bonded to the bonding pads. Since the solder bumps are formed directly on the solder bumps, the copper disposed on the base of the solder bumps does not diffuse into the solder to increase the melting point of the solder and does not weaken the mechanical strength. Therefore, in this multilayer wiring board, when the solder bump is heated and melted to connect the bonding pad to an electrode such as a semiconductor element or a capacitor element, the characteristics of the electronic component change due to the low heat melting temperature of the solder bump. Can be connected to the bonding pad without any damage. Also, after connecting the electronic component to the bonding pad at the same time, even if an external force is applied to the electronic component, the solder connecting the bonding pad and the electronic component has toughness, and thus is damaged. This is very rare, and the reliability of the connection of the electronic component to the bonding pad is extremely high.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a multilayer wiring board according to the present invention, wherein 1 is a substrate, 2 is an organic resin insulating layer, and 3 is a thin-film wiring conductor layer.

The substrate 1 has an organic resin insulating layer 2 on its upper surface.
And a thin-film wiring conductor layer 3, and a multilayer wiring portion 4 is provided, and functions as a support member for supporting the multilayer wiring portion 4.

The substrate 1 is made of an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or a non-oxide ceramic such as an aluminum nitride sintered body or a silicon carbide sintered body having an oxide film on its surface. Oxide ceramics, and further made of an electrically insulating material such as glass epoxy resin impregnated with epoxy resin in a cloth woven with glass fiber, for example, when formed of aluminum oxide sintered body , Alumina, silica, calcia, magnesia, etc., an appropriate organic solvent and a solvent are added and mixed to form a slurry, which is then formed into a ceramic green sheet by using a conventionally known doctor blade method or calendar roll method. Ceramic green sheet), and after that, the ceramic green sheet is subjected to an appropriate punching process to obtain a predetermined shape. Hot together form (about 1600
C) or by mixing a raw material powder such as alumina with an appropriate organic solvent and solvent to adjust the raw material powder and form the raw material powder into a predetermined shape by a press molding machine. If the body is made by firing the body at a temperature of about 1600 ° C. and is made of glass epoxy resin, for example, a cloth woven with glass fiber is impregnated with the epoxy resin precursor and the epoxy resin precursor is heated to a predetermined temperature. It is manufactured by heat curing.

The substrate 1 is provided with through-holes 5 having a diameter of, for example, 300 μm to 500 μm, which penetrate through the upper and lower surfaces of the substrate 1. Layer 6 has been applied.

The through hole 5 electrically connects the thin-film wiring conductor layer 3 of the multilayer wiring portion 4 formed on the upper surface of the substrate 1 to be described later and an external electric circuit. When the substrate 1 is formed, it acts as a forming hole for forming a conductive layer 6 for electrically connecting the thin film wiring conductor layers of the multilayer wiring portion 4 on both surfaces, and the substrate 1 is subjected to a drilling method. Thereby, a predetermined shape is formed at a predetermined position on the substrate 1.

Further, the conductive layer 6 formed on the inner wall of the through hole 5 and the upper and lower surfaces of the substrate 1 is made of a metal material such as copper or nickel, for example, and employs a conventionally known plating method and etching method. As a result, it is formed on the inner wall of the through hole 5 with both ends being led out to the upper and lower surfaces of the substrate 1.

On the upper surface of the substrate 1, a multilayer wiring portion 4 formed by alternately arranging an organic resin insulating layer 2 and a thin film wiring conductor layer 3 in multiple layers is attached. 4
The organic resin insulating layer 2 has a function of electrically insulating the thin film wiring conductor layers 3 located above and below, and the thin film wiring conductor layer 3 functions as a transmission path for transmitting electric signals.

The organic resin insulating layer 2 of the multilayer wiring section 4
It is made of an organic resin such as an epoxy resin, a bismaleimide polyazide resin, a polyphenylene ether resin, and a fluororesin. For example, in the case of an epoxy resin, a bisphenol A type epoxy resin, a novolak type epoxy resin, a glycidyl ester type epoxy resin, and an amine type are used. A curing agent such as a curing agent, an imidazole-based curing agent, and an acid anhydride-based curing agent is added and mixed to obtain a paste-like epoxy resin precursor, and the epoxy resin precursor is applied on the substrate 1 by spin coating. After that, this is heated to 80 to 200 ° C.
Is formed by heat-treating with heat of 0.5 to 3 hours.

Further, the organic resin insulating layer 2 of the multilayer wiring section 4
Has a through hole 8 having a minimum diameter of about 1.5 times the thickness of the organic resin insulating layer 2 at each predetermined position.
And serves as a forming hole for forming a through-hole conductor 9 for electrically connecting each of the thin-film wiring conductor groups 3 located above and below via.

The through hole 8 provided in the organic resin insulating layer 2 is formed in the organic resin insulating layer 2 to have a predetermined diameter by employing a conventionally known photolithography technique.

A thin-film wiring conductor layer 3 having a predetermined pattern is provided on the upper surface of each organic resin insulating layer 2, and a through-hole conductor 9 is provided on the inner wall of a through hole 8 provided in each organic resin insulating layer 2. Each of the thin-film wiring conductor layers 3 located above and below the organic resin insulating layer 2 with the through-hole conductor 9 therebetween is electrically connected.

The thin-film wiring conductor layer 3 and the through-hole conductor 9 provided on the upper surface of each organic resin insulating layer 2 and the inner wall of the through-hole 8 are made of a metal material such as copper, nickel, gold, or aluminum by electroless plating. For example, in the case of being formed of copper, the upper surface of the organic resin insulating layer 2 and the inner surface of the through hole 8 are formed by employing a thin film forming technique such as a vapor deposition method or a sputtering method and a photolithographic technique. 0.06 mol / l copper sulfate, 0.3 mol / l formalin, 0.35 sodium hydroxide
Mol / liter, and an electroless copper plating bath consisting of 0.35 mol / liter of ethylenediaminetetraacetic acid.
A copper layer having a thickness of m to 40 μm is applied, and then the copper layer is processed into a predetermined pattern by photolithography technology to be disposed between the organic resin insulating layers 2 and on the inner wall of the through hole 8. In this case, the thin film wiring conductor layer 3
In addition, since the through-hole conductor 9 is formed by a thin-film forming technique, it is possible to miniaturize the wiring, whereby the thin-film wiring conductor layer 3 can be formed at an extremely high density.

The multilayer wiring portion 4 formed by alternately arranging the organic resin insulating layers 2 and the thin film wiring conductor layers 3 in multiple layers has a center line average roughness (top surface) of each organic resin insulating layer 2. R
If a rough surface of 0.05 μm ≦ Ra ≦ 5 μm is set in a), the bonding between the organic resin insulating layer 2 and the thin film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below can be made strong. . Accordingly, the upper surface of each organic resin insulating layer 2 of the multilayer wiring portion 4 is roughened by an etching technique or the like, and the center line average roughness (Ra) is 0.05 μm ≦ Ra ≦ 5.
It is preferable that the surface be roughened to a thickness of μm.

The count value of the height (Pc) of the unevenness at a length of 2.5 mm on the surface of the organic resin insulating layer 2 is 500 when 1 μm ≦ Pc ≦ 10 μm.
2500 μm of 1 μm ≦ Pc ≦ 1 μm, 0.01 μm
If ≦ Pc ≦ 0.1 μm is set to 12,500 or more, the bonding between the organic resin insulating layer 2 and the thin-film wiring conductor layer 3 and the bonding between the organic resin insulating layers 2 located above and below become stronger. Therefore, the organic resin insulating layer 2 has a thickness of 2.5
The count value of the height (Pc) of the unevenness in the length of mm is 1 μm ≦ Pc ≦ 10 μm.
2500 or more m ≦ Pc ≦ 1 μm, 0.01 μm ≦ P
It is preferable that c ≦ 0.1 μm is set to 12,500 or more.

The center line average roughness (Ra) of the upper surface of the organic resin insulating layer 2 and the count value of the height of the unevenness (Pc) at a length of 2.5 mm are determined by the atomic force on the surface of the organic resin insulating layer 2. Microscope (Dimensio manufactured by Digital Instruments Inc.
n 300-Nano Scope ■) 50μm square diagonal (70μm)
The surface condition was inspected and measured, and each numerical value was obtained from the measurement result.

The center line average roughness (Ra) is 0.0
5 μm ≦ Ra ≦ 5 μm, the count value of the height of unevenness (Pc) at a length of 2.5 mm is 1 μm ≦ Pc ≦ 10 μm
m is 500 or more, and 0.1 μm ≦ Pc ≦ 1 μm is 250
0 or more, 0.01 μm ≦ Pc ≦ 0.1 μm is 1250
Zero or more organic resin insulating layers 2 are subjected to a reactive ion etching process by blowing a gas such as CHF ₃ , CF ₄ , Ar, etc. onto the upper surface of the organic resin insulating layers 2, whereby the surface is roughened to a predetermined roughness. Is done.

Further, when the thickness of each of the organic resin insulating layers 2 exceeds 100 μm, the etching processing time becomes long when the through holes 8 are formed by adopting the photolithography technology for the organic resin insulating layers 2. It is difficult to form the through hole 8 into a desired clear shape, and if the thickness is less than 5 μm, rough surface processing for increasing the bonding strength of the organic resin insulating layer 2 located above and below the organic resin insulating layer 2 is performed. When applying, there is a risk that an unnecessary hole is formed in the organic resin insulating layer 2 and an unnecessary electrical short circuit is caused in the thin film wiring conductor layer 3 which is vertically shifted. Accordingly, the organic resin insulating layer 2 has a thickness of 5 μm to 100 μm.
It is preferable to set the range of m.

Further, if the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 is less than 1 μm, the electric resistance of each thin-film wiring conductor layer 3 becomes large and a predetermined value is applied to each thin-film wiring conductor layer 3. It is difficult to transmit the electric signal of
If the thickness exceeds 40 μm, a large stress is present inside the thin-film wiring conductor layer 3 when the thin-film wiring conductor layer 3 is applied to the organic resin insulating layer 2, and the large intrinsic stress causes the thin-film wiring conductor layer 3 to break down the organic resin insulating layer. It becomes easy to peel off from the layer 2.
Therefore, it is preferable that the thickness of each thin-film wiring conductor layer 3 of the multilayer wiring portion 4 be in the range of 1 μm to 40 μm.

The organic resin insulating layer 2 and the thin film wiring conductor layer 3
The multilayer wiring portion 4 formed by alternately laminating a plurality of layers further has a hole 10 formed in the uppermost organic resin insulating layer 2a, and the thin film wiring conductor layer 3 is formed on the inner surface of the hole 10. A bonding pad 11 is formed which is electrically connected to the bonding pad 11.

The hole 10 formed in the uppermost organic resin insulating layer 2a acts as a forming hole for forming a bonding pad 11 having an electrical connection to the thin film wiring conductor layer 3, and the uppermost organic resin insulating layer 2a is formed. The resin insulating layer 2a is formed at a predetermined position with a predetermined opening diameter by employing a conventionally known photolithography technique.

The bonding pad 1 formed on the inner surface of the hole 10 provided in the uppermost organic resin insulating layer 2a
Reference numeral 1 denotes a function of electrically connecting electrodes of the electronic component A such as a semiconductor element and a capacitor to the thin-film wiring conductor layer 3. Each electrode of the electronic component A is connected to the bonding pad 11 via solder.

The bonding pad 11 is made of, for example, the same metal material as the thin film wiring conductor layer 3, specifically, a metal material such as copper, nickel, gold, or the like. Thus, the thin film wiring conductor layer 3 is formed in the hole 10 provided in the uppermost organic resin insulating layer 2a with electrical connection.

Further, the bonding pad 11 is provided with a solder bump 12 on the surface thereof. The solder bump 12 electrically connects the electrode of the electronic component A to the bonding pad 11 with the solder bump a of the electronic component A. Acts to connect.

The solder bump 12 is attached to the surface of the bonding pad 11 by a method described later.

Thus, according to the above-described multilayer wiring board, the electrodes of the electronic component A such as a semiconductor element and a capacitive element are connected to the bonding pad 11 provided on the uppermost organic resin insulating layer 2a via the solder. If the electrode A is electrically connected to the thin film wiring conductor layer 3 through the bonding pad 11, a semiconductor device or a hybrid integrated circuit device is obtained. By connecting a part of the thin film wiring conductor layer 3 to an external electric circuit, A is connected to an external electric circuit.

Next, a method of forming the solder bumps 12 on the bonding pads 11 in the above-described multilayer wiring board will be described with reference to FIG. First, as shown in FIG. 2A, a conductive resin layer 13 is applied to the upper surface of the uppermost organic resin insulating layer 2 a of the multilayer wiring section 4 and the inner side surface of the hole 10.

The conductive resin layer 13 acts as an electrode wire when solder is applied on the bonding pad 11 described later by an electrolytic plating method. For example, a thermosetting photosensitive resin such as an epoxy resin may be used, such as copper, It is made of a material containing a conductive powder such as silver, and has a conductivity of 1 × 10 ⁻⁵ to 1 ×.
At 10 ⁻³ Ω · cm, a liquid or film-like resin is applied to the upper surface of the organic resin insulating layer 2 a and the inner side surface of the hole 10 to a predetermined thickness by coating or the like. Thus, the upper surface of the uppermost organic resin insulating layer 2a and the inner side surface of the hole 10 are adhered.

If the thickness of the conductive resin layer 13 is less than 1 μm, the electric resistance of the conductive resin layer 13 increases, and the conductive resin layer 13 is used as an electrode wire to apply solder on the bonding pad 11 by electrolytic plating. When applying by the method, there is a risk that the thickness of the solder applied on the bonding pad 11 may vary,
If it exceeds m, there is a risk that the pattern may become unclear when a predetermined pattern is adhered to the upper surface of the organic resin insulating layer 2a and the inner side surface of the hole 10 by employing the photolithography technology. Therefore, it is preferable that the thickness of the conductive resin layer 13 be in the range of 1 μm to 50 μm.

Next, as shown in FIG. 2B, the conductive resin layer 13 adhered to the upper surface of the uppermost organic resin insulating layer 2a.
Is covered with a plating resist film 14.

The plating resist film 14 is made of, for example, an acrylic photosensitive film, and is deposited on the uppermost organic resin insulating layer 2a on which the conductive resin layer 13 is deposited by thermocompression bonding or the like. By subjecting the conductive resin layer 13 to exposure and development processing, a predetermined pattern is formed on the surface of the conductive resin layer 13 which is formed on the uppermost organic resin insulating layer 2a. The plating resist film 14 is for preventing the solder for forming the solder bump from being attached to an unnecessary area.

Next, as shown in FIG. 2C, the surface of the conductive resin layer 13 and the inside of the hole 10 which are adhered to the inner surface of the hole 10 provided in the uppermost organic resin insulating layer 2a. The solder layer 15 is applied to the surface of the bonding pad 11 exposed to the outside.

The solder layer 15 is formed by an electrolytic plating method. For example, the solder layer 15 is placed in an electrolytic solder plating bath composed of an aliphatic lead sulphate compound 0.08 mol / l and an aliphatic tin sulphate compound 0.4 mol / l. The bonding pad 11 and the hole 10 are immersed and the conductive resin layer 13 is interposed therebetween.
A predetermined electric field is applied to the conductive resin layer 13 adhered to the inner surface of the substrate, and solder is deposited on the surface of the conductive resin layer 13 adhered to the bonding pad 11 and the inner surface of the hole 10. Formed by In this case, the solder layer 15 is formed on the surface of the conductive resin layer 13 which is adhered to the bonding pad 11 and the inner surface of the hole 10, and increases the melting point of the solder on the base or weakens the mechanical strength. Since there is no substance to be soldered, the solder layer 15 maintains a low melting point,
And the toughness can be maintained.

Finally, as shown in FIG. 2D, the conductive resin layer 13 and the plating resist film 14 are removed.
Thereafter, when this is heat-treated, the bonding pad 11 is formed.
A predetermined solder bump is formed thereon. In this case, there is no copper which raises the melting point of the solder and weakens the mechanical strength on the base of the solder layer 15 and is formed directly on the bonding pad 11, so that the solder bump is maintained at a low melting point,
In addition, the mechanical strength is maintained to be tough. Therefore, in this multilayer wiring board, when the solder bump is heated and melted to connect the bonding pad 11 to the electrode of the electronic component A such as a semiconductor element or a capacitor, the electronic component A is characterized by a low heat melting temperature of the solder bump. Can be connected to the bonding pad 11 without any change in the electronic component A. Also, after the electronic component A is connected to the bonding pad 11 at the same time, even when an external force is applied to the electronic component A, the bonding pad 11 and the electronic component A can be connected. Since the solder to be connected has toughness, it hardly breaks, and the reliability of connection of the electronic component A to the bonding pad 11 is extremely high.

It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. A multilayer wiring portion 4 formed by alternately laminating a plurality of organic resin insulating layers 2 and a plurality of thin film wiring conductor layers 3 is applied only on the side of the substrate 1. It may be provided only on the upper and lower surfaces.

[0048]

According to the method of manufacturing the multilayer wiring board of the present invention, since the solder bump is formed directly on the bonding pad, the copper disposed on the base of the solder bump is diffused into the solder. It does not increase the melting point of the solder and weaken the mechanical strength. Therefore, in this multilayer wiring board, when the solder bump is heated and melted to connect the bonding pad to an electrode such as a semiconductor element or a capacitor element, the characteristics of the electronic component change due to the low heat melting temperature of the solder bump. Can be connected to the bonding pad without any damage. Also, after connecting the electronic component to the bonding pad at the same time, even if an external force is applied to the electronic component, the solder connecting the bonding pad and the electronic component has toughness, and thus is damaged. This is very rare, and the reliability of the connection of the electronic component to the bonding pad is extremely high.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of a multilayer wiring board manufactured by a manufacturing method of the present invention.

2 (a) to 2 (d) are enlarged cross-sectional views of main parts in respective steps for explaining formation of solder bumps of the multilayer wiring board shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Organic resin insulation layer 2a ... Top organic resin insulation layer 3 ... Thin film wiring conductor layer 4 ... Multilayer wiring part 8 ... Through hole 9 ... Through hole Conductor 10 Holes formed in the uppermost organic resin insulating layer 11 Bonding pads 12 Solder bumps 13 Conductive resin layer 14 Plating resist film 15 Solder layer A ... Electronic components

Claims (1)

[Claims] An organic resin insulating layer and a thin-film wiring conductor layer are alternately laminated on a substrate, and electrically connected via a through-hole conductor provided on the upper and lower thin-film wiring conductor layers in the organic resin insulating layer. A multi-layer wiring board formed with a bonding pad electrically connected to the thin-film wiring conductor layer and connected to an electrode of an external electronic component in a hole provided in the uppermost organic resin insulating layer and connected to the hole; Wherein a solder bump is applied to the bonding pad by the following steps (a) to (d). (A) a step of applying a conductive resin layer to the upper surface of the uppermost organic resin insulating layer and the inner surface of the hole; and (b) a conductive resin applied to the upper surface of the uppermost organic resin insulating layer. Covering the layer with a plating resist film, and (c) exposing the surface of the conductive resin layer adhered to the inner side surface of the hole provided in the uppermost organic resin insulating layer and the hole. A step of applying a solder layer to the surface of the bonding pad by electrolytic plating using the conductive resin layer as an electrode wire,
(D) removing the conductive resin layer and the plating resist film;