JPH10321809A - Semiconductor storage element manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a ferroelectric film of a dense crystal structure, capable of forming a ferroelectric film of dense crystal structure on the surface of a lower electrode, even in a Bi-layered structure compound, in which coarsened crystal grains are easily generated by separating crystallization steps into a plurality of stages. SOLUTION: A Ti adhesive layer 3 and then a lower Pt electrode 4 are formed on a silicon substrate 1, having a silicon oxide film 2 formed by thermal oxidation. Next, on the lower Pt electrode 4, a layer of an MOD solution of SrBi2 Ta2 O9 is coated. After having been subjected to a dry step, the SrBi2 Ta2 O9 film is crystallized by a heat treatment at a substrate temperature of 600 deg.C under a reduced pressure and oxygen atmosphere. Thereafter, coating and drying steps are repeatedly conducted three times on the SrBi2 Ta2 O9 film 6 to provide the SrBi2 Ta2 O9 film 6 with a desired film thickness by the MOD method and to turn the film 6 into an amorphous or microcrystal state by heat treatment. After an upper Pt electrode 9 is formed on the SrBi2 Ta2 O9 film 7, the heat treatment is conducted at a substrate temperature of 600 deg.C under a reduced pressure and oxygen atmosphere.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile semiconductor memory using a ferroelectric thin film.

[0002]

2. Description of the Related Art In recent years, an EPROM which is a nonvolatile memory
The read time of an EEPROM, an EEPROM, a flash memory, or the like is comparable to that of a DRAM, but the write time is long and high-speed operation cannot be expected. On the other hand, a ferroelectric memory, which is a nonvolatile memory using a ferroelectric capacitor, is comparable to a DRAM in both reading and writing, and can be expected to operate at high speed. The device structure generally comprises one cell with one ferroelectric capacitor and one select transistor.

As a ferroelectric material used for a ferroelectric capacitor, a bismuth (Bi) -based layered structure compound which has better fatigue characteristics and can be driven at a lower voltage than PZT, which has been well studied, has attracted attention. It is being actively studied. For example, Bi ₄ Ti ₃ O ₁₂ , SrBi ₂ Ta ₂ O ₉ , S
rBi ₂ Nb ₂ O ₉ , SrBi ₂ (Ta _1-x Nb _x ) O ₉ , B
aBi ₂ Nb ₂ O ₉ , BaBi ₂ Ta ₂ O ₉ , PbBi ₂ Nb ₂
O ₉ , PbBi ₂ Ta ₂ O ₉ , PbBi ₄ Ti ₄ O ₁₅ , SrB
i ₄ Ti ₄ O ₁₅ , BaBi ₄ Ti ₄ O ₁₅ , Sr ₂ Bi ₄ Ti ₅
O ₁₈ , Ba ₂ Bi ₄ Ta ₅ O ₁₈ , Pb ₂ Bi ₄ Ti ₅ O ₁₈ , P
b ₂ Bi ₄ Ti ₅ O ₁₈ , Na _0.5 Bi _4.5 Ti ₄ O ₁₅ , K _0.5
Bi _4.5 Ti ₄ O _{15 and the} like, among which SrBi ₂ Ta ₂
O ₉ and SrBi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (0 <x ≦ 1) are preferred.

[0004] These Bi-based layered structure compound materials are PZ
Unlike ferroelectrics such as T, MOD method, sol-gel method, M
Regardless of which method such as the OCVD method or the sputtering method is used, it is necessary to crystallize the ferroelectric by a heat treatment at a high temperature of about 700 to 800 ° C. However, there is a problem that the above-described high-temperature heat treatment has an adverse effect such as deterioration of the transistor characteristics of the switching MOSFET and peeling of the interlayer insulating film and the capacitor electrode. In particular, in order to highly integrate a ferroelectric memory, realization of a stacked structure is indispensable. However, when a polysilicon plug is used for contact with a lower electrode, oxidation in a high-temperature process becomes a problem.

As one of the methods for solving this, SrB
The heat treatment for crystallization of i ₂ Ta ₂ O ₉ was performed under reduced pressure (10 T
or less) in an oxygen atmosphere (Jpn.J.
Appl. Phys. Vol. 35 (1996) pp.
4925-4929). According to this method, when the wafer temperature is about 550 to 600 ° C., SrBi ₂ Ta ₂
O ₉ can be crystallized.

[0006]

However, even in the low-temperature heat treatment under low pressure as described above, SrBi ₂ T
A large leak current and a low withstand voltage due to coarse crystal grains of a Bi-based layered structure compound such as a ₂ O ₉ have become problems. It is considered that the growth of the coarse crystal grains occurs when the film is deposited in a state of amorphous or fine crystal grains to a desired film thickness and then crystallized at once, and a gap such as a pinhole is formed between the crystal grains. It seems to be the cause of leakage current and low dielectric strength.

[0007]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor memory device, comprising: forming a ferroelectric capacitor comprising a lower electrode, a ferroelectric film having a desired thickness and an upper electrode on a substrate. In the method for manufacturing a semiconductor memory device having the above, the ferroelectric film material having a predetermined thickness is formed on the lower electrode, and the heat treatment is performed to crystallize the ferroelectric film. By forming a ferroelectric film material on the dielectric film until a desired film thickness is reached and performing a heat treatment,
The ferroelectric film material is changed to an amorphous state or an amorphous state in which a crystalline state exists partially, and after forming the upper electrode on the ferroelectric film, a heat treatment for crystallization of the ferroelectric film is performed. It is characterized by doing.

According to a second aspect of the present invention, there is provided a semiconductor memory device having a ferroelectric capacitor comprising a lower electrode, a ferroelectric film having a desired thickness and an upper electrode on a substrate. In the manufacturing method, the ferroelectric film material having a predetermined thickness is formed on the lower electrode, and the heat treatment is performed to crystallize the ferroelectric film, and the ferroelectric film is crystallized on the crystallized ferroelectric film. A ferroelectric film material having a desired thickness is formed by repeating a step of crystallizing the ferroelectric film one or more times by forming a ferroelectric film material having a predetermined thickness and performing heat treatment. After forming the upper electrode on the ferroelectric film, a heat treatment for crystallization of the ferroelectric film is performed.

In a third aspect of the present invention, the heat treatment for crystallization is performed at a pressure of 1 Torr to 10 Torr and a substrate temperature of 500 ° C. to 700 ° C. A method for manufacturing a semiconductor memory device according to claim 1 or 2.

Further, in the method of manufacturing a semiconductor device according to the present invention, the ferroelectric film material is a bismuth-based layered structure compound. This is a method for manufacturing a semiconductor storage element.

Further, in the method of manufacturing a semiconductor device according to the present invention, the bismuth-based layer structure compound may be SrBi ₂ (T
5. The method according to claim 4, wherein a _1-x Nb _x ) ₂ O ₉ (0 <x ≦ 1).

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments.

FIG. 1 is a manufacturing process diagram of a semiconductor memory device according to a first embodiment of the present invention, and FIG. 2 is a manufacturing process diagram of a first half of a semiconductor memory device according to a second embodiment of the present invention. ,
FIG. 3 is a manufacturing process diagram of the second half of the semiconductor memory device according to the second embodiment of the present invention, and FIG. 4 is a manufacturing process diagram of a conventional semiconductor memory device having a ferroelectric capacitor.

The substrate used for the semiconductor memory device having a ferroelectric capacitor according to the present invention is not particularly limited as long as it can be used as a substrate for a semiconductor device or an integrated circuit. And the like, an oxide crystal substrate such as MgO, a glass substrate, the type of element to be formed, and the purpose of use. Among them, a silicon substrate is preferable. A ferroelectric thin film of a Bi-based layered compound is formed on this substrate.

The ferroelectric film is a Bi-based layered structure compound, for example, Bi ₄ Ti ₃ O ₁₂ , SrBi ₂ Ta ₂
O ₉ , SrBi ₂ Nb ₂ O ₉ , SrBi ₂ (Ta _1-x Nb _x )
O ₉ , BaBi ₂ Nb ₂ O ₉ , BaBi ₂ Ta ₂ O ₉ , PbB
i ₂ Nb ₂ O ₉ , PbBi ₂ Ta ₂ O ₉ , PbBi ₄ Ti
₄ O ₁₅ , SrBi ₄ Ti ₄ O ₁₅ , BaBi ₄ Ti ₄ O ₁₅ , S
r ₂ Bi ₄ Ti ₅ O ₁₈ , Ba ₂ Bi ₄ Ta ₅ O ₁₈ , Pb ₂ Bi _{4
Ti 5 O 18, Pb 2 Bi} 4 Ti 5 O 18, Na 0.5 Bi 4.5 Ti
₄ O ₁₅ , K _0.5 Bi _4.5 Ti ₄ O _{15 and the} like.
rBi ₂ Ta ₂ O ₉ or SrBi ₂ (Ta _1-x Nb _x ) ₂ O ₉ (0
<X ≦ 1) is preferred.

These ferroelectric films are formed on a substrate by a sol-gel method or MOD (Metal Organic Decom).
It is formed by a coating film forming method such as a position method. In this film forming method, a raw material solution is prepared by mixing an organic solvent containing a salt or a metal alkoxide of some of the elements constituting the thin film and an organic solvent containing a salt or a metal alkoxide of another element. Prepared, and this raw material solution is coated in a single application by spin coating or the like for 20 to 1
It is applied with a thickness of about 00 nm, and a drying step at about 100 to 300 ° C. is performed. In the present invention, as a method of crystallizing and firing the ferroelectric film, firing is performed in a reduced-pressure atmosphere at a pressure (1 to 10 Torr) at which the crystallization can be performed at a lower temperature than in a normal firing method at normal pressure. It is characterized by the following.

In the conventional vacuum firing method, the ferroelectric film is crystallized by vacuum firing after repeated application and drying to a desired film thickness. On the other hand, in the present embodiment, first, the coating and drying are performed once or twice and the coating is performed for 20 to 8 times.
After depositing with a film thickness of about 0 nm, the first baking under reduced pressure is performed at a pressure of 1 Torr or more and 10 Torr or less (hereinafter, “1”).
The substrate temperature is set to 500 ° C. or more and 700 ° C. or less in a reduced-pressure oxygen atmosphere (hereinafter referred to as “500 to 10 Torr”).
700 ° C. ”. B) is performed for about 10 to 60 minutes.

Thereafter, the coating and drying are repeated to a desired thickness, and then fired in a mixed atmosphere of oxygen and nitrogen at normal pressure at a substrate temperature of 550 to 650 ° C. for 5 to 30 seconds to form an amorphous state or a microcrystalline state ( (Amorphous state in which a crystalline state exists partially), or pressure 1 again.
The crystallization calcination is performed at a substrate temperature of 500 to 700 ° C. for 10 to 60 minutes in a reduced-pressure oxygen atmosphere of 10 to 10 Torr.

Thereafter, Pt to be an upper electrode is formed on the ferroelectric thin film. After processing, the Pt is applied at a pressure of 1 to 10 for the purpose of suppressing leakage current and sufficiently crystallizing the ferroelectric thin film.
A substrate temperature of 500 in a reduced-pressure oxygen atmosphere of Torr
A ferroelectric capacitor is obtained by baking at ~ 700 ° C for 10-60 minutes.

If such a method is used as a method of forming a ferroelectric film, the denseness of the film particularly near the lower electrode is improved, and the pin between coarse crystal grains which causes an increase in leak current and a deterioration in dielectric strength is reduced. The generation of holes and the like is suppressed, and a ferroelectric capacitor excellent in leak current and dielectric strength can be obtained.

The ferroelectric film can be formed not only by coating and film formation but also by MOCVD, sputtering, laser ablation, reactive evaporation, or the like. At the stage where 80nm is deposited,
A method may be used in which crystallization is performed by firing under reduced pressure, and further, crystallization is performed by firing under reduced pressure after deposition to a desired film thickness by the above formation method. However, in order to easily form a highly uniform film, it is desirable to use a coating method.

Hereinafter, a manufacturing process of a semiconductor memory device having a ferroelectric capacitor according to an embodiment of the present invention will be described with reference to FIG.

First, a Ti adhesion layer 3 and then a lower Pt electrode 4 are formed on a silicon substrate 1 on which a silicon oxide film 2 having a thickness of 200 nm is formed by thermal oxidation.
Are formed at 30 nm and 200 nm, respectively.

Next, a MOD solution of SrBi ₂ Ta ₂ O ₉ (composition ratio Sr / Bi / Ta = 8/24/20) as a ferroelectric material is formed on the lower Pt electrode 4 to a thickness of about 50 nm. After applying and drying at 250 ° C. for 5 minutes (FIG. 1A), crystallization was performed by heat treatment at a substrate temperature of 600 ° C. for 30 minutes in a reduced-pressure oxygen atmosphere at a pressure of 3 Torr (FIG. 1). (B)). Note that in FIG.
Denotes a SrBi ₂ Ta ₂ O ₉ film after the drying step, and reference numeral 6 denotes a crystallized SrBi ₂ Ta ₂ O ₉ film.

Thereafter, the crystallized SrBi ₂ Ta ₂
On the O ₉ film 6, apply and dry by MOD method 3
This was repeated twice to obtain a desired film thickness of about 200 nm, and a heat treatment was performed at a substrate temperature of 600 ° C. for 5 minutes in an oxygen atmosphere at normal pressure to obtain an amorphous or microcrystalline state. Then, after forming the upper Pt electrode 9 on the SrBi ₂ Ta ₂ O ₉ film 7 (FIG. 1C), a heat treatment was performed at a substrate temperature of 600 ° C. for 30 minutes in a reduced-pressure oxygen atmosphere at a pressure of 3 Torr ( FIG. 1 (d)). In FIG. 1, reference numeral 7 denotes the SrBi ₂ Ta ₂ O ₉ film after performing the coating / drying process three times.

Since the ferroelectric film (SrBi ₂ Ta ₂ O ₉ film) in the step of applying the first layer of the MOD solution is first crystallized by manufacturing the capacitor element by such a process, It is difficult for coarse crystal grains to grow at the stage,
In particular, the density of the film near the lower Pt electrode is improved, the leakage current is suppressed, and the dielectric strength is improved.

Next, the capacitor element manufactured by the manufacturing process of the present invention shown in the above-described first embodiment and the capacitor element manufactured by the following conventional technique will be compared.

As a method according to the prior art, first, a silicon oxide film 12, a Ti adhesion layer 13, and a lower Pt electrode 14 are sequentially formed on a silicon substrate 11 in the same manner as in the above-described embodiment. MOD solution of SrBi ₂ Ta ₂ O ₉ (composition ratio Sr / Bi / Ta = 8/24/2)
4) is repeated four times and dried to obtain a film thickness of about 200 nm (FIG. 4 (a)). State. Note that reference numeral 2 in FIG.
0 is SrBi ₂ Ta ₂ O after repeating coating and drying four times.
_{Shows 9} membranes. After the upper Pt electrode 19 was formed on the SrBi ₂ Ta ₂ O ₉ film (FIG. 4B), the pressure was 3 To.
substrate temperature 600 ° C. in a reduced pressure oxygen atmosphere of rr,
Heat treatment was applied for 30 minutes (FIG. 4 (c)). Reference numeral 21 in FIG. 3 indicates a crystallized SrBi ₂ Ta ₂ O ₉ film.

The upper electrode area of the capacitor element of the above embodiment and the comparative example was 1 × 10 ⁻⁴ cm ² .
Table 1 shows the results of evaluating the leakage current and the dielectric strength of these two devices.

[0030]

[Table 1]

From this, it can be seen that the capacitor element in the present embodiment has improved both the leak current and the dielectric strength with the conventional method. Further, the ferroelectric film uses an SrBi ₂ Ta ₂ O ₉ film, which is replaced with SrBi ₂ (Ta _1-x Nb _x ) ₂ O in which Nb is substituted.
₉ (0 <x ≦ 1) provides the same effect.

Next, a second embodiment of the present invention will be described. The substrate and the ferroelectric material used in the second embodiment are the same as those in the first embodiment, and the method of forming the ferroelectric film is the same as in the first embodiment. It is performed by a coating method such as a sol-gel method or a MOD method.

In the second embodiment, one application is performed for 2 times.
Deposited in a film thickness of about 0 to 80 nm, baking under reduced pressure for each coating and drying step, baking at a substrate temperature of 500 to 700 ° C. for about 10 to 60 minutes in a reduced pressure oxygen atmosphere at a pressure of 1 to 10 Torr. Repeat until a film thickness of Immediately before this reduced pressure firing step, a heat treatment may be performed once in a mixed atmosphere of normal pressure oxygen or oxygen nitrogen at about 500 to 600 ° C.

Thereafter, Pt to be an upper electrode is formed on the ferroelectric film, and after processing, a reduced pressure oxygen atmosphere at a pressure of 1 to 10 Torr for the purpose of suppressing leakage current and sufficiently crystallizing the ferroelectric film. Substrate temperature in the range of 500 to 700
A ferroelectric film capacitor is obtained by baking at 10 ° C. for 10 to 60 minutes.

When such a method is used as a method of forming a ferroelectric film, the denseness of the entire film is improved, and a ferroelectric film excellent in suppressing leakage current and improving dielectric breakdown voltage is more effective than in the first embodiment. A dielectric capacitor can be obtained.

Hereinafter, a manufacturing process of the semiconductor memory device having the ferroelectric capacitor according to the second embodiment will be described with reference to FIGS.

First, a Ti adhesion layer 3 and then a lower Pt electrode 4 are formed on a silicon substrate 1 on which a 200 nm-thick silicon oxide film 2 is formed by thermal oxidation.
Are formed at 30 nm and 200 nm, respectively.

Next, a MOD solution of SrBi ₂ Ta ₂ O ₉ (composition ratio Sr / Bi / Ta = 8/24/20) is formed on the lower Pt electrode 4 as a ferroelectric material to a thickness of about 50 nm. After coating and performing a drying process at 250 ° C. for 5 minutes (FIG. 2A), crystallization was performed by heat treatment at a substrate temperature of 600 ° C. for 30 minutes in a reduced-pressure oxygen atmosphere at a pressure of 3 Torr (FIG. 2). (B)). Incidentally, in FIG.
a shows the SrBi ₂ Ta ₂ O ₉ film after the coating / drying step,
Reference numeral 6a indicates a crystallized SrBi ₂ Ta ₂ O ₉ film.

After that, the SrBi ₂ Ta ₂ O ₉ film 6a is coated on one layer and crystallized on the substrate, and the steps of coating, drying and baking under reduced pressure by the MOD method are repeated three times to obtain a desired film thickness of 200 nm. (FIGS. 2C-3)
(C)). Then, after forming the upper Pt electrode 9 on the SrBi ₂ Ta ₂ O ₉ film 6d, a heat treatment was performed at a substrate temperature of 600 ° C. for 30 minutes in a reduced-pressure oxygen atmosphere at a pressure of 3 Torr (FIG. 3D). Incidentally, in FIG.
b, 5c and 5d are SrBi ₂ Ta ₂ O after the coating / drying step.
₉ film indicates, reference numeral 6b, 6c, 6d was crystallized Sr
₂ shows a Bi ₂ Ta ₂ O ₉ film. The area of the upper Pt electrode of the capacitor element was 1 × 10 ⁻⁴ cm ² .

Table 1 shows the evaluation of the leak current and the dielectric strength of the capacitor element manufactured by the method shown in the second embodiment. As shown in Table 1, the capacitor element manufactured by the method described in the second embodiment is most excellent in the suppression of the leak current and the withstand voltage. Further, the ferroelectric film uses an SrBi ₂ Ta ₂ O ₉ film, which is replaced with SrBi ₂ (Ta _1-x Nb _x ) ₂ O in which Nb is substituted.
₉ (0 <x ≦ 1) provides the same effect.

[0041]

As described in detail above, by using the present invention, a dense ferroelectric film having a crystal structure can be formed on the surface of the lower electrode, and Bi is likely to form coarse crystal grains.
Even in the system layered structure compound, by performing crystallization in a plurality of stages, a ferroelectric film having a dense crystal structure can be obtained.

Further, by using the invention described in claim 2, the denseness of the ferroelectric film is further improved.

By using the present invention, the problem of oxidation in a high-temperature process when polysilicon is used for the contact plug with the lower electrode is eliminated.

Further, by using the present invention according to the fourth and fifth aspects, a semiconductor memory element which is excellent in fatigue resistance and can be driven at a low voltage can be obtained.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a semiconductor memory device having a ferroelectric capacitor according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a first half of a semiconductor memory device having a ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 3 is a manufacturing process diagram of a second half of a semiconductor memory device having a ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of a semiconductor memory device having a ferroelectric capacitor using a conventional technique.

[Explanation of symbols]

Reference Signs List 1 silicon substrate 2 silicon oxide film 3 Ti adhesion layer 4 lower Pt electrode 5, 5a, 5b, 5c, 5d Sr after coating / drying process
Bi ₂ Ta ₂ O ₉ film 6, 6a, 6b, 6c, 6d, 8 Crystallized SrB
i ₂ Ta ₂ O ₉ film 7 SrBi ₂ T after repeating coating / drying process three times
a ₂ O ₉ film 9 Upper Pt electrode

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 21/8247 29/788 29/792

Claims (5)

[Claims] 1. A method for manufacturing a semiconductor memory device having a ferroelectric capacitor comprising a lower electrode, a ferroelectric film of a desired thickness and an upper electrode on a substrate, comprising: By forming a ferroelectric film material and performing a heat treatment, the ferroelectric film is crystallized, and a ferroelectric film material is formed on the crystallized ferroelectric film until a desired film thickness is obtained. Forming a ferroelectric film material in an amorphous state or an amorphous state in which a crystalline state exists partially, and forming the upper electrode on the ferroelectric film. Performing a heat treatment for crystallization of the semiconductor memory device. 2. A method of manufacturing a semiconductor memory device having a ferroelectric capacitor comprising a lower electrode, a ferroelectric film of a desired thickness and an upper electrode on a substrate, wherein the semiconductor device has a predetermined thickness on the lower electrode. A ferroelectric film material is formed and heat-treated to crystallize the ferroelectric film, and a ferroelectric film material having a predetermined thickness is formed on the crystallized ferroelectric film. By heat treatment, by repeating the step of crystallizing the ferroelectric film one or more times,
Forming a ferroelectric film of a desired thickness, forming the upper electrode on the ferroelectric film, and then performing a heat treatment for crystallization of the ferroelectric film,
A method for manufacturing a semiconductor storage element. 3. The heat treatment for crystallization is performed at a pressure of 1T.
Torr or more and 10 Torr or less, substrate temperature of 500 ° C.
3. The method for manufacturing a semiconductor memory device according to claim 1, wherein the method is performed at a temperature of 700 ° C. or less. 4. The method for manufacturing a semiconductor memory device according to claim 1, wherein said ferroelectric film material is a bismuth-based layered compound. 5. The method according to claim 1, wherein the bismuth-based layer structure compound is SrB.
characterized in that i is _{2 (Ta 1-x Nb x} ) 2 O 9 (0 <x ≦ 1), The method as claimed in claim 4, wherein.