JPH10285950A - Main circuit for three-level power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To miniaturize and simplify a main circuit for a three-level power converter. SOLUTION: An emitter terminal for the IGBT(insulated gate bipolar transistor) 21 of an upper arm unit 1, a collector terminal for the IGBT 22 and a cathode terminal for a clamp diode 41 are arranged linearly, these terminals are connected by a connecting conductor 11, a connecting conductor 7 on the power supply side of the IGBT 21 and a connecting conductor 9 at a neutral point are brought near and disposed in parallel, and a connecting conductor 10 for an AC side terminal and the connecting conductor 9 are brought near and arranged in parallel. An emitter terminal for the IGBT 23 of a lower arm unit 2, a collector terminal for an IGBT 24 and a cathode terminal for a clamp diode 42 are disposed linearly, these terminals are joined by a connecting conductor 12, a connecting conductor 8 on the power supply side of the IGBT 24 and a connecting conductor 9 at the neutral point are brought near and arranged in parallel, and the connecting conductor 10 for the AC side terminal and the connecting conductor 9 are brought near and disposed in parallel, thus reducing these wiring inductance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a three-level inverter for converting a DC voltage input to a desired AC voltage output, or a three-level power supplied to a three-level converter for converting an AC voltage input to a desired DC voltage output. The present invention relates to a main circuit of a conversion device.

[0002]

2. Description of the Related Art FIG. 8 is a circuit diagram of a main circuit of a three-phase three-level inverter as a three-level power converter of this type. In FIG. 8, reference numerals 19U, 19V, and 19W denote main circuits of the U-phase, V-phase, and W-phase of the three-phase three-level inverter, respectively.

The U-phase main circuit 19U includes, for example, insulated gate bipolar transistors (hereinafter, simply referred to as IGBT) 21, 22, 23, 24 and freewheel diodes (hereinafter, simply referred to as FWD) 31, 32, 3
1, 2nd, 3rd, and 4th semiconductor switch circuits in which the first and second semiconductor switching circuits are connected in anti-parallel with each other, a first clamp diode 41, a second clamp diode 42,
DC intermediate capacitor 4, second DC intermediate capacitor 5, IGBTs 21 to 24 and clamp diode 4
A so-called RCD snubber circuit comprising a resistor, a capacitor, and a diode (not shown) connected to both ends of each of the first and second DC intermediate capacitors 4 and 5 is provided. Is connected to the DC power supply 3, and a connection point between the IGBT 22 and the IGBT 23 is an AC terminal.

A V-phase main circuit 19V and a W-phase main circuit 19W have the same configuration as the above-described U-phase main circuit 19U. The main circuit of the three-phase three-level inverter shown in FIG.
IGBTs 21 to 24 and FWDs 31 to 3 by well-known techniques
4 and the clamp diodes 41 and 42 perform a switching operation, and a description thereof will be omitted.

[0005]

The three-level power converter is a power converter capable of outputting a high voltage, for example, as shown in FIG.
It is known that a 3.3-kV high-voltage motor can be directly driven without a transformer by the three-phase three-level inverter shown in FIG. However, the main circuit of this type of three-phase three-level inverter shown in FIG. 8 has a larger number of semiconductor switch elements than the main circuit of a three-phase two-level inverter, for example. there were.

[0006] The number of connection conductors between the components of the main circuit is increased, and as a result, the wiring inductance of the connection conductor is increased, the snubber capacity of the semiconductor switch element is increased, and the size of the snubber circuit is increased. . : There are many semiconductor switch elements, and conventionally, a snubber circuit was required for each semiconductor switch element.

In order to increase the capacity of this three-level power conversion device, the number of connection conductors between the components is further increased when a plurality of semiconductor switch elements are connected in parallel to the respective semiconductor switch circuits and clamp diodes to be configured. And it is difficult to uniformly distribute the current among the plurality of semiconductor switch elements. The object of the present invention is to
An object of the present invention is to provide a main circuit of a three-level power conversion device that solves the above problem.

[0008]

According to a first aspect of the present invention, a series circuit of first and second DC intermediate capacitors is connected to both ends of a DC power supply, and a connection point of the first and second DC intermediate capacitors is provided. Is the neutral point of the DC power supply, the first, second, third, and fourth semiconductor switch circuits are connected in series with the same polarity, and both ends of the series circuit of the switch circuits are connected to the DC side terminals, respectively, so that the DC intermediate Connect to both ends of the series circuit of capacitors,
A series circuit of the first and second clamp diodes is connected between a connection point of the first and second switch circuits and a connection point of the third and fourth switch circuits in a direction opposite to the polarity of the switch circuit. In the main circuit of the three-level power converter, the neutral point is connected to the connection point of the first and second clamp diodes, and the connection point of the second and third semiconductor switch circuits is used as an AC terminal. The first and second semiconductor switch circuits, the first clamp diode, and the first DC intermediate capacitor are integrated into an upper arm unit, and the first semiconductor switch circuit and the first clamp of the upper arm unit are integrated. A connection conductor to the diode is laid as short as possible, and a connection conductor from the first DC intermediate capacitor of the upper arm unit to the first semiconductor switch circuit and a connection from the neutral point to the first clamp diode. A connecting conductor is laid in close proximity and parallel, and the third and fourth semiconductor switch circuits, the second clamp diode, and the second DC intermediate capacitor are integrated to form a lower arm unit. 4th
The connection conductor between the semiconductor switch circuit and the second clamp diode is laid as short as possible, and the second conductor of the lower arm unit is
And a connecting conductor from the DC intermediate capacitor to the fourth semiconductor switch circuit and a connecting conductor from the neutral point to the second clamp diode are laid closely and in parallel.

In a second aspect based on the first aspect, a first snubber capacitor is connected to both ends of the first semiconductor switch circuit and the first clamp diode connected in series, and A second snubber capacitor is connected to both ends of the switch circuit and the second clamp diode connected in series.

According to a third invention, in the main circuit of the three-level power converter, the first and second semiconductor switch circuits, the first clamp diode, and the first DC intermediate capacitor are integrated to form an upper arm unit. A connection conductor between the second semiconductor switch circuit of the upper arm unit and the first clamp diode is laid as short as possible, and a connection conductor from the second semiconductor switch circuit of the upper arm unit to the AC side terminal is provided. A connection conductor from the neutral point to the first clamp diode is laid in close proximity and in parallel, and the third and fourth semiconductor switch circuits, the second clamp diode, and the second DC intermediate capacitor are connected to each other. The lower arm unit is integrated into a lower arm unit, and the connection conductor between the third semiconductor switch circuit and the second clamp diode of the lower arm unit is laid in the shortest distance, And connection conductors from the third semiconductor switching circuit of the arm unit to the AC side terminals, parallel laid in close proximity to the connection conductor from the neutral point to the second clamp diodes.

In a fourth aspect based on the third aspect, a first snubber circuit including a resistor and a capacitor is connected to both ends of the second semiconductor switch circuit, and both ends of the third semiconductor switch circuit are connected. , A second snubber circuit including a resistor and a capacitor is connected. The fifth invention is the third invention.
In the invention, a first snubber circuit comprising two zener diodes connected in series with opposite polarities is connected to both ends of the second semiconductor switch circuit, and two ends of the third semiconductor switch circuit are connected to both ends of the third semiconductor switch circuit. A second snubber circuit formed by connecting the zener diodes in series with opposite polarities is connected.

In a sixth aspect based on any of the first to fifth aspects, each of the semiconductor switch circuits is configured by connecting a plurality of semiconductor switch elements in parallel. According to the first and second aspects of the invention, the connection conductor between the first semiconductor switch circuit and the first clamp diode is laid as short as possible, and the first DC intermediate capacitor is connected to the first semiconductor switch circuit. And the connection conductor from the neutral point to the first clamp diode are closely laid in parallel, and similarly, the connection conductor between the fourth semiconductor switch circuit and the second clamp diode is By laying the connection conductor from the second DC intermediate capacitor to the fourth semiconductor switch circuit and the connection conductor from the neutral point to the second clamp diode in close proximity and in parallel. As will be described later, the wiring inductance is reduced by the connection conductors arranged in parallel with each other, so that the snubber circuit of the semiconductor switch element can be simplified.

According to the third to fifth aspects of the present invention, the connection conductor between the second semiconductor switch circuit and the first clamp diode is laid as short as possible, and the second semiconductor switch circuit is connected to the AC side from the second semiconductor switch circuit. A connection conductor to the terminal and a connection conductor from the neutral point to the first clamp diode are closely laid in parallel and similarly connected between the third semiconductor switch circuit and the second clamp diode. By laying a conductor as short as possible, and laying a connection conductor from the third semiconductor switch circuit to the AC side terminal and a connection conductor from the neutral point to the second clamp diode in close proximity and parallel to each other As will be described later, the wiring inductance is reduced by the connection conductors arranged in parallel with each other, so that the snubber circuit of the semiconductor switch element can be simplified.

According to a sixth aspect of the present invention, there is provided a large-capacity three-level power converter in which each of the semiconductor switch circuits is connected in parallel with a plurality of semiconductor switch elements while having the arrangement and configuration of the first to fifth aspects. The device can be easily implemented as described below.

[0015]

FIG. 1 shows one phase of a main circuit of a three-phase three-level inverter as a three-level power converter according to a first embodiment of the present invention, corresponding to the first and third aspects of the present invention. 1A is a plan view thereof, FIG. 1B is a side view thereof, FIG. 1C is a front view thereof, and FIG. Those having the same functions as those in the circuit configuration diagram of FIG.

In FIG. 1, the upper arm unit 1 has an IG
A first switching circuit in which the BT21 and the FWD31 are built in the same module; an IGBT22 and the FWD32;
Comprises a second switching circuit built in the same module and a first clamp diode 41,
It is arranged on the cooling body 6. In the upper arm unit 1, the emitter terminal of the IGBT 21 and the IGBT 2
2 and a cathode terminal of the clamp diode 41 are arranged in a straight line, and these terminals are connected to each other by a connection conductor 11 as short as possible (see FIG. 1A). Further, a connection conductor 7 from the collector terminal of the IGBT 21 to a positive terminal of the first DC intermediate capacitor 4 (not shown) and an anode terminal of the clamp diode 41 to a negative electrode terminal of the DC intermediate capacitor 4, that is, the neutral point. (See FIG. 1 (c)). Further, the connection conductor 10 from the emitter terminal of the IGBT 22 to the AC side terminal and the connection conductor 9 to the neutral point are arranged close to and parallel to each other (FIG. 1C).
reference).

Similarly, in FIG.
Is a third switching circuit in which the IGBT 23 and the FWD 33 are built in the same module, and the IGBT 24 and the FW
D34 includes a fourth switching circuit built in the same module and a second clamp diode 42, and is arranged on the cooling body 6. In the lower arm unit 2, the emitter terminal of the IGBT 23 and the IGBT
The collector terminal of the BT 24 and the clamp diode 42
Are arranged in a straight line, and these terminals are connected to each other by the connection conductor 12 in the shortest way (FIG. 1A).
reference). The connection conductor 8 from the emitter terminal of the IGBT 24 to the negative terminal of the second DC intermediate capacitor 5 (not shown), and the positive terminal of the DC intermediate capacitor 5 from the cathode terminal of the clamp diode 42 to the neutral point. (See FIGS. 1B and 1C). Further, the connection conductor 10 from the collector terminal to the AC side terminal of the IGBT 23 and the connection conductor 9 to the neutral point are arranged close to and parallel to each other (see FIGS. 1B and 1C).

FIG. 2 is a partial equivalent circuit diagram of the schematic configuration diagram shown in FIG. 1, and is a circuit diagram corresponding to the first and second inventions. That is, FIG. 2 shows an equivalent circuit diagram of the upper arm unit 1, and FIG. 2 shows a circuit diagram between the collector terminal of the IGBT 21 and the anode terminal of the first clamp diode 41.
Are connected to the first snubber capacitor 13 not shown. Reference numerals 14a, 14b, 14c, and 15 denote wiring inductances of the respective connection conductors, and reference numeral 16 denotes a load.

In FIG. 2, the IGBT 21 and the IGBT 22 (not shown) conduct, and the IGBT 21 → IGBT 22 → load 16 →
When the IGBT 21 is turned off from a state in which a current flows through the path of the negative electrode terminal of the DC intermediate capacitor 4,
Due to the energy stored in the load 16, the load current flows back through the clamp diode 41 in the illustrated path. Further, the energy stored in the wiring inductances 14a and 14b is absorbed by the snubber capacitor 13 through the illustrated path.

At this time, the IGBT 2
Sudden current change rate at turn-off of 1 (-di / dt)
, A voltage is generated in the wiring inductance 14c and the wiring inductance 15, and the sum of this voltage and the voltage across the DC intermediate capacitor 4 is equal to IG.
Although the voltage is applied to the BT21, the emitter conductor of the IGBT21 and the connection conductor 11 in the path of the clamp diode 41 are minimized as described above.
By minimizing the wiring of No. 3, the voltage applied to the IGBT 21 can be minimized.

After the IGBT 21 is turned off, the snubber capacitor 13 and the wiring inductance 14a,
It is known that voltage resonance occurs with the 14b.
As described above, the current flowing through the connection conductor 7 and the connection conductor 9 based on the voltage resonance is magnetically canceled by arranging the connection conductor 7 and the connection conductor 9 close to each other and parallel to each other. Based peak voltage can be reduced.

The above-described suppression operation is the same for the lower arm unit 2. FIG. 3 is an equivalent circuit diagram of the schematic configuration diagram shown in FIG. 1, and is a circuit diagram corresponding to the third invention. In FIG. 3, a thick solid line indicates a current path when the IGBT 22 is turned off, and the directions of currents flowing through the connection conductors 9 and 10 connecting the upper arm unit 1 and the lower arm unit 2 are opposite to each other. In addition, since the connection conductor 9 and the connection conductor 10 are arranged close to and parallel to each other as described above, they are magnetically canceled each other. Therefore, the wiring inductance of the upper and lower arm units is reduced, and the duty of the snubber of the IGBT 22 is reduced. It is reduced. The same applies when the IGBT 23 is turned off.

FIG. 4 is a circuit diagram showing a second embodiment of the present invention corresponding to the third and fourth inventions.
The BT22 has a snubber circuit 1 including a resistor and a capacitor.
7a, and the IGBT 23 is provided with a snubber circuit 17b composed of a resistor and a capacitor. FIG. 5 is a circuit diagram showing a third embodiment of the present invention corresponding to the third and fifth inventions. The IGBT 22 has a snubber circuit 1 in which two zener diodes are connected in series with opposite polarities.
The IGBT 23 includes a snubber circuit 18b in which two Zener diodes are connected in series with opposite polarities.

FIG. 6 is a schematic configuration diagram of one phase of a main circuit of a three-phase three-level inverter as a three-level power converter according to a fourth embodiment of the present invention, corresponding to the sixth invention. FIG. 6A is a plan view, FIG. 6B is a side view, and FIG. 6C is a front view. In FIG. 6, the upper arm unit 1 is an IGBT 21
a and FWD 31a are built in the same module, and IG
The BT21b and the FWD31b are built in the same module, the first switching circuit in which these modules are connected in parallel, the IGBT22a and the FWD32a are built in the same module, and the IGBT22b and the FWD32b are built in the same module. Are connected in parallel, and a first clamp diode in which clamp diodes 41a and 41b are connected in parallel, and are arranged on the cooling body 6.

In the upper arm unit 1, the IGB
The emitter terminal of T21a, the collector terminal of IGBT 22a, and the cathode terminal of the clamp diode 41a are linearly arranged, and the emitter terminal of IGBT 21b and I
The collector terminal of the GBT 22b and the cathode terminal of the clamp diode 41b are linearly arranged, and these terminals are connected to the shortest by the connection conductor 11 (FIG. 6).
(A)). Further, a connection conductor 7 from the collector terminal of each of the IGBTs 21a and 21b to the positive terminal of the first DC intermediate capacitor 4 (not shown), and the negative terminal of the DC intermediate capacitor 4 from the anode terminal of each of the clamp diodes 41a and 41b. In other words, the connection conductor 9 to the neutral point is disposed close to and parallel to the connection conductor 9 (FIG. 6).
(C)). Further, a connection conductor 10 from the emitter terminal of each of the IGBTs 22a and 22b to the AC terminal,
The connection conductor 9 to the neutral point is disposed close to and parallel to the connection conductor 9 (see FIG. 6C).

Similarly, in FIG. 6, the lower arm unit 2
Is a third switching circuit in which the IGBT 23a and the FWD 33a are built in the same module, the IGBT 23b and the FWD 33b are built in the same module, and these modules are connected in parallel; the IGBT 24a and the FWD
34a are built in the same module, and the IGBT 24b
And the FWD 34b are built in the same module, and are composed of a fourth switching circuit in which these modules are connected in parallel, and a second clamp diode in which the clamp diodes 42a and 42b are connected in parallel. Are located.

In the lower arm unit 2, the IGB
The emitter terminal of T23a, the collector terminal of IGBT 24a, and the anode terminal of the clamp diode 42a are linearly arranged, and the emitter terminal of IGBT 23b and I
The collector terminal of the GBT 24b and the anode terminal of the clamp diode 42b are arranged in a straight line, and these terminals are connected to each other by the connection conductor 12 as short as possible (FIG. 6).
(A)). Also, a connection conductor 8 from the emitter terminal of each of the IGBTs 24a and 24b to the negative terminal of the second DC intermediate capacitor 5 (not shown), and the positive terminal of the DC intermediate capacitor 5 from the cathode terminal of each of the clamp diodes 42a and 42b. In other words, the connection conductor 9 to the neutral point is disposed close to and parallel to the connection conductor 9 (FIG. 6).
(See (b, c)). Further, a connection conductor 10 from the collector terminal of each of the IGBTs 23a and 23b to the AC side terminal.
And the connection conductor 9 to the neutral point are arranged close to and parallel to each other (see FIGS. 6B and 6C).

The circuit operation in the configuration diagram shown in FIG.
The operation is the same as that described with reference to FIGS. FIG. 7 is a conceptual diagram of one phase of a main circuit of a three-phase three-level inverter as a three-level power converter according to a fifth embodiment of the present invention, corresponding to the sixth invention. That is, in FIG. 7, two sets (1a, 2a and 1b, 2b) of the upper and lower arm units shown in FIG. 6 are symmetrically arranged via the DC intermediate capacitor 4 and the DC intermediate capacitor 5. As a whole, four semiconductor switch elements are connected in parallel to increase the capacity of the three-level power converter.

[0029]

According to the present invention, the connection conductor between each semiconductor switch element, the connection conductor from each semiconductor switch element to the DC terminal, and the connection conductor from each semiconductor switch element to the AC terminal are minimized. By laying them in parallel in close proximity to each other, the wiring inductance of each connection conductor is reduced, and as a result, the snubber circuit of each semiconductor switch element can be simplified, and the main circuit of this three-level power converter can be miniaturized. I can measure.

According to a sixth aspect of the present invention, a high-voltage, large-capacity three-level power converter is provided in which a plurality of semiconductor switch elements are connected in parallel to each of the semiconductor switch circuits while the arrangement and configuration of each of the connection conductors described above. Can be easily realized.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a main circuit of a three-level power conversion device according to a first embodiment of the present invention.

FIG. 2 is a partial equivalent circuit diagram illustrating the operation of FIG. 1;

FIG. 3 is an equivalent circuit diagram for explaining the operation of FIG. 1;

FIG. 4 is a circuit configuration diagram of a main circuit of a three-level power converter according to a second embodiment of the present invention;

FIG. 5 is a circuit diagram of a main circuit of a three-level power converter according to a third embodiment of the present invention.

FIG. 6 is a schematic configuration diagram of a main circuit of a three-level power conversion device according to a fourth embodiment of the present invention.

FIG. 7 is a conceptual configuration diagram of a main circuit of a three-level power converter according to a fifth embodiment of the present invention.

FIG. 8 is a circuit configuration diagram of a main circuit of a three-level power converter showing a conventional example.

[Explanation of symbols]

1, 1a, 1b ... upper arm unit, 2, 2a, 2b ...
Lower arm unit 3, DC power supply 4, first DC intermediate capacitor 5, second DC intermediate capacitor 6, cooling body 7, 8, 9, 10, 11, 12 connection conductor, 13
Snubber capacitors, 14a, 14b, 14c, 15: wiring inductance, 16: load, 17a, 17b, 18
a, 18b: Snubber circuit, 19U, 19V, 19W: Main circuit of three-phase three-level inverter, 21 to 24, 21a to
24a, 21b to 24b ... IGBT, 31 to 34, 31
a to 34a, 34b to 34b... FWD, 41, 41a,
41b: first clamp diode, 42, 42a, 4
2b: second clamp diode.

Claims (6)

[Claims] 1. A series circuit of first and second DC intermediate capacitors is connected to both ends of a DC power supply, and a connection point of the first and second DC intermediate capacitors is set as a neutral point of the DC power supply. First, second, third and fourth semiconductor switch circuits are connected in series with the same polarity, and both ends of the series circuit of the switch circuit are connected to both ends of the series circuit of the DC intermediate capacitor as DC terminals, respectively. Connecting a series circuit of the first and second clamp diodes between the connection point of the first and second switch circuits and the connection point of the third and fourth switch circuits in a direction opposite to the polarity of the switch circuit; In the main circuit of the three-level power converter, the neutral point is connected to a connection point of the first and second clamp diodes, and a connection point of the second and third semiconductor switch circuits is an AC terminal. The first and second semiconductor switches The circuit, the first clamp diode, and the first DC intermediate capacitor are integrated into an upper arm unit, and the first semiconductor switch circuit of the upper arm unit and the first
A connection conductor from the first DC intermediate capacitor of the upper arm unit to the first semiconductor switch circuit, and a connection from the neutral point to the first clamp diode. A conductor is laid in close proximity and parallel, and the third and fourth semiconductor switch circuits, the second clamp diode, and the second DC intermediate capacitor are integrated to form a lower arm unit. A connection conductor between the semiconductor switch circuit of No. 4 and the second clamp diode is laid as short as possible, and a connection conductor from the second DC intermediate capacitor of the lower arm unit to the fourth semiconductor switch circuit; A main circuit of a three-level power converter, wherein a connection conductor to a second clamp diode is laid in close proximity and in parallel. 2. The main circuit of the three-level power converter according to claim 1, wherein a first snubber capacitor is connected to both ends of the first semiconductor switch circuit and the first clamp diode connected in series. A main circuit of a three-level power converter, wherein a second snubber capacitor is connected to both ends of the fourth semiconductor switch circuit and a second clamp diode connected in series. 3. A series circuit of first and second DC intermediate capacitors is connected to both ends of the DC power supply, and a connection point of the first and second DC intermediate capacitors is set as a neutral point of the DC power supply. First, second, third and fourth semiconductor switch circuits are connected in series with the same polarity, and both ends of the series circuit of the switch circuit are connected to both ends of the series circuit of the DC intermediate capacitor as DC terminals, respectively. Connecting a series circuit of the first and second clamp diodes between the connection point of the first and second switch circuits and the connection point of the third and fourth switch circuits in a direction opposite to the polarity of the switch circuit; In the main circuit of the three-level power converter, the neutral point is connected to a connection point of the first and second clamp diodes, and a connection point of the second and third semiconductor switch circuits is an AC terminal. The first and second semiconductor switches The circuit, the first clamp diode and the first DC intermediate capacitor are integrated into an upper arm unit, and the second semiconductor switch circuit of the upper arm unit and the first
A connection conductor from the second semiconductor switch circuit of the upper arm unit to the AC side terminal; and a connection conductor from the neutral point to the first clamp diode. Are closely laid in parallel with each other, and the third and fourth semiconductor switch circuits, the second clamp diode, and the second DC intermediate capacitor are integrated into a lower arm unit. Semiconductor switch circuit and second
A connection conductor from the third semiconductor switch circuit of the lower arm unit to the AC side terminal, and a connection conductor from the neutral point to the second clamp diode. The main circuit of the three-level power conversion device, wherein the main circuit is laid in close proximity to and parallel to the power conversion device. 4. The main circuit of the three-level power converter according to claim 3, wherein a first snubber circuit including a resistor and a capacitor is connected to both ends of the second semiconductor switch circuit, A main circuit of a three-level power converter, wherein a second snubber circuit including a resistor and a capacitor is connected to both ends of the semiconductor switch circuit. 5. The main circuit of the three-level power converter according to claim 3, wherein a first snubber is formed by connecting two Zener diodes in series at opposite ends of the second semiconductor switch circuit with opposite polarities. And a second snubber circuit comprising two Zener diodes connected in series with opposite polarities is connected to both ends of the third semiconductor switch circuit. circuit. 6. The main circuit of a three-level power conversion device according to claim 1, wherein each of said semiconductor switch circuits comprises a plurality of semiconductor switch elements connected in parallel. The main circuit of the three-level power converter.