JPH10247780A - Multilayer wiring board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer wiring board, wherein a suitably roughened surface can be obtained without dissolving resin filler with roughening agent, and a viahole forming hole fine and high in accuracy can be surely formed. SOLUTION: A metal foil 8 with fine irregularities 8a is bonded to an uncured resin layer 6 by pressure. In this state, the resin layer 6 is hardened. Then, the metal foil 8 is removed by wet etching. Next, the surface layer of an interlayer insulating layer 7 is turned to a rough surface 6a. A hole is bored in an interlayer insulating layer 7 by laser irradiation, whereby a hole 9 for a viahole is provided. The rough surface 6a and the hole 9 are subjected to electroless plating, whereby a conductor pattern 13 and a viahole 11 are formed on the interlayer insulating layer 7. In result, a multilayer wiring board 14 can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multilayer wiring board and a method for manufacturing the same.

[0002]

2. Description of the Related Art With the recent progress in the electronics industry, there has been a demand for a wiring board for mounting an LSI to be reduced in size, speed, density, reliability, and the like. Therefore, in recent years, the wiring board has been multi-layered, and an additive method advantageous for forming a high-density pattern has been implemented. The following is an example.

[0003] First, a core substrate on which an inner conductor pattern is formed is prepared. An adhesive for electroless plating is applied on the core substrate and cured. As such an adhesive for electroless plating, for example, an adhesive composed of a resin matrix that is hardly soluble in a roughening agent such as chromic acid and a resin filler that is easily soluble in the roughening agent is used. By treating the formed interlayer insulating layer with a roughening agent, only the easily soluble filler is selectively dissolved. As a result, a number of fine anchor recesses are formed, and the surface of the interlayer insulating layer becomes a roughened surface. Next, via holes are formed at predetermined locations by etching with a photomask formed on the interlayer insulating layer. Thereafter, via holes and outer layer conductor patterns are formed by a process such as electroless plating and the like to finally obtain a desired multilayer wiring board.

[0004] By the way, there is a natural limit to the fineness of a drilling method using a photomask, and thus, a drilling method using laser beam irradiation has recently been expected.

[0005]

However, the adhesive layer for electroless plating at the outermost layer of the interlayer insulating layer contains a resin filler. Problems arise.

1) When a resin filler is present, laser light is scattered in the interlayer insulating layer, so that it is difficult to accurately form a fine via hole forming hole. 2) Since the resin filler easily absorbs moisture, it is not preferable for improving reliability.

[0007] 3) An adhesive containing a resin filler is expensive. 4) When a roughening treatment using a roughening agent is performed, a waste liquid is generated. Therefore, in order to solve these problems, it was thought that it was necessary to form a rough surface without dissolving the resin filler with a roughening agent.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a suitable rough surface without dissolving a resin filler by a roughening agent, and to obtain a fine and high precision. It is an object of the present invention to provide a method for manufacturing a multilayer wiring board in which a via hole forming hole can be reliably formed.

Another object of the present invention is to realize a multilayer wiring board excellent in heat resistance and reliability.

[0010]

In order to solve the above-mentioned problems, according to the first aspect of the present invention, a metal foil having fine irregularities is pressure-bonded to an uncured resin layer. Curing, and then removing the metal foil by wet etching to form a rough surface on the surface of the interlayer insulating layer, and forming a hole in the interlayer insulating layer by laser light irradiation to form a via hole forming hole. Forming a conductive pattern and a via hole in the interlayer insulating layer by electroless plating the rough surface and the via hole forming hole. Is the gist.

According to a second aspect of the present invention, in the first aspect, the interlayer insulating layer includes a first resin layer formed on a lowermost layer and a second resin layer formed on an outermost layer and having the rough surface. It was assumed that it consisted of a resin layer and a high toughness resin layer formed between the two resin layers.

According to a third aspect of the present invention, in the second aspect, the high toughness resin layer is a polyimide film, and the second resin layer is a resin material coated on one side of the polyimide film in a B stage. It was assumed that it was in a state.

According to a fourth aspect of the present invention, in the third aspect, the polyimide film has a thickness of 5 μm to 50 μm. The invention according to claim 5 is formed by pressing a metal foil having fine irregularities onto an uncured resin layer, curing the resin layer in that state, and then removing the metal foil by wet etching. A roughened surface, an interlayer insulating layer having a surface layer thereof, a via hole formed by electroless plating on a via hole forming hole formed in the interlayer insulating layer by laser light irradiation, and an electroless plating on the rough surface. The gist of the present invention is a multilayer wiring board including a conductor pattern formed by the method described above.

The operation of the present invention will be described below. According to the first aspect of the invention, first, a metal foil having fine irregularities is pressed against an uncured resin layer, whereby the uncured resin flows and enters the irregularities. When the resin layer is cured in this state, the fluidity of the resin is lost, and a large number of anchor concave portions corresponding to the irregularities are formed on the surface of the resin layer. Next, when the metal foil is removed by wet etching, the rough surface under the metal foil is exposed. Since wet etching is used as a method for removing the metal foil, no large stress is applied to the anchor recess at that time. Therefore, the anchor concave portion having a suitable shape is securely held until the subsequent electroless plating step without being destroyed. Thereafter, a hole for forming a via hole is formed by piercing the interlayer insulating layer by laser light irradiation.

According to the manufacturing method of the present invention as described above,
Not only does it not have to disperse the easily soluble resin filler in the interlayer insulating layer, but also does not require a roughening agent for dissolving it. Therefore, the conventional problem caused by the dissolution of the resin filler by the roughening agent is solved.

That is, if the interlayer insulating layer does not contain a resin filler, fine via-holes can be accurately formed without scattering laser light.
In addition, since the resin filler that causes moisture absorption of the interlayer insulating layer is omitted, reliability is improved. Further, the cost of the adhesive can be reduced by omitting the resin filler, so that the cost of the multilayer wiring board can be reduced. Further, since no roughening agent is used, there is obtained an advantage that no waste liquid is generated.

According to the second aspect of the present invention, a high toughness resin layer is present in the interlayer insulating layer, and separates the first resin layer from the second resin layer. Therefore, the stress generated during the heat cycle is absorbed by the high toughness resin layer, thereby suppressing the occurrence of cracks. Further, disconnection of the lower conductor layer on the first resin layer side is also prevented.

According to the third aspect of the invention, the polyimide film has particularly excellent elongation at break as compared with the adhesive layer of electroless plating and has suitable toughness. Therefore, the stress can be sufficiently absorbed, and the occurrence of cracks during a heat cycle is more reliably suppressed.
Further, even if a crack is generated, the progress of the crack can be stopped with certainty. In addition, since the polyimide film has excellent electrical characteristics and heat resistance, a high-performance multilayer wiring board can be manufactured. Further, since the second resin layer is a B-stage and is previously applied to the polyimide film, the second resin layer is excellent not only in smoothness but also in handleability.

According to the fourth aspect of the present invention, since the thickness of the polyimide film is within the above preferred range,
The effect of stress absorption can be sufficiently obtained without increasing the thickness of the interlayer insulating layer or increasing the cost.

According to the fifth aspect of the present invention, since the conductor pattern is formed on the rough surface having the concave portion for anchor having a suitable shape, high adhesion is provided between the interlayer insulating layer and the conductor pattern. Is secured. Therefore, even in a heat cycle, the conductor pattern is less likely to be separated from the interlayer insulating layer, and a multilayer wiring board having excellent heat resistance and reliability can be realized.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multilayer wiring board according to an embodiment of the present invention and a method for manufacturing the same will be described below in detail with reference to FIGS.

First, as shown in FIG. 1, a core substrate 1 on which an inner conductor pattern 3 is formed is manufactured. Here, the inner layer conductor pattern 3 is preferably a copper pattern. The formation of the inner conductor pattern 3 on the core substrate 1 is performed by, for example, a method of etching a copper-clad laminate. Also, an adhesive layer for electroless plating is formed on a substrate such as a glass epoxy substrate, a BT (bismaleimide triazine) substrate, a polyimide substrate, a ceramic substrate, and a metal substrate, and the surface is roughened to a roughened surface. A method of performing electroless plating may be used. Further, the inner layer conductor pattern 3
Is not limited to the case where it is formed on only one side of the core substrate 1, but also includes the case where it is formed on both sides. When the core substrate 1 is a double-sided board, through holes (not shown) penetrating the front and back are formed. The through holes are for electrically connecting the wiring layers on both the front and back sides.

More specifically, in this embodiment, the thickness is 1 mm.
The core substrate 1 was manufactured using a copper-clad laminate obtained by laminating a copper foil of 18 μm on a substrate made of glass epoxy resin as described above.

Since the core substrate 1 after pattern formation has irregularities, it is preferable that the gap between the inner conductor patterns 3 is filled with the resin filling layer 2. As a result, the surface is smoothed.

Specifically, in this embodiment, a filler for forming the resin-filled layer 2 is obtained as follows. First, 100 parts by weight of a bisphenol F type epoxy monomer (manufactured by Yuka Shell, molecular weight 310, trade name: YL983U) and 6 parts by weight of an imidazole curing agent (manufactured by Shikoku Chemicals, trade name: 2E4MZ-CN) are mixed. For this mixture, an average particle size of 1.6
μm a silane coupling agent is coated on the surface with a SiO ₂ spherical particles (Admatechs Ltd., CRS 1101-CE, where the size of the maximum particle is not more than the thickness of the inner layer copper pattern to be described later (15 [mu] m)) 170 weight And 0.5 parts by weight of an antifoaming agent (Perenol S4 manufactured by San Nopco). This is kneaded with three rolls to adjust the viscosity of the mixture to 45,000 to 49,000 cps at 23 ± 1 ° C. The resin filler layer 2 is formed by applying the filler to the core substrate 1 by a conventionally known coating method such as a roll coater, and drying and curing the core substrate 1. After that, the surface may be further smoothed by polishing with a belt sander or the like.

Next, on the core substrate 1 on which the inner-layer conductor pattern 3 and the like are formed, an interlayer insulating layer 4 is formed by laminating an adhesive layer 4, a high-toughness resin layer 5, and an adhesive layer 6 for electroless plating in the above order. A layer 7 is formed (see FIG. 1). That is, in the interlayer insulating layer 7, the adhesive layer 4 as the first resin layer is located at the lowermost layer, and the adhesive layer 6 for electroless plating as the second resin layer is located at the outermost layer. I have. A high toughness resin layer 5 is interposed between the two adhesive layers 4 and 6.

The adhesive layer 6 for electroless plating is integrated with the underlying conductor layer such as the inner conductor pattern 3 through the high-toughness resin layer 5 and the adhesive layer 4. Therefore, the lower conductor layer is not in close contact with the resin-filled layer 2 with which the lower conductor layer contacts. Therefore, during the heat cycle, the interlayer insulating layer 7
Is generated by the high toughness resin layer 5, thereby suppressing the occurrence of cracks. Further, disconnection of the lower conductor layer is also prevented.

The high toughness resin layer 5 only needs to have a higher fracture elongation than the resin constituting the adhesive layer 6 for electroless plating. Such things include, for example, poirimid,
There are thermoplastic resins, rubber and the like. This is because these have high toughness and high fracture elongation, and therefore can sufficiently absorb stress.

As the polyimide, one having both an imide structure and a biphenyl structure is preferable. The reason is that it is excellent in chemical resistance such as alkali resistance and the elongation at break is as high as 60%.

Examples of the thermoplastic resin include polyether sulfone (PES: elongation at break of 40 to 80%), polysulfone (PS: elongation at break of 50 to 100%), polyphenylene ether (PPE: elongation at break of 50%), Polyphenylene sulfone (PPES: elongation at break: 60 to 120%) and the like.

As the rubber, acrylonitrile-
Butadiene rubber, butadiene rubber, chloroprene rubber,
Styrene butadiene copolymer, polyamide, polyethylene terephthalate, silicone rubber and the like can be used.

It is preferable that the polyimide, the thermoplastic resin, the rubber and the like are in the form of a film. For forming the adhesive layer 4, various resins such as an epoxy resin, a polyimide resin, and a bismaleimide triazine resin can be used. In this case, it is particularly desirable to use an alicyclic epoxy resin. The advantages of the alicyclic epoxy resin are that the dielectric constant can be set to 4 or less, so that signal propagation delay can be prevented, and the elongation at break is larger than that of the cresol novolac type epoxy resin. Specifically, in this embodiment, a dicyclopentadiene-modified epoxy resin which is an alicyclic epoxy resin (EPICLON HP- manufactured by Dainippon Ink Co., Ltd.)
7200) is dissolved in DMDG to form a resin solution used for the adhesive layer 4. It is desirable that the adhesive layer 4 does not contain a filler like this composition.

The adhesive layer 6 for electroless plating is made of various epoxy resins such as cresol novolak type epoxy resin and bisphenol type epoxy resin, polyimide resin,
It is formed using an adhesive for electroless plating containing a bismaleimide triazine resin or the like as a main component. Among various epoxy resins, an alicyclic epoxy resin is particularly preferable.

The adhesive layer 6 for electroless plating preferably has at least a thermosetting property and is cured by heating. The reason is that, in the case of the curing method by heating, the apparatus is simpler than in the case where another curing method is employed, and the resin can be surely cured. In addition, you may have photocurability in addition to thermosetting.

Specifically, in the present embodiment, the adhesive for electroless plating obtained as described below is used.
That is, a dicyclopentadiene-modified epoxy resin which is an alicyclic epoxy resin (EPIC manufactured by Dainippon Ink Co., Ltd.
LON HP-7200), 35 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of an antifoaming agent (S-65, manufactured by San Nopco), and 0.5 part by weight of this mixture. On the other hand, the mixture was mixed while adding 30 parts by weight of NMP without mixing any easily soluble resin filler, and the viscosity was adjusted to 7 Pa · s with a homodisper stirrer. It is desirable that the adhesive for electroless plating does not contain a filler like this composition.

The thickness of the adhesive layer 6 for electroless plating is 2 μm.
It is preferably about m to 50 μm. If the thickness is too thin, the adhesion strength is reduced. On the other hand, if the thickness is too large, the aspect ratio of the via hole forming hole 9 becomes large, and plating becomes difficult to arrive.

The thickness of the high toughness resin layer 5 is 1 μm to 50 μm.
About 5 μm to 50 μm, especially about 20 μm
It is preferably about 30 μm. If the thickness is too thin, the effect of suppressing cracks is reduced. In the case of a film, if it is too thin, the handleability will deteriorate. vice versa,
If the thickness is too large, the aspect ratio of the via hole forming hole 9 becomes large, and it becomes difficult to plating.

The thickness of the adhesive layer 4 is 0.1 μm to 30 μm.
About m is good. This is because if it is too thin, it will be difficult to adhere to the conductor layer of the core substrate 1. On the other hand, if the thickness is too large, the aspect ratio of the via hole forming hole 9 becomes large, and it becomes difficult to deposit plating.

For the formation of the interlayer insulating layer 7, for example, a film-like material for forming an interlayer insulating layer is preferably used. Such a film-like material refers to a film provided with an electroless plating adhesive layer 6 formed on one side of a film made of a high toughness resin by applying an electroless plating resin. Such a film is pressure-bonded to the core substrate 1 to which an adhesive has been applied in advance.

Specifically, in this embodiment, the thickness 25
The above-mentioned adhesive for electroless plating is applied to one surface of a polyimide film 5 (Ube Industries, Ltd .: Upilex) 5 and dried at 60 ° C. to form an uncured 5 μm thick adhesive layer 6 for electroless plating. Was formed. Here, the uncured state is preferably a so-called B-stage state. The reason why the adhesive layer 6 for electroless plating is uncured is to facilitate the formation of the rough surface 6a by a rough surface forming method described later. That is, if the resin has already been cured and has lost its fluidity, the resin cannot sufficiently enter the fine irregularities 8a.

In the present embodiment, the film-like material is placed on the core substrate 1 on which the adhesive layer 4 has been formed in advance, and both are pressed by using a laminating apparatus (see FIG. 1). In this case, the laminating temperature is 150 ° C to 20 ° C.
At 0 ° C., the lamination pressure is 1 kg / cm ² -100 kg /
It is set to cm ^2. Adhesive layer 4 with alicyclic epoxy resin
In this embodiment, which employs a polyimide film 5, the laminating temperature is set to 175 ° C., and the laminating pressure is set to 20 kg / cm ² .

Here, in order to form a rough surface on the core substrate 1 on which the interlayer insulating layer 7 is formed, the metal foil 8 having the fine unevenness 8a is pressed to the uncured electroless plating adhesive layer 6 ( (See FIG. 2). At this time, the surface having the fine unevenness 8a is arranged on the side of the adhesive layer 6 for electroless plating. Then, the uncured resin flows and enters the fine unevenness 8a.

It is desirable that the metal foil 8 be pressed at the same time as laminating the film-like material on the core substrate 1. This is because the number of steps is reduced and the production efficiency is improved as compared with the case where the lamination is performed separately.

The metal foil 8 to be used includes, for example, copper foil, aluminum foil, nickel foil, tin foil, gold foil, silver foil and the like. Among them, it is particularly desirable to use the copper foil 8. This is because the copper foil 8 itself has the advantage of being inexpensive and has the advantage that it can be easily and reliably removed with a normal one without using a special etchant.

When the copper foil 8 is used as the metal foil 8, its thickness before the pressure bonding is preferably about 9 μm to 18 μm. If the thickness is too thin, not only is it difficult to form the fine irregularities 8a, but also the foil tends to be deformed or the like, so that the handleability deteriorates. On the other hand, if it is too thick, the amount to be dissolved by wet etching increases, so that the processing time becomes longer and material waste increases.

The surface roughness of the copper foil 8 is 2 μm to 6 μm.
Good degree. If this is too small or too large, it is difficult to form a suitable anchor recess. Specifically, in the present embodiment, the thickness is 12 μm, and the surface roughness is 4 μm.
m copper foil 8 is used.

As a method of forming the fine irregularities 8a on the metal foil 8, there are a method of embossing the rolled metal foil 8, a method of etching and the like, a method of sand blasting, shot blasting and the like.

Next, the core substrate 1 is heated while the metal foil 8 is pressed, and the adhesive layer 6 for electroless plating is thermally cured. Then, the fluidity of the resin is lost, and a large number of anchor recesses having a shape corresponding to the fine unevenness 8a are formed on the surface of the adhesive layer 6 for electroless plating. That is, a rough surface 6a suitable for the surface layer of the interlayer insulating layer 7 is formed.

Further, as shown in FIG. 3, by treating the core substrate 1 with an etchant, an interlayer insulating layer 7 is formed.
The upper metal foil 8 is removed by wet etching. As a result, the rough surface 6a under the metal foil 8 is exposed. The reason why wet etching is adopted as a method for removing the metal foil 8 is as follows.
This is because a large stress is not applied to the anchor concave portion during the processing. Therefore, the formed anchor concave portion having a suitable shape is securely held until the subsequent electroless plating step without being destroyed.

When the copper foil 8 is selected as the metal foil 8, for example, ferric chloride, cupric chloride, a mixed solution of sulfuric acid and hydrogen peroxide, a persulfate, or the like is used as an etchant. Etching may be performed under normal conditions. Specifically, in the present embodiment, cupric chloride is used.

Next, using a carbon dioxide laser irradiation device, the opening diameter is set to 30 μm, and the hole 9 for forming a via hole is formed (see FIG. 4). The portion of the interlayer insulating layer 7 irradiated with the laser beam instantaneously becomes hot and vaporizes. In addition to the carbon dioxide laser, for example, an ultraviolet laser or an excimer laser may be used.

Further, here, in order to form a pattern by the full additive method, a catalyst nucleus is applied to the rough surface 6a, and then a plating resist (not shown) is formed. Then, electroless plating is performed on the non-formed portion of the plating resist. As a result, the via hole forming hole 9 is filled with the via hole conductor layer 10, and the via hole 11 is completed (see FIG. 5).

It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus. Generally, palladium chloride or a palladium colloid is used. In addition,
It is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

As the plating resist, a commercially available dry film can be used. In particular, it is preferable to use a photosensitive resin composition comprising a resin obtained by acrylizing a novolak type epoxy resin such as a cresol novolak type epoxy resin or a phenol novolak type epoxy resin with methacrylic acid or acrylic acid, and an imidazole curing agent. . This is because it is excellent in resolution and base resistance.

When filling the via hole forming hole 9 by electroless plating (so-called filled via formation), the following is preferred. That is, before applying the catalyst nucleus on the adhesive layer 6 for electroless plating, the surface of the lower conductor layer exposed from the via hole forming hole 9 is treated with an acid. After such an activation treatment, it is then immersed in an electroless plating solution. This is because the oxide film on the surface is removed and plating is easily deposited.

More specifically, in the present embodiment, the core substrate 1 was immersed in an electroless copper plating solution having the following composition for about 6 hours to perform electroless copper plating in the via hole forming hole 9.

Metal salt: CuSO ₄ .5H ₂ O: 8.6 mM Complexing agent: TEA: 0.15 M Reducing agent: HCHO: 0.02 M Other: Stabilizer (bipyridyl, potassium ferrocyanide, etc.): small amount The deposition rate is 6 μm / hour. Next, after filling the via hole forming holes 9 by plating, a catalyst nucleus is provided on the adhesive layer 6 for electroless plating, and a plating resist (permanent resist 12) is provided. By performing electroless plating in this state, the outer layer conductor pattern 13 is formed in the portion where the resist is not formed. The outer conductor pattern 13 and the inner conductor pattern 3 thus formed are electrically connected via the via holes 11.

As the electroless plating solution used in this step, an electroless copper plating solution is preferably used. More specifically, an electroless plating solution comprising copper ions, trialkanolamine, a reducing agent and a pH adjuster is advantageous.
This is because high-speed plating can be realized.

The trialkanolamine is desirably at least one selected from triethanolamine, triisopanolamine, trimethanolamine and tripropanolamine. This is because the amines are water-soluble.

The reducing agent used in the electroless plating solution is desirably at least one selected from aldehydes, hypophosphites, borohydrides and hydrazines. This is because the substances listed above are water-soluble and have a reducing power under basic conditions.

The pH adjuster is sodium hydroxide,
It is desirably at least one selected from potassium hydroxide and calcium hydroxide. In addition, as a method of improving the adhesion between the conductor layer and the adhesive layer for electroless plating, the following method is also available. That is, a method in which an alloy plating using at least two or more metal ions selected from copper, nickel, cobalt and phosphorus is applied as primary plating, and then copper plating is applied as secondary plating. This is because these alloys have high strength and can improve peel strength.

More specifically, in the present embodiment, primary plating is performed on the core substrate 1 on which the permanent resist 12 has been formed by using an electroless copper-nickel alloy plating bath having the following composition, and the resist is not formed. A copper-nickel-phosphorus plating thin film having a thickness of about 1.7 μm was formed on the portion. The temperature of the plating bath was 60 ° C., and the plating immersion time was 1 hour.

Metal salt: CuSO ₄ .5H ₂ O: 6.0 mM (1.5 g / l) NiSO ₄ .6H ₂ O: 95.1 mM (25 g / l) Complexing agent: Na ₃ C ₆ H ₅ O ₇ : 0.23 M (60 g / l) Reducing agent: NaPH ₂ O ₂ · H ₂ O: 0.19 M (20 g / l) pH regulator: NaOH: 0.75 M (pH = 9.5) Stabilizer: lead nitrate: 0.2 mM (80 ppm) Interface Activator: 0.05 g / l Deposition rate: 1.7 μm / hour The core substrate 1 subjected to the primary plating is pulled up from the plating bath, and the plating bath adhered to the surface is washed away with water. By treating 1 with an acidic solution, the oxide film on the surface layer of the copper-nickel-phosphorus plating thin film was removed. Thereafter, without performing Pd substitution, an activation treatment is performed with a pretreatment liquid described in International Patent Application No. WO96 / 20294, and electroless copper plating having the following composition is formed on the copper-nickel-phosphorus plating thin film. Secondary plating was performed using a bath. The temperature of the plating bath was 50 to 70 ° C, and the plating immersion time was 90 to 360 minutes.

Metal salt: CuSO ₄ .5H ₂ O: 8.6 mM Complexing agent: TEA: 0.15 M Reducing agent: HCHO: 0.02 M Other: Stabilizer (bipyridyl, potassium ferrocyanide, etc.): small amount The deposition rate is 6 μm / hour. In the present embodiment, the production of the permanent resist 12 is performed in the following procedure. First, a liquid varnish made of a photosensitive epoxy resin was prepared, applied to the core substrate 1 using a roll coater, and dried at 60 ° C. for 30 minutes. Thereby, a resist layer having a thickness of 30 μm was obtained. Next, a photomask film is placed on the photomask, and 400 mJ / cm ^2.
Was irradiated and exposed. After removing the photomask film and dissolving and developing the resist layer with DMTG,
A plating resist having an opening at a predetermined position was formed on the core substrate 1. In addition, an extra-high pressure mercury lamp is used for 6000
Exposure at mJ / cm ² , 100 ° C for 1 hour and 150 ° C
For 3 hours to obtain a permanent resist 12.

Then, through the above-described steps, a desired multilayer wiring board 14 is manufactured. It should be noted that if the steps after the formation of the interlayer insulating layer 7 are repeated as necessary to build up, the multilayer wiring board 14 having a further multilayer structure can be formed.
Can be obtained.

Now, the characteristic effects of this embodiment will be listed below. (A) According to the manufacturing method of the present embodiment, the rough surface 6a can be reliably formed through the above-described steps. In this case, it is not necessary to disperse the easily soluble resin filler in the interlayer insulating layer 7, and it is not necessary to use a roughening agent for dissolving the resin filler. Therefore, the conventional problem caused by the dissolution of the resin filler by the roughening agent is solved. That is, since the laser light is not scattered in the interlayer insulating layer 7, the fine via hole forming hole 9 can be formed with high accuracy, and the formation accuracy of the via hole 11 is surely improved. In addition, since the resin filler causing moisture absorption of the interlayer insulating layer 7 is omitted, the reliability is improved. Furthermore, since the adhesive for electroless plating is inexpensive by omitting the resin filler, the cost of the multilayer wiring board 14 can be reduced. Further, since no roughening agent is used, there is obtained an advantage that no waste liquid is generated.

In addition, in the multilayer wiring board 14, the outer layer conductor pattern 13 is formed on the rough surface 6a having the anchor recess of a suitable shape. For this reason, high adhesion is ensured between the interlayer insulating layer 7 and the outer conductor pattern 13. Therefore, the outer conductor pattern 13 is not easily peeled off from the interlayer insulating layer 7 even during the heat cycle. Therefore, the multilayer wiring board 14 excellent in heat resistance and reliability can be realized.

(B) In this embodiment, the polyimide film 5 as the high toughness resin layer 5 is provided in the interlayer insulating layer 7. Therefore, the stress can be sufficiently absorbed, and the occurrence of cracks during a heat cycle is more reliably suppressed. Further, even if a crack is generated, the progress of the crack can be stopped with certainty.

In addition, since the polyimide film 5 has excellent electrical properties and heat resistance, the high performance multilayer wiring board 1
4 can be manufactured. In addition, since the thickness of the polyimide film 5 is within the above-described preferred range, the effect of stress absorption can be sufficiently obtained without increasing the thickness of the interlayer insulating layer 7 or increasing the cost.

(C) Further, the adhesive layer 6 for electroless plating, which is the second resin layer, is a B stage and is applied to the polyimide film 5 in advance. Therefore, it is not only excellent in smoothness but also excellent in handleability.
This certainly contributes to the improvement of the formation accuracy of the via hole 11.

The present invention is not limited to the above embodiment, but can be modified, for example, to the following forms. The build-up layers may be formed on both sides of the core substrate 1 instead of the embodiment in which the build-up layers are formed only on one side surface of the core substrate 1.

After the high-toughness resin film 5 alone is pressed on the core substrate 1 on which the adhesive has been applied in advance, the adhesive for the electroless plating is applied on the upper surface to form the adhesive layer 6 for the electroless plating. A method of forming may be adopted. Further, instead of applying and forming the adhesive layer 6 for electroless plating, an adhesive film for electroless plating may be pressed.

The high toughness resin layer 5 need not be in the form of a film, but may be formed by applying a resin material, for example. The formation of the outer conductor pattern 14 may be performed not only by the full additive method as in the embodiment but also by a semi-additive method. In the semi-additive method, the adhesive layer for electroless plating is subjected to a roughening treatment as necessary to provide a catalyst core. Thereafter, electroless plating is applied to the entire surface of the interlayer insulating layer 7 to form the conductor layer and the via hole 1.
And 1. Further, electrolytic plating is performed in a state where a plating resist is formed on a portion where the pattern is not formed, and the outer conductor pattern 13 and the via hole 11 are thickened. After that, the plating resist is removed and etching is performed to make the outer layer conductor pattern 13 independent.

The electroless plating for forming the conductor layer 10 in the via hole and the electroless plating for forming the outer conductor pattern 13 may be simultaneously performed using the same electroless plating solution.

The method of forming a rough surface of the above embodiment is, of course, also effective when, for example, forming a rough surface 6a on the surface of an interlayer insulating layer 7 having no tough resin layer 5. Here, in addition to the technical ideas described in the claims, technical ideas grasped by the above-described embodiments are listed below together with their effects.

(1) The method according to any one of claims 2 to 4, wherein the second resin layer has at least a thermosetting property,
The method for manufacturing a multilayer wiring board, wherein the layer is cured by heating. According to this method, the apparatus can be simplified and the resin can be surely cured as compared with the case where another curing method is employed.

(2) The method according to any one of claims 1 to 4, wherein the metal foil is a copper foil. According to this method, in addition to the advantage that the copper foil itself is inexpensive, there is an advantage that the copper foil itself can be easily and reliably removed with a normal one without using a special etchant.

(3) The multilayer wiring board according to any one of claims 1 to 4, wherein the metal foil is a copper foil having a thickness of 9 μm to 18 μm and a surface roughness of 2 μm to 6 μm. Production method. According to this method, in addition to the advantage that the copper foil itself is inexpensive, there is an advantage that the copper foil itself can be easily and reliably removed with a normal one without using a special etchant. Further, since the thickness and surface roughness of the copper foil are within the preferred ranges, a suitable anchor recess can be formed easily, efficiently, and at low cost.

(4) The method according to any one of claims 2 to 4, wherein the thickness of the second resin layer is 2 μm to 50 μm. According to this method, it is possible to reliably prevent a decrease in the adhesion strength and a non-adhesion of the plating.

(5) The multilayer wiring board according to claim 5, wherein the uncured resin layer constituting the interlayer insulating layer contains no filler. (6) A metal foil having fine irregularities is pressed against an uncured resin layer, the resin layer is cured in that state, and then the metal foil is removed by wet etching.
A method of forming a rough surface on a surface layer. With such a rough surface forming method, a suitable rough surface can be reliably obtained without using a roughening agent.

The technical terms used in this specification are defined as follows. "Metal foil: refers to a metal foil that is removed by wet etching, such as copper foil,
Aluminum foil, nickel foil, tin foil, gold foil, silver foil and the like. "

[0082]

As described in detail above, according to the first to fourth aspects of the present invention, it is possible to obtain a suitable rough surface without dissolving the resin filler by the roughening agent, and to obtain a fine surface. It is possible to provide a method for manufacturing a multilayer wiring board in which holes for forming via holes can be formed with high accuracy. In addition, reliability can be improved and cost can be reduced.

According to the second aspect of the present invention, the occurrence of cracks is suppressed and the disconnection of the lower conductor layer is prevented, so that the reliability is further improved. According to the third aspect of the invention, the occurrence of cracks is more reliably suppressed, so that the reliability can be further improved and the multilayer wiring board can have higher performance.

According to the fourth aspect of the present invention, the effect of stress absorption can be sufficiently obtained without increasing the thickness of the interlayer insulating layer or increasing the cost. According to the fifth aspect of the present invention, as a result of ensuring high adhesion between the interlayer insulating layer and the conductor pattern, a multilayer wiring board having excellent heat resistance and reliability can be realized.

[Brief description of the drawings]

FIG. 1 is a partial schematic cross-sectional view showing a step of pressing a copper foil in a method for manufacturing a multilayer wiring board according to an embodiment of the present invention.

FIG. 2 is a partial schematic cross-sectional view showing a state after the copper foil is pressed.

FIG. 3 is a partial schematic cross-sectional view showing a state after etching of the copper foil.

FIG. 4 is a partial schematic cross-sectional view showing a state after the formation of the via hole forming hole.

FIG. 5 is a partial schematic cross-sectional view showing a state after via holes are formed.

FIG. 6 is a partial schematic cross-sectional view showing a state after the formation of the permanent resist and the outer layer conductor pattern.

[Explanation of symbols]

4 ... adhesive layer as first resin layer, 5 ... polyimide film as high toughness resin layer, 6 ... adhesive layer for electroless plating as (second) resin layer, 6a ... rough surface, 7 ... Interlayer insulating layer, 8: copper foil as metal foil, 8a: fine unevenness,
9: Via hole forming hole, 11: Via hole, 13
... Outer layer conductor pattern, 14 ... Multilayer wiring board.

Claims (5)

[Claims] A metal foil having fine irregularities is pressed against an uncured resin layer, the resin layer is cured in that state, and the metal foil is removed by wet etching to form a surface layer of the interlayer insulating layer. A step of forming a rough surface, and a step of forming a via hole forming hole by piercing the interlayer insulating layer by laser light irradiation, and an electroless plating for the rough surface and the via hole forming hole, Forming a conductive pattern and a via hole in the interlayer insulating layer. 2. The interlayer insulating layer is formed between a first resin layer formed on a lowermost layer, a second resin layer formed on an outermost layer and having the rough surface, and the two resin layers. The method for producing a multilayer wiring board according to claim 1, comprising a high toughness resin layer. 3. The high-toughness resin layer is a polyimide film, and the second resin layer is a B-stage resin material applied to one side of the polyimide film. Item 3. The method for producing a multilayer wiring board according to Item 2. 4. The polyimide film has a thickness of 5 μm to 50 μm.
The method according to claim 3, wherein m is m. 5. A roughened surface formed by pressing a metal foil having fine irregularities onto an uncured resin layer, curing the resin layer in that state, and then removing the metal foil by wet etching. A via hole formed by electroless plating on a via hole forming hole formed in the interlayer insulating layer by laser beam irradiation, and an electroless plating on the rough surface. A multilayer wiring board comprising a conductor pattern.