JPH10247783A - Multilayer printed wiring board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain cracks form occurring in an electroless plating adhesive layer starting from an interface as a starting point between a conductor layer and a resin layer by a method wherein an interlayer insulating resin layer is composed of an electroless plating adhesive layer and a high-toughness resin layer. SOLUTION: In a multilayer printed wiring board, an electroless plating adhesive layer 7 serving as an upper adhesive layer comprised in an interlayer resin insulating layer is laminated on a lower conductor layer 13 and an adjacent plating resist 12 through the intermediary of a high-toughness resin layer 6 and the lower adhesive layer 8. Therefore, a stress induced in the electroless plating adhesive layer 7 at an interface between the conductor layer 13 and the plating resist 12 in a heat cycle is absorbed by the high-toughness resin layer 6, so that cracking is restrained from occurring in the electroless plating adhesive layer 7. Even if cracking occurs in the electroless plating adhesive layer 7, the cracking is stopped form running by the high-toughness resin layer 6, so that a lower conductor layer 13 can be protected against disconnection.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method for manufacturing the same, and more particularly, to a multilayer printed wiring board having excellent heat cycle characteristics.

[0002]

2. Description of the Related Art In recent years, with the advance of the electronics industry, electronic devices have been reduced in size or increased in speed. Reliability is required.

[0003] One of the conventional methods for forming a printed wiring board meeting this kind of demand is an additive method. In the additive method, an adhesive for electroless plating is applied to the surface of a substrate to form an adhesive layer, and after the surface of the adhesive layer for electroless plating is roughened, a conductor is formed by electroless plating. How to

According to this method, since the conductor circuit is formed by electroless plating, a high-density wiring with high pattern precision can be easily and low-priced compared to the etched foil method (subtractive method) in which a pattern is formed by etching. There is an advantage that it can be manufactured at a low cost. In addition, since the conductive circuit is firmly adhered to the roughened adhesive layer, excellent bonding between the two is ensured, so that the conductive circuit is less likely to be separated from the adhesive layer.

[0005] In order to effectively exhibit the features of the additive method, various proposals have been made on an electroless plating adhesive and a plating resist. For example, JP-A-61-276875, JP-A-2-188992, US
P. 5055321 and the like propose a printed wiring board using a photosensitive adhesive for electroless plating in which a heat-resistant resin fine powder is dispersed in a photosensitive resin matrix. According to the technology according to this proposal, it is possible to provide a printed wiring board that is excellent in peel strength even in wiring with higher density and higher pattern accuracy.

Japanese Patent Application Laid-Open No. Hei 6-317904 proposes a wiring board using a resist composition comprising a cresol novolak type epoxy resin acrylate and an imidazole hardener as a plating resist. According to the technology according to this proposal, it is possible to provide a printed wiring board having excellent reliability such as heat resistance and alkali resistance even in a fine pattern.

Further, Japanese Patent Laid-Open No. 7-34048 (USP)
No. 5,519,177) proposes a printed wiring board using a composite resin of cresol novolak type epoxy resin and PES as an adhesive layer for electroless plating. According to the technology according to this proposal, it is possible to provide a printed wiring board that is excellent in peel strength even in wiring with higher density and higher pattern accuracy.

[0008]

However, even if such improvements are made, the build-up multilayer wiring board will not
When a chip is mounted and exposed to heat cycle conditions, cracks occur in the adhesive layer for electroless plating, which is the interlayer resin insulation layer, starting from the boundary between the plating resist and the conductor circuit adjacent to the plating resist. There was a problem (see Figure 16). Furthermore, even for a wiring board on which a plating resist is not formed, if the adhesion between the conductor layer and the adhesive layer for electroless plating formed by coating on the conductor layer is insufficient, heat cycle conditions When exposed to water, there is a problem that cracks occur in the adhesive layer starting from the interface between the conductor layer and the adhesive layer for electroless plating.

A main object of the present invention is to provide a multilayer printed wiring board having excellent heat cycle characteristics capable of suppressing cracks generated in an adhesive layer for electroless plating starting from an interface between a conductor layer and a resin layer. To provide. Another object of the present invention is to propose a method capable of advantageously producing the multilayer printed wiring board.

[0010]

Means for Solving the Problems The present inventors have conducted intensive studies for realizing the above object. As a result, the inventors
The cracks generated during the heat cycle are caused by a difference in thermal expansion coefficient between the plating resist and the conductor layer, or a difference in thermal expansion coefficient between the conductor layer and the adhesive layer for electroless plating formed by covering the conductor layer. As a result, the present invention as described below has been completed.

That is, the gist configuration of the multilayer printed wiring board of the present invention is as follows. . In a multilayer printed wiring board in which conductor layers and interlayer resin insulation layers are alternately laminated, the interlayer resin insulation layer is composed of an adhesive layer for electroless plating and a high toughness resin layer. This is a multilayer printed wiring board. . In a multilayer printed wiring board in which conductor layers and interlayer resin insulation layers are alternately laminated, the interlayer resin insulation layer is
A multilayer printed wiring board comprising an electroless plating adhesive layer, a high-toughness resin layer, and a lower adhesive layer. . The upper conductive layer and the lower conductive layer are connected to each other via via holes provided in the interlayer resin insulating layer, and the via holes are filled with electroless plating. Or the multilayer printed wiring board described in the above.

[0012] In the above inventions,
It is desirable that the interlayer resin insulating layer is formed by sequentially laminating a lower adhesive layer, a high-toughness resin layer, and an adhesive layer for electroless plating from the substrate side. The resin constituting the high toughness resin layer desirably has a glass transition temperature (hereinafter, simply referred to as Tg point) of 160 ° C. or more and a breaking elongation at 25 ° C. of 6% or more (hereinafter, breaking elongation). The degree was measured at 25 ° C. using a rheometric viscoelastic spectrometer). Further, the adhesive layer for electroless plating is a cured heat-resistant resin particle soluble in an acid or an oxidizing agent,
It is desirable to have a layer dispersed in an uncured heat-resistant resin that is hardly soluble in an acid or an oxidizing agent.

A method for manufacturing a multilayer printed wiring board according to the present invention is as follows. . In manufacturing a multilayer printed wiring board, at least the following steps (1) to (4), namely, (1) a step of forming a high toughness resin layer on a lower conductive layer of a substrate, (2) the high toughness resin Forming an adhesive layer for electroless plating on the layer, (3)
Providing an opening for forming a via hole therethrough for the adhesive layer for electroless plating and the tough resin layer,
(4) a step of forming an upper conductor layer and a via hole by performing electroless plating to provide a method of manufacturing a multilayer printed wiring board.

[0014] In manufacturing a multilayer printed wiring board, at least the following steps (1) to (4), that is, (1) a lower adhesive layer is formed on a lower conductor layer of a substrate, and a high toughness resin layer is formed thereon. A step of sequentially laminating, (2) a step of forming an adhesive layer for electroless plating on the high toughness resin layer, (3) an adhesive layer for electroless plating, a high toughness resin layer and a lower adhesive layer. A method for producing a multilayer printed wiring board, comprising: a step of providing an opening for forming a via hole penetrating these; and (4) a step of applying an electroless plating to form an upper conductor layer and a via hole. .

[0015] In manufacturing a multilayer printed wiring board, at least the following steps (1) to (4), namely, (1) forming an uncured electroless plating adhesive layer on one surface of a high toughness resin film and Forming an uncured lower adhesive layer on the surface of (2) on the lower conductor layer of the substrate, laminating the high toughness resin film so that the lower adhesive layer contacts the substrate side, pressurizing and (3) providing an opening for forming a via hole through the adhesive layer for electroless plating, the high-toughness resin layer and the lower adhesive layer, and (4) electroless. Forming a conductor layer and a via hole by plating, and a method of manufacturing a multilayer printed wiring board.

In the method of the invention described above, first, an opening for forming a via hole is filled with electroless plating to form a via hole, and then a catalyst core is formed on the adhesive layer for electroless plating. It is desirable to form the upper conductor layer by applying and electroless plating. The opening for forming the via hole is desirably provided by laser light or oxygen plasma.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention relates to a build-up multilayer printed wiring board in which conductor layers and interlayer resin insulating layers are alternately laminated, wherein the interlayer resin insulating layer is formed of an "electroless plating adhesive layer ( It is characterized by comprising an "upper adhesive layer) and a high toughness resin layer" or an "electroless plating adhesive layer (upper adhesive layer), a high toughness resin layer and a lower adhesive layer".

In such a multilayer printed wiring board, the adhesive layer for electroless plating constituting the interlayer resin insulating layer is provided via the “high toughness resin layer” or the “high toughness resin layer and the lower adhesive layer”. Is laminated on the lower conductive layer and the plating resist adjacent to the conductive layer. Therefore, according to the present invention, the stress generated in the adhesive layer for electroless plating on the boundary between the conductor layer and the plating resist adjacent to the conductor layer during the heat cycle is absorbed by the high toughness resin layer. In addition, the occurrence of cracks in the adhesive layer for electroless plating can be suppressed. Further, even when cracks occur in the electroless plating adhesive layer starting from the interface between the upper conductive layer formed on the electroless plating adhesive layer and the plating resist adjacent to the conductive layer, Since the progress of the crack stops in the high toughness resin layer, the crack does not reach the lower conductor layer. As described above, according to the present invention, the occurrence of cracks can be suppressed, and even if a crack occurs, its progress can be suppressed.

In the present invention, the high toughness resin layer has a higher breaking elongation than the resin constituting the adhesive layer for electroless plating, and has a Tg point of 160 ° C. or higher.
The elongation at break at 25 ° C. is preferably 6% or more. This high toughness resin layer is desirably selected from, for example, a polyimide resin layer or a thermoplastic resin layer. These are high in toughness and large in fracture elongation, so that they can sufficiently absorb stress.

The polyimide resin preferably has both an imide structure and a biphenyl structure. Polyimide resin of such a structure is excellent in chemical resistance such as alkali resistance,
This is because the elongation at break is as high as 60%. The Tg point is 300
° C or higher and excellent in heat resistance. As the thermoplastic resin, polyether sulfone (PES, elongation at break:
40-80%, Tg point: 215 ° C, polysulfone (PS,
Elongation at break: 50-100%, Tg point: 100 ° C), polyphenylene ether (PPE, elongation at break: 50%, Tg point: 207)
° C), polyphenylene sulfone (PPES, elongation at break: 60-120%, Tg point: 205 ° C), polyethylene terephthalate (PET, elongation at break: 15%, Tg point: 69 ° C)
and so on.

The high toughness resin layer has a thickness of 1 to 50 μm.
m is desirable. The reason for this is that if it is too thin, the effect of suppressing cracks decreases, while if it is too thick, the aspect ratio of the via hole opening becomes large, and plating becomes difficult.

In the present invention, the lower adhesive layer has a high toughness in order to improve the adhesiveness between the lower conductive layer on the substrate side and the high toughness resin layer / adhesive layer for electroless plating laminated thereon. It is provided between the resin layer and the lower conductor layer.

As the lower adhesive layer, various epoxy resins, polyimide resins, bismaleimide triazine resins and the like can be used, and an alicyclic epoxy resin is particularly desirable. The reason is that the alicyclic epoxy resin can prevent the signal propagation delay since the dielectric constant can be set to 4 or less, and the elongation at break is larger than that of the cresol novolac type epoxy resin.

As the alicyclic epoxy resin, Araldite CY179 (manufactured by Ciba-Geigy) and EPICLON HP-7200 having a dicyclopentadiene structure (manufactured by Dainippon Ink Co., Ltd.) are preferred. EPICLON HP-7200 is the following (Chemical 1)
The resin has the following structural formula, a dielectric constant of 3.41 as low as polyimide, and a relatively high elongation at break of 4.6%.

[0025]

Embedded image

For the lower adhesive layer, a composite material of an alicyclic epoxy resin and a silicone resin can be used. The reason for this is that the toughness can be improved and the dielectric constant does not increase even if the composite is formed.

This lower adhesive layer has a thickness of 0.1 to 30
μm is desirable. The reason is that if it is too thin, it will be difficult to adhere to the inner conductor layer on the substrate side, and if it is too thick, the aspect ratio of the via hole opening will be large, and plating will be difficult to attach.

In the present invention, the surface of the lower conductor layer which comes into contact with such a high toughness resin layer or lower adhesive layer may be subjected to a roughening treatment in order to improve the adhesion. As the roughening treatment, electroless plating for forming a needle-like alloy composed of copper-nickel-phosphorus, oxidation (blackening) treatment, oxidation (blackening) -reduction treatment, and etching treatment (manufactured by MEC Corporation,
"Mech etch bond CZ" etc.).

The thickness of the roughened layer formed by such a roughening treatment is desirably 1 to 5 μm. The reason is that if it is too thick, the roughened layer itself is easily damaged and peeled off, and if it is too thin, the adhesion is reduced.

This roughened layer is desirably covered with a metal layer or a noble metal layer having an ionization tendency larger than copper and equal to or lower than titanium. This is because, when roughening the interlayer resin insulating layer with an acid or an oxidizing agent, the roughened layer on the conductor surface causes a local electrode reaction due to the acid or the oxidizing agent to prevent the conductor from being dissolved. . Such metals include titanium, aluminum, zinc, iron, indium,
It is desirable to use at least one selected from thallium, cobalt, nickel, tin, lead and bismuth. It is desirable to use gold, silver, platinum, and palladium as the noble metal. Of these metals, tin is particularly advantageous because it can form a thin layer by electroless displacement plating and can follow a roughened layer. The thickness of such a metal layer or a noble metal layer is preferably 0.1 to 2 μm.

In the present invention, the adhesive layer for electroless plating is not particularly limited. However, the cured heat-resistant resin particles soluble in an acid or an oxidizing agent are not hardened in an acid or an oxidizing agent. It is desirable to use a layer composed of a layer dispersed in a conductive resin.

Here, the heat-resistant resin particles have an average particle size.
Heat-resistant resin powder of 10 μm or less, aggregated particles obtained by aggregating heat-resistant resin powder having an average particle size of 2 μm or less, heat-resistant powder resin particles having an average particle size of 2 to 10 μm and heat-resistant resin having an average particle size of 2 μm or less Mixture with powder, average particle size 2μm ~
It is desirable to select from pseudo particles obtained by adhering at least one of a heat-resistant resin powder having an average particle diameter of 2 μm or less and an inorganic powder to the surface of a 10 μm heat-resistant resin powder. This is because they can form more complex anchors. Epoxy resin, amino resin (melamine resin, urea resin, guanamine resin) and the like can be used as the heat resistant resin particles.

Examples of the uncured heat-resistant resin which is hardly soluble in an acid or an oxidizing agent include various epoxy resins such as a cresol novolak type epoxy resin and a bisphenol type epoxy resin, a polyimide resin, a bismaleimide triazine resin and the like. Alicyclic epoxy resins are preferred. This is because the alicyclic epoxy resin has a relatively high elongation at break and a low dielectric constant as described above.

This adhesive layer for electroless plating preferably has a thickness of about 2 to 50 μm. The reason is,
If the thickness is too small, the adhesion strength is reduced. On the other hand, if the thickness is too large, the aspect ratio of the opening for the via hole is increased, and plating is difficult to be formed.

In the present invention, when an epoxy resin is used as a resin component of the lower adhesive layer and the adhesive layer for electroless plating, an amine-based curing agent, an imidazole-based curing agent may be used as a curing agent for the epoxy resin. Agents, acid anhydrides and the like can be used. Among them, an imidazole-based curing agent is preferably used. As this imidazole curing agent, 2
-Methylimidazole (product name 2MZ), 4-methyl-2
-Ethylimidazole (product name 2E4MZ), 2-phenylimidazole (product name 2PZ), 4-methyl-2-phenylimidazole (product name 2P4MZ), 1-benzyl-
2-methylimidazole (product name 1B2MZ), 2-ethylimidazole (product name 2EZ), 2-isopropylimidazole (product name 2IZ), 1-cyanoethyl-2-methylimidazole (product name 2MZ-CN), 1-cyanoethyl-2-ethyl- 4-methylimidazole (product name 2E4
MZ-CN), 1-cyanoethyl-2-undecylimidazole (product name C ₁₁ Z-CN) and the like.

Particularly, in the present invention, a curing agent which is liquid at 25 ° C. is preferably used. The reason is that, since a solventless resin is used, it is difficult to knead the powder uniformly, and the liquid can be kneaded more uniformly. As a liquid imidazole curing agent,
Examples thereof include 1-benzyl-2-methylimidazole (product name 1B2MZ), 1-cyanoethyl-2-ethyl-4-methylimidazole (product name 2E4MZ-CN), and 4-methyl-2-ethylimidazole (product name 2E4MZ).

The amount of the imidazole curing agent to be added is preferably 0.1 to 8% by weight based on the solid content of the resin. The reason is that if the added amount of the curing agent exceeds 5% by weight, the hygroscopicity increases and insulation failure occurs, while if less than 0.1% by weight, the effect of the curing agent is small.

In the present invention, the lower adhesive layer and the adhesive layer for electroless plating preferably have a dielectric constant of 4 or less. The reason is that if the dielectric constant is set to 4 or less, propagation delay can be prevented. The adjustment of the dielectric constant can be performed by appropriately selecting from the above-described resins.

In the multilayer printed wiring board of the present invention,
The upper conductor layer and the lower conductor layer are connected to each other through via holes provided in the above-mentioned interlayer resin insulation layer. In the present invention, it is desirable that the inside of the via hole is filled with electroless plating. The reason is that, according to electroless plating, a via hole having a small diameter of 50 μm or less can be formed, and furthermore, another via hole can be formed on the via hole because the surface of the via hole is flattened, thereby further increasing the density. This is because realization becomes possible.

In the present invention, the wiring board on which the conductor layer is formed is a so-called full additive wiring in which a plating resist is formed on an adhesive layer for electroless plating and a conductor layer is formed on a portion where the plating resist is not formed. Preferably, it is a substrate. This is because the present invention is a proposal for effectively preventing cracks generated in an interlayer resin insulating layer of a wiring board having such a plating resist.

Next, a method for manufacturing the multilayer printed wiring board of the present invention will be described. In the manufacturing method of the present invention, as a method of forming an interlayer resin insulating layer on a substrate, for example, A method of sequentially laminating a high toughness resin layer and an adhesive layer for electroless plating on a substrate; An uncured adhesive layer for electroless plating is formed on one surface of the high-toughness resin film, and an uncured lower adhesive layer is formed on the other surface, and the film is heated together with a substrate having a conductor layer. There is a method that adopts a method of pressing and integrating.

(About the manufacturing method of the multilayer printed wiring board including the method) (1) First, a wiring board having an inner layer copper pattern formed on the surface of a core board is manufactured. The copper pattern is formed on the core substrate by etching the copper-clad laminate, or by forming an adhesive layer for electroless plating on a substrate such as a glass epoxy substrate, polyimide substrate, ceramic substrate, or metal substrate. Then, there is a method in which the surface of the adhesive layer is roughened to a roughened surface, and electroless plating is performed thereon. Further, if necessary, an adhesive layer for electroless plating is formed on the wiring substrate, an opening for a via hole is formed in this layer, the surface of the layer is roughened, and electroless plating is performed thereon to form a copper pattern and a via. By repeating the step of forming holes, a multilayer wiring board can be obtained.

A through hole is formed in the core substrate, and the front and rear wiring layers can be electrically connected via the through hole. In addition, between the copper pattern (conductor layer) of the core substrate and the inside of the through hole, a bisphenol-type epoxy resin or a filling resin composed of bisphenol-type epoxy resin and inorganic particles is filled,
The substrate surface can be smoothed.

Further, by forming a roughened layer on the inner wall of the through hole and on the surface of the conductor layer, a filling resin, an adhesive layer,
Adhesion with the high toughness resin layer can be improved. As a method of forming the roughened layer, there is a method of performing etching, polishing, oxidation-reduction or electroless plating on the surface of the conductor circuit. Among them, a method of electroless plating is desirable. Specifically, the solution composition of the electroless plating has a copper ion concentration, a nickel ion concentration, and a hypophosphite ion concentration of 2.2 × 10 ⁻² to 4.1 × 10 ⁻² mol / l and 2.2 × 10 ⁻² mol / l, respectively.
It is desirably 10 ⁻³ to 4.1 × 10 ⁻³ mol / l and 0.20 to 0.25 mol / l. This is because the crystal structure of the film deposited in this range has a needle-like structure and is excellent in the anchor effect. In addition, you may add a complexing agent and an additive in addition to the said compound to an electroless plating bath.

In the oxidation-reduction treatment, after the oxidation treatment using an oxidizing agent solution comprising sodium chlorite, sodium hydroxide and sodium phosphate, the substrate is immersed in a solution comprising sodium hydroxide and sodium borohydride. It is desirable to do. Specifically, Na is used as an oxidation bath (blackening bath).
OH (10 g / l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l)
/ L) and NaOH (10 g / l), NaBH
It is desirable to use ₄ (5 g / l).

(2) Next, a high toughness resin layer is provided on the wiring board on which the inner layer copper pattern is formed. In the present invention, a high toughness resin layer may be provided directly on the wiring substrate, or a high toughness resin layer may be provided via a lower adhesive layer. When directly providing a high toughness resin layer, by applying a solution of the above high toughness resin on the wiring board, and then drying and curing,
In addition, a high toughness resin layer can be formed by placing a high toughness resin film on a wiring board and then curing the film by applying heat and pressure.

On the other hand, when the high toughness resin layer is provided via the lower adhesive layer, a resin solution to be the lower adhesive layer is applied on the wiring substrate by a spin coater, a roll coater, a curtain coater, etc., and dried. The lower adhesive layer and the high toughness resin layer are formed by placing the high toughness resin film described above on the B stage state and curing the lower adhesive layer and the resin of the film by heating and pressing. Can be. The heating temperature and pressure conditions at this time vary depending on the resin component of the lower adhesive layer and the type of high toughness resin,
When the alicyclic epoxy resin described above is used as the resin component of the lower adhesive layer and the polyimide resin is used as the high toughness resin layer, the temperature is preferably 1 to 100 kg / cm ² at 150 to 200 ° C.

(3) Next, an adhesive layer for electroless plating is provided on the wiring board provided with the high toughness resin layer in (2). The adhesive layer for electroless plating is formed by applying an uncured adhesive solution for electroless plating on a high toughness resin layer of a wiring board with a roll coater or a curtain coater, and then drying and curing the solution. By applying an uncured electroless plating adhesive solution to a polyethylene terephthalate film or the like on the high toughness resin layer and drying it to form a B stage, and curing by heating and pressing,
It is formed.

The solvent of the resin solution or the adhesive solution used for forming the lower adhesive layer and the adhesive layer for electroless plating is alcohol such as methanol and ethanol, diethylene glycol dimethyl ether (D
Preferred are glycol ether solvents such as MDG), triethylene glycol dimethyl ether (DMTG), N-methylpyrrolidone (NMP), and hot NMP.

(4) Next, a via penetrating the “adhesive layer for electroless plating—high toughness resin layer” or the “adhesive layer for electroless plating—high toughness resin layer—lower adhesive layer” An opening for forming a hole is provided. For this opening, a laser beam such as a carbon dioxide gas laser, an ultraviolet laser, an excimer laser, or oxygen plasma can be used. When using oxygen plasma, after covering with a metal mask that has a perforated part called a conformal mask,
Ashing the interlayer resin insulating layer by oxygen plasma.

(5) In the case of the full additive method, the surface of the adhesive layer for electroless plating is roughened if necessary, and then a catalyst nucleus is provided to form a plating resist. Electrolytic plating is performed to form a conductor layer and a via hole. Also, in the case of the semi-additive method, after roughening the surface of the adhesive layer for electroless plating as necessary, a catalyst nucleus is provided, and the entire surface is subjected to electroless plating to form a conductor layer and a via hole. Then, furthermore, a plating resist is formed on a portion where no pattern is formed, and electrolytic plating is performed to thicken a wiring pattern and a via hole.
The wiring pattern is made independent by removing the plating resist and performing etching.

In this step, the surface of the adhesive layer for electroless plating can be roughened with an acid, an oxidizing agent, or the like, and a roughened metal foil or the like can be pressed and etched. By removing it, the surface of the adhesive layer for electroless plating can be roughened. In particular, the above-mentioned "adhesive for electroless plating, in which cured heat-resistant resin particles soluble in an acid or an oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or an oxidizing agent", was used. In this case, since the heat-resistant resin particles are selectively removed with an acid or an oxidizing agent after curing, an anchor can be formed, and good adhesion to the electroless plating film can be obtained, which is advantageous.

Examples of the acid include phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and it is particularly preferable to use organic acids. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

This roughening treatment may be performed before or after the formation of the opening for forming the via hole. However, when the roughening treatment is performed after the formation of the opening, the wall surface of the via hole is roughened, and the adhesive layer and the conductor layer are formed. This is advantageous because it has excellent adhesion to the layer.

In this step, it is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus. Generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

In this step, a commercially available dry film can be used as the plating resist, and a resin obtained by acrylizing a novolak type epoxy resin such as a cresol novolak type epoxy resin or a phenol novolak type epoxy resin with methacrylic acid or acrylic acid is used. It is desirable to use a photosensitive resin composition comprising an imidazole curing agent. The reason is that such a photosensitive resin composition is excellent in resolution and base resistance.

In the case where the via hole forming opening is filled with electroless plating to form a so-called filled via, before providing a catalyst nucleus on the adhesive layer for electroless plating, a via hole forming opening is formed. The surface of the lower conductor layer exposed from the opening is treated with an acid to be activated and immersed in an electroless plating solution. Then, after filling the opening for forming the via hole by plating, a catalyst nucleus is provided on the adhesive layer for electroless plating, a plating resist is provided, and electroless plating is performed to provide a conductor layer. In the via hole formed by filling with such a plating film, another via hole can be formed immediately above the via hole, so that the diameter and the density of the wiring board can be reduced (see FIG. 12). .

In this step, the electroless plating solution for forming the conductor layer and the via hole is not particularly limited, but an electroless plating solution comprising copper ions, trialkanolamine, a reducing agent, and a pH adjuster is used. It is advantageous.
The reason is that an electroless plating solution having such a composition can realize high-speed plating. The trialkanolamine is triethanolamine, triisopanolamine,
Desirably, it is at least one selected from trimethanolamine and tripropanolamine. Because it is water-soluble. The reducing agent is desirably at least one selected from aldehyde, hypophosphite, borohydride, and hydrazine. This is because it is water-soluble and has a reducing power under basic conditions. The pH adjuster is desirably at least one selected from sodium hydroxide, potassium hydroxide and calcium hydroxide.

As means for improving the adhesion between the conductor layer and the adhesive layer for electroless plating, alloy plating using at least two kinds of metal ions selected from copper, nickel, cobalt and phosphorus is used for primary plating. Given as
Thereafter, there is a method of applying copper plating as secondary plating.
This is because these alloys have high strength and can improve peel strength.

(6) The above-mentioned steps (1) to (5) are repeated as necessary to form a multilayer, thereby producing a multilayer wiring board. (7) After manufacturing the multilayer wiring board, a solder resist composition is applied to both sides of the wiring board. Commercially available solder resist compositions can be used, but a photosensitive resin consisting of a resin obtained by acrylizing a novolak type epoxy resin such as cresol novolak type epoxy resin or phenol novolak type epoxy resin with methacrylic acid or acrylic acid and an imidazole curing agent It is desirable to use a composition. The reason is that such a photosensitive resin composition can prevent migration of Pb. Before applying the solder resist composition, the surface of the conductor layer may be roughened. Thereby, the adhesion between the solder resist layer and the conductor layer is improved.

(8) An opening exposing the pad portion is formed on the solder resist coating film applied in (7) by exposure and development, and the coating film is thermally cured. Then, a metal layer such as "nickel-gold" is formed on the pad portion, and a solder body is supplied thereon.

(About the manufacturing method of the multilayer printed wiring board including the method) This manufacturing method is the same as the above-described manufacturing method including the method, except that the method of forming the interlayer resin insulating layer is different. (1) An uncured lower adhesive layer is provided on one surface of the above-described high toughness resin film, and an uncured adhesive layer for electroless plating is provided on the other surface. Specifically, first, the above-mentioned resin solution to be the lower adhesive layer is applied to one surface of the high toughness resin film, and then dried to be in the B-stage state. Next, a solution of an adhesive for electroless plating is applied to the opposite surface of the high-toughness resin film, and the solution is dried to obtain a B-stage state. In addition, as a coating method, a roll coater or a curtain coater can be used.

(2) Step (1) of the above production method including the method
On the wiring board manufactured in the same manner as above, the high toughness resin film is placed so that the lower adhesive layer contacts the board side,
Pressurizing and heat curing to integrate. The heating temperature and pressure conditions at this time vary depending on the resin component of the lower adhesive layer and the type of the high toughness resin, but the alicyclic epoxy resin described above is used as the resin component of the lower adhesive layer, and the high toughness resin is used. When using a polyimide resin film as the layer, 15
At 0 to 200 ° C., the pressure is preferably 1 to 100 kg / cm ² .

(3) In the same manner as the above manufacturing method including the method, an opening for forming a via hole is provided, and the upper conductor layer and the via hole are formed by electroless plating. Further, after the multilayered structure, a solder resist layer is formed and a solder body is supplied.

In the manufacturing method including such a method, since the interlayer resin insulating layer is formed in one step, the manufacturing time can be reduced, and the method is suitable for mass production. In addition, this manufacturing method is excellent in surface flatness because a film composed of a lower adhesive layer, a high-toughness resin layer, and an adhesive layer for electroless plating is laminated and pressed at the same time. Absent.

Hereinafter, the present invention will be described in detail with reference to examples. Example 1 describes a manufacturing method including a method, and Example 2 describes a manufacturing method including a method. Further, reference numerals in the embodiments are reference numerals in the drawings.

[0067]

【Example】

Example 1 (1) 18 μm on both sides of a substrate made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm
Was used as a starting material. First, the copper-clad laminate is drilled to form a plating resist, and then subjected to electroless plating to form through-holes 3. Further, the copper foil is etched in a pattern according to a conventional method to obtain a substrate. An inner copper pattern 2 was formed on both surfaces of the first substrate 1 (see FIG. 1).

(2) On the other hand, bisphenol F type epoxy monomer (manufactured by Yuka Shell, molecular weight 310, trade name: YL983U)
100 parts by weight and 6 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals Co., Ltd.) were mixed, and the mixture was further coated with a silane coupling agent on the surface at an average particle size of 1.6 μm. SiO ₂ spherical particles (manufactured by Admatech, CRS 1101-CE, where the maximum particle size is not more than the thickness (15 μm) of the inner layer copper pattern described later) 170 parts by weight, defoaming agent (manufactured by San Nopco, Perenol S4) By mixing 0.5 parts by weight and kneading with a three-roll mill, the viscosity of the mixture was adjusted to 45,000 to 49,000 cps at 23 ± 1 ° C. to obtain a resin filler 4 for smoothing the substrate surface. .

(3) The substrate on which the inner layer copper pattern 2 was formed in the above (1) was washed with water and dried, and then NaOH (10 g / l) and Na
ClO ₂ (40 g / l) and Na ₃ PO ₄ (6 g / l) were used as an oxidation bath (blackening bath), and a roughened layer 5 was provided on the entire surface of the conductor layer 2 and the through hole 3 (see FIG. 2). ).

(4) Next, the resin filler 4 obtained in the above (2) is applied to one surface of the substrate by using a roll coater to fill the space between the conductor circuits 2 or into the through holes 3.
Drying was performed at 70 ° C. for 20 minutes. Further, the resin filler 4 obtained in the above (2) is applied to the other surface of the substrate by using a roll coater to fill the space between the conductor circuits 2 or the inside of the through-holes 3 and then at 70 ° C. for 40 minutes. It was dried by heating.

(5) The surface of the inner layer copper pattern 2 and the through holes 3 are formed on one surface of the substrate after the treatment of the above (4) by belt sanding using # 600 belt polishing paper (manufactured by Sankyo Rikagaku). Polishing was performed so that the resin filler 4 did not remain on the land surface, and then buffing was performed to remove scratches due to the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, a heat treatment was performed at 100 ° C. for 1 hour, at 120 ° C. for 3 hours, at 150 ° C. for 1 hour, and at 180 ° C. for 7 hours to cure.

In this way, the surface layer of the resin filler 4 filled in the through-holes 3 and the like and the roughened layer 5 on the upper surface of the conductor circuit 2 are removed to smooth both surfaces of the substrate. 2 firmly adheres to the side surface via the roughened layer 5,
In addition, a wiring board in which the inner wall surface of the through hole 3 and the resin filler 4 were firmly adhered to each other via the roughened layer 5 was obtained.

(6) The conductor circuit 2 exposed by the process (5)
And 2.5μm thick Cu on the land surface of through hole 3
A roughened layer 5 made of a -Ni-P alloy was formed, and a Sn layer (not shown) having a thickness of 0.3 µm was formed on the surface of the roughened layer 5 (see Fig. 2). The forming method is as follows. That is, the substrate is acid-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to provide a Pd catalyst. After activating this catalyst, copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g
/ L, sodium hypophosphite 29g / l, boric acid 31g /
l, a surfactant is plated in an electroless plating bath consisting of 0.1 g / l and pH = 9 to form a roughened layer 5 of a Cu-Ni-P alloy on all surfaces of the copper conductor circuit 2 and the through holes 3. did. Then, tin borofluoride 0.1mol / l, thiourea 1.0m
A Cu-Sn substitution reaction was performed under the conditions of ol / l, a temperature of 50 ° C., and a pH of 1.2 to provide a 0.3 μm thick Sn layer on the surface of the roughened layer 5 (the Sn layer is not shown).

(7) On the other hand, 35 parts by weight of a dicyclopentadiene-modified epoxy resin (trade name: EPICLON HP-7200, manufactured by Dainippon Ink Co., Ltd.) which is an alicyclic epoxy resin, and an imidazole curing agent (Shikoku Chemicals) Product name: 2E4MZ
-CN) 2 parts by weight, defoamer (manufactured by San Nopco, trade name: S
-65) 0.5 parts by weight, and further, an epoxy resin particle (manufactured by Sanyo Chemical Industries, trade name: Polymer Pole) based on these mixtures.
10.3 parts by weight of an average particle size of 3.0 μm and an average particle size of 0.5
After mixing 3.09 parts by weight of
The mixture was mixed while adding 30 parts by weight of (normal methylpyrrolidone), and the viscosity was adjusted to 7 Pa · s with a homodisper stirrer to obtain an adhesive for electroless plating.

(8) A resin used for the lower adhesive layer by dissolving a dicyclopentadiene-modified epoxy resin (trade name: EPICLON HP-7200, manufactured by Dainippon Ink Co., Ltd.) as an alicyclic epoxy resin in DMDG. A solution was obtained.

(9) A polyimide film having a thickness of 25 μm (Ube Industries, trade name: Upilex, elongation at break: 60%, T
(g point: 300 ° C. or more) The resin solution obtained in the above (8) was applied to one surface of (6) and dried at 80 ° C. to form an uncured lower adhesive layer 8 having a thickness of 5 μm. On the other side,
The adhesive for electroless plating obtained in (7) is applied and dried at 60 ° C., and the uncured electroless plating adhesive layer 7 having a thickness of 5 μm 7
Was formed (see FIGS. 3A and 3B).

(10) The polyimide film obtained in the above (9) is placed on both sides of the substrate subjected to the processing up to the above (6) so that the lower adhesive layer 8 comes into contact with the substrate side, and the weight is 20 kg / The lower adhesive layer 8 and the adhesive layer 7 for electroless plating were cured by heating and pressurizing at a pressure of 175 ° C. at a pressure of ² cm ² , and the substrate and the polyimide film were integrated.

(11) On both sides of the substrate after the step (10),
An opening 9 for forming a via hole having an opening diameter of 30 μm for exposing the inner conductor circuit 2 was formed by an excimer laser (see FIG. 5). (12) The substrate in which the openings 9 are formed is immersed in chromic acid for 2 minutes to partially dissolve the epoxy resin particles in the resin matrix, and the surface of the adhesive layer for electroless plating is roughened.
(Roughening depth: 6 μm), and then the substrate was immersed in a neutralizing solution (manufactured by Shipley) and washed with water (see FIG. 6).

(13) Further, the substrate is immersed in an acid to activate the surface of the inner conductor circuit 2 exposed from the opening 9 and immersed in an electroless plating solution having the following composition for about 6 hours. The opening was filled with an electroless plating film to form a so-called “filled via” 11 (see FIG. 7). Metal salt─ CuSO ₄ · 5H ₂ O: 8.6 mM Complexing agent─TEA: 0.15 M Reducing agent─HCHO: 0.02 M Other─Stabilizer (bipyridyl, potassium ferrocyanide, etc.): small amount Precipitation rate is 6 μm / hour

(14) On the other hand, 40
20% by weight of bisphenol A type epoxy prepared by dissolving 100% by weight of a photosensitizing oligomer (molecular weight 4000) obtained by acrylate of 50% of an epoxy group of cresol novolak type epoxy resin (manufactured by Nippon Kayaku) in methyl ethyl ketone Resin (made of Yuka Shell, product name: Epikote 1001) 32
Parts by weight, imidazole curing agent (Shikoku Chemicals, trade name: 2
E4MZ-CN) 3.4 parts by weight, photosensitive monomer polyvalent acrylic monomer (Nippon Kayaku, trade name: R604) 6.4 parts by weight, also photosensitive monomer polyvalent acrylic monomer (manufactured by Kyoeisha Chemical, trade name: 3.2 parts by weight of DPE6A) were mixed, and 0.5 part by weight of a leveling agent (manufactured by Kyoeisha Chemical Co., Ltd., trade name: Polyflow 75) was mixed with 100 parts by weight of the mixture and stirred to obtain a mixed solution A. Further, 4.3 parts by weight of benzophenone (Kanto Chemical) as a photoinitiator and 0.4 parts by weight of Michler's ketone (Kanto Chemical) as a photosensitizer were added.
The mixture was dissolved in 6.4 parts by weight of diethylene glycol dimethyl ether (DMDG) heated to 40 ° C. to obtain a mixture B. Then, the mixed liquid A and the mixed liquid B were mixed and stirred to obtain a liquid resist.

(15) A palladium catalyst (manufactured by Atotech) was applied to the roughened surface 10 formed on the interlayer resin insulating layer (adhesive layer) on the substrate surface to attach a catalyst core. (16) The liquid resist was applied on both sides of the substrate provided with the catalyst nucleus in the above (15) using a roll coater and dried at 60 ° C. for 30 minutes to form a resist layer having a thickness of 30 μm. (17) A photomask film was placed on the resist layer and exposed to ultraviolet light of 400 mJ / cm ² . Next, the photomask film was removed, the resist layer was dissolved and developed with DMTG to form a plating resist on the substrate where the conductive circuit pattern portion was removed, and further exposed to 6000 mJ / cm ² using an ultra-high pressure mercury lamp, Heat treatment was carried out at a temperature of 150 ° C. for 1 hour and then at 150 ° C. for 3 hours to form a permanent resist 12 on the interlayer resin insulation layer (see FIG. 8).

(18) The substrate on which the permanent resist 12 was formed in the above (17) was subjected to primary plating using an electroless copper-nickel alloy plating bath having the following composition, and the portion where no resist was formed had a thickness of about 1.7 μm. Of a copper-nickel-phosphorous plating thin film was formed. At this time, the temperature of the plating bath was 60 ° C., and the plating immersion time was 1 hour. Metal salt─CuSO ₄ · 5H ₂ O: 6.0 mM (1.5 g / l) ─NiSO ₄ · 6H ₂ O: 95.1 mM (25 g / l) Complexing agent─Na ₃ C ₆ H ₅ O ₇ : 0.23 M (60 g / L) Reducing agent─NaPH ₂ O ₂ · H ₂ O: 0.19M (20 g / l) pH adjuster─NaOH: 0.75M (pH = 9.5) Stabilizer─Lead nitrate: 0.2 mM (80 ppm) Surfactant: 0.05 g / l Precipitation rate is 1.7 μm / hour

(19) The substrate subjected to the primary plating is lifted from the plating bath, and the plating bath attached to the surface is washed away with water, and then treated with an acidic solution to obtain a copper-free substrate.
The oxide film on the surface of the nickel-phosphorus plating thin film was removed. And, without performing Pd substitution on the substrate,
An activation treatment is performed with a pretreatment solution described in the international patent application of International Publication No. WO96 / 20294, and a secondary plating is performed on the copper-nickel-phosphorus plating thin film using an electroless copper plating bath having the following composition. did. Thus, an inner conductor pattern 13 required as a conductor layer by the additive method was formed (see FIG. 9). At this time, the temperature of the plating bath was 50 to 70 ° C., and the plating immersion time was 90 to 360 minutes. Metal salts _{... CuSO 4 · 5H 2 O:} 8.6 mM Complexing agent ... TEA: 0.15 M reducing agent ... HCHO: 0.02 M Others ... stabilizer (bipyridyl, potassium ferrocyanide and the like): a small amount deposition rate, 6 [mu] m / Time

(20) After the conductive layer 13 is formed by the additive method in this manner, one surface of the substrate is subjected to belt sander polishing using # 600 belt polishing paper to remove the copper from the surface of the permanent resist 12 and the via hole. Was polished until the top surface (the surface of the conductor layer 13) was aligned, and then buffing was performed to remove the scratches caused by the belt sander polishing (only buffing may be performed). Then, the other surface was similarly polished to form a printed wiring board having both surfaces smooth.

(21) Then, a roughened layer 14 is formed on the surface of the inner conductor pattern 13 by plating a needle-like alloy of copper-nickel-phosphorus (see FIG. 10).
An upper layer conductor pattern 15 was further formed by the additive method, and a wiring layer was built up in this way to manufacture a multilayer printed wiring board having six layers on both sides (FIG.
11).

(22) On the other hand, 60
50% by weight of cresol novolac epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) 46.67 parts by weight of a photosensitizing oligomer (molecular weight 4000) acrylated with 50% of epoxy groups, and 80% by weight of bisphenol A type epoxy dissolved in methyl ethyl ketone Resin (made of Yuka Shell, product name: Epikote 1001)
15.0 parts by weight, 1.6 parts by weight of imidazole curing agent (manufactured by Shikoku Chemicals, trade name: 2E4MZ-CN), 3 parts by weight of polyacrylic monomer (Nippon Kayaku, trade name: R604) which is a photosensitive monomer, also polyvalent 1.5 parts by weight of an acrylic monomer (manufactured by Kyoeisha Chemical, trade name: DPE6A) and 0.71 parts by weight of a dispersion defoaming agent (manufactured by San Nopco, trade name: S-65) are mixed, and a photoinitiator is added to the mixture. 2 parts by weight of benzophenone (manufactured by Kanto Kagaku) and 0.2 parts by weight of Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer were added at a viscosity of 25 ° C.
Thus, a solder resist composition adjusted to 2.0 Pa · s was obtained.

(23) The solder resist composition obtained in the above (22) is applied on both sides of the wiring board after the steps (1) to (21) in a thickness of 20 μm.
m. Then at 70 ° C for 20 minutes, 70 ° C for 30 minutes
After a drying treatment for 1 minute, the substrate was exposed to ultraviolet rays of 1000 mJ / cm ² and developed with DMTG. Further, the pad was heated at 80 ° C. for 1 hour, at 100 ° C. for 1 hour, at 120 ° C. for 1 hour, and at 150 ° C. for 3 hours to open the pad portion (opening diameter 2 mm).
(00 μm) A solder resist layer (thickness: 20 μm) 18 was formed.

(24) Next, the substrate on which the solder resist layer 18 was formed was treated with a pH of 30 g / l of nickel chloride, 10 g / l of sodium hypophosphite, and 10 g / l of sodium citrate.
= 5 for 20 minutes to form a nickel plating layer having a thickness of 5 μm at the opening. Further, the substrate was placed on an electroless gold plating solution comprising 2 g / l of potassium gold cyanide, 75 g / l of ammonium chloride, 50 g / l of sodium citrate, and 10 g / l of sodium hypophosphite at 93 ° C. for 23 seconds. By dipping, a gold plating layer having a thickness of 0.03 μm was formed on the nickel plating layer.

(25) Then, a solder paste is printed on the opening of the solder resist layer 18 to form a solder resist layer.
Solder paste was printed in openings 18 and reflowed at 200 ° C. to form solder bumps 17, thereby producing a multilayer printed wiring board having solder bumps 17 (see FIG. 12).

(Example 2) (1) The resin solution obtained in (8) of Example 1 was applied to both surfaces of the substrate obtained in (1) to (6) of Example 1 by a spin coater.
This is dried at 80 ° C. to be in the B-stage state, and the thickness is 5 μm.
m of the lower adhesive layer 8 was formed (see FIG. 13). (2) 25 μm thick on both sides of the substrate on which the lower adhesive layer 8 is formed.
m polyimide film (trade name: Upilex, breaking elongation: 60%, Tg point: 300 ° C or more) manufactured by Ube Industries, and heated and pressed at a pressure of 20 kg / cm ² and a temperature of 175 ° C for 5 hours. A polyimide layer 6 was formed (see FIG. 14). (3) Example 1 on both sides of the substrate on which the polyimide layer 6 was formed
Apply the electroless plating adhesive obtained in (7) of
After drying at 175 ° C, heat and cure at 175 ° C for 5 hours.
m of the adhesive layer 7 for electroless plating was formed (see FIG. 15). (4) Steps (11) to (20) of Example 1 were performed. (5) The steps (1) to (4) of this example were repeated to obtain a multilayer printed wiring board having six layers on both sides. (6) Then, (22) to (25) of Example 1 were performed to manufacture a multilayer printed wiring board having the solder bumps 17.

(Example 3) A polyethylene terephthalate film having a thickness of 25 µm (manufactured by Toray, elongation at break: 15%, Tg) was used in place of the polyimide film in Example 1 (9).
(Point: 69 ° C.), except that a multilayer printed wiring board having solder bumps 17 was manufactured in the same manner as in Example 1.

Comparative Example 1 (1) 35% by weight of a 25% acrylate of a cresol novolac type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500), polyether sulfone (trade name: PES1010P, manufactured by Mitsui Toatsu)
12 parts by weight, imidazole curing agent (Shikoku Chemicals, trade name:
2E4MZ-CN) 2 parts by weight, caprolactone-modified tris (acroxyethyl) isocyanurate (trade name: Aronix M325, manufactured by Toagosei Co., Ltd.) as a photosensitive monomer, benzophenone (Kanto Chemical) 2 as a photoinitiator
Parts by weight, 0.2 part by weight of Michler's ketone as a photosensitizer (manufactured by Kanto Kagaku), and a mixture of these with an average particle diameter of 3.0 μm of epoxy resin particles (manufactured by Sanyo Chemical Co., trade name: polymer pole) of 10.3 Parts by weight, average particle size 0.5μ
3.09 parts by weight of an antifoaming agent (San Nopco, trade name:
S-65) After mixing 0.5 part by weight, 30 parts by weight of NMP (normal methylpyrrolidone) was added, and the viscosity was 7.0 Pa · s.
To obtain an adhesive for electroless plating. (2) The adhesive for electroless plating obtained in (1) of this embodiment was applied to both surfaces of the substrate obtained in (1) to (6) of Example 1 with a roll coater, and the adhesive was applied in a horizontal state. After standing for 60 minutes, drying was performed at 60 ° C. to form an interlayer resin insulating layer (adhesive layer). (3) A photomask film on which a black circle of 100 μmφ was printed was brought into close contact with both surfaces of the substrate on which the adhesive layer was formed, and was exposed at 500 mJ / cm ² using an ultra-high pressure mercury lamp. This is DMT
A 100 μmφ opening serving as a via hole was formed in the adhesive layer by spray development with the G solution. Further, the substrate is exposed to 3000 mJ / cm ² by an ultra-high pressure mercury lamp, and is subjected to a heat treatment at 100 ° C. for 1 hour and then at 150 ° C. for 5 hours, so that openings having excellent dimensional accuracy equivalent to a photomask film are obtained. An adhesive layer (interlayer resin insulating layer) having a thickness of 50 μm having an opening for forming a via hole) was formed. (4) The substrate having the opening formed in the adhesive layer is immersed in chromic acid for 2 minutes to partially dissolve the epoxy resin particles present in the resin matrix of the adhesive layer, and to clean the surface of the adhesive layer. The surface was roughened (roughening depth: 6 μm), and then immersed in a neutralizing solution (manufactured by Shipley) and then washed with water. (5) By applying a palladium catalyst (manufactured by Atotech) to the substrate treated in the above (4), catalyst nuclei were attached to the surface of the adhesive layer and the inner surface of the via hole opening. (6) A liquid resist prepared according to Example 1 was applied to both sides of the substrate provided with the catalyst nucleus using a roll coater, and dried at 60 ° C. for 30 minutes to form a 30 μm thick resist layer. did. (7) A photomask film was placed on the resist layer and irradiated with ultraviolet rays at 400 mJ / cm ² . Next, the photomask film was removed, and the resist layer was dissolved and developed with DMTG to form a plating resist on the substrate where the conductive circuit pattern was removed, and further exposed to 6000 mJ / cm ² using an ultra-high pressure mercury lamp, Heat treatment was performed at 100 ° C. for 1 hour and then at 150 ° C. for 3 hours to form a permanent resist on the interlayer resin insulating layer. (8) The substrate on which the permanent resist was formed was subjected to electroless plating in the same manner as in Example 1 to form a conductor pattern and a via hole (BVH). (9) After the conductor layer is formed by the additive method in this manner, one surface of the substrate is subjected to belt sander polishing using # 600 belt polishing paper to make contact with the surface of the permanent resist and the conductor upper surface of the conductor layer or via hole. Then, buffing was performed to remove scratches caused by belt sander polishing. Then, the other surface was polished in the same manner to form a multilayer printed wiring board having both surfaces smooth. (10) By repeating the above-mentioned steps, a further conductive layer was formed by the additive method, and the wiring layer was built up in this way to produce a multilayer printed wiring board having six double-sided layers. (11) Then, a solder resist layer and a solder bump were formed according to Example 1, and a multilayer printed wiring board having the solder bump was manufactured.

An IC chip was mounted on the wiring boards manufactured in Examples 1 to 3 and Comparative Example 1, and a heat cycle test was performed 1,000 times at -55 to 125 ° C. As a result, Examples 1 to 3
In the figure, cracks generated in the adhesive layer for electroless plating starting from the boundary between the conductor layer and the plating resist were hardly observed, and even if cracks had occurred, their progress was suppressed by the polyimide layer. It was confirmed that there was no disconnection. On the other hand, in the comparative example, many cracks starting from the boundary between the conductor layer and the plating resist were observed, and the conductor circuit was broken.

In Examples 1 to 3, the breaking elongation of the adhesive for electroless plating was 4.6%, the breaking elongation of the polyimide constituting the high toughness resin layer was 60%, and the breaking elongation of the polyethylene terephthalate was 60%. 15%. Therefore, on the boundary between the conductor layer and the plating resist, the high toughness resin layer having a large breaking elongation can suppress the occurrence of cracks. Further, even when a crack occurs, it is considered that the progress of the crack can be suppressed by the high toughness resin layer having a large fracture elongation. On the other hand, in the comparative example, the fracture elongation of the adhesive for electroless plating is 5.2%, but since the high toughness resin layer does not exist, cracks are generated, and it is impossible to suppress the progress of the cracks. Conceivable.

In Examples 1 to 3, the lower adhesive layer,
Since the adhesive layer for electroless plating uses an alicyclic epoxy resin containing dicyclopentadiene in its structure,
Its dielectric constant is as low as 3.4. On the other hand, in the comparative example, the acrylate of cresol novolak type epoxy resin is used as the adhesive layer for electroless plating, and its dielectric constant is as high as 4.33.

Further, in the present invention, as shown in FIG.
Since the via hole can be connected with high reliability right above the via hole, it is possible to further increase the density of the conductor circuit.

[0097]

As described above, according to the present invention, cracks that occur during a heat cycle can be suppressed.
The dielectric constant of the interlayer resin insulating layer can be reduced, and the density of the conductive circuit can be increased.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view showing each manufacturing process of a multilayer printed wiring board according to Example 1.

FIG. 2 is a partial cross-sectional view showing each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 3 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 4 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 5 is a partial cross-sectional view showing each manufacturing step of the multilayer printed wiring board according to the first embodiment.

FIG. 6 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 7 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 8 is a partial cross-sectional view showing each manufacturing step of the multilayer printed wiring board according to the first embodiment.

FIG. 9 is a partial cross-sectional view showing each manufacturing step of the multilayer printed wiring board according to the first embodiment.

FIG. 10 is a partial cross-sectional view illustrating each manufacturing step of the multilayer printed wiring board according to the first embodiment.

FIG. 11 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 12 is a partial cross-sectional view illustrating each manufacturing process of the multilayer printed wiring board according to the first embodiment.

FIG. 13 is a partial cross-sectional view showing one step in a manufacturing process of the multilayer printed wiring board according to the second embodiment.

FIG. 14 is a partial cross-sectional view showing one step in a manufacturing process of the multilayer printed wiring board according to the second embodiment.

FIG. 15 is a partial cross-sectional view showing one step in a manufacturing process of the multilayer printed wiring board according to the second embodiment.

FIG. 16 is a diagram showing cracks that occur in a multilayer printed wiring board according to the related art.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 substrate 2 inner layer copper pattern 3 through hole 4 resin filler 5 roughened layer 6 polyimide film (high toughness resin layer) 7 adhesive layer for electroless plating 8 lower adhesive layer 9 opening for forming via hole 10 roughened surface 11 Via hole (filled via) 12 Plating resist (permanent resist) 13 Inner layer conductor pattern 14 Roughened layer 15 Upper layer conductor pattern 16 Nickel-gold layer 17 Solder bump 18 Solder resist layer

Claims (11)

[Claims] 1. A multilayer printed wiring board in which conductor layers and interlayer resin insulation layers are alternately laminated, wherein the interlayer resin insulation layer comprises an electroless plating adhesive layer and a high toughness resin layer. A multilayer printed wiring board. 2. A multilayer printed wiring board comprising a conductor layer and an interlayer resin insulation layer alternately laminated, wherein the interlayer resin insulation layer comprises an electroless plating adhesive layer, a high toughness resin layer, and a lower adhesive layer. A multilayer printed wiring board characterized by comprising: 3. An upper conductor layer and a lower conductor layer are connected to each other via via holes provided in an interlayer resin insulating layer, and the via holes are filled with electroless plating. The multilayer printed wiring board according to claim 1 or 2, wherein: 4. The interlayer resin insulation layer according to claim 1, wherein a lower adhesive layer, a high-toughness resin layer, and an adhesive layer for electroless plating are sequentially laminated from the substrate side. Item 14. The multilayer printed wiring board according to Item 1. 5. The resin constituting the high toughness resin layer is T
The multilayer printed wiring board according to any one of claims 1 to 4, wherein g is 160 ° C or more, and elongation at break at 25 ° C is 6% or more. 6. The adhesive layer for electroless plating comprises a cured heat-resistant resin particle soluble in an acid or an oxidizing agent dispersed in an uncured heat-resistant resin hardly soluble in an acid or an oxidizing agent. The multilayer printed wiring board according to any one of claims 1 to 4, comprising a layer comprising: 7. In manufacturing a multilayer printed wiring board, at least the following steps (1) to (4), namely, (1) a step of forming a high toughness resin layer on a lower conductive layer of a substrate; )
Forming an electroless plating adhesive layer on the high toughness resin layer, (3) providing an opening for forming a via hole therethrough to the electroless plating adhesive layer and the high toughness resin layer, (4) A method for producing a multilayer printed wiring board, which comprises a step of applying an electroless plating to form an upper conductor layer and a via hole. 8. In manufacturing a multilayer printed wiring board, at least the following steps (1) to (4), namely, (1) forming a lower adhesive layer on a lower conductive layer of a substrate, A step of sequentially laminating a high toughness resin layer, (2) a step of forming an electroless plating adhesive layer on the high toughness resin layer, (3) an electroless plating adhesive layer, a high toughness resin layer and a lower part. A step of providing an opening for forming a via hole penetrating these in the adhesive layer, and (4) a step of applying electroless plating to form an upper conductor layer and a via hole, Manufacturing method. 9. In producing a multilayer printed wiring board, at least the following steps (1) to (4), ie, (1) an uncured adhesive for electroless plating on one surface of a high toughness resin film. Forming a layer and forming an uncured lower adhesive layer on the other surface, (2) laminating the high toughness resin film on the lower conductor layer of the substrate so that the lower adhesive layer contacts the substrate side (3) providing an opening for forming a via hole that penetrates these for the adhesive layer for electroless plating, the high-toughness resin layer and the lower adhesive layer, (4) A method for producing a multilayer printed wiring board, which includes a step of forming a conductor layer and a via hole by performing electroless plating. 10. A via hole is formed by filling an opening for forming a via hole with electroless plating.
The method according to any one of claims 7 to 9, wherein an upper conductor layer is formed by applying a catalyst core to the electroless plating adhesive layer and performing electroless plating. 11. The method according to claim 7, wherein the opening for forming the via hole is provided by laser light or oxygen plasma.