JPH10242640A - Printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of exfoliation between a conductor circuit and a solder resist layer even at heat cycle or under high temperature, high pressure, and humidity conditions, by forming the conductor circuit on an insulating layer, and constituting the conductor circuit out of an electroless plated film and an electrolytic plated film. SOLUTION: An inner-layer conductor circuit 4 and a through hole 9 are made on both sides of the substrate consisting of glass epoxy resin, and an adhesive layer 2 is made on each inner-layer conductor circuit 4. The surface of the adhesive layer 2 is roughened, and a palladium catalyst is given to it, whereby a catalyst nucleus is given to the surface of the adhesive layer 2 (including the via hole), and then the board 1 is soaked in electroless copper plating bath to form an electroless copper plated film 2 all over the rough face. Furthermore, a photosensitive dry film is stuck to the electroless copper plated film 12d, and a mask is placed on this dry film, and etching treatment is performed to form an electrolytic copper plated film 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly to a printed wiring board having excellent adhesion to a solder resist layer and capable of suppressing peeling of solder bumps.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured by a method disclosed in, for example, Japanese Patent Publication No. 4-55555. That is, on the core substrate, an insulating material made of a photosensitive electroless plating adhesive is applied, and dried and then exposed and developed to form an interlayer insulating material layer having a via hole opening, After roughening the surface of the interlayer insulating material layer by treatment with an oxidizing agent or the like, a plating resist is provided on the roughened surface, and then electroless plating is performed on a non-resist forming portion to form a via hole and a conductor circuit. By forming and repeating such steps a plurality of times, a multilayered build-up wiring board can be obtained.

[0003]

In such a multilayer printed wiring board, when mounting an IC chip or the like,
A solder resist layer is formed on the outer layer to cover the outermost conductive circuit, an opening is formed in the solder resist layer, and a spherical or protruding solder body called a solder bump for mounting an IC chip is formed in the opening. There is a need to.

[0004] However, when a novolak-type epoxy resin which does not easily cause Pb migration is used as a solder resist composition (see Japanese Patent Application No. 8-30 / 1996).
No. 8844) had the drawback that the resin had a rigid skeleton, which easily caused peeling between the conductor circuit and the solder resist layer during heat cycling, high temperature, high pressure, and high humidity conditions. there were.

Further, when an IC chip or the like is mounted on a multilayer printed wiring board via a solder body, an I
There is a problem that stress is applied to the solder body due to a difference in the coefficient of thermal expansion between the C chip and the resin insulating layer, and the solder body peels off from the solder pad.

According to the present invention, the peeling between the conductor circuit and the solder resist layer hardly occurs even during a heat cycle, high temperature, high pressure and humid conditions. An object of the present invention is to provide a printed wiring board that does not peel off from pads (conductor pads).

[0007]

The gist of the present invention is as follows. (1) A conductor circuit is formed on an insulating layer, a roughened layer is formed on at least a part of the surface of the conductor circuit, and the conductor circuit is a printed wiring board covered with a solder resist layer. The printed circuit board is characterized in that the conductor circuit comprises an electroless plating film and an electrolytic plating film. (2) a printed wiring board in which a solder pad is formed on an insulating layer, a roughened layer is formed on at least a part of the surface of the solder pad, and a solder body is formed through the roughened layer; The solder pad is a printed wiring board comprising an electroless plating film and an electrolytic plating film.

[0008]

BEST MODE FOR CARRYING OUT THE INVENTION According to the constitution (1) of the present invention, a roughened layer is formed on at least a part of the surface of a conductor circuit comprising an electroless plating film and an electrolytic plating film formed on an insulating layer, It is characterized in that the conductor circuit is covered with a solder resist layer. In this configuration, the electrolytic plating film is formed on the outer layer side, that is, on the solder resist layer side, and the electroless plating film is formed on the insulating layer side.

As a result, the roughened layer on the surface of the conductive circuit bites into the solder resist layer and firmly adheres thereto, and even when the solder resist layer expands and contracts due to heat cycling, moisture absorption and drying, a soft electrolytic plating film is formed thereon. Because of the following, the solder resist layer does not peel off due to a heat cycle, moisture absorption, and drying.

Further, since the relatively hard electroless plating film is formed on the insulating layer side, the conductive circuit and the insulating layer are firmly adhered (see FIGS. 20 and 21). As a result, the conductor circuit does not peel off from the insulating layer. This adhesion is particularly remarkable when a roughened surface as described later is formed on the surface of the resin insulating layer. This is because the hard plating film penetrates the roughened surface, so that even when a peeling force is applied, destruction is unlikely to occur on the metal side.

According to the configuration (2) of the present invention, a roughened layer is formed on at least a part of a surface of a solder pad formed of an electroless plated film and an electrolytic plated film formed on an insulating layer, and the roughened layer is formed. It is characterized in that a solder body is formed via a layer.
In this configuration, the electrolytic plating film is formed on the outer layer side, that is, on the solder body side, and the electroless plating film is formed on the insulating layer side.

As a result, the solder body is in close contact with the solder pad via the roughened layer, so that the solder body is unlikely to be peeled off even during a heat cycle or under conditions of high temperature, high humidity, and high pressure.

[0013] Even when stress is applied to the solder body,
The stress can be relieved by the soft electrolytic plating film, and since the relatively hard electroless plating film is formed on the insulating layer side, the solder pad and the insulating layer are firmly adhered. As a result, the solder pad does not peel off from the insulating layer. This adhesion is particularly remarkable when a roughened surface as described later is formed on the surface of the resin insulating layer. This is because the hard plating film penetrates the roughened surface, so that even when a peeling force is applied, destruction is unlikely to occur on the metal side.

In the configuration (2) of the present invention, the solder body is formed on a metal layer, for example, a multilayer metal layer such as “nickel-gold” or “copper-nickel-gold” from the inner layer side. And the solder pad may be in close contact with each other via the roughened layer (see FIGS. 20 and 21). Nickel layer thickness 0.5 ~ 7μ
m, the thickness of the gold layer is preferably 0.01 to 0.06 μm.

The solder pad may be a flat conductor such as a conductor pad (18 in FIG. 17) or a via hole (180 in FIG. 17). In the case of a via hole, the via hole is connected to the inner conductor circuit below the insulating layer, a roughened layer is formed on the surface thereof, and a solder body is provided on the roughened layer.

In the configuration (2) of the present invention, it is preferable that a solder resist layer is formed on the outermost layer of the wiring board. The thickness of this solder resist layer is 5 to 40 μm
Is good. The reason for this is that if it is too thin, it will not function as a solder dam, whereas if it is too thick, it will not be easy to open and will also come into contact with the solder body and cause cracks to occur in the solder body.

In the structure (2) of the present invention, the via hole functioning as a solder pad is partially exposed (see FIG. 20) or entirely exposed (see FIG. 21) by the solder resist layer. ) Can be adopted. In the former case, cracks generated in the resin insulating layer or the solder resist layer starting from the side surfaces of the conductor pads or via holes can be prevented, and in the latter case, the allowable range of the opening position shift can be increased.

In the constitutions (1) and (2) of the present invention, various resins can be used as the solder resist composition, such as bisphenol A epoxy resin, bisphenol A epoxy resin acrylate, and novolak epoxy resin. Alternatively, a resin obtained by curing an acrylate of a novolak type epoxy resin with an amine-based curing agent, an imidazole curing agent, or the like can be used.

In particular, when an opening is provided in the solder resist layer and a solder bump is formed in the opening, "Novolak epoxy resin or acrylate of novolak epoxy resin" is used as a resin component and "imidazole curing agent" is used.
Is preferably used as a solder resist composition. The solder resist layer having such a configuration has an advantage that migration of lead (a phenomenon in which lead ions diffuse in the solder resist layer) is small. Moreover, since this solder resist layer is a resin layer obtained by curing novolak type epoxy resin acrylate with an imidazole curing agent, it has excellent heat resistance and alkali resistance, and does not deteriorate even at a temperature at which the solder melts (around 200 ° C.) This is because it is not decomposed by a strongly basic plating solution such as nickel plating or gold plating. However, since such a solder resist layer is formed of a resin having a rigid skeleton, peeling is likely to occur. The present invention provides a printed wiring board having the above-described configuration as a printed wiring board capable of preventing such peeling of the solder resist layer.

Here, as the acrylate of the novolak type epoxy resin, an epoxy resin obtained by reacting glycidyl ether of phenol novolak or cresol novolak with acrylic acid or methacrylic acid can be used.

The above imidazole curing agent is desirably liquid at 25.degree. This is because a liquid can be uniformly mixed. As such a liquid imidazole curing agent,
1-benzyl-2-methylimidazole (product name: 1B2MZ),
1-cyanoethyl-2-ethyl-4-methylimidazole (product name: 2E4MZ-CN) and 4-methyl-2-ethylimidazole (product name: 2E4MZ) can be used. The addition amount of the imidazole curing agent is desirably 1 to 10% by weight based on the total solid content of the solder resist composition. The reason for this is that if the added amount is within this range, uniform mixing is easy.

It is desirable to use a glycol ether-based solvent as the solvent in the composition before curing the solder resist. The solder resist layer formed using such a solvent does not generate free oxygen and does not oxidize the copper pad surface. It is also less harmful to the human body. As such a glycol ether solvent, one having the following structural formula, particularly preferably at least one selected from diethylene glycol dimethyl ether (DMDG) and triethylene glycol dimethyl ether (DMTG) is used. This is because these solvents can completely dissolve benzophenone and Michler's ketone as reaction initiators by heating at about 30 to 50 ° C. CH
_{3 O- (CH 2 CH 2 O} ) n -CH 3 (n = 1~5) solvent of glycol ether is a good 10 to 40 wt% relative to the total weight of the resist composition.

The solder resist composition as described above may further include various defoaming agents and leveling agents, thermosetting resins for improving heat resistance and base resistance and imparting flexibility.
A photosensitive monomer or the like can be added to improve the resolution. Further, a dye or a pigment may be added to the solder resist composition. This is because the wiring pattern can be hidden. It is desirable to use phthalocyanine green as this dye.

For example, the above-mentioned leveling agent is preferably made of an acrylic ester polymer. Further, as an initiator, Irgacure I 907 (Chemical formula 1) manufactured by Ciba Geigy is preferable, and as a photosensitizer, DETX-S (Chemical formula 2) manufactured by Nippon Kayaku is preferable.

[0025]

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[0026]

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As the thermosetting resin as an additional component, a bisphenol-type epoxy resin can be used. This bisphenol type epoxy resin includes a bisphenol A type epoxy resin and a bisphenol F type epoxy resin, and when importance is attached to base resistance, the former is required to reduce viscosity (when importance is attached to coating properties). The latter is better.

As the photosensitive monomer as an additive component, a polyvalent acrylic monomer can be used.
This is because the polyvalent acrylic monomer can improve the resolution. For example, a polyacrylic monomer having a structure represented by the following chemical formula is desirable. Here, the following chemical formula 3 is DPE-6A manufactured by Nippon Kayaku, and the following chemical formula 4 is R-604 manufactured by Kyoeisha Chemical.

[0029]

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[0030]

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Such a solder resist composition contains 25
0.5 to 10 Pa · s, more preferably 1 to 10 Pa · s at ° C. The reason is that the viscosity is easy to apply with a roll coater.

In the constitutions (1) and (2) of the present invention, the thickness of the electroless plating film constituting the conductor circuit or the solder pad is desirably 1 to 5 μm. The reason for this is that if it is too thick, the ability to follow the interlayer resin insulation layer will be reduced, and if it is too thin, the peel strength will decrease, or if the electrolytic plating is performed, the resistance will increase, and the thickness of the plating film will increase. This is because variations occur.

The thickness of the electrolytic plating film constituting the conductor circuit or the solder pad is desirably 10 to 20 μm. The reason for this is that if the thickness is too large, the peel strength is reduced, and if it is too small, the ability to follow the interlayer resin insulating layer is reduced.

In the constitutions (1) and (2) of the present invention, the roughened layer formed on the surface of the conductor circuit or the solder pad is made of copper formed by etching, polishing, oxidizing and redox. It is desirable that the surface is a roughened surface or a roughened surface formed by a plating film.

In particular, this roughened layer is preferably an alloy layer made of copper-nickel-phosphorus. The reason for this is that this alloy layer is a needle-like crystal layer and has excellent adhesion to the solder resist layer. Also, even if a solder body is formed on this alloy layer, there is no significant change in electric conductivity, and the solder body can be formed on the metal pad. The composition of this alloy layer is desirably 90 to 96 wt%, 1 to 5 wt%, and 0.5 to 2 wt%, respectively, in terms of copper, nickel and phosphorus. This is because these compositions have a needle-like structure at these composition ratios.

FIG. 22 shows a ternary triangular diagram of the composition of Cu—Ni—P capable of forming needle-like crystals.
According to this figure, (Cu, Ni, P) = (100,0,0),
A range surrounded by (90, 10, 0) and (90, 0, 10) is preferable.

When a roughened layer is formed by an oxidation treatment, it is desirable to use a solution of an oxidizing agent consisting of sodium chlorite, sodium hydroxide and sodium phosphate. In the case where a roughened layer is formed by oxidation-reduction treatment, it is preferable that the oxidation treatment is performed by immersing the roughened layer in a solution of a reducing agent composed of sodium hydroxide and sodium borohydride.

It is desirable that the roughened layer on the surface of the conductor circuit or the solder pad thus formed has a thickness of 1 to 5 μm. The reason for this is that if it is too thick, the roughened layer itself is easily damaged and peeled off, and if it is too thin, the adhesion decreases.

In the constitutions (1) and (2) of the present invention, it is desirable to use an adhesive for electroless plating as the insulating layer or the interlayer insulating layer. This adhesive for electroless plating
It is most preferable that heat-resistant resin particles soluble in an acid or an oxidizing agent subjected to the curing treatment are dispersed in an uncured heat-resistant resin which becomes hardly soluble in the acid or the oxidizing agent by the curing treatment. By treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, particularly as the heat-resistant resin particles subjected to the curing treatment, a heat-resistant resin powder having an average particle diameter of 10 μm or less, an average particle diameter of 2 μm
Aggregated particles obtained by aggregating the following heat-resistant resin powder, a heat-resistant powder resin powder having an average particle size of 2 to 10 μm and an average particle size of 2 μm
m and a mixture with a heat-resistant resin powder having a mean particle size of 2 or less.
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle size of 2 μm or less to the surface of a 10 μm heat-resistant resin powder, and an average particle size of 0.1 to 0.8.
It is desirable to use at least one selected from a mixture of a heat-resistant resin powder having a diameter of μm and a heat-resistant resin powder having an average particle diameter of more than 0.8 μm and less than 2 μm. This is because they can form more complex anchors.

Next, a method for manufacturing a printed wiring board according to the constitutions (1) and (2) of the present invention will be described. (1) First, a wiring board having an inner copper pattern formed on the surface of a core board is manufactured. The copper pattern on this core board is
A method of etching a copper-clad laminate, or forming an adhesive layer for electroless plating on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate,
The surface of the adhesive layer is roughened to a roughened surface, and a method of applying electroless plating to the surface or a so-called semi-additive method (electroless plating is performed on the entire roughened surface to form a plating resist, and a plating resist is removed. After the formation portion is subjected to electrolytic plating, the plating resist is removed and etching is further performed to form a conductor circuit including an electrolytic plating film and an electroless plating film.

Further, a roughened layer made of copper-nickel-phosphorus is formed on the surface of the inner layer copper pattern of the wiring board. This roughened layer is formed by electroless plating. The solution composition of this electroless plating has a copper ion concentration, a nickel ion concentration, and a hypophosphite ion concentration of 2.2 × 10 ^-2 to 4.
1 × 10 ^-2 mol / l, 2.2 × 10 ^-3 to 4.1 × 10 ^-3 mol / l,
Desirably, it is 0.20 to 0.25 mol / l. This is because the crystalline structure of the film deposited in this range has a needle-like structure, and thus has an excellent anchor effect. A complexing agent or an additive may be added to the electroless plating bath in addition to the above compounds. Other methods of forming the roughened layer include the above-described oxidation (blackening) -reduction treatment and a method of forming a roughened surface by etching the copper surface along grain boundaries.

A through hole is formed in the core substrate, and the front and rear wiring layers can be electrically connected via the through hole. Further, a resin may be filled between the through hole and the conductor circuit of the core substrate to ensure smoothness (see FIGS. 1 to 4).

(2) Next, an interlayer resin insulation layer is formed on the wiring board manufactured in the above (1). In particular, in the present invention, it is desirable to use the above-described adhesive for electroless plating as an interlayer resin insulating material (see FIG. 5).

(3) After the adhesive layer for electroless plating formed in (2) is dried, openings for forming via holes are provided as necessary. At this time, in the case of photosensitive resin, exposure,
An opening for forming a via hole is provided in the adhesive layer by performing thermosetting after development or, in the case of a thermosetting resin, performing thermosetting and then laser processing (see FIG. 6).

(4) Next, the epoxy resin particles present on the surface of the cured adhesive layer are dissolved and removed with an acid or an oxidizing agent to roughen the surface of the adhesive layer (see FIG. 7). Here, as the acid, phosphoric acid, hydrochloric acid, sulfuric acid,
Alternatively, there are organic acids such as formic acid and acetic acid, and it is particularly preferable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

(5) Next, a catalyst nucleus is applied to the wiring board whose surface of the adhesive layer is roughened. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus, and generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

(6) Next, electroless plating is applied to the surface of the adhesive for electroless plating to form an electroless plating film on the entire roughened surface (see FIG. 8). At this time, the thickness of the electroless plating film is 1 to 5 μm, and more preferably, 2 to 3 μm. Such an electroless plating film is desirably subjected to a heat treatment at 50 to 150 ° C. for 0.5 to 4 hours. This is for improving the resistance to acids and oxidizing agents. Next, a plating resist is formed on the electroless plating film (see FIG. 9). As the plating resist composition, it is particularly desirable to use a composition composed of an acrylate of cresol novolak or phenol novolak type epoxy resin and an imidazole curing agent, but a commercially available dry film can also be used.

(7) Next, electrolytic plating is applied to the portion where the plating resist is not formed to form a conductor circuit and a via hole (see FIG. 10). In addition, this electrolytic plating film is 100 ~ 15
It is desirable to perform heat treatment at 0 ° C. for 30 minutes to 3 hours.
Before forming the electrolytic plating film, the surface of the electroless plating film may be treated with an acid to remove the oxide film. Here, it is desirable to use copper plating as the electrolytic plating.

(8) After removing the plating resist, the electroless plating film under the plating resist is dissolved and removed with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate and ammonium persulfate. (See Fig. 11). Note that it is desirable to remove the oxide film with an acid such as sulfuric acid before etching.

(9) Next, a roughened layer is formed on the surface of the conductor circuit (see FIG. 12). Examples of the method of forming the roughened layer include an etching process, a polishing process, an oxidation-reduction process, and a plating process. Of these treatments, the oxidation-reduction treatment is NaOH (10 g /
l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l) in an oxidation bath (blackening bath), NaOH (10 g / l), NaBH ₄ (5 g / l)
As a reducing bath. Further, the roughened layer composed of the copper-nickel-phosphorus alloy layer is formed by deposition by electroless plating. As an electroless plating solution for this alloy, copper sulfate 1
40 g / l, nickel sulfate 0.1-6.0 g / l, citric acid 10
~ 20 g / l, hypophosphite 10 ~ 100 g / l, boric acid 10 ~
It is desirable to use a plating bath having a liquid composition of 40 g / l and a surfactant of 0.01 to 10 g / l. The copper-nickel-phosphorus alloy layer is desirably subjected to a heat treatment at 100 to 150 ° C. for 30 minutes to 3 hours. Also, copper-nickel-
The tin layer may be formed by performing tin substitution plating on the surface of the needle-like alloy layer of phosphorus.

(10) Next, an adhesive layer for electroless plating is formed on the substrate as an interlayer resin insulating layer (see FIG. 13). (11) Further, the steps (3) to (8) are repeated to provide a further upper layer conductive circuit, and a flat conductive pad functioning as a solder pad and a via hole are formed (see FIGS. 14 to 17).

(12) A roughening layer is provided on the surfaces of the conductor pads and via holes (see FIG. 18). The method of forming the roughened layer is the same as that described in the above (9). (13) Next, a solder resist composition is applied to both surfaces of the printed wiring board after the treatment of (12). Here, when applying the solder resist layer to both sides of the printed wiring board, the printed wiring board is sandwiched between a pair of application rolls of a roll coater in a state of being vertically erected, and is transported upward from below. Then, it is desirable to apply the solder resist composition on both sides of the substrate at the same time. The reason is that the current basic specifications of printed wiring boards are on both sides, and the curtain coating method (a method of flowing resin from top to bottom like a waterfall and applying it by passing a substrate through this "curtain" of resin) This is because only one side can be applied. The above-mentioned solder resist composition can be used for the above-mentioned method of applying simultaneously on both sides. That is, the above-mentioned solder resist composition has a viscosity of 0.5 to 10 Pa · s at 25 ° C., preferably 1 to 10 P
Since it is a · s, it does not flow even when the substrate is applied vertically and the transfer is good.

(14) Next, the coating film of the solder resist composition is dried at 60 to 80 ° C. for 5 to 60 minutes, and a photomask film having an opening formed thereon is placed on the coating film to expose and develop. The processing forms an opening exposing the pad portion of the conductor circuit. The coating film in which the openings are formed in this manner is further cured by a heat treatment at 80 ° C. to 150 ° C. for 1 to 10 hours. Thereby, the solder resist layer having the opening is in close contact with the roughened layer provided on the surface of the conductor circuit. Here, the opening diameter of the opening may be larger than the diameter of the pad, and the pad may be completely exposed. In this case, even if the photomask is displaced, the pad is not covered with the solder resist, the solder resist does not contact the solder body, and the solder body does not become constricted, so that cracks hardly occur. Conversely, the diameter of the opening can be smaller than the diameter of the pad, and the periphery of the pad can be covered with a solder resist. In this case, since the roughened layer on the pad surface and the solder resist are in close contact with each other, the pad can be suppressed with the solder resist, and peeling of the pad can be prevented. This configuration is advantageous when a so-called semi-additive method is adopted, in which the depth of the roughened layer of the adhesive for electroless plating is reduced (1 to 3 μm), and the pad is easily peeled off because there is no plating resist.

(15) Next, a “nickel-gold” metal layer is formed on the solder pad exposed from the opening.

(16) Next, a solder body is supplied onto the pad portion exposed from the opening (see FIG. 19). As a method of supplying the solder body, a solder transfer method or a printing method can be used. Here, in the solder transfer method, a solder foil is bonded to a prepreg, and the solder foil is etched leaving only a portion corresponding to an opening portion to form a solder pattern to form a solder carrier film. Is applied to a solder resist opening portion of a substrate, and then laminated such that a solder pattern is in contact with a pad, which is heated and transferred. On the other hand, the printing method is a method in which a metal mask having a through-hole provided at a position corresponding to a pad is placed on a substrate, and a solder paste is printed and heated.

[0057]

【Example】

(Example 1) (1) Both sides of a substrate 1 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 0.6 mm are coated with 18
A copper-clad laminate obtained by laminating a μm copper foil 8 was used as a starting material (see FIG. 1). The copper foil 8 of the copper-clad laminate was etched in a pattern according to a conventional method, drilled, and subjected to electroless plating to form the inner conductor circuit 4 and the through holes 9 on both surfaces of the substrate (see FIG. 2). Further, a bisphenol F type epoxy resin was filled in the through hole 9 between the inner conductor circuits 4 (see FIG. 3).

(2) The substrate on which the inner layer copper pattern 4 was formed in the above (1) was washed with water and dried, and then the substrate was subjected to acidic degreasing and soft etching, followed by a catalyst solution comprising palladium chloride and an organic acid. After treatment to give a Pd catalyst and to activate this catalyst, copper sulfate 8 g / l, nickel sulfate
0.6 g / l, citric acid 15 g / l, sodium hypophosphite
29 g / l, boric acid 31 g / l, surfactant 0.1 g / l, p
Plating was performed in an electroless plating bath consisting of H = 9, and a roughened layer 11 (uneven layer) of Cu-Ni-P alloy having a thickness of 2.5 μm was formed on the entire surface of the copper conductor circuit (see FIG. 4). .

(3) 70 parts by weight of a 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500) dissolved in DMDG (diethylene glycol dimethyl ether), 30 parts by weight of polyether sulfone (PES), imidazole curing (Shikoku Chemicals, trade name: 2E4M
4 parts by weight of Z-CN), 10 parts by weight of caprolactone-modified tris (acroxyethyl) isocyanurate (trade name: Alonix M325, manufactured by Toagosei Co., Ltd.) as a photosensitive monomer, and benzophenone (manufactured by Kanto Chemical) 5 as a photoinitiator Parts by weight, Michler's ketone as a photosensitizer (Kanto Chemical)
5 parts by weight, 35 parts by weight of an epoxy resin particle having an average particle size of 5.5 μm with respect to this mixture, and an average particle size of 0.5 μm
m, 5 parts by weight, and then mixing while adding NMP (normal methylpyrrolidone), adjusting the viscosity to 12 Pa · s with a homodisper stirrer, and kneading with a three-roll mill. A solution (interlayer resin insulating material) was obtained.

(4) The photosensitive adhesive solution obtained in the above (3) is
Using a roll coater, apply to both surfaces of the substrate after the treatment of the above (2), leave it in a horizontal state for 20 minutes, and then
After drying for an hour, an adhesive layer 2 having a thickness of 60 μm was formed (see FIG. 5). (5) A photomask film having via holes drawn thereon was placed on both surfaces of the substrate on which the adhesive layer 2 was formed in the above (4), and was exposed to ultraviolet rays.

(6) The exposed substrate was spray-developed with a DMTG (triethylene glycol dimethyl ether) solution to form an opening serving as a 100 μmφ via hole in the adhesive layer. Further, the substrate is exposed at 3000 mJ / cm ² with an ultra-high pressure mercury lamp, and is exposed at 100 ° C. for 1 hour.
By performing a heat treatment at 0 ° C. for 5 hours, a 50 μm thick adhesive layer 2 having an opening (opening 6 for forming a via hole) having excellent dimensional accuracy corresponding to a photomask film was formed (see FIG. 6). ). Note that the roughened layer is partially exposed in the opening serving as the via hole.

(7) The substrate having the via hole forming openings 6 formed in (5) and (6) is immersed in chromic acid for 2 minutes to dissolve and remove the epoxy resin particles present on the surface of the adhesive layer 2. Then, the surface of the adhesive layer 2 was roughened, and then immersed in a neutralizing solution (manufactured by Shipley) and then washed with water (see FIG. 7). (8) By applying a palladium catalyst (manufactured by Atotech) to the substrate subjected to the surface roughening treatment (roughening depth: 5 μm) in the above (7), the adhesive layer 2 and the via hole opening 6 are formed.
A catalyst nucleus was provided on the surface of.

(9) The substrate was immersed in an electroless copper plating bath having the following composition to form an electroless copper plating film 12 having a thickness of 3 μm on the entire rough surface (see FIG. 8). [Electroless plating solution] EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [Electroless plating conditions] 70 ° C. 30 minutes at liquid temperature

(10) Electroless copper plating film formed in (9)
A commercially available photosensitive dry film is affixed on top of 12, and a mask is placed on this dry film, exposed at 100 mJ / cm ² , developed with 0.8% sodium carbonate, and processed to a thickness of 15 mm.
A μm plating resist 3 was provided (see FIG. 9).

(11) Next, in the portion where the plating resist is not formed,
Electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film 13 having a thickness of 15 μm (see FIG. 10). [Electroplating solution] Sulfuric acid 180 g / l Copper sulfate 80 g / l Additive (manufactured by Adtec Japan, trade name Capparaside GL) 1 ml / l [Electroplating conditions] Current density 1 A / dm ² hours 30 minutes Temperature Room temperature

(12) After stripping and removing the plating resist 3 with 5% KOH, the electroless plating film under the plating resist 3
12 is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide to form a conductor circuit 5 (including via holes 7) having a thickness of 18 μm and comprising an electroless copper plating film 12 and an electrolytic copper plating film 13. (See FIG. 11).

(13) The substrate on which the conductor circuit 5 is formed is made of copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l
1, sodium hypophosphite 29 g / l, boric acid 31 g / l,
A roughened layer 11 made of copper-nickel-phosphorus having a thickness of 3 μm was formed on the surface of the conductor circuit 5 by immersion in an electroless plating solution having a pH of 9 containing 0.1 g / l of a surfactant (see FIG. 12). ). At this time, the formed roughened layer 11 is applied to EPMA (fluorescent X
Line analyzer), Cu: 98 mol%, Ni: 1.
The composition ratio was 5 mol%, P: 0.5 mol%.

(14) By repeating the above-mentioned steps (4) to (13), a flat conductive pad 18 and a via hole 180 functioning as a solder pad are further formed on the upper layer, and the roughened layer 11 (See FIGS. 13 to 18).

(15) On the other hand, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) is provided with 46.67 parts by weight of a photosensitizing oligomer (molecular weight 4000) obtained by acrylizing 50% of an epoxy group, Made,
Epicoat 1001) 14.121 parts by weight, imidazole curing agent (manufactured by Shikoku Chemicals, trade name: 2E4MZ-CN) 1.6 parts by weight, photosensitive monomer polyvalent acrylic monomer (manufactured by Nippon Kayaku, trade name: R604) 1.5 parts by weight, Similarly, 3.0 parts by weight of a polyvalent acrylic monomer (manufactured by Kyoeisha Chemical, trade name: DPE6A) and 0.36 parts by weight of a leveling agent (manufactured by Kyoeisha, trade name: Polyflow No. 75) composed of an acrylate ester polymer are mixed.
Irgacure as photoinitiator for these mixtures
I907 (made by Ciba-Geigy) 2.0 parts by weight, as photosensitizer
Add 0.2 parts by weight of DETX-S (Nippon Kayaku) and add DMD
G (diethylene glycol dimethyl ether) 1.0 part by weight was added to obtain a solder resist composition having a viscosity adjusted to 1.4 ± 0.3 Pa · s at 25 ° C. The viscosity was measured by
With a viscometer (Tokyo Keiki, DVL-B type), rotor No. 4 was used at 60 rpm, and rotor No. 3 at 6 rpm.

(16) The above solder resist composition was applied to a thickness of 20 μm on the wiring board obtained in the above (14). Next, after performing a drying treatment at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a photomask film was placed, exposed to ultraviolet rays of 1000 mJ / cm ² , and subjected to DMTG development treatment. And then 80 ° C
For 1 hour, at 100 ° C. for 1 hour, at 120 ° C. for 1 hour, and at 150 ° C. for 3 hours to form a solder resist layer 14 (opening diameter: 200 μm) having a pad portion (opening diameter: 200 μm).

(17) Next, the substrate on which the solder resist layer 14 has been formed is washed with a pH of 30 g / l of nickel chloride, 10 g / l of sodium hypophosphite, and 10 g / l of sodium citrate.
= 5 for 20 minutes to form a nickel plating layer 15 having a thickness of 5 μm at the opening. Further, the substrate was placed on an electroless gold plating solution comprising 2 g / l of potassium gold cyanide, 75 g / l of ammonium chloride, 50 g / l of sodium citrate, and 10 g / l of sodium hypophosphite at 93 ° C. for 23 seconds. By dipping, a gold plating layer 16 having a thickness of 0.03 μm was formed on the nickel plating layer 15.

(18) Solder paste is printed on the opening of the solder resist layer 14 and reflowed at 200 ° C. to form solder bumps (solder bodies) 17 and 170.
A printed wiring board having solder bumps was manufactured.

(Example 2) A printed wiring board having solder bumps was manufactured in the same manner as in Example 1 except that the roughening of the conductor circuit was performed by etching. At this time,
"Durabond" manufactured by Mech Co., Ltd.
The brand name used was

Example 3 A. Preparation of adhesive composition for electroless plating. 35 parts by weight of a resin solution prepared by dissolving a 25% acrylated cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight 2500) in DMDG at a concentration of 80 wt%, 35 parts by weight, and 3.15 parts by weight of a photosensitive monomer (Toa Gosei Co., Aronix M315) Parts, 0.5 parts by weight of an antifoaming agent (manufactured by San Nopco, S-65), and 3 parts of NMP.
6 parts by weight were mixed with stirring. . After mixing 12 parts by weight of polyethersulfone (PES), 7.2 parts by weight of an epoxy resin particle (manufactured by Sanyo Chemical Industries, Polymer Pole) having an average particle diameter of 1.0 μm, and 3.09 parts by weight of an epoxy resin particle having an average particle diameter of 0.5 μm, Further, 30 parts by weight of NMP was added and mixed by stirring with a bead mill. . 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), a photoinitiator (Irgacure I-, manufactured by Ciba-Geigy)
907) 2 parts by weight, photosensitizer (DETX-S, manufactured by Nippon Kayaku) 0.2
Parts by weight and 1.5 parts by weight of NMP were mixed with stirring. These were mixed to prepare an adhesive composition for electroless plating.

B. Preparation of lower interlayer resin insulation agent 35 parts by weight of a resin solution prepared by dissolving a 25% acrylate of cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., molecular weight: 2500) at a concentration of 80 wt% in DMDG, and 4 parts by weight of a photosensitive monomer (Toa Gosei Co., Aronix M315) Parts, 0.5 parts by weight of antifoaming agent (manufactured by San Nopco, S-65), 3.6 parts of NMP
The parts by weight were mixed with stirring. . After mixing 12 parts by weight of polyether sulfone (PES) and 14.49 parts by weight of an epoxy resin particle (manufactured by Sanyo Kasei Co., Ltd., polymer pole) having an average particle diameter of 0.5 μm, 30 parts by weight of NMP was further added and stirred with a bead mill. Mixed. . 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), a photoinitiator (Irgacure I-, manufactured by Ciba-Geigy)
907) 2 parts by weight, photosensitizer (DETX-S, manufactured by Nippon Kayaku) 0.2
Parts by weight and 1.5 parts by weight of NMP were mixed with stirring. These were mixed to prepare a resin composition to be used as a lower insulating layer constituting a two-layer interlayer resin insulating layer.

C. Preparation of resin filler 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell, molecular weight 310, YL983U), Si coated with a silane coupling agent on the surface and having an average particle size of 1.6 μm
O ₂ spherical particles (manufactured by Admatech, CRS 1101-CE, where the maximum particle size is not more than the thickness (15 μm) of the inner layer copper pattern described later) 170 parts by weight, leveling agent (manufactured by San Nopco, Perenol S4) 1.5 The weight of the mixture is kneaded with three rolls and the viscosity of the mixture is 45,000 ~ at 23 ± 1 ° C.
Adjusted to 49,000cps. . Imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals) 6.5
Parts by weight. These were mixed to prepare a resin filler 10.

D. Manufacturing method of printed wiring board (1) 18 μm on both sides of substrate 1 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm
A copper-clad laminate on which m copper foils 8 were laminated was used as a starting material (see FIG. 23). First, the copper clad laminate is drilled to form a plating resist, and then subjected to an electroless plating process to form a through hole 9, and further, the copper foil 8 is etched in a pattern according to a conventional method. Substrate 1
The inner layer copper pattern 4 was formed on both surfaces of the substrate.

(2) The substrate on which the inner layer copper pattern 4 and the through hole 9 were formed was washed with water and dried, and then used as an oxidation bath (blackening bath) as NaOH (10 g / l) and NaClO ₂ (40 g /
l), Na ₃ PO ₄ (6 g / l), NaOH (10 g
/ L) and an oxidation-reduction treatment using NaBH ₄ (6 g / l) to provide a roughened layer 11 on the surface of the inner layer copper pattern 4 and the through hole 9 (see FIG. 24).

(3) The resin filler 10 is applied to one surface of the substrate using a roll coater to fill the space between the conductor circuits 4 or into the through holes 9, and is dried at 70 ° C. for 20 minutes. In the same way, the resin filler 10 is filled between the conductor circuits 4 or in the through holes 9 at 70 ° C., 20 ° C.
It was dried by heating for minutes (see FIG. 25).

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku) to form the surface of the inner layer copper pattern 4 and the through holes 9. Polishing was performed so that the resin filler 10 did not remain on the land surface, and then buffing was performed to remove scratches due to the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Next, a heat treatment was performed at 100 ° C. for 1 hour, 120 ° C. for 3 hours, 150 ° C. for 1 hour, and 180 ° C. for 7 hours to cure the resin filler 10 (see FIG. 26).

In this way, the surface layer portion of the resin filler 10 filled in the through holes 9 and the like and the roughened layer 11 on the upper surface of the inner conductor circuit 4 are removed to smooth both surfaces of the substrate.
A wiring board is firmly adhered to the side surface of the inner conductor circuit 4 via the roughened layer 11 and the inner wall surface of the through hole 9 is tightly adhered to the resin filler 10 via the roughened layer 11. Obtained. That is, by this step, the surface of the resin filler 10 and the surface of the inner layer copper pattern 4 become flush with each other. Here, the Tg point of the filled cured resin is 155.6 ° C., and the coefficient of linear thermal expansion is 44.5 × 10 ⁻⁶ /
° C.

(5) A thickness of 2.5 μm is formed on the upper surface of the land of the inner conductor circuit 4 and the through hole 9 exposed in the processing of (4).
A roughened layer (concavo-convex layer) 11 made of a Cu—Ni—P alloy was formed, and a Sn layer having a thickness of 0.3 μm was provided on the surface of the roughened layer 11 (see FIG. 27; Is not shown). The formation method is as follows. That is, the substrate was acid-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to provide a Pd catalyst. After activating this catalyst, copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, surfactant 0.1 g
Then, plating was performed in an electroless plating bath consisting of / l and pH = 9 to form a roughened layer 11 of a Cu-Ni-P alloy on the upper surface of the copper conductor circuit 4 and the upper surface of the land of the through hole 9. Further, the substrate was subjected to a heat treatment at 100 ° C. for 30 minutes, at 120 ° C. for 30 minutes, and at 150 ° C. for 2 hours.
ol / l aqueous solution of borofluoric acid, then tin borofluoride 0.1 mol / l, thiourea 1.0 mol / l, temperature 50 ° C, p
A Cu—Sn substitution reaction was performed under the condition of H = 1.2, and a Sn layer having a thickness of 0.3 μm was provided on the surface of the roughened layer 11 (the Sn layer is not shown).

(6) An interlayer resin insulating material of B (viscosity: 1.5 Pa · s) is applied to both surfaces of the substrate of (5) by a roll coater.
After being left in a horizontal state for 20 minutes, drying (prebaking) was performed at 60 ° C. for 30 minutes to form an insulating layer 2a. Further, an adhesive for electroless plating of A (viscosity 7 Pa) is placed on the insulating layer 2a.
S) was applied using a roll coater, left in a horizontal state for 20 minutes, and then dried (prebaked) at 60 ° C. for 30 minutes to form an adhesive layer 2b (see FIG. 28).

(7) In the above (6), the insulating layer 2a and the adhesive layer
A photomask film on which a black circle of 85 μmφ was printed was brought into close contact with both surfaces of the substrate on which 2b was formed, and was exposed at 500 mJ / cm ² using an ultra-high pressure mercury lamp. This is spray-developed with a DMTG solution, and the substrate is further subjected to an ultra-high pressure mercury lamp for 30 minutes.
Exposure at 100 mJ / cm ² and heat treatment (post-bake) at 100 ° C. for 1 hour and then at 150 ° C. for 5 hours
85μ with excellent dimensional accuracy equivalent to a photomask film
Thickness with mφ opening (via hole forming opening 6)
35 μm interlayer resin insulation layer (two-layer structure) 2 was formed (FIG.
29). Note that the tin plating layer was partially exposed in the opening serving as the via hole.

(8) 800 g / l of the substrate having the openings
Chromic acid at 70 ° C. for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the adhesive layer 2b of the interlayer resin insulation layer 2, thereby making the surface of the interlayer resin insulation layer 2 rough (depth) 3 μm), and then immersed in a neutralizing solution (manufactured by Shipley) and then washed with water (see FIG. 30). further,
By applying a palladium catalyst (manufactured by Atotech) to the surface of the roughened substrate, catalyst nuclei were attached to the surface of the interlayer resin insulating layer 2 and the inner wall surface of the via hole opening 6.

(9) The substrate was immersed in an electroless copper plating bath having the following composition to form an electroless copper plating film 12 having a thickness of 0.6 μm on the entire rough surface (see FIG. 31). Furthermore, this electroless plating film is applied at 50 ° C for 1 hour, at 100 ° C for 30 minutes,
For 30 minutes and at 150 ° C. for 2 hours. [Electroless plating solution] EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [Electroless plating conditions] 70 ° C. 30 minutes at liquid temperature

(10) Electroless copper plating film formed in the above (9)
A commercially available photosensitive dry film was stuck on 12 and a mask was placed thereon, exposed at 100 mJ / cm ² , developed with 0.8% sodium carbonate, and provided with a plating resist 3 having a thickness of 15 μm (FIG. 32). reference).

(11) Next, after the surface of the electroless plating film is treated with a 10% sulfuric acid aqueous solution, the non-resist-formed portion is subjected to electrolytic copper plating under the following conditions to obtain a 15 μm-thick electrolytic copper plating film.
13 was formed (see FIG. 33). Further, the electrolytic plating film was subjected to a heat treatment at 50 ° C. for 30 minutes, at 80 ° C. for 30 minutes, at 100 ° C. for 30 minutes, at 120 ° C. for 30 minutes, and at 150 ° C. for 5 hours. [Electroplating solution] Sulfuric acid 180 g / l Copper sulfate 80 g / l Additive (captoside GL, manufactured by Atotech Japan) 1 ml / l [Electroplating conditions] Current density 1 A / dm ² hours 30 minutes Temperature Room temperature

(12) After the plating resist 3 is peeled and removed with 5% KOH, the surface is treated with a 10% sulfuric acid aqueous solution, and the electroless plating film 12 under the plating resist 3 is further mixed with a mixed solution of sulfuric acid and hydrogen peroxide. 18μm thick consisting of electroless copper plating film 12 and electrolytic copper plating film 13
(Including via holes) 5 were formed. Further, the surface of the adhesive layer for electroless plating between the conductor circuits located at the portion where the conductor circuits are not formed is immersed in 800 g / l chromic acid at 70 ° C. for 3 minutes, and the surface of the adhesive layer for electroless plating is etched by 1 to 2 μm. The remaining palladium catalyst was removed (see FIG. 34).

(13) The substrate on which the conductor circuit 5 is formed is made of copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l
1, sodium hypophosphite 29 g / l, boric acid 31 g / l,
The surface of the conductor circuit 5 was immersed in an electroless plating solution having a pH of 9 containing 0.1 g / l of a surfactant to form a roughened layer 11 of copper-nickel-phosphorus having a thickness of 3 μm (see FIG. 35). ). At this time, the formed roughened layer 11 is applied to EPMA (fluorescent X
Line analyzer), Cu: 98 mol%, Ni:
The composition ratio was 1.5 mol%, P: 0.5 mol%. further,
Tin borofluoride 0.1 mol / l, thiourea 1.0 mol / l, temperature
A Cu—Sn substitution reaction was performed at 50 ° C. and a pH of 1.2 to provide a 0.3 μm thick Sn layer on the surface of the roughened layer 11 (the Sn layer is not shown).

(14) By repeating the above steps (6) to (13), a conductor circuit of an upper layer was further formed to obtain a multilayer printed wiring board. However, Sn substitution was not performed (FIGS. 36 to 41).
reference).

(15) On the other hand, a cresol novolac type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) is provided with 46.67 parts by weight of a photosensitizing oligomer (molecular weight 4000) obtained by acrylated 50% of an epoxy group, and a bisphenol A type epoxy resin (oiled shell). Made,
Epicoat 1001) 14.121 parts by weight, imidazole curing agent (Shikoku Chemicals, 2E4MZ-CN) 1.6 parts by weight, photosensitive monomer polyvalent acrylic monomer (Nippon Kayaku, R604) 1.
5 parts by weight, the same polyvalent acrylic monomer (Kyoeisha Chemical, DPE6A) 3.0 parts by weight, an acrylic acid ester leveling agent (Kyoeisha, Polyflow No. 75)
36 parts by weight were mixed, and 2.0 parts by weight of Irgacure I907 (manufactured by Ciba Geigy) as a photoinitiator and 0.2 parts by weight of DETX-S (manufactured by Nippon Kayaku) as a photosensitizer were added to the mixture. Add 1.0 part by weight of DMDG (diethylene glycol dimethyl ether) and adjust the viscosity to 1.4 ± at 25 ° C.
A solder resist composition adjusted to 0.3 Pa · s was obtained.
The viscosity was measured using a B-type viscometer (Tokyo Keiki, DVL-B type)
At 60 rpm, rotor No. 4 was used, and at 6 rpm, rotor No. 3 was used.

(16) The solder resist composition was applied to both sides of the multilayer wiring board obtained in the above (14) in a thickness of 20 μm. Next, after performing a drying treatment at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a 5 mm-thick photomask film on which a circular pattern (mask pattern) is drawn is placed in close contact with the substrate, and 1000 mJ / cm ^2. And subjected to DMTG development processing. And 1 hour at 80 ° C, 1 hour at 100 ° C,
Heat treatment was performed at 20 ° C. for 1 hour and at 150 ° C. for 3 hours to form a solder resist layer (thickness: 20 μm) 14 (opening diameter: 200 μm) with a solder pad portion (including a via hole and its land portion) opened. .

(17) Next, the substrate on which the solder resist layer 14 was formed was treated with a pH of 30 g / l of nickel chloride, 10 g / l of sodium hypophosphite, and 10 g / l of sodium citrate.
= 5 for 20 minutes to form a nickel plating layer 15 having a thickness of 5 μm at the opening. Further, the substrate was placed on an electroless gold plating solution comprising 2 g / l of potassium gold cyanide, 75 g / l of ammonium chloride, 50 g / l of sodium citrate, and 10 g / l of sodium hypophosphite at 93 ° C. for 23 seconds. By dipping, a gold plating layer 16 having a thickness of 0.03 μm was formed on the nickel plating layer 15.

(18) Then, a solder paste is printed on the opening of the solder resist layer 14 and reflowed at 200 ° C. to form a solder bump (solder body) 17. A printed wiring board having the solder bump 17 is formed. It was manufactured (see FIG. 42).

(Comparative Example 1) This comparative example is a process similar to that of Example 1.
By repeating the steps (6) to (12) in (14),
Further, a printed wiring board having solder bumps was manufactured in the same manner as in Example 1 except that the conductor pads 18 and the via holes 180 were formed in a flat state on the upper layer, but the roughened layer 11 was not provided on the surface. .

(Comparative Example 2) In Comparative Example 2, a conductive circuit was formed by roughening the surface of the adhesive for electroless plating in Example 1, forming a plating resist, and performing electroless plating without performing electrolytic plating. A printed wiring board having solder bumps was manufactured in the same manner as in Example 1 except that the substrate was formed.

The printed wiring boards manufactured in Examples and Comparative Examples were mounted with IC chips, and were placed at −55 ° C. for 15 minutes at room temperature.
The heat cycle test was performed 1000 times and 2,000 times for 15 minutes at 125 ° C. for 15 minutes. In addition, PCT test (pressure coo
ker test) was performed for 200 hours under the conditions of 100% humidity, 121 ° C. and 2 atm. In the evaluation of the test, the presence or absence of peeling of the solder resist layer and peeling of the solder body was confirmed with a microscope. Table 1 shows the results. As is clear from the results shown in this table, in the printed wiring board of the present invention, since the roughened layer is formed on the solder pad (conductor pad), peeling of the solder body and the solder resist hardly occurs. Further, it is considered that the peeling of the solder body is less likely to occur when the solder pad is formed of a soft and malleable electrolytic plating film as compared with a hard electroless plating film.

[0099]

[Table 1]

[0100]

As described above, according to the printed wiring board of the present invention, peeling hardly occurs between the conductor circuit and the solder resist layer even during a heat cycle, high temperature, high pressure and humid conditions. Even when an IC chip or the like is mounted, solder bumps (solder bodies) are solder pads (conductor pads).
No peeling from

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a multilayer printed wiring board according to the present invention.

FIG. 2 is a manufacturing process diagram of a multilayer printed wiring board according to the present invention.

FIG. 3 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 4 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 5 is a manufacturing process diagram of the multilayer printed wiring board according to the invention.

FIG. 6 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 7 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 8 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 9 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 10 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 11 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 12 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 13 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 14 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 15 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 16 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 17 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 18 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 19 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 20 is a structural enlarged view of a wiring board according to the invention.

FIG. 21 is a structural enlarged view of a wiring board according to the invention.

FIG. 22 is a triangular diagram showing the composition of a roughened layer of copper-nickel-phosphorus.

FIG. 23 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 24 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 25 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 26 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 27 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 28 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 29 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 30 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 31 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 32 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 33 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 34 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 35 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 36 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 37 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 38 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 39 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 40 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 41 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

FIG. 42 is a manufacturing process diagram of the multilayer printed wiring board according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 interlayer resin insulating layer (adhesive layer for electroless plating) 2a insulating layer 2b adhesive layer 3 plating resist 4 inner conductive circuit (inner copper pattern) 5 outer conductive circuit (outer copper pattern) 6 opening for via hole 7 Via hole (BVH) 8 Copper foil 9 Through hole 10 Filling resin (resin filler) 11 Roughened layer 12 Electroless copper plating film 13 Electrolytic copper plating film 14 Solder resist layer 15 Nickel plating layer 16 Gold plating layer 17,170 Solder bump (solder) 18, 180 Solder pad (conductor pad)

Claims (3)

[Claims] 1. A printed wiring board comprising: a conductive circuit formed on an insulating layer; a roughened layer formed on at least a part of the conductive circuit surface; and a solder resist layer provided on the conductive circuit surface. A printed circuit board, wherein the conductor circuit is formed of an electroless plating film and an electrolytic plating film. 2. A printed circuit board comprising a conductor circuit formed on an insulating layer, a roughened layer formed on at least a part of the surface of the conductor circuit, and the conductor circuit covered by a solder resist layer. The printed circuit board, wherein the conductive circuit is made of an electroless plating film and an electrolytic plating film. 3. A solder pad is formed on the insulating layer, and a roughened layer is formed on at least a part of a surface of the solder pad.
A printed wiring board in which a solder body is formed by an electroless plating film and an electrolytic plating film in a printed wiring board on which a solder body is formed via the roughened layer.