JPH10232821A5 - - Google Patents

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Publication number
JPH10232821A5
JPH10232821A5 JP1997034960A JP3496097A JPH10232821A5 JP H10232821 A5 JPH10232821 A5 JP H10232821A5 JP 1997034960 A JP1997034960 A JP 1997034960A JP 3496097 A JP3496097 A JP 3496097A JP H10232821 A5 JPH10232821 A5 JP H10232821A5
Authority
JP
Japan
Prior art keywords
rsrc
register
stage
indirect mode
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1997034960A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10232821A (ja
JP3789583B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP03496097A priority Critical patent/JP3789583B2/ja
Priority claimed from JP03496097A external-priority patent/JP3789583B2/ja
Priority to US08/890,618 priority patent/US5924114A/en
Priority to KR1019970033526A priority patent/KR100249631B1/ko
Priority to DE19738542A priority patent/DE19738542A1/de
Publication of JPH10232821A publication Critical patent/JPH10232821A/ja
Publication of JPH10232821A5 publication Critical patent/JPH10232821A5/ja
Application granted granted Critical
Publication of JP3789583B2 publication Critical patent/JP3789583B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP03496097A 1997-02-19 1997-02-19 データ処理装置 Expired - Fee Related JP3789583B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP03496097A JP3789583B2 (ja) 1997-02-19 1997-02-19 データ処理装置
US08/890,618 US5924114A (en) 1997-02-19 1997-07-09 Circular buffer with two different step sizes
KR1019970033526A KR100249631B1 (ko) 1997-02-19 1997-07-18 데이터 처리장치
DE19738542A DE19738542A1 (de) 1997-02-19 1997-09-03 Datenverarbeitungseinrichtung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03496097A JP3789583B2 (ja) 1997-02-19 1997-02-19 データ処理装置

Publications (3)

Publication Number Publication Date
JPH10232821A JPH10232821A (ja) 1998-09-02
JPH10232821A5 true JPH10232821A5 (OSRAM) 2004-07-22
JP3789583B2 JP3789583B2 (ja) 2006-06-28

Family

ID=12428726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03496097A Expired - Fee Related JP3789583B2 (ja) 1997-02-19 1997-02-19 データ処理装置

Country Status (4)

Country Link
US (1) US5924114A (OSRAM)
JP (1) JP3789583B2 (OSRAM)
KR (1) KR100249631B1 (OSRAM)
DE (1) DE19738542A1 (OSRAM)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7032100B1 (en) * 1999-12-17 2006-04-18 Koninklijke Philips Electronics N.V. Simple algorithmic cryptography engine
GB2363869B (en) * 2000-06-20 2004-06-23 Element 14 Inc Register addressing
US6647484B1 (en) * 2000-09-19 2003-11-11 3 Dsp Corporation Transpose address mode in general purpose DSP processor
GB2371641B (en) * 2001-01-27 2004-10-06 Mitel Semiconductor Ltd Direct memory access controller for circular buffers
JP3856737B2 (ja) * 2002-07-19 2006-12-13 株式会社ルネサステクノロジ データ処理装置
US20070094663A1 (en) * 2005-10-25 2007-04-26 Anbarani Hossein A Flexible ordered execution mechanism for multi-threaded processors
JP4973154B2 (ja) * 2006-11-29 2012-07-11 ヤマハ株式会社 演算処理装置、メモリアクセス方法、及びプログラム
US8560552B2 (en) * 2010-01-08 2013-10-15 Sycamore Networks, Inc. Method for lossless data reduction of redundant patterns
US9325625B2 (en) 2010-01-08 2016-04-26 Citrix Systems, Inc. Mobile broadband packet switched traffic optimization
US8514697B2 (en) * 2010-01-08 2013-08-20 Sycamore Networks, Inc. Mobile broadband packet switched traffic optimization
US20120185741A1 (en) * 2011-01-14 2012-07-19 Sergey Sergeevich Grekhov Apparatus and method for detecting a memory access error
US8502710B2 (en) * 2011-09-13 2013-08-06 BlueStripe Software, Inc. Methods and computer program products for providing a compressed circular buffer for efficient storage of network performance data
US9348558B2 (en) 2013-08-23 2016-05-24 Texas Instruments Deutschland Gmbh Processor with efficient arithmetic units
US9478312B1 (en) 2014-12-23 2016-10-25 Amazon Technologies, Inc. Address circuit
US10180829B2 (en) * 2015-12-15 2019-01-15 Nxp Usa, Inc. System and method for modulo addressing vectorization with invariant code motion

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908748A (en) * 1987-07-28 1990-03-13 Texas Instruments Incorporated Data processing device with parallel circular addressing hardware
US5623621A (en) * 1990-11-02 1997-04-22 Analog Devices, Inc. Apparatus for generating target addresses within a circular buffer including a register for storing position and size of the circular buffer
US5463749A (en) * 1993-01-13 1995-10-31 Dsp Semiconductors Ltd Simplified cyclical buffer

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