JPH1022411A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve heat dissipation and electric characteristics of a chip size package, facilitate manufacture and reduce manufacturing cost. SOLUTION: A wiring pattern film 16 is formed by connecting one edge to an external connection terminal, electrically connecting the other edge to an electrode terminal 8 and by supporting the film with an electrically insulating film 17. The wiring pattern film 16 is adhered on the inner area of an area whereupon the electrode terminal 8 of a semiconductor chip 10 is formed, and the exposed part on the other edge side of the wiring pattern 18 is sealed by resin material 30a. In this case, the adhering layer is formed of a multilayer adhering film 30 wherein a conductor layer 34 is provided as an inner layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed substantially the same size as a semiconductor chip and a method for manufacturing the same.

[0002]

2. Description of the Related Art A semiconductor device formed by encapsulating a semiconductor chip includes a so-called chip size package (chip size package) formed to be substantially the same size as the semiconductor chip. 6 and 7 show a configuration of a conventional example of a chip size package. FIG. 6 is a cross-sectional view showing a configuration viewed from the mounting surface side, and FIG. 7 is a configuration showing a wiring pattern on a semiconductor chip, external connection terminals, and the like. This conventional example is a product in which a metal ring 12 for protection is mounted on the outer surface of a semiconductor chip 10.

An electrode terminal 8 is formed on the peripheral surface of the semiconductor chip 10, and an external connection terminal 14 is electrically connected to the electrode terminal 8. A wiring pattern film 16 for electrically connecting the external connection terminals 14 to the electrode terminals 8 is provided on an inner region of the semiconductor chip 10 inside the region where the electrode terminals 8 are formed via an adhesive layer 15 having electrical insulation. Glued. The wiring pattern film 16 is formed by forming a wiring pattern 18 on the surface of a base material of an electrically insulating film 17 such as polyimide, and one end of the wiring pattern 18 is connected to the external connection terminal 14 and the other end is connected to the electrode terminal 8. Is done. A solder resist 19 protects the outer surface of the wiring pattern film 16.

The other end of the wiring pattern 18 extends as a lead 20 from the periphery of the electrically insulating film 17, and the lead 20 is bonded to the electrode terminal 8 by being pressed and bent by a bonding tool. After bonding the leads 20, a resin material 15a is applied to the bonding portions, and the exposed portions of the leads 20 are sealed. After that, the external connection terminal 14 is joined to one end of the wiring pattern 18, and FIG.
The external connection terminal 14 and the electrode terminal 8 are electrically connected to each other to obtain a chip-sized semiconductor device in which the connection is sealed.

The adhesive layer 15 is formed on the wiring pattern film 1.
The bonding layer 6 is bonded to the surface of the semiconductor chip 10, and an adhesive having a certain flexibility such as an elastomer is used for the bonding layer 15. This is because when the semiconductor device is mounted on the mounting substrate, the thermal stress caused by the difference in the thermal expansion coefficient between the mounting substrate and the semiconductor chip 10 can be reduced.

[0006]

As described above, conventionally,
When manufacturing the chip size package, an adhesive such as a gel-like elastomer is used to adhere the wiring pattern film 16 to the semiconductor chip 10, and the adhesive is applied to the surface of the semiconductor chip 10 by a printing method or the like. The wiring pattern film 16 is adhered. Therefore, the conventional manufacturing method has a problem that the dimensional accuracy such as the shape and thickness of the adhesive layer 15 is not always sufficient, and a problem that the manufacturing efficiency is not always high.

Further, regarding the heat dissipation of the chip size package, the chip size package has a small surface area as compared with the conventional package, so that the heat dissipation of the package itself is small, and the temperature tends to be high due to the heat generated from the semiconductor chip. There is a problem that when a semiconductor chip with large power consumption is used, it cannot be mounted without considering heat dissipation such as provision of a radiation fin.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems in the conventional semiconductor device having a chip size, and has an object to improve the dimensional accuracy of the semiconductor device and facilitate the manufacturing. Another object of the present invention is to provide a semiconductor device having characteristics such as excellent heat dissipation and a method of manufacturing the same.

[0009]

The present invention has the following arrangement to achieve the above object. That is, a wiring pattern, one end of which is connected to an external connection terminal and the other end of which is electrically connected to the electrode terminal, is formed in a region inside the region where the electrode terminals of the semiconductor chip are formed, supported by an insulating film. In the semiconductor device, the wiring pattern film is adhered via an adhesive layer having electrical insulation, and the exposed portion on the other end side of the wiring pattern is sealed with a resin material. Characterized by being formed by a multilayer adhesive film provided with a conductor layer. Further, the multilayer adhesive film is formed by covering both surfaces of the conductor layer with a flexible resin film made of an elastomer, phenyl silicone, or the like. Further, the conductive layer is made of a metal material having good thermal conductivity such as aluminum, aluminum alloy, copper, and copper alloy. Further, the conductive layer is electrically connected to the wiring pattern via a via formed in the resin film.

A wiring pattern, one end of which is connected to an external connection terminal and the other end of which is electrically connected to the electrode terminal, is supported by an insulating film in a region inside the region where the electrode terminals of the semiconductor chip are formed. Bonding the formed wiring pattern film via an adhesive layer having electrical insulation,
After electrically connecting the other end of the wiring pattern to the electrode terminal, the exposed portion on the other end side of the wiring pattern is sealed with a resin material. The wiring pattern film is bonded to the semiconductor chip by using a multilayer adhesive film formed by providing a resin film on both sides of the conductor layer and providing a layer. Further, a gel layer made of the same material as the resin film constituting the multilayer adhesive film and having an adhesive property is formed on the adhesive surface of the multilayer adhesive film with the semiconductor chip, and is adhered. Further, a via is formed in the resin film of the multilayer adhesive film to electrically connect the conductor layer and the wiring pattern. Further, after bonding one surface of the multilayer adhesive film to the wiring pattern film, a semiconductor chip is bonded to the other surface of the multilayer adhesive film.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below. FIG. 1 is a sectional view showing one embodiment of a semiconductor device according to the present invention. In the semiconductor device of this embodiment, the wiring pattern film 16 is adhered to the surface of the area inside the electrode terminal 8 of the semiconductor chip 10 in the same manner as in the above-described conventional chip size package. The external connection terminal 14 is joined to one end of the provided wiring pattern 18. The lead 20 extends outward from the outer edge of the electrically insulating film 17 of the wiring pattern film 16 and extends to the electrode terminal 8 of the semiconductor chip 10.
Bonding.

The configuration of the semiconductor device according to the present embodiment is characterized in that, in the conventional semiconductor device, an adhesive such as an elastomer is applied to the surface of the region inside the electrode terminal 8 of the semiconductor chip 10 by forming a wiring pattern. The difference lies in that the wiring pattern film 16 is adhered using a multilayer adhesive film 30 formed in advance into a film shape using a resin material such as an elastomer, while the film 16 is adhered.

The multilayer adhesive film 30 has a three-layer structure in which a conductor layer 34 is sandwiched between resin films 32a and 32b having electrical insulation. It is preferable that the resin films 32a and 32b have a certain degree of flexibility, such as an elastomer or phenyl silicone, and have a glass transition point (Tg) of -65 ° C. or less and cold resistance. The flexibility of the resin films 32a and 32b has an effect of relieving thermal stress caused by a difference in the thermal expansion coefficient between the semiconductor chip 10 and the mounting substrate when the semiconductor device is mounted, and the cold resistance is that of mounting the semiconductor device. This is a necessary requirement to ensure the required reliability against external environmental fluctuations in the event of a failure.

The conductor layer 34 is provided for the purpose of improving the heat dissipation of the semiconductor device and improving the electrical characteristics of the semiconductor device. For the conductor layer 34, a material having good heat dissipation properties such as aluminum, aluminum alloy, copper, and copper alloy is effectively used. Since the multilayer adhesive film 30 bonds the wiring pattern film 16 to the surface of the semiconductor chip 10, the thickness of the multilayer adhesive film 30 is not particularly limited, but the leads 20 of the wiring pattern 18 can be easily connected to the electrode terminals with a bonding tool. 8 must be thick enough to bond. The multilayer adhesive film 30 according to the embodiment has a configuration in which the conductor layer 34 is arranged as an intermediate layer at the center in the thickness direction, and the thickness of the multilayer adhesive film 30 is about 180 μm, and the thickness of the conductor layer 34 is about 50 μm. is there.

As described above, since the multilayer adhesive film 30 has the structure in which the conductor layer 34 is embedded, the semiconductor chip 1
The heat generated at 0 is conducted to the conductor layer 34 and dissipated to the outside from the conductor layer 34, so that the heat dissipation of the semiconductor device as a whole can be improved. Since the conductor layer 34 and the semiconductor chip 10 are arranged very close to each other, an effective heat dissipation function can be achieved even with the resin films 32a and 32b interposed.

The conductor layer 34 is electrically connected to the wiring pattern 18 and can be used as a common ground layer and power supply layer of the semiconductor chip 10. External connection terminal 14
When electrically connecting the conductor layer 34 to the external connection terminal 14, the external connection terminal 14 may be connected to the conductor layer 34 by providing a via 36 in the resin film 32 a as shown in FIG. 1.

When the semiconductor device of the above embodiment is manufactured, a multilayer adhesive film 30 is bonded to the semiconductor chip 10 and the wiring pattern film 16 is bonded to the multilayer adhesive film 30.
And bonding the leads 20 to the electrode terminals 8 and then filling the exposed portions of the leads 20 with a sealing resin material 30a.
6, after bonding the multilayer adhesive film 30, the semiconductor chip 10 and the multilayer adhesive film 30 are bonded, and the leads 20 are bonded and sealed.

FIG. 2 shows a processing step of the multilayer adhesive film 30 to be adhered to the semiconductor chip 10. FIG. 2A shows the conductor layer 3
4 is a multilayer adhesive film 30 provided in a state where resin films 32a and 32b are in close contact with both surfaces. The resin films 32a and 32b are formed into a film having a predetermined thickness using a resin material such as an elastomer, and have no adhesiveness by themselves. In the embodiment, the outer surface of one resin film 32b adhered to the semiconductor chip 10 is formed as a gel-like layer 32c having an adhesive property by the same resin material as the film material. The thickness of the gel layer 32c is about 25 μm.

FIG. 2B shows a state in which the other resin film 32 a is etched to form a via hole 36 a leading to the conductor layer 34 in order to form a via in the multilayer adhesive film 30. Etching of the resin film 32a coats a photosensitive resist on the surface of the resin film 32a,
The resist pattern is formed by exposure and development, and the resin film 32a is etched using the resist pattern as a mask. The via holes 36a can be formed by laser processing using a laser mask instead of the etching method. Next, a conductive paste such as a silver paste is filled in the via hole 36a to obtain the multilayer adhesive film 30 in which the via 36 is formed (FIG. 2C). The conductive paste may be filled by a conventionally known printing method or the like. Note that, as another method, the via 36 can be formed by raising a plating metal in the via hole 36a by electrolytic plating.

FIG. 3 shows an example of manufacturing the wiring pattern film 16 to be adhered to the multilayer adhesive film 30. FIG. 3A shows a single-sided copper-clad film 40 in which a copper foil 42 is adhered to one side of an electrically insulating film 17 made of polyimide or the like. In order to form the wiring pattern 18 on the single-sided copper-clad film 40, first, gold plating is applied to the copper foil 42 in the same pattern as the wiring pattern 18. Therefore, a photosensitive resist is coated on the surface of the copper foil 42, and a resist pattern 44 exposing a portion where the wiring pattern 18 is to be formed is formed in advance. FIG. 3B shows a state in which after the resist pattern 44 is formed, gold plating is performed using the copper foil 42 as a plating power supply layer. 46 is gold plating.

Next, the external connection terminal 14 is connected to the wiring pattern 1.
In order to form a connection hole 48 at one end of the insulating film 8, the electrically insulating film 17 is irradiated with a laser beam to reach the copper foil 42. A copper foil serving as the wiring pattern 18 is exposed at the bottom of the connection hole 48. Next, plating metal is raised in the connection hole 48 by electrolytic plating using the copper foil 42 as a plating power supply layer, and the bump-shaped external connection terminals 14 are formed on the outer surface of the electrically insulating film 17. This electrolytic plating is, for example, by nickel plating (FIG. 3D).

Next, in order to form the lead 20, a portion where the lead 20 is to be formed is opened. This window opening can be performed by irradiating a portion of the window opened by the electrically insulating film 17 with laser light. The window opening exposes the copper foil at the window. Next, the copper foil 42 is etched using an etchant that selectively removes only the copper foil 42 (FIG. 3E). Thus, the wiring pattern film 16 in which the wiring pattern 18 is supported on the electrically insulating film 17 is obtained. The lead 20 to be bonded to the electrode terminal 8 is formed only of gold formed by gold plating.
Further, the external connection terminals 14 formed in a bump shape by electrolytic plating are subjected to gold plating as protective plating on the surface thereof. A predetermined number of terminals of the external connection terminals 14 are formed at corresponding positions electrically connected to the vias 36 formed in the multilayer adhesive film 30.

FIG. 4 shows a process of forming a semiconductor device using the multilayer adhesive film 30 and the wiring pattern film 16. FIG. 4 shows a state where the multilayer adhesive film 30 is adhered to the surface of the semiconductor chip 10. The multilayer adhesive film 30 adheres to the semiconductor chip 10 using the adhesive property of the gel layer 32c. In the actual process, the multilayer adhesive film 30 is used.
A release film is adhered to the surface of the gelled layer 32c of the semiconductor chip 10a.
It is only necessary to adhere to.

Next, the wiring pattern film 16 is positioned and adhered to the upper surface of the multilayer adhesive film 30 (FIG. 4B). The bonding between the wiring pattern film 16 and the multilayer adhesive film 30 is performed by providing a gel layer on the upper surface of the multilayer adhesive film 30 in the same manner as the adhesive or the lower surface. Via 3
The external connection terminals 14 formed at the portions corresponding to the formation portions 6 are electrically connected to the conductor layer 34 via the wiring patterns 18 by bonding the wiring pattern film 16. Lead 20 of wiring pattern film 16
Are bonded to the electrode terminals 8 using a bonding tool. The bonding tool pushes down the lead 20 from above the lead 20 toward the electrode terminal 8 and bonds the lead 20 to the electrode terminal 8 while tearing off the tip of the lead 20.

FIG. 4C shows a state in which the lead 20 is bonded to the electrode terminal 8. Finally, a portion where the leads 20 are exposed is filled with a sealing resin material, and the leads 20 are sealed to obtain a semiconductor device. The resin material for sealing the leads 20 is a resin film 32a, 32
The same material as b, for example, an elastomeric gel body may be used. Thus, the semiconductor device shown in FIG. 1 can be obtained.

The wiring pattern film 16 described above is used.
Is an example of manufacturing the wiring pattern film 16, and the manufacturing method of the wiring pattern film 16 is not limited to the above-described method. For example, in another method of manufacturing the wiring pattern film 16, there is a method in which copper foil is used for the wiring pattern and the surface of the lead 20 is plated with gold while leaving the copper foil on the core material. When the wiring pattern film 16 is used, the multilayer adhesive film 30 used in the above-described embodiment can be used in exactly the same manner.

As shown in FIG. 5, the wiring pattern film 16 and the electrode terminals 8 are not electrically connected by extending the leads 20 from the wiring pattern 18 as in the above-described embodiment, but by a wire bonding method. It is possible to connect to In this embodiment, the wiring pattern 1
8 is exposed, and this exposed portion is connected to the electrode terminal 8 by a bonding wire 50.

As described above, according to the method of manufacturing a semiconductor device of the present embodiment, the wiring pattern film 16 is bonded using the multilayer adhesive film 30 formed in a film shape in advance. Simplification can be achieved, which can improve manufacturing efficiency. In addition, since the multilayer adhesive film 30 has the conductor layer 34 in the inner layer, the heat dissipation of the semiconductor device is improved, and the electric conductivity of the semiconductor device is improved by using the conductor layer 34 as a ground layer and a power supply layer. Characteristic can be improved.

In the above embodiment, only one conductive layer 34 is provided on the multilayer adhesive film 30. However, a multilayer adhesive film 30 having a plurality of conductive layers 34 may be used. Further, it is of course possible to use the conductor layer 34 as an intermediate metal layer sandwiched between resin films instead of connecting it to the external connection terminal 14 as a ground layer and a power supply layer. In this case, the same applies to the above embodiments, but the heat dissipation effect, the electric shielding effect, and the electromagnetic shielding effect by the conductor layer 34 can be obtained.

[0030]

As described above, the semiconductor device according to the present invention can be obtained as a semiconductor device having excellent heat dissipation properties, which facilitates mounting of a semiconductor chip having a large amount of heat generation. Also,
It can be obtained as a semiconductor device with excellent electrical characteristics,
It is possible to provide a semiconductor device suitable for handling high-speed signals. Further, according to the method for manufacturing a semiconductor device according to the present invention, the semiconductor device can be easily manufactured, the manufacturing efficiency can be improved, and the manufacturing cost can be reduced. In addition, since the manufacturing is performed without applying the adhesive, there is a remarkable effect that the dispersion of the dimensional accuracy such as the shape and thickness of the adhesive caused by applying the adhesive can be eliminated.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a main part of a configuration of a semiconductor device according to the present invention.

FIG. 2 is an explanatory view showing a method for processing a multilayer adhesive film.

FIG. 3 is an explanatory view showing a method for manufacturing a wiring pattern film.

FIG. 4 is an explanatory view illustrating a method for manufacturing a semiconductor device.

FIG. 5 is a sectional view showing another embodiment of the semiconductor device.

FIG. 6 is a plan view of a mounting surface of a conventional semiconductor device.

FIG. 7 is a cross-sectional view illustrating a configuration of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 8 electrode terminal 10 semiconductor chip 14 external connection terminal 16 wiring pattern film 17 electrically insulating film 18 wiring pattern 20 lead 30 multilayer adhesive film 32a, 32b resin film 34 conductor layer 36 via 40 single-sided copper-clad film 42 copper foil 44 resist pattern 46 Gold plating

Claims (8)

[Claims] An insulating film supports a wiring pattern having one end connected to an external connection terminal and the other end electrically connected to the electrode terminal in a region inside the region where the electrode terminal of the semiconductor chip is formed. Wherein the wiring pattern film formed by the bonding is bonded via an adhesive layer having electrical insulation, and an exposed portion on the other end side of the wiring pattern is sealed with a resin material. , Formed of a multilayer adhesive film having a conductor layer in the inner layer. 2. The semiconductor device according to claim 1, wherein the multilayer adhesive film is formed by covering both surfaces of the conductor layer with a flexible resin film made of an elastomer, phenyl silicone, or the like. 3. The semiconductor device according to claim 1, wherein the conductor layer is made of a metal material having good thermal conductivity, such as aluminum, an aluminum alloy, copper, or a copper alloy. 4. The semiconductor device according to claim 1, wherein the conductor layer is electrically connected to the wiring pattern via a via formed in the resin film. 5. A wiring pattern, one end of which is connected to an external connection terminal and the other end of which is electrically connected to the electrode terminal, is supported by an insulating film in a region inside the region where the electrode terminals of the semiconductor chip are formed. The wiring pattern film formed by bonding is bonded via an adhesive layer having electrical insulation, and after electrically connecting the other end of the wiring pattern and the electrode terminal, an exposed portion on the other end side of the wiring pattern In a method for manufacturing a semiconductor device in which a resin material is sealed, as the adhesive layer, a conductive layer is provided on an inner layer, and a multilayer adhesive film formed by coating a resin film on both surfaces of the conductive layer is used. A method of manufacturing a semiconductor device, comprising: bonding a wiring pattern film to the semiconductor chip. 6. A gel layer made of the same material as the resin film constituting the multilayer adhesive film and having an adhesive property is formed on the adhesive surface of the multilayer adhesive film with the semiconductor chip, and is adhered. A method for manufacturing a semiconductor device according to claim 5. 7. The method of manufacturing a semiconductor device according to claim 5, wherein a via is formed in the resin film of the multilayer adhesive film to electrically connect the conductor layer and the wiring pattern. 8. The method for manufacturing a semiconductor device according to claim 5, wherein after bonding one surface of the multilayer adhesive film to the wiring pattern film, a semiconductor chip is bonded to the other surface of the multilayer adhesive film. .