JP3293202B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device, and more particularly to a method for improving heat dissipation, reliability, and simplification of manufacturing.

[0002]

2. Description of the Related Art A conventional semiconductor device is disclosed in
A structure in which a semiconductor element is mounted on an upper surface of a substrate and the substrate and a lead frame are connected by a wire as disclosed in Japanese Patent No. 244747 is known.

[0003]

However, in recent years, semiconductor devices have been required to have higher heat dissipation, higher reliability, and, on the other hand, cost reduction due to simplification of manufacturing. Since the semiconductor element is directly mounted on the semiconductor device, the semiconductor element generating a large amount of heat has a high temperature due to the thermal resistance of the substrate, and exceeds the allowable temperature of the PN junction. Was. In addition, in order to withstand the stress that increases with the increase in the size of the semiconductor device, high adhesiveness of the mold resin has been required. However, the conventional semiconductor device has little adhesion between the semiconductor element and the substrate and the resin. Since it was not considered, there was a problem that the reliability of large semiconductor devices could not be ensured. Furthermore, the conventional semiconductor device has a structure in which the substrate and the lead frame are connected by wires, so if the number of pins increases, the connection time of wire bonding increases, the cost of wires increases, and the cost of the semiconductor device increases. Had.

Furthermore, in the conventional method of manufacturing a semiconductor device, a semiconductor element is mounted on a substrate, the substrate is mounted on a lead frame, and the inspection process is performed after the molding is completed. However, there has been a problem that the semiconductor device cannot be modified, the manufacturing yield decreases, and the semiconductor device eventually becomes expensive.

Accordingly, an object of the present invention is to achieve higher heat dissipation,
It is an object of the present invention to realize a semiconductor device having a high reliability and an inexpensive structure and a method of manufacturing the semiconductor device.

[0006]

The semiconductor device SUMMARY OF THE INVENTION (1) The present invention has an opening, and the substrate die pad portion and the wiring pattern is provided in an upper portion, Daiata the die pad portion
A semiconductor element fixed by a latching material and connected to the wiring pattern, and a molding material for sealing the semiconductor element, wherein the substrate includes a first interior substrate, A first metal layer provided for heat dissipation on the first internal substrate, a second internal substrate provided on the first metal layer , A plating provided on the inner side surface and connecting the die pad portion and the first metal layer; and a plating provided in the opening portion through the plating to connect the die pad portion and the first metal layer.
And a paste , wherein the paste is filled in the opening.
After filling and curing or drying, the semiconductor element is
Fixed to the die pad portion by the die attach material.
Characterized in that that.

(2) In a method of manufacturing a semiconductor device according to the present invention, a substrate having an opening and having a die pad portion and a wiring pattern provided on an upper portion thereof;
A semiconductor element fixed to the wiring pattern and connected to the wiring pattern; and a mold material for sealing the semiconductor element, wherein the substrate includes a first interior substrate,
A first metal layer provided for heat dissipation on the inner board of the first embodiment, a second inner board provided on the first metal layer, and an inner side surface of the opening portion A plating for connecting the die pad portion and the first metal layer , and a paste for providing the die pad portion and the first metal layer , the plating being provided in the opening portion via the plating, and connecting the die pad portion and the first metal layer. Having
A method of manufacturing a semiconductor device, wherein the semiconductor element is
Fill the paste in the opening, cured or dried
After that, the die pad part is
It is characterized by being fixed .

[0008]

[0009]

[0010]

[0011]

[0012]

[0013]

[0014]

[0015]

[0016]

[0017]

[0018]

[0019]

[0020]

[0021]

[0022]

[0023]

According to the present invention, the die pad of the semiconductor element and the heat dissipation structure are connected to each other by the conductive paste in the through hole, the via hole or the through hole of the substrate. Since the heat is transferred to the heat dissipation structure through a through-hole or a via hole, which is often formed of copper which is a good conductor, and a conductive paste which is generally a good conductor of heat, the PN junction temperature of the semiconductor element may be lowered. Has the effect of being able to. Further, in the present invention, since the conductive paste is present in the through hole or the via hole, the apparent thermal resistance of the through hole or the via hole is further reduced as compared with the case where the through hole or the via hole is used alone. Having. In addition, in the present invention, the resist is present in the through-hole in the die pad. Therefore, even if a die attach agent that is usually used for die-attaching the semiconductor element and the die pad is applied on the die pad, the through-hole is used to pass through the back surface of the substrate Has the effect that the die attach agent does not exude.

According to the present invention, since the direction in which the semiconductor element is die-attached to the substrate by etching, ink, or the like on the die pad outside the die-attached area of the semiconductor element is specified, the die-attach direction can be easily recognized. Has an action.

In the present invention, the resist is present only between the wiring patterns near the connection between the connection lead of the semiconductor package and the wiring pattern and only on the wiring pattern. Even if the semiconductor device is covered with the mold resin, the separation between the mold resin and the resist occurs even if it occurs only in the minimum part even if the semiconductor device is covered with the mold resin. Impurities existing in the vicinity of the connection between the wiring pattern and the wiring pattern or in the inside of the other semiconductor device are less likely to be ionized, and have an effect that a leak mode failure between wiring patterns and between substrate layers is less likely to occur.

In the present invention, a step of treating the semiconductor device with oxygen or argon plasma after mounting the semiconductor element or the semiconductor package on the substrate and before resin molding is included. Therefore, in general, the surfaces of components constituting a semiconductor device such as a substrate, a resist, and a semiconductor package, which do not have good adhesion to the mold resin, are exposed to an oxygen or argon plasma environment. A new surface with high surface energy and activity appears, and if oxygen plasma is used, the surface is slightly oxidized and becomes hydrophilic, so even if these components are covered with mold resin, the separation between the mold resin and the component surface will occur. Even if it occurs, it will occur only in the minimum part, the penetration of water vapor will be suppressed, impurities near the connection between the connection lead and the wiring pattern and other impurities inside the semiconductor device will be less likely to be ionized, and the wiring pattern During the operation, the leak mode failure between the substrate layers hardly occurs.

In the present invention, the wiring pattern of the substrate on which the semiconductor element is mounted and the fingers of the lead frame are formed in a structure in which they are opposed to each other in a plated state. As a result, metal interdiffusion or eutectic of plating occurs, so that the finger and the wiring pattern can be directly joined while maintaining electrical continuity. Further, in the present invention, since anisotropic conductive film or conductive adhesive is present between the wiring pattern of the substrate on which the semiconductor element is mounted and the finger of the lead frame, energy such as heat and pressure, ultraviolet light is applied. As a result, the adhesive is cured while maintaining the electrical continuity between the wiring pattern and the finger of the lead frame, so that the finger and the wiring pattern can be directly mechanically joined while maintaining the electrical continuity. Have.

Further, in the present invention, since a manufacturing method is employed in which an inspection step is performed immediately after mounting a semiconductor element on a substrate, a lead frame formed by punching or etching a metal plate is generally connected to a wiring pattern. That is, since the semiconductor device can be connected to the outside by probing the wiring pattern on the substrate before the wiring pattern is short-circuited by the lead frame, an electric inspection can be performed.

[0029]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a sectional structural view of a semiconductor device of the present invention. In FIG. 1, reference numeral 8 denotes a semiconductor element;
The die attach material is die-attached to 12 die pads, and the bonding pads 20 formed on the surface of the semiconductor element and the wiring patterns 5 formed on the substrate 1 are connected by 7 wires. In many cases, a plurality of semiconductor elements are mounted on the surface on which the semiconductor elements are mounted. Gold or aluminum is often used for the wire. The substrate is often made of ceramics, epoxy resin such as FR-4, polyimide resin, aramid resin, silicon or the like. As the wiring pattern, a copper foil, a conductive paste, a metal thin film, or the like is often used. In recent years, the operating speed of semiconductor elements has been increasing, and the power consumption has been increasing in proportion to this.This means that heat dissipation measures are very important. Often used, if it is an organic substrate, only the die pad of the semiconductor element has good thermal conductivity,
In many cases, copper, gold-plated copper, tungsten-based metal, or the like is used, or thermal conductivity is increased through the metal in the inner layer of the substrate. Further, in the present invention, the through hole 11 is formed in the die pad during the manufacturing process of the substrate, and the heat radiation plane 3 sandwiched by the interior substrate 2 and the heat radiation region 4 formed on the back surface of the substrate and the die pad are heated. Connected. The die pad, heat dissipation plane, and heat dissipation area are often formed simultaneously with the same material as the wiring pattern when forming the substrate, copper foil for an organic substrate, conductive paste for a ceramics substrate, thin film metal for silicon, and thin film metal for silicon. However, a heat slug such as a metal plate or a metal foil having a good thermal conductivity may be formed in another step, and finally, the die pad, the heat dissipation plane, and the heat dissipation area may be connected by through holes. The through-holes may be formed by using an existing technique, for example, copper plating by electroless plating, then increasing the copper plating thickness by electrolytic plating, and leaving only necessary portions by etching. Of course, if the required amount of heat radiation is small, the structure may be such that only the die pad and the heat radiation plane or only the die pad and the heat radiation region are connected by through holes. If the required amount of heat radiation is large, the heat radiation plane or the heat radiation region may be made thick to increase the heat capacity, or the number of through holes may be increased. Further, instead of through holes, a structure may be used in which a via hole is connected between the substrate surface and the inner layer substrate, or between the inner layer substrate and the inner layer substrate. Furthermore, if the conductive paste 10 such as silver paste is filled in the through hole or the via hole, the space in the through hole is filled with the conductive paste having good thermal conductivity, so that the apparent thermal resistance of the through hole is reduced. You can also. When a semiconductor element is die-attached to a die pad, the die-attach material often seeps through the through hole on the back surface of the substrate and contaminates the back surface of the substrate. Before the die attach process, a resist such as a solder or solder resist is applied and filled in the through-hole in advance by a method such as printing or dispensing, and if the die attach is performed after curing or drying, the die attach material will seep to the back of the substrate. The problem can be avoided. When the die pad is formed by printing, the die pad may be simultaneously coated and filled in the through hole in advance by printing. In addition, a substrate that does not include a process of forming a through hole or a via hole, or a case where it is not desired to form a through hole in a die pad on the substrate, apply a conductive paste to the hole, and dissipate a heat radiation plane, or It may be configured to be thermally connected to the heat radiation area. Although a part of the semiconductor element, the wire, and the wiring pattern are covered with the molding material 9, it is needless to say that the entire semiconductor device may be transfer-molded.
The molding material is often a resin such as epoxy, silicone, or polyimide. Furthermore, if a step of treating the semiconductor device with oxygen or argon plasma before the molding step is included, the surface of the component constituting the semiconductor device such as a substrate that does not have good adhesion to the mold resin generally has an oxygen or argon plasma. Since it is exposed to the environment, dirt on the surface is removed by sputtering, a new active surface with high surface energy appears, and the surface is slightly oxidized and becomes hydrophilic with oxygen plasma. Even if the cover is covered with, the mold resin does not separate from the surface of the component, the penetration of water vapor is suppressed, the failure in the leak mode hardly occurs, and the reliability of the semiconductor device is improved.

FIG. 2 is a front structural view of the semiconductor device of the present invention. In FIG. 2, reference numeral 8 denotes a semiconductor element, which is die-attached to a die pad 12, and a bonding pad 20 formed on the surface of the semiconductor element by a wire 7 and a wiring pattern 5 formed on the substrate 1. Wired. Reference numeral 22 denotes a notch of a die pad, which is formed in a substrate manufacturing process at the same time as the formation of a wiring pattern, and is aligned with a die number 23 formed on the semiconductor element when the semiconductor element is die-attached to the substrate. In order to prevent a mistake in the manufacturing process such as a wrong die attach direction, it is formed as an alignment mark. If the positional relationship between the notch portion of the die pad and the die number is determined, the positional relationship does not necessarily have to be that shown in FIG. Further, the notch portion of the die pad may be formed by a method such as etching and printing as previously formed on the mask of the die pad at the time of manufacturing the substrate, or application of ink by dispensing with increased position selection accuracy. Furthermore, since the notch of the die pad is used as an alignment mark, etching,
In the manufacturing process of the die pad such as printing, an alternative mark instead of the notch may be formed, or in a process separate from the manufacturing process of the die pad such as printing of ink, resist, etc., some alignment mark is marked. You may leave. Furthermore, the semiconductor device in the state shown in FIG. 2 is often covered with a semiconductor element mounting region with a molding material.

FIG. 3 is a front structural view of a semiconductor device during a manufacturing process according to the present invention. In FIG. 3, 1 is a substrate, 5
Numeral denotes a wiring pattern. Numeral 41 denotes a joining member such as solder or silver paste, and a plastic package 43 having 42 connection leads is mounted on a substrate. Reference numeral 40 denotes a solder resist, which is present only on the substrate, between the wiring patterns and near the connection leads. Thermosetting and UV curable solder resists are often used.
It is often formed into a pattern by printing. After mounting to the state of this process, when molding the substrate of the semiconductor device with a molding material, generally applying a solder resist to the entire surface of the substrate, the solder resist usually has poor adhesion with the mold resin, so Separation easily occurs between the mold resins, water vapor invades, and impurities existing near the connection between the connection lead and the wiring pattern and inside the semiconductor device are ionized, and between the wiring patterns and between the substrate layers. Leak mode failures are more likely to occur. Therefore, as in the present invention, a structure in which the resist exists only between the wiring patterns in the vicinity connecting the connection leads of the semiconductor package and the wiring pattern, or only on the wiring pattern, is generally a resist having poor adhesion to the mold resin. When the semiconductor device is covered with the mold resin, the peeling of the mold resin from the resist occurs only in the minimum part, even if it occurs. The impurities existing in the vicinity of the semiconductor device and inside the other semiconductor device are less likely to be ionized, so that leak mode defects between wiring patterns and between substrate layers are less likely to occur, and the reliability of the semiconductor device is improved. Furthermore, since the body of the plastic package often contains a release material such as silicone, it is also generally known that the body of the plastic package has poor adhesion to the mold material.
Therefore, as described above, if a step of treating the semiconductor device with oxygen or argon plasma before the molding step is included, the surface of the body of the plastic package becomes
Since it is exposed to an oxygen or argon plasma environment, surface contamination is removed by sputtering, a new active surface with high surface energy appears, and if oxygen plasma is used, the surface is slightly oxidized and becomes hydrophilic. Even if the body is covered with a molding material, the mold resin does not separate from the surface of the component, the penetration of water vapor is suppressed, the failure in the leak mode hardly occurs, and the reliability of the semiconductor device is improved. Furthermore, since the solder resist is also exposed to an oxygen or argon plasma environment,
Since the adhesion to the mold material can be improved and the intrusion of water vapor can be suppressed, the reliability of the semiconductor device can be further improved.

FIG. 4 is a sectional structural view of the semiconductor device of the present invention. In FIG. 4, reference numeral 8 denotes a semiconductor element, which is die-attached to the substrate 1 by a die attach material 6;
The bonding pads formed on the surface of the semiconductor element and the wiring patterns 5 formed on the substrate are connected by wires 7. The wiring pattern and the lead frame 30 are electrically directly connected. The substrate is mechanically joined to the lead frame by this joining. As a lead frame, 42 alloy has been often used, but copper has also been used in response to the recent increase in heat generation of semiconductor elements. In order to improve the reliability of a semiconductor device, a semiconductor element and a part of a wire, a bonding pad, a substrate, a wiring pattern, and a part of a lead frame are often covered with a molding material 4, so that the semiconductor device has high electrical insulation. In addition, a structure that protects the semiconductor element from a humidity environment can be obtained. The molding material is often epoxy, silicone, or polyimide resin. As shown in the figure, potting molding or the like may be used to mold at least only important parts such as a semiconductor element and a substrate joint. As means for joining the board to the lead frame, gold plating is applied to the wiring pattern on the board, and gold plating, silver plating, tin plating,
After plating such as solder plating is performed in advance, and the joining portion 31 is positioned, the joining is performed by applying heat and pressure. The wiring pattern side is not limited to gold plating, but may be plated with silver plating, tin plating, solder plating, or the like, or the wire bonding area may be plated with gold to change the bonding portion and the type of plating. . When joining by applying heat and pressure, ultrasonic waves may be used, or the joints may be joined one by one by single point bonding. If a plurality of wiring patterns and one side, two sides, and all sides of the substrate are simultaneously bonded, the bonding efficiency is further improved. Further, a structure may be employed in which an anisotropic conductive film and an anisotropic conductive adhesive are interposed at the joint between the lead frame and the wiring pattern.
Preliminarily press-fit or apply an anisotropic conductive film and an anisotropic conductive adhesive to the joint on the wiring pattern, align the lead frame and the wiring pattern with each other, and then apply heat and pressure to join. . Of course, an anisotropic conductive film or an anisotropic conductive adhesive may be temporarily compressed or applied to the joint on the lead frame. Further, a projection is formed by half etching on a portion of the lead frame facing the wiring pattern on a portion of the lead frame where the lead frame is joined to the wiring pattern,
You may make it join by the joining method mentioned above. In addition,
Preliminarily press-fit or apply UV resin or thermosetting resin to the wiring pattern or the joint on the lead frame, align the lead frame and the wiring pattern with each other, and then apply UV light or heat or pressurize. In addition, the bonding may be achieved by keeping the electrical contact between the wiring pattern and the lead frame due to the shrinkage of the resin upon curing. In many cases, a plurality of semiconductor elements are arranged on a substrate,
In some cases, it is often mixed with other electronic components such as the above-mentioned plastic package. If a step of treating the semiconductor device with oxygen or argon plasma after the joining and the mounting of the semiconductor element are completed before the molding step, the reliability of the semiconductor device is further improved as described above.

Further, instead of the potting type molding material described with reference to FIG. 4, a transfer molding material 3 generally having a high crosslinking density and excellent reliability as shown in FIG.
When the semiconductor device is covered with 4, the reliability of the entire semiconductor device can be improved as compared with the case where the semiconductor device is covered with a potting type mold material. Of course, if the process of treating the semiconductor device with oxygen or argon plasma before the molding process after the bonding and the mounting of the semiconductor element are completed, the reliability of the semiconductor device is further improved as described above. Needless to say.

FIG. 6 shows a method of manufacturing the semiconductor device of the present invention having the structure shown in FIGS. In FIG. 6A, 1 is a substrate, and 5 is a wiring pattern formed on the substrate. Here, as shown in FIG. 6B, the semiconductor element 8 is die-attached to the substrate with the die attach material 6, and then the bonding pad formed on the surface of the semiconductor element and the wiring pattern are connected by the wire 7. I do. In this manner, the mounted semiconductor device has a portion to which the lead frame is to be connected, where the probe pins 35 are set up as shown in FIG. In this state, an electrical test of the semiconductor device can be performed from the probe pins. As a result, if a defect is found in the semiconductor element, the semiconductor device can be removed from the process or the semiconductor element can be replaced. In general, a lead frame is manufactured by etching or stamping a metal plate, so that it is electrically short-circuited as a whole, so that the electrical connection between the lead frame and the wiring pattern on the substrate is completed. In this case, the mounting state of the board cannot be electrically inspected until the final process of trimming and forming the lead frame is completed. However, according to the present invention, the mounting state of the board is electrically inspected during the process. Now you can do it. Thereafter, the wiring pattern on the substrate and the lead frame 30 are aligned with each other, and then heated and pressed by a pressure bonding tool 36 to join them. The joining method is as described above. Thereafter, as described above, if necessary, a plasma process and a molding process are performed. Of course, in addition to the electrical inspection process, an external inspection may be performed by visual inspection or the like. If the semiconductor device does not require an electrical inspection, the inspection is performed only by the external inspection and the molding process is performed. If a defect is found in a semiconductor element before, the semiconductor device may be removed from the process or the semiconductor element may be replaced. The semiconductor element is die-attached to the board with a die attach material having reproducibility so that it can be replaced, or the semiconductor element is mounted on a tape carrier package or a plastic package in advance, and the semiconductor element is soldered or anisotropically conductive on the board. The connection may be made with a conductive film or conductive paste, and the structure may be replaced.

[0035]

According to the semiconductor device of the present invention, the structure in which the mounting region of the semiconductor element and the heat radiation plane inside the substrate and the heat radiation region on the back surface of the substrate are connected by through holes or via holes is used. This has the effect that a semiconductor device having a high heat dissipation structure that can easily radiate the heat generated by the elements can be easily obtained.

Further, according to the semiconductor device of the present invention, the structure in which the conductive paste is present in the through hole or the via hole has the effect that a semiconductor device having a further lower thermal resistance can be obtained easily and inexpensively. Have.

Further, according to the semiconductor device of the present invention, a through hole is formed between the mounting area and the heat radiating plane inside the substrate and the heat radiating area on the back surface of the substrate, and the conductive paste is present there. Even in a semiconductor device in which a through hole or a via hole is not formed, there is an effect that a semiconductor device having a high heat dissipation structure that can easily radiate heat generated by a semiconductor element can be easily obtained at low cost.

According to the semiconductor device of the present invention, the structure is such that the resist is present in the through holes provided between the mounting area of the semiconductor element and the heat radiation plane inside the substrate and the heat radiation area on the back surface of the substrate. Since the die attach material that attaches to the mounting area does not stain on the back of the board,
This has the effect that a semiconductor device having a high production yield can be obtained without soiling the back surface of the substrate.

Further, according to the semiconductor device of the present invention, since the marking is made on the mounting area outside the semiconductor element, the die attach direction can be easily confirmed, and the manufacturing error in which the die attach direction is mistaken is reduced. This has the effect that a semiconductor device having a high production yield can be obtained.

According to the semiconductor device of the present invention, the resist exists only between the wiring patterns in the connection region where the connection leads of the semiconductor package and the wiring pattern are connected, and only on the substrate and the wiring pattern near the connection region. Therefore, even in the subsequent molding process, the contact area between the molding material and the resist can be minimized, and it is possible to easily obtain a highly reliable semiconductor device in which the molding material does not easily peel off. Has an effect.

In the method of manufacturing a semiconductor device according to the present invention, after mounting a semiconductor element or a semiconductor package on a substrate,
Before the resin molding, a process of treating the semiconductor device with oxygen or argon plasma was introduced, so even if these components were covered with the molding resin, there was no separation between the molding resin and the component surface, and the penetration of water vapor was suppressed. In addition, there is an effect that defects in the leak mode do not occur and a highly reliable semiconductor device can be easily obtained.

In the method of manufacturing a semiconductor device according to the present invention, the wiring pattern of the substrate on which the semiconductor element is mounted and the fingers of the lead frame have a structure in which each of them is opposed to each other in a plated state. The structure is such that an anisotropic conductive film or conductive adhesive exists between the fingers. By applying energy such as heat and pressure or ultrasonic waves, the fingers and the wiring pattern can be directly connected while maintaining electrical continuity. Because it can be joined, the connection between the lead frame and the wiring pattern becomes very easy,
This has the effect of reducing the number of connection steps and obtaining an inexpensive semiconductor device.

In addition, in the method of manufacturing a semiconductor device according to the present invention, since the inspection process is performed immediately after the semiconductor element is mounted on the substrate, defective semiconductor elements and components can be replaced, or the semiconductor device can be replaced. Since the introduction of steps can be avoided before the added value is increased, the yield of semiconductor devices is improved, so that a highly reliable semiconductor device can be obtained at low cost.

[Brief description of the drawings]

FIG. 1 is a sectional structural view of a semiconductor device of the present invention.

FIG. 2 is a front structural view of the semiconductor device of the present invention.

FIG. 3 is a front structural view of a semiconductor device during a manufacturing process according to the present invention.

FIG. 4 is a sectional structural view of a semiconductor device of the present invention.

FIG. 5 is a sectional structural view of a semiconductor device of the present invention.

FIG. 6 is a diagram illustrating a method of manufacturing a semiconductor device according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Inner layer board 3 Heat dissipation plane 4 Heat dissipation area 5 Wiring pattern 6 Die attach material 7 Wire 8 Semiconductor element 9 Mold material 10 Conductive paste 11 Through hole 12 Die pad 20 Bonding pad 22 Die cutout 23 Die number 30 Lead frame 31 bonding part 34 transfer molding material 35 probe pin 36 crimping tool 40 solder resist 41 bonding member 42 connection lead 43 plastic package

Claims (12)

(57) [Claims] 1. A substrate having an opening, on which a die pad portion and a wiring pattern are provided on an upper portion, and fixed to the die pad portion by a die attach material,
A semiconductor device comprising: a semiconductor element connected to the wiring pattern; and a molding material for sealing the semiconductor element, wherein the substrate includes: a first interior substrate; The first provided for heat dissipation
A second interior substrate provided on the first metal layer; and a plating provided on an inner side surface of the opening portion for connecting the die pad portion and the first metal layer. And a paste provided in the opening portion via the plating to connect the die pad portion and the first metal layer;
The semiconductor device is characterized in that the semiconductor element is fixed to the die pad portion by the die attach material after filling the paste in the opening, curing or drying the paste. 2. A substrate having an opening portion, on which a die pad portion and a wiring pattern are provided on an upper portion, and fixed to the die pad portion by a die attach material,
A semiconductor device comprising: a semiconductor element connected to the wiring pattern; and a molding material for sealing the semiconductor element, wherein the substrate includes: a first interior substrate; The first provided for heat dissipation
A second interior substrate provided on the first metal layer; and a plating provided on an inner side surface of the opening portion for connecting the die pad portion and the first metal layer. And a conductive paste provided in the opening through the plating and connecting the die pad portion and the first metal layer, wherein the semiconductor element has the conductive paste in the opening. A semiconductor device which is fixed to the die pad portion by the die attach material after filling and curing or drying. 3. The semiconductor device according to claim 1, further comprising a resist layer in said opening. 4. The semiconductor device according to claim 1, wherein the substrate further has a second metal layer below the first interior substrate, wherein the plating further comprises: Connecting the die pad portion, the first metal layer, and the second metal layer, wherein the conductive paste further includes a die pad portion, the first metal layer, and the second metal layer; And a semiconductor device. 5. The semiconductor device according to claim 1, wherein one of the first internal substrate and the second internal substrate is an organic substrate, and the die pad portion is made of copper, A semiconductor device comprising a metal containing either gold or tungsten. 6. The semiconductor device according to claim 1, wherein said first metal layer is made of the same material as said wiring pattern. 7. A substrate having an opening and provided with a die pad portion and a wiring pattern on an upper portion thereof, being fixed to the die pad portion by a die attach material,
A semiconductor element connected to the wiring pattern, and a molding material for sealing the semiconductor element, wherein the substrate has a first internal substrate, and a first internal substrate for heat radiation The first provided
A second interior substrate provided on the first metal layer; and a plating provided on an inner side surface of the opening portion for connecting the die pad portion and the first metal layer. And a paste provided in the opening portion via the plating to connect the die pad portion and the first metal layer;
Wherein the semiconductor element is fixed to the die pad portion by the die attach material after the opening is filled with the paste and cured or dried. Semiconductor device manufacturing method. 8. A substrate having an opening, on which a die pad portion and a wiring pattern are provided on an upper portion, and fixed to the die pad portion by a die attach material,
A semiconductor element connected to the wiring pattern, and a molding material for sealing the semiconductor element, wherein the substrate has a first internal substrate, and a first internal substrate for heat radiation The first provided
A second interior substrate provided on the first metal layer; and a plating provided on an inner side surface of the opening portion for connecting the die pad portion and the first metal layer. And a conductive paste provided in the opening via the plating and connecting the die pad portion and the first metal layer, wherein the semiconductor element comprises: A method of manufacturing a semiconductor device, comprising filling an opening with the conductive paste, curing or drying the paste, and then fixing the paste to the die pad with the die attach material. 9. The method for manufacturing a semiconductor device according to claim 7, further comprising forming a resist layer in the opening. 10. The method for manufacturing a semiconductor device according to claim 7, wherein the substrate further has a second metal layer below the first interior substrate, Connecting the die pad portion, the first metal layer, and the second metal layer, the conductive paste further includes: the die pad portion, the first metal layer, and the second metal layer. A method for manufacturing a semiconductor device, comprising: connecting a metal layer. 11. The method of manufacturing a semiconductor device according to claim 7, wherein said substrate further comprises:
A second metal layer below the first interior substrate, wherein the plating further connects the die pad portion, the first metal layer, and the second metal layer; The method of manufacturing a semiconductor device, wherein the paste further connects the die pad portion, the first metal layer, and the second metal layer. 12. The method for manufacturing a semiconductor device according to claim 7, wherein said first metal layer comprises:
A method for manufacturing a semiconductor device, wherein the method is formed in the same step as the wiring pattern.