JP2004228603A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device of high heat dissipation and high reliability with low-cost structure, and to provide a method for manufacturing it. <P>SOLUTION: A semiconductor element is die-attached to a die pad, and connected to a wiring pattern on a bonding pad substrate with wire. A through hole is formed in the die pad, to thermally connect a heat radiation plane sandwiched between interior substrates and a heat radiation region of a rear surface of the substrate to the die pad. The inside of the through hole is filled with a conductive paste such as a silver paste to reduce a substantial thermal resistance further. An insulating resist is applied to the inside of the through hole in advance, to prevent a die attach material from exuding to the rear surface of the substrate. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly to high heat dissipation, high reliability, and simplification of manufacturing.

  As a conventional semiconductor device, there has been known a structure in which a semiconductor element is mounted on an upper surface of a substrate and a substrate and a lead frame are connected by wires as disclosed in Japanese Patent Application Laid-Open No. 63-244747.

  However, in recent years, semiconductor devices have been required to have higher heat dissipation, higher reliability, and cost reduction due to simplification of manufacturing. On the other hand, in conventional semiconductor devices, a semiconductor element is directly mounted on the upper surface of a substrate. Therefore, there is a problem that a semiconductor element generating a large amount of heat becomes high in temperature due to the thermal resistance of the substrate and exceeds the allowable temperature of the PN junction, so that the semiconductor element does not function as a semiconductor device. In addition, in order to withstand the stress that increases with the increase in the size of semiconductor devices, high adhesiveness of the mold resin has been required. However, conventional semiconductor devices have poor adhesion between the semiconductor element and the substrate and the resin. Since it was not considered, there was a problem that the reliability of large semiconductor devices could not be ensured. Furthermore, since conventional semiconductor devices have a structure in which the substrate and the lead frame are connected by wires, if the number of pins increases, the connection time for wire bonding increases, the cost of wires increases, and the cost of the semiconductor device increases. Had.

  Furthermore, in the conventional method of manufacturing a semiconductor device, the semiconductor element is mounted on a substrate, the substrate is mounted on a lead frame, and the inspection process is performed after the molding is completed. There was a problem that the device could not be modified, the production yield was reduced, and the semiconductor device was eventually expensive.

  Therefore, an object of the present invention is to realize a semiconductor device and a method for manufacturing the semiconductor device, which can achieve higher heat dissipation and higher reliability and have an inexpensive structure.

  In order to solve the above problems, in a semiconductor device of the present invention, a substrate, a semiconductor element mounted on a mounting area formed on the first surface of the substrate, and the semiconductor element formed on the substrate In a semiconductor device in which at least a part of the wiring pattern electrically connected to the substrate, the semiconductor element, and the wiring pattern is covered with a resin, the mounting region penetrates the substrate, A through hole that measures electrical conduction between layers, or a via hole that penetrates only a specific layer in the substrate and that measures electrical conduction between the specific layers is formed. The same member as the wiring pattern placed on two surfaces, a heat dissipation structure formed in the same process, or a heat dissipation structure formed of a plate-like member is provided with the through hole or the via hole. Characterized in that it is connected by Le.

  A resist is present in the through hole.

  A conductive paste may be present in the through hole or the via hole.

  In order to solve the above problems, in a semiconductor device of the present invention, a substrate, a semiconductor element mounted on a mounting area formed on the first surface of the substrate, and the semiconductor element formed on the substrate In a semiconductor device in which at least a part of the wiring pattern electrically connected to the substrate, the substrate, the semiconductor element, and the wiring pattern is covered with a resin, a through-hole is formed in the mounting region, The region and the heat dissipation structure placed inside the substrate or on the second surface of the substrate are connected by a conductive paste in the through hole.

  According to another aspect of the present invention, there is provided a semiconductor device, comprising: a substrate; a semiconductor element mounted on a mounting area formed on the substrate; and a semiconductor element formed on the substrate and electrically connected to the semiconductor element. In a semiconductor device in which at least a part of the wiring pattern connected to the substrate, the substrate, the semiconductor element, and the wiring pattern are covered with a resin, the mounting area is formed outside the semiconductor element on the mounting area. The marking is performed in the same step as the step or in a step after the placement area forming step.

  The semiconductor device is characterized in that a part of the outside of the semiconductor element is marked by etching on the placement region.

  In order to solve the above problems, in a semiconductor device according to the present invention, a substrate, a semiconductor package mounted on the substrate, and a wiring pattern formed on the substrate and electrically connected to connection leads of the semiconductor package And in the semiconductor device in which at least a part of the substrate, the semiconductor package, the connection lead, and the wiring pattern are covered with a resin, the wiring pattern in a connection region where the connection lead and the wiring pattern are connected. The resist is present only between the wiring patterns and near the connection region on the wiring pattern.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: mounting a semiconductor element or a semiconductor package on a substrate; and forming the semiconductor element or the semiconductor package and wiring formed on the substrate. Connecting a pattern, treating the semiconductor device with oxygen or argon plasma, and thereafter covering at least a part of the wiring pattern with the substrate, the semiconductor element or the semiconductor package, and a resin. Features.

  In order to solve the above problems, in a semiconductor device according to the present invention, a substrate, a semiconductor element or a semiconductor package mounted on the substrate, a wiring pattern formed on the substrate, In a semiconductor device in which at least part of the lead frame connected to the substrate, the substrate, the semiconductor element, the wiring pattern, and the lead frame is covered with a resin, the finger of the lead frame is partially connected to the wiring pattern. An electrical connection is obtained in an overlapping state.

  Opposite connection surfaces of the finger and the wiring pattern are each plated, and are joined by metal interdiffusion of the plating or eutectic. The finger and the wiring pattern are joined by an anisotropic conductive film or a conductive adhesive.

  In order to further solve the above problems, in a method of manufacturing a semiconductor device according to the present invention, a step of mounting a semiconductor element or a semiconductor package on a substrate, and a step of forming the semiconductor element or the semiconductor package and wiring formed on the substrate Connecting a pattern, and electrically connecting a finger of a lead frame disposed on the side of the substrate and the wiring pattern, and thereafter, connecting the substrate, the semiconductor element or the semiconductor package, and the wiring pattern A method of manufacturing a semiconductor device having a step of covering at least a part of the lead with a resin, wherein the step of electrically connecting the fingers of the lead frame and the wiring pattern is performed by a direct bonding step.

  The step of direct bonding is a step of bonding the fingers one by one by applying ultrasonic waves and pressure to the wiring pattern.

  The step of the direct bonding is a step of simultaneously bonding the plurality of fingers to the wiring pattern by applying heat and pressure.

  In order to further solve the above problems, in a method of manufacturing a semiconductor device according to the present invention, a step of mounting a semiconductor element or a semiconductor package on a substrate, and a step of forming the semiconductor element or the semiconductor package and wiring formed on the substrate A step of connecting a pattern, a step of electrically joining a finger of a lead frame disposed on the side of the substrate and the wiring pattern, and then at least one of the substrate and the semiconductor element or the semiconductor package and the wiring pattern In a method of manufacturing a semiconductor device having a step of partially covering with a resin, before an electrical joining step between the finger of the lead frame and the wiring pattern, the method includes an inspection step, and thereafter, the finger and the wiring pattern. Characterized by a step of making an electrical connection.

  The step of making an electrical connection between the finger and the wiring pattern is a step of electrically connecting the finger while partially overlapping the wiring pattern.

  The step of making electrical connection between the finger and the wiring pattern is a step by wire bonding.

  The inspection step is an electrical inspection step of bringing a probing pin into contact with the wiring pattern.

  According to the semiconductor device of the present invention, the structure in which the mounting area of the semiconductor element and the heat radiation plane inside the substrate and the heat radiation area on the back surface of the substrate are connected by through holes or via holes makes it easy to generate heat from the semiconductor element. This has the effect that a semiconductor device having a high heat dissipation structure capable of dissipating heat can be easily obtained.

  Further, according to the semiconductor device of the present invention, the structure is such that the conductive paste is present in the through-hole or the via-hole, so that a semiconductor device having a lower thermal resistance can be obtained easily and inexpensively.

  Further, according to the semiconductor device of the present invention, a through hole is formed between the mounting area and the heat dissipation plane inside the board and the heat dissipation area on the back face of the board, and the conductive paste is present there. And a semiconductor device having no via hole formed therein, has an effect that a semiconductor device having a high heat dissipation structure that can easily radiate heat generated by a semiconductor element can be easily obtained at low cost.

  According to the semiconductor device of the present invention, since the resist is present in the through hole provided between the mounting area of the semiconductor element and the heat dissipation plane inside the substrate and the heat dissipation area on the back surface of the substrate, the semiconductor element is mounted. Since the die attach material that attaches to the region does not stain on the back surface of the substrate, there is an effect that a semiconductor device with a high production yield can be obtained without soiling the back surface of the substrate.

  Further, according to the semiconductor device of the present invention, since the structure in which the mounting area outside the semiconductor element is marked is adopted, it is easy to confirm the die attach direction, and manufacturing errors in which the die attach direction is erroneous are reduced. This has the effect that a semiconductor device with high reliability can be obtained.

  According to the semiconductor device of the present invention, a structure in which the resist exists only between the wiring patterns in the connection region where the connection leads and the wiring pattern of the semiconductor package are connected, and only on the substrate and the wiring pattern near the connection region. Therefore, even in the subsequent molding process, the contact area between the molding material and the resist can be minimized, and there is an effect that a highly reliable semiconductor device in which the molding material does not easily peel off can be easily obtained. .

  In the method of manufacturing a semiconductor device according to the present invention, after mounting the semiconductor element or the semiconductor package on the substrate, and before the resin molding, a step of treating the semiconductor device with oxygen or argon plasma is included. Even if it is covered with, the mold resin and the component surface do not separate, the penetration of water vapor is suppressed, leak mode failure does not occur, and a highly reliable semiconductor device can be easily obtained. Have.

  In the method of manufacturing a semiconductor device according to the present invention, the wiring pattern of the substrate on which the semiconductor element is mounted and the fingers of the lead frame have a structure in which each of them is opposed to each other in a plated state, or the wiring pattern and the fingers of the lead frame The structure is such that an anisotropic conductive film or conductive adhesive is present between the fingers. By applying energy such as heat and pressure or ultrasonic waves, the fingers and the wiring pattern can be directly joined while maintaining electrical continuity. Further, since the connection between the lead frame and the wiring pattern is greatly facilitated, the number of connection steps is reduced and an inexpensive semiconductor device can be obtained.

  In addition, in the method of manufacturing a semiconductor device according to the present invention, the inspection method is performed immediately after the semiconductor element is mounted on the substrate. Therefore, defective semiconductor elements and components can be replaced, or the added value of the semiconductor device can be increased. Since the introduction of steps can be avoided before raising, the yield of semiconductor devices is improved, so that a highly reliable semiconductor device can be obtained at low cost.

Action

  In the present invention, since the die pad of the semiconductor element and the heat dissipation structure are connected by the conductive paste in the through hole, the via hole or the through hole of the substrate, the heat generated from the semiconductor element is generally a good conductor of heat. Heat is transferred to the heat dissipation structure through through holes or via holes, which are often formed of copper, and conductive paste, which is generally a good conductor of heat, so that the PN junction temperature of the semiconductor element can be reduced. Having. Further, in the present invention, since the conductive paste is present in the through hole or the via hole, the apparent thermal resistance of the through hole or the via hole is further reduced as compared with the case of the through hole or the via hole alone. Having. Further, in the present invention, since the resist is present in the through hole in the die pad, a die attach agent usually used for die attach of the semiconductor element and the die pad is applied on the die pad, and even though the die attach agent is coated on the die pad, the back surface of the substrate passes through the through hole. Has the effect that the die attach agent does not exude.

  In the present invention, since the structure in which the direction in which the semiconductor element is die-attached to the substrate by etching, ink or the like on the outside of the semiconductor element die-attach region on the die pad is specified, the die-attach direction can be easily recognized. .

  In the present invention, since the resist is present only on the wiring pattern between the wiring patterns in the vicinity connecting the connection lead and the wiring pattern of the semiconductor package, generally, a resist having poor adhesion to the mold resin is used. Since the area can be minimized, even if the semiconductor device is covered with the mold resin, the separation between the mold resin and the resist will occur only in the minimum part even if it occurs, the penetration of water vapor is suppressed, the connection leads and the wiring pattern Has an effect that it is difficult to ionize impurities existing in the vicinity of the connection or other inside the semiconductor device, and it is difficult to generate a leak mode defect between wiring patterns and between substrate layers.

  In the present invention, a step of treating a semiconductor device with oxygen or argon plasma after mounting a semiconductor element or a semiconductor package on a substrate and before resin molding is included. Therefore, in general, the surfaces of components constituting a semiconductor device such as a substrate, a resist, and a semiconductor package, which do not have good adhesion to the mold resin, are exposed to an oxygen or argon plasma environment. A new surface with high surface energy and activity appears, and if it is oxygen plasma, the surface is slightly oxidized and becomes hydrophilic, so even if these parts are covered with mold resin, the separation between the mold resin and the part surface will occur. Even if it occurs, it occurs only in the minimum part, the penetration of water vapor is suppressed, impurities near the connection between the connection lead and the wiring pattern and other impurities inside the semiconductor device are hard to ionize, and the wiring pattern During the operation, the leak mode failure between the substrate layers hardly occurs.

  In the present invention, the wiring pattern of the substrate on which the semiconductor element is mounted and the fingers of the lead frame have a structure facing each other in a plated state. Since metal interdiffusion or eutectic occurs, the finger and the wiring pattern can be directly joined while maintaining electrical continuity. Further, in the present invention, the structure in which the anisotropic conductive film or the conductive adhesive is present between the wiring pattern of the substrate on which the semiconductor element is mounted and the fingers of the lead frame is applied. As a result, the adhesive is cured while maintaining the electrical continuity between the wiring pattern and the finger of the lead frame, so that the finger and the wiring pattern can be directly mechanically joined while maintaining the electrical continuity. Have.

  Furthermore, in the present invention, since a manufacturing method is adopted in which an inspection step is performed immediately after a semiconductor element is mounted on a substrate, a lead frame formed by punching or etching a metal plate is generally connected to a wiring pattern, that is, a wiring pattern. Since the semiconductor device can be connected to the outside by probing the wiring pattern on the substrate before the pattern is short-circuited by the lead frame, it has an effect that an electrical inspection can be performed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional structural view of a semiconductor device of the present invention. In FIG. 1, reference numeral 8 denotes a semiconductor element, which is die-attached to 12 die pads by a die attach material of 6, and formed on a substrate 1 by bonding pads 20 formed on the surface of the semiconductor element by wires of 7. Wiring pattern 5 is connected. In many cases, a plurality of semiconductor elements are mounted on the surface on which the semiconductor elements are mounted. Gold or aluminum is often used for the wire. As the substrate, ceramics, epoxy resin such as FR-4, polyimide resin, aramid resin, silicon and the like are often used. As the wiring pattern, a copper foil, a conductive paste, a metal thin film, or the like is often used. In recent years, the operating speed of semiconductor devices has been increasing, and the power consumption has been increasing in proportion to the operating speed.Therefore, it is very important to take measures to dissipate the heat. Often used, if it is an organic substrate, only the die pad of the semiconductor element has good thermal conductivity, such as copper, gold-plated copper, tungsten-based metal, or increases the thermal conductivity through the metal in the substrate inner layer. Often do. Further, in the present invention, the through hole 11 is formed in the die pad during the manufacturing process of the substrate, and the heat radiation plane 3 sandwiched by the interior substrate 2 and the heat radiation region 4 formed on the back surface of the substrate and the die pad are thermally bonded. Connected. The die pad, heat dissipation plane, and heat dissipation area are often formed simultaneously with the same material as the wiring pattern when forming the substrate, copper foil for an organic substrate, conductive paste for a ceramic substrate, thin film metal, and thin film metal for silicon. However, a heat slug such as a metal plate or a metal foil having good heat conductivity may be formed in another step, and finally, the die pad, the heat dissipation plane, and the heat dissipation area may be connected by through holes. The formation of the through-holes may be performed by an existing technique, for example, a process of increasing the copper plating thickness by electrolytic plating after copper plating by electroless plating and leaving only necessary portions by etching. Of course, if the required amount of heat radiation is small, the structure may be such that only the die pad and the heat radiation plane or only the die pad and the heat radiation region are connected by through holes. If the required amount of heat radiation is large, the heat radiation plane or the heat radiation region may be made thick to increase the heat capacity, or the number of through holes may be increased. Further, instead of through holes, a structure may be used in which the substrate surface is connected to the inner layer substrate, or the inner layer substrate and the inner layer substrate are connected by via holes. Furthermore, if the conductive paste 10 such as silver paste is filled in the through hole or the via hole, the space in the through hole is filled with the conductive paste having good thermal conductivity, so that the apparent thermal resistance of the through hole is reduced. You can also. When a semiconductor element is die-attached to a die pad, the die-attach material often seeps through the through-holes on the back surface of the substrate and contaminates the back surface of the substrate. Before the die attach process, a resist such as solder or solder resist is applied and filled in the through hole in advance by a method such as printing or dispensing, and if the die attach is performed after curing or drying, the seepage of the die attach material on the back side of the substrate The problem can be avoided. When the die pad is formed by printing, the die pad may be coated and filled in advance in the through hole by printing at the same time. Also, a substrate that does not include a process of forming through holes and via holes, or if you do not want to form a through hole, make a through hole in the die pad on the substrate and apply conductive paste to it, It may be configured to be thermally connected to the heat radiation area. Although a part of the semiconductor element, the wire, and the wiring pattern are covered with the molding material 9, it is needless to say that the entire semiconductor device may be transfer-molded. The molding material is often a resin such as epoxy, silicone, or polyimide. Furthermore, if a process of treating the semiconductor device with oxygen or argon plasma is included before the molding process, the surface of a component constituting the semiconductor device, such as a substrate that does not have good adhesion to the mold resin, is generally exposed to oxygen or argon plasma. Since it is exposed to the environment, dirt on the surface is removed by sputtering, a new active surface with high surface energy appears, and if oxygen plasma is used, the surface is slightly oxidized and becomes hydrophilic. Even if it is covered with the resin, the separation between the mold resin and the surface of the component does not occur, the entry of water vapor is suppressed, the failure in the leak mode hardly occurs, and the reliability of the semiconductor device is improved.

  FIG. 2 is a front structural view of the semiconductor device of the present invention. In FIG. 2, reference numeral 8 denotes a semiconductor element, which is die-attached to a die pad 12, and a bonding pad 20 formed on the surface of the semiconductor element by a wire 7 and a wiring pattern 5 formed on the substrate 1. Wired. Reference numeral 22 denotes a notch portion of the die pad, which is formed in the substrate manufacturing process at the same time as the formation of the wiring pattern, and is aligned with a die number 23 formed on the semiconductor element when the semiconductor element is die-attached to the substrate. In order to prevent a mistake in the manufacturing process such as a wrong die attach direction, the mark is formed as an alignment mark. If the positional relationship between the notched portion of the die pad and the die number is determined, the positional relationship does not necessarily have to be the positional relationship shown in FIG. Further, the notch of the die pad may be formed by a method such as etching and printing as previously formed on the mask of the die pad at the time of manufacturing the substrate, or by applying ink by dispensing with increased position selection accuracy. Further, since the notched portion of the die pad is used as a positioning mark, in the manufacturing process of the die pad such as etching and printing, an alternative mark instead of the notch may be formed, and ink, resist, etc. Some alignment marks may be marked in a process different from the die pad manufacturing process such as printing. Furthermore, the semiconductor device in the state shown in FIG. 2 is often covered with a semiconductor element mounting region with a molding material.

  FIG. 3 is a front structural view of a semiconductor device during a manufacturing process according to the present invention. In FIG. 3, 1 is a substrate, 5 is a wiring pattern, 41 is a joining member such as solder or silver paste, and a plastic package 43 having 42 connection leads is mounted on the substrate. Numeral 40 denotes a solder resist, which is present only on the substrate between the wiring patterns and near the connection leads. As the solder resist, thermosetting and UV curable ones are often used, and are often formed into a pattern by printing. When the semiconductor device substrate is molded with a molding material after mounting to the state of this process, generally when a solder resist is applied to the entire surface of the substrate, the solder resist usually has poor adhesion to the mold resin. Separation easily occurs between the mold resins, water vapor invades, and impurities existing near the connection between the connection lead and the wiring pattern and inside the semiconductor device are ionized, and between the wiring patterns and between the substrate layers. Leak mode defects are more likely to occur. Therefore, as in the present invention, a structure in which the resist exists only on the wiring pattern or between the wiring patterns in the vicinity connecting the connection lead of the semiconductor package and the wiring pattern, and is generally a resist having poor adhesion to the mold resin. When the semiconductor device is covered with the mold resin, the peeling of the mold resin and the resist occurs only in the minimum area, even if it occurs. Is hardly ionized in the vicinity of the connection of the semiconductor device and in the inside of the other semiconductor device, so that a leak mode failure between wiring patterns and between substrate layers is less likely to occur, and the reliability of the semiconductor device is improved. Furthermore, since the body of the plastic package often contains a release material such as silicone, it is generally known that the body of the plastic package also has poor adhesion to the mold material. Therefore, as described above, if a step of treating the semiconductor device with oxygen or argon plasma before the molding step is included, the surface of the body of the plastic package is exposed to the oxygen or argon plasma environment. Removed by sputtering, a new active surface with high surface energy appears, and with oxygen plasma, the surface is slightly oxidized and becomes hydrophilic, so even if the body of the plastic package is covered with the molding material, the molding resin and the component surface Does not occur, the intrusion of water vapor is suppressed, the failure in the leak mode hardly occurs, and the reliability of the semiconductor device is improved. Further, since the solder resist is also exposed to an oxygen or argon plasma environment, the adhesion to the mold material can be improved, and the penetration of water vapor can be suppressed, so that the reliability of the semiconductor device can be further improved.

FIG. 4 is a sectional structural view of the semiconductor device of the present invention. In FIG. 4, reference numeral 8 denotes a semiconductor element, which is die-attached to the substrate 1 by a die attach material 6, and a bonding pad formed on a surface of the semiconductor element by a wire 7 and a wiring pattern formed on the substrate. 5 is connected. The wiring pattern and the lead frame 30 are electrically directly connected. The substrate is mechanically joined to the lead frame by this joining. As a lead frame, 42 alloy has been frequently used, but copper has also been used in response to the recent increase in heat generation of semiconductor elements. In order to improve the reliability of a semiconductor device, a semiconductor element and a part of a wire, a bonding pad, a substrate, a wiring pattern, and a part of a lead frame are often covered with a molding material 4, so that the semiconductor device has high electrical insulation. In addition, a structure that protects the semiconductor element from a humidity environment can be obtained. The molding material is often epoxy, silicone, or polyimide resin. As shown in the figure, it is sufficient to mold at least an important part such as a semiconductor element and a substrate joint by a potting mold or the like. As a means to join the board to the lead frame, gold plating is applied to the wiring pattern on the board, and gold plating, silver plating, tin plating, solder plating etc. Then, after aligning the joints 31, the members are joined by applying heat and pressure.
The wiring pattern side is not limited to gold plating, but may be plated with silver plating, tin plating, solder plating, or the like, or the wire bonding area may be plated with gold to change the bonding part and the type of plating. . When joining by applying heat and pressure, ultrasonic waves may be used, or the joints may be joined one by one by single point bonding. If a plurality of wiring patterns and one side, two sides, and all sides of the substrate are simultaneously bonded, the bonding efficiency is further improved. Further, a structure may be employed in which an anisotropic conductive film and an anisotropic conductive adhesive are interposed at the joint between the lead frame and the wiring pattern. Preliminarily press-bond or apply an anisotropic conductive film and an anisotropic conductive adhesive to the joints on the wiring pattern, align the lead frame and the wiring pattern with each other, and then apply heat and pressure to join. . Of course, an anisotropic conductive film or an anisotropic conductive adhesive may be temporarily pressed or applied to the joint on the lead frame. Further, a projection may be formed by half etching on a portion of the lead frame facing the wiring pattern on a portion where the lead frame is bonded to the wiring pattern, and the lead frame may be bonded by the above-described bonding method. A UV resin or a thermosetting resin is preliminarily compressed or applied to the wiring pattern or the joint on the lead frame, and the lead frame and the wiring pattern are aligned with each other. The bonding may be achieved by applying pressure and keeping the electrical contact between the wiring pattern and the lead frame by curing shrinkage of the resin. A plurality of semiconductor elements are often arranged on a substrate, and in some cases, are often mixed with other electronic components, such as the above-described plastic package. If a step of treating the semiconductor device with oxygen or argon plasma after the bonding and mounting of the semiconductor element is completed before the molding step, the reliability of the semiconductor device is further improved as described above.

  Further, instead of the potting type molding material described with reference to FIG. 4, if the semiconductor device is covered with a transfer molding material 34 generally having a high crosslinking density and excellent reliability as shown in FIG. 5, the semiconductor device is covered with the potting type molding material. Rather, the reliability of the entire semiconductor device can be improved. Of course, if the process of treating the semiconductor device with oxygen or argon plasma after the bonding and the mounting of the semiconductor element are completed before the molding process, the reliability of the semiconductor device is further improved as described above. Needless to say.

  FIG. 6 is a diagram showing a method of manufacturing the semiconductor device of the present invention having the structure shown in FIGS. In FIG. 6A, 1 is a substrate, and 5 is a wiring pattern formed on the substrate. Here, as shown in FIG. 6B, the semiconductor element 8 is die-attached to the substrate by the die attach material 6, and thereafter, the bonding pad formed on the surface of the semiconductor element and the wiring pattern are connected by the wire 7. I do. In this manner, the mounted semiconductor device has a portion to which the lead frame is to be connected, where the probe pins 35 are set up as shown in FIG. In this state, an electrical test of the semiconductor device can be performed from the probe pins. As a result, if a defect is found in the semiconductor element, the semiconductor device can be removed from the process or the semiconductor element can be replaced. In general, a lead frame is manufactured by etching or cutting a metal plate, so that the entire circuit is electrically short-circuited, so that the electrical connection between the lead frame and the wiring pattern on the substrate is completed. In this case, the mounting state of the board cannot be electrically inspected until the final process of trimming and forming the lead frame is completed. However, according to the present invention, the mounting state of the board is electrically inspected in the middle of the process. Now you can do it. Thereafter, the wiring pattern on the substrate and the lead frame 30 are aligned with each other, and then heated and pressed by a pressure bonding tool 36 to join them. The joining method is as described above. Thereafter, as described above, if necessary, a plasma process and a molding process are performed. Of course, in addition to the electrical inspection process, an appearance inspection may be added by visual inspection or the like. If the semiconductor device does not require an electrical inspection, the inspection is performed only by the appearance inspection, and the molding process is performed. If a defect is found in a semiconductor element before, the semiconductor device may be removed from the process or the semiconductor element may be replaced. The semiconductor element is die-attached to the board with a die attach material having reproducibility so that it can be replaced, or the semiconductor element is mounted on a tape carrier package or a plastic package in advance, which is then soldered or anisotropically mounted on the board. The connection may be made with a conductive film or a conductive paste, and the structure may be replaced.

1 is a sectional structural view of a semiconductor device of the present invention. 1 is a front structural view of a semiconductor device of the present invention. FIG. 3 is a front structural view of a semiconductor device during a manufacturing process according to the present invention. 1 is a sectional structural view of a semiconductor device of the present invention. 1 is a sectional structural view of a semiconductor device of the present invention. FIG. 4 is a view illustrating a method for manufacturing a semiconductor device of the present invention.

Explanation of reference numerals

REFERENCE SIGNS LIST 1 substrate 2 inner layer substrate 3 heat dissipation plane 4 heat dissipation area 5 wiring pattern 6 die attach material 7 wire 8 semiconductor element 9 mold material 10 conductive paste 11 through hole 12 die pad 20 bonding pad 22 die pad cutout 23 die number 30 lead frame 31 bonding part 34 transfer molding material 35 probe pin 36 crimping tool 40 solder resist 41 bonding member 42 connection lead 43 plastic package

Claims (18)

  A substrate, a semiconductor element mounted on a mounting area formed on the substrate first surface, a wiring pattern formed on the substrate and electrically connected to the semiconductor element, In a semiconductor device in which a semiconductor element and at least a part of the wiring pattern are covered with a resin, the mounting region penetrates the substrate, and a through hole that measures electrical continuity between layers of the substrate, or in the substrate. A via hole that penetrates only the specific layer and conducts electrical conduction between the specific layers is formed, and is the same member as the mounting area and the wiring pattern mounted inside the substrate or on the second surface of the substrate. A semiconductor, wherein a heat dissipation structure formed in the same step or a heat dissipation structure formed of a plate-like member is connected by the through hole or the via hole. Location.   2. The semiconductor device according to claim 1, wherein a resist exists in the through hole.   2. The semiconductor device according to claim 1, wherein a conductive paste is present in the through hole or the via hole.   A substrate, a semiconductor element mounted on a mounting area formed on the substrate first surface, a wiring pattern formed on the substrate and electrically connected to the semiconductor element, In a semiconductor device in which a semiconductor element and at least a part of the wiring pattern are covered with a resin, a through hole is formed in the mounting region, and the mounting region and the inside of the substrate or on a second surface of the substrate are formed. A semiconductor device, wherein the mounted heat dissipation structure is connected by a conductive paste in the through hole.   A substrate, a semiconductor element mounted on a mounting area formed on the substrate, a wiring pattern formed on the substrate and electrically connected to the semiconductor element, and the substrate and the semiconductor element; In a semiconductor device in which at least a part of the wiring pattern is covered with a resin, the same step as the above-described placement region forming step on the placement region outside the semiconductor element, or after the placement region formation step A semiconductor device characterized by being marked in a process.   6. The semiconductor device according to claim 5, wherein a part of the outside of the semiconductor element is marked by etching on the placement region.   A substrate, a semiconductor package mounted on the substrate, a wiring pattern formed on the substrate and electrically connected to a connection lead of the semiconductor package, and the substrate, the semiconductor package, the connection lead, In a semiconductor device in which at least a part of a wiring pattern is covered with a resin, only between the wiring patterns in a connection region where the connection lead and the wiring pattern are connected, and only on the wiring pattern near the connection region. And a resist.   Placing a semiconductor element or a semiconductor package on a substrate, connecting the semiconductor element or the semiconductor package to a wiring pattern formed on the substrate, and treating the semiconductor device with oxygen or argon plasma. A method of manufacturing a semiconductor device, comprising: a step of covering the substrate, the semiconductor element or the semiconductor package, and at least a part of the wiring pattern with a resin.   A substrate, a semiconductor element or a semiconductor package mounted on the substrate, a wiring pattern formed on the substrate, a lead frame electrically connected to the wiring pattern, the substrate and the semiconductor element And in a semiconductor device in which at least a part of the wiring pattern and the lead frame are covered with resin, electrical connection is obtained with the fingers of the lead frame partially overlapping the wiring pattern. A semiconductor device characterized by the above-mentioned.   10. The semiconductor device according to claim 9, wherein opposing connection surfaces of the finger and the wiring pattern are plated, and are joined by metal interdiffusion of the plating or eutectic.   10. The semiconductor device according to claim 9, wherein the finger and the wiring pattern are joined by an anisotropic conductive film or a conductive adhesive.   A step of mounting a semiconductor element or a semiconductor package on a substrate, a step of connecting the semiconductor element or the semiconductor package to a wiring pattern formed on the substrate, and a step of connecting a lead frame disposed on the side of the substrate. Electrically bonding the fingers and the wiring pattern, and thereafter covering the substrate and the semiconductor element or the semiconductor package and at least a part of the wiring pattern with a resin, the method of manufacturing a semiconductor device, A method of manufacturing a semiconductor device, wherein an electrical joining step between the finger of the lead frame and the wiring pattern is a direct joining step.   13. The method according to claim 12, wherein the step of direct bonding is a step of bonding the fingers one by one to the wiring pattern by applying ultrasonic waves and pressure.   13. The method of manufacturing a semiconductor device according to claim 12, wherein the step of direct bonding is a step of simultaneously bonding the plurality of fingers to the wiring pattern by applying heat and pressure.   A step of mounting a semiconductor element or a semiconductor package on a substrate, a step of connecting the semiconductor element or the semiconductor package to a wiring pattern formed on the substrate, and a step of connecting a lead frame disposed on the side of the substrate. The method of manufacturing a semiconductor device, comprising: a step of electrically joining a finger and the wiring pattern; and a step of subsequently covering at least a part of the wiring pattern with the substrate and the semiconductor element or the semiconductor package and the wiring pattern. A semiconductor device having an inspection step before an electrical bonding step between the frame fingers and the wiring pattern, and a step of performing an electrical connection between the fingers and the wiring pattern thereafter; Production method.   16. The semiconductor according to claim 15, wherein the step of making an electrical connection between the finger and the wiring pattern is a step of electrically connecting the finger while partially overlapping the wiring pattern. Device manufacturing method.   16. The method according to claim 15, wherein the step of electrically connecting the finger and the wiring pattern is performed by wire bonding. The method according to claim 15, wherein the inspection step is an electrical inspection step of bringing a probing pin into contact with the wiring pattern.

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