JPH10221376A - Method for inspecting semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor inspection method of a compact arrangement whereby all chips of a wafer to be inspected can be brought in contact altogether with the use of a contact wafer of the same size as the wafer to be inspected. SOLUTION: According to the semiconductor inspection method, a contact wafer 6 is used which has a contact bump 8 at a face to be in touch with a wafer 7 to be inspected and, a pad at a face to be in touch with a performance board. The wafer 7 is inspected with the use of the contact wafer 6 of the same size by connecting the wafer 7 via an electric circuit to the bump 8 and pad. The contact wafer can be of the same size as the wafer 7 to be inspected, and therefore the method costs low and can be compact.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor inspection method for an overall contact inspection using a silicon wafer.

[0002]

2. Description of the Related Art Conventionally, in an inspection using a probe card, an inspection is performed by contacting a needle of the probe card with a single wafer or a plurality of chips to a wafer to be inspected (DUT). Had not gone. Therefore, when considering the entire surface of the wafer to be inspected, a circuit and a bump for contacting the wafer to be inspected are formed at the center of the contact wafer (CW) using a glass substrate or the like having a larger diameter than the wafer to be inspected. And a performance board (PB) on the outer periphery
A method of providing a pad for connection with the wiring and wiring between them has been considered.

FIG. 3 is a cross-sectional view showing a conventional method for inspecting a semiconductor with full contact. In FIG. 3, 1 is a large-diameter glass substrate, 2 is a contact wafer (CW), 3 is a wafer to be inspected (DUT), and 4 is a bump. In the conventional method of inspecting a semiconductor with full contact, a wafer 3 to be inspected is raised and inspected in order to contact a contact wafer 2 on a glass substrate 1 with a bump 4 provided at the center thereof.

[0004]

However, in the above-described conventional semiconductor inspection method, when an inspection is performed by applying a temperature to a wafer to be inspected, the contact wafer has a difference in thermal expansion coefficient between the wafer to be inspected and the contact wafer. However, there has been a problem that the position is shifted and the contact is shifted. Conventionally, in order to solve this problem, the contact wafer is made of silicon of the same material as the wafer to be inspected, and the thermal expansion coefficients of the contact wafer and the inspected wafer are approximated. A method has been used in which deviation is prevented and contact is made accurately. However, even in this case, in order to extract an electric signal, a wafer to be inspected having a diameter of 8 inches is required.
A contact wafer made of a silicon substrate of a 12-inch diameter class is required, and there has been a problem of increasing the size.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and has as its object to provide a semiconductor inspection method capable of contacting all chips of a wafer to be inspected collectively by using a contact wafer having the same size as the wafer to be inspected. And

[0006]

In order to solve the above-mentioned problems, a semiconductor inspection method according to the present invention raises a wafer to be inspected with respect to a contact wafer on a glass substrate, and moves the wafer to a bump provided on the contact wafer. A semiconductor inspection method for contacting, wherein the contact wafer has a contact bump on a surface side to be in contact with a wafer to be inspected, and a contact wafer having pads on a surface side to be contacted with a performance board. Inspection is performed with a contact wafer of the same size as the wafer to be inspected by connecting both the bump and the pad with an electric circuit.

A semiconductor inspection method for raising a wafer to be inspected with respect to a contact wafer on a glass substrate and contacting bumps provided on the contact wafer, wherein pads are formed on both outer peripheral surfaces of the contact wafer, Using a contact wafer in which a notch is formed from the outer periphery toward the center of the pad, and using the notch to provide a conductive portion between the pad on the front surface and the back surface of the wafer to be inspected, the surface of the contact wafer is provided. Inspection is conducted by connecting the back surface with the back surface.

In this inspection method, both the contact wafer and the wafer to be inspected are made of a silicon material, and the substrates have the same thermal expansion coefficient.

As described above, by making the contact wafer the same size as the wafer to be inspected, the inspection apparatus can be reduced in size and cost. In addition, by conducting between the front surface and the back surface of the contact wafer, the wiring length is shortened, and the floating capacitance of the wiring can be reduced. Note that the formation of the cut in the contact wafer can be made using a dicing saw, which is an existing equipment in a semiconductor manufacturing process, which is advantageous in the process.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the semiconductor inspection method of the present invention will be described below with reference to the drawings. FIG.
Is a cross-sectional view showing a semiconductor inspection method of the present embodiment,
The outline of the full contact inspection is shown. FIG. 2 is a plan view showing a contact wafer in the semiconductor inspection method of the present embodiment.

As shown in FIGS. 1 and 2, a semiconductor inspection method according to this embodiment uses a contact wafer 6 on a glass substrate 5.
In contrast, the inspection is performed by raising the inspected wafer 7 and making contact with the bumps 8 provided on the contact wafer 6. In the present embodiment, the inspection is performed by contacting the inspected wafer 7 with the contact wafer 6 of the same size, and the inspection can be performed without requiring a large-diameter contact wafer as in the related art. Note that a silicon substrate is used for both the contact wafer 6 and the inspection target wafer 7 in order to make the thermal expansion coefficients uniform. In the present embodiment, as shown in FIG. 2, the pads 9 are formed on the contact wafer 6, the cuts 10 are formed toward the center, and the conductive portions are provided between the pads 9, so that the contact wafer 6 is formed. The front and back surfaces are electrically connected.

Therefore, according to the semiconductor inspection method of this embodiment, the bumps 8 for contacting the chips on the wafer 7 to be inspected are formed on the surface of the contact wafer 6, that is, the side contacting the wafer 7 to be inspected. A pad 9 for forming a contact with the performance board is formed on the back side, and the pad 9 is connected to the both by an electric circuit, so that the inspection can be performed with the contact wafer 6 having the same size as the wafer 7 to be inspected. It is. Therefore, by making the size of the contact wafer 6 the same as the size of the wafer 7 to be inspected, the inspection apparatus becomes smaller and the cost is reduced.

In the semiconductor inspection method of the present embodiment, pads 9 are formed on both outer peripheral surfaces of the contact wafer 6, and a cut 10 is formed from the outer periphery of the wafer 7 to be inspected toward the center of the pad 9. This is a semiconductor inspection method in which a conduction portion is provided between a pad on the front surface and the back surface of the wafer 7 to be inspected by using the cut 10 to conduct the front surface and the rear surface of the contact wafer 6. Therefore, there is an advantage that the electrical connection between the front surface and the rear surface of the contact wafer 6 shortens the wiring length and reduces the floating capacitance of the wiring. In addition, the formation of the cut 10 in the contact wafer 6 is advantageous in terms of the process because it can be formed by using a dicing saw, which is a facility existing in the semiconductor manufacturing process.

Further, in the semiconductor inspection method of the present embodiment, since the tester cannot inspect all chips at once, a switching circuit is formed by utilizing the feature that the contact wafer 6 is a substrate made of a silicon material. This is a semiconductor inspection method using the provided contact wafer 6, and the connection with the performance board can be reduced by forming a switching circuit on the contact wafer 6.

The semiconductor inspection method according to the present embodiment is a semiconductor inspection method using a contact wafer having a selectable matrix circuit for electrically recognizing each chip, whereby each chip can be arbitrarily selected. Can,
The same measurement can be performed efficiently.

As described above, the semiconductor inspection method according to the present embodiment is a semiconductor inspection method in which the wafer 7 to be inspected is raised with respect to the contact wafer 6 on the glass substrate 5 and contacts the bumps 8 provided on the contact wafer 6. A contact wafer 6 having contact bumps 8 on the side contacting the wafer to be inspected 7 and pads 9 on the side contacting the performance board is used.
This is a semiconductor inspection method in which an inspection can be performed using a contact wafer 6 having the same size as the wafer 7 to be inspected by connecting both the bumps 8 and the pads 9 with an electric circuit for the inspection. Pads 9 are formed on both surfaces of the outer periphery, and a contact wafer 6 having a notch 10 formed from the outer periphery toward the center of the pad 9 is used.
This is a semiconductor inspection method in which a conduction portion is provided between pads on the front surface and the back surface of the wafer 7 to be inspected by using the method, thereby making the front surface and the back surface of the contact wafer 6 conductive. In addition,
In order to make the thermal expansion coefficients of both the contact wafer 6 and the inspected wafer 7 uniform, a silicon substrate is used.
The inspection can be performed while preventing the positional deviation of the contact wafer.

[0017]

As is clear from the description of the embodiments, the present invention has contact bumps on the side contacting the wafer to be inspected and pads on the side contacting the performance board. By using the contact wafer provided, the contact wafer and the wafer to be inspected can be made the same size, and this is an excellent semiconductor inspection method capable of coping with miniaturization at low cost.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a semiconductor inspection method according to an embodiment of the present invention.

FIG. 2 is a plan view showing a contact wafer in the semiconductor inspection method according to one embodiment of the present invention;

FIG. 3 is a sectional view showing a conventional semiconductor inspection method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Contact wafer 3 Inspection wafer 4 Bump 5 Glass substrate 6 Contact wafer 7 Inspection wafer 8 Bump 9 Pad 10 Cut

Claims (3)

[Claims] 1. A semiconductor inspection method in which a wafer to be inspected is raised with respect to a contact wafer on a glass substrate to contact a bump provided on the contact wafer, wherein the contact wafer is contacted with the wafer to be inspected. A contact wafer having a contact bump on the side to be contacted and a pad on the side contacting the performance board is connected to both the bump and the pad by an electric circuit. A semiconductor inspection method, wherein an inspection is performed using a contact wafer having the same size as a wafer to be inspected. 2. A semiconductor inspection method in which a wafer to be inspected is raised with respect to a contact wafer on a glass substrate to contact bumps provided on the contact wafer, wherein pads are formed on both outer peripheral surfaces of the contact wafer. Using a contact wafer in which a cut is formed from the outer periphery toward the center of the pad, using the cut, by providing a conductive portion between the pad on the front surface and the back surface of the wafer to be inspected, A semiconductor inspection method, wherein the inspection is performed by making the front and rear surfaces of the contact wafer conductive. 3. The semiconductor inspection method according to claim 1, wherein both the contact wafer and the wafer to be inspected are made of a silicon material, and a substrate having a uniform thermal expansion coefficient is used.