JPH10163620A - Method and apparatus for soldering electronic components - Google Patents

Method and apparatus for soldering electronic components

Info

Publication number
JPH10163620A
JPH10163620A JP8321438A JP32143896A JPH10163620A JP H10163620 A JPH10163620 A JP H10163620A JP 8321438 A JP8321438 A JP 8321438A JP 32143896 A JP32143896 A JP 32143896A JP H10163620 A JPH10163620 A JP H10163620A
Authority
JP
Japan
Prior art keywords
soldering
metal base
substrate
chamber
main chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8321438A
Other languages
Japanese (ja)
Inventor
Mikio Takeuchi
幹雄 武内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP8321438A priority Critical patent/JPH10163620A/en
Publication of JPH10163620A publication Critical patent/JPH10163620A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494Heating methods for reflowing of solder

Abstract

PROBLEM TO BE SOLVED: To provide a method and apparatus for soldering electronic components, suited for soldering a directly bonded Cu board to a metal base. SOLUTION: A capillary diffusion type soldering zone 6 is disposed between a main chamber 7 held in a reductive and low-O concn. atmosphere inside and branch chamber 8 held in a reductive atmosphere inside. This chamber 8 is coupled just in the front of the soldering zone. The main chamber 7 has a base conveyer 7a for carrying a metal base 3 with its soldering surface up and preheating and cooling means disposed separately in an inlet, soldering zone and outlet. The branch chamber 8 has a board conveyer 8a for carrying a ceramic board 1 in this chamber 8 with the soldering surface down and overlaying it on the base 3 in the main chamber 7, and preheating means for preheating the board 1 and the base 3 being exposed to the reductive atmosphere during carrying, overlaying it on the base 3 just before the soldering zone to solder them.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えば、パワート
ランジスタモジュールを対象に、半導体チップ(IGB
T),フリーホイーリングダイオードなどの電子部品を
マウントしたセラミックス基板(例えば、セラミックス
板を挟んでその両面に銅箔を直接結合したダイレクトボ
ンデッドカッパー(Direct Bonded Copper) 基板をヒー
トシンクとしての金属ベースの上に重ね合わせてはんだ
接合する場合のはんだ付け法として好適な電子部品のは
んだ付け方法,およびそのはんだ付け装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip (IGB) for a power transistor module, for example.
T), a ceramic substrate on which electronic components such as a freewheeling diode are mounted (for example, a direct-bonded copper substrate in which copper foil is directly bonded to both sides of a ceramic plate with a metal base as a heat sink) The present invention relates to a method for soldering an electronic component, which is suitable as a soldering method in a case where the components are superposed on each other and soldered, and a soldering apparatus therefor.

【0002】[0002]

【従来の技術】頭記したチップ素子実装済みのセラミッ
クス基板を金属ベース(銅板)にはんだ付けする際に、
接合面はんだ層内にはんだ付け欠陥(伝熱抵抗の増加)
となるボイドの発生を抑えて製品の信頼性,製造歩留り
の向上を図ることを狙いに、金属ベースの上面側にはあ
らかじめはんだ接合面域の周縁部に微小な突起を形成し
ておき、はんだ付け炉へ搬入する前段で金属ベース上に
はんだ付け面を下に向けて基板を重ね合わせた後、この
重ね合わせ状態で炉内を還元性ガス雰囲気に保ったはん
だ付け炉に搬入し、その搬送途上で金属ベース,基板を
はんだ付け温度まで予熱しつつ、はんだ付けを行う際に
は基板の中央部を上方から加圧ピンで金属ベースへ向け
て押圧しながら基板の外周縁側からはんだ供給ヘッダを
通じて金属ベース上に供給した溶融はんだを、毛細管浸
透作用とはんだ接合面の濡れ性により基板と金属ベース
の間の接合面域の隙間へ浸透、拡散させてフラックスを
用いずにはんだ接合するようにした方式のはんだ付け装
置が開発され、そのはんだ付け方法が本発明と同一出願
人より特願平7−204119号として既に提案されて
いる。
2. Description of the Related Art When a ceramic substrate on which chip elements are mounted is soldered to a metal base (copper plate),
Soldering defects in the solder layer on the joint surface (increase in heat transfer resistance)
With the aim of suppressing the generation of voids and improving product reliability and manufacturing yield, small projections are formed in advance on the periphery of the solder joint surface area on the upper side of the metal base, and solder Before stacking the substrates with the soldering surface facing down on the metal base before loading into the soldering furnace, transport the wafers into the soldering furnace with the furnace kept in a reducing gas atmosphere in this stacked state. While pre-heating the metal base and the board to the soldering temperature on the way, when soldering, press the center of the board from above to the metal base with a pressure pin from the outer peripheral side of the board through the solder supply header. The molten solder supplied on the metal base penetrates and diffuses into the gap in the joint surface area between the substrate and the metal base by capillary penetration and wettability of the solder joint surface, and soldering is performed without using flux. Is to way scheme soldering apparatus of development, the soldering method has been proposed as Japanese Patent Application No. 7-204119 of the same applicant as the present invention.

【0003】かかるはんだ付け方法によれば、はんだの
毛細管浸透作用がセラミックス基板の周縁部に比べて中
央部に強く作用し、溶融はんだが先に中央面域から広が
るために、金属ベースとの間の面隙間に残存,もしくは
発生したガスが基板の中央部から周縁部に押し出されて
排除されるので、はんだ層内に生じるボイドの発生率が
低く抑えられて信頼性の高い半導体デバイスの製造が可
能となる。しかも予備はんだを施す工程も必要なく、は
んだ付け工程のリードタイムを短縮して高い生産性が得
られる。
According to such a soldering method, the capillary action of the solder acts more strongly on the central portion than on the peripheral portion of the ceramic substrate, and the molten solder spreads first from the central surface area. The remaining gas or generated gas is pushed out from the central part of the substrate to the peripheral part of the substrate and is eliminated, so that the rate of voids generated in the solder layer is suppressed to a low level, and a highly reliable semiconductor device can be manufactured. It becomes possible. Moreover, there is no need for a step of applying a pre-soldering step, and the lead time of the soldering step can be shortened to obtain high productivity.

【0004】[0004]

【発明が解決しようとする課題】ところで、前述したは
んだ付け方法(以下、「毛細管浸透式はんだ付け法」と
称する)は、セラミックス基板,金属ベースのはんだ接
合面域での溶融はんだに対する「濡れ性」が十分に確保
されていることが前提条件であり、仮にはんだ接合面に
局部的な汚れ,酸化膜などが生じていると、この部分で
ははんだとの「濡れ性」が低下して溶融はんだの毛細管
浸透作用が有効に機能せず、このためにはんだ層内にボ
イドが多発することが発明者等の行った実験,検査(軟
X線透過検査)の結果から知見されている。しかも、は
んだ付け層内にボイドが多く発生すると基板/金属ベー
ス間の伝熱性が悪化し、これが原因で通電時には半導体
素子内部の接合温度が大きく上昇するなど、半導体装置
の特性を著しく低下させる原因となる。
The above-mentioned soldering method (hereinafter referred to as "capillary infiltration type soldering method") is based on the "wetting property to the molten solder in the solder joint surface area of the ceramic substrate and the metal base." It is a prerequisite that sufficient soldering is ensured. If local dirt, oxide film, etc. occur on the solder joint surface, the "wettability" with the solder is reduced in this area and the molten solder It has been found from the results of experiments and inspections (soft X-ray transmission inspection) conducted by the inventors that the capillary penetration effect of the above does not function effectively and that voids frequently occur in the solder layer. In addition, if many voids are generated in the soldering layer, the heat transfer between the substrate and the metal base is deteriorated, and this causes a significant decrease in the characteristics of the semiconductor device, such as a significant increase in the junction temperature inside the semiconductor element during energization. Becomes

【0005】特に、頭記したダイレクトボンデッドカッ
パー基板は、銅と微量の酸素との反応により生成するC
u−O共晶液相を利用してセラミックス板に銅箔を接合
するものであり、通常その接合工程ではモリブデン(M
o)のメッシュ板の上にセラミックス板と銅箔を重ね合
わせて載せ、Cu−O共晶温度(1065℃)以上の温
度範囲で加熱してセラミックスと銅箔を接合するように
している。このために、銅箔の表面に酸化膜が生成する
ほか、僅かであるがモリブデンが残り、これが溶融はん
だとの「濡れ性」を低下させる原因になっている。
[0005] In particular, the direct bonded copper substrate mentioned above is formed by reacting copper with a trace amount of oxygen.
A copper foil is bonded to a ceramics plate using a u-O eutectic liquid phase. In the bonding process, molybdenum (M
The ceramic plate and the copper foil are superimposed on the mesh plate of o), and the ceramic and the copper foil are joined by heating in a temperature range not lower than the Cu-O eutectic temperature (1065 ° C). For this reason, an oxide film is formed on the surface of the copper foil, and molybdenum remains, albeit slightly, which lowers the “wetability” with the molten solder.

【0006】かかる点、前記した従来のはんだ付け方法
では、はんだ付け炉外の大気中で金属ベースの上に基板
を重ね合わせ、この重ね合わせ状態のまま還元性雰囲気
に保ったはんだ付け炉に搬入して予熱しながらはんだ付
け部まで搬送するようにしていることから、金属ベー
ス,基板のはんだ付け面が炉内の還元性ガスに十分曝露
されない。そのために、炉内に搬入する以前にはんだ付
け面に生じた酸化膜に対して炉内の還元性ガスによる還
元作用が有効に働かず、かつはんだ付け面の吸着ガス,
水分のガス置換による除去も不十分で溶融はんだに対す
る「濡れ性」が低下し、これが原因ではんだ付け接合部
にボイドが多く発生してセラミックス基板/金属ベース
間の伝熱性を悪化させる。
In this regard, in the above-mentioned conventional soldering method, the substrate is superimposed on the metal base in the atmosphere outside the soldering furnace, and the substrate is transferred to a soldering furnace maintained in a reducing atmosphere in the superimposed state. As a result, the metal base and the soldering surface of the substrate are not sufficiently exposed to the reducing gas in the furnace. For this reason, the reducing action of the reducing gas in the furnace does not work effectively on the oxide film formed on the soldering surface before being transferred into the furnace, and the adsorbed gas on the soldering surface does not work.
Moisture is also insufficiently removed by gas replacement, and the "wetability" to the molten solder is reduced. This causes many voids to be generated at the soldered joint and deteriorates the heat transfer between the ceramic substrate and the metal base.

【0007】図3はこの様子を表したパワートランジス
タモジュールの模式図であり、図において、1はアルミ
ナなどのセラミックス板1aを挟んでその上下両面に銅
箔1b,1cを接合したセラミックス基板(ダイレクト
ボンデッドカッパー基板)、2は上面側の銅箔1bに形
成した回路パターンにマウントしたパワートランジスタ
(IGBT),フリーホイーリングダイオードなどチッ
プ素子(ベアチップ)、3は放熱用の金属ベース(銅
板)、4は前記の毛細管浸透はんだ付け法によってダイ
レクトボンデッドカッパー基板1の銅箔1cと金属ベー
ス3との間を接合したはんだ層であり、はんだ接合面の
汚れ,酸化膜などに起因する「濡れ性」の低下に伴って
はんだ層4に局部的に生じたボイドを符号5で示す。
FIG. 3 is a schematic diagram of a power transistor module showing this state. In the figure, reference numeral 1 denotes a ceramic substrate (direct ceramic substrate) in which copper foils 1b and 1c are bonded to upper and lower surfaces of a ceramic plate 1a made of alumina or the like. Bonded copper substrate), 2 is a chip element (bare chip) such as a power transistor (IGBT), freewheeling diode mounted on a circuit pattern formed on a copper foil 1b on the upper surface side, 3 is a metal base (copper plate) for heat dissipation, Reference numeral 4 denotes a solder layer which joins between the copper foil 1c of the direct bonded copper substrate 1 and the metal base 3 by the above-mentioned capillary penetration soldering method, and has a "wetting property caused by dirt on the solder joint surface, an oxide film and the like. The voids generated locally in the solder layer 4 with the decrease in “” are indicated by reference numeral 5.

【0008】本発明は上記の点にかんがみなされたもの
であり、頭記した毛細管浸透式はんだ付け方法を基本
に、フラックスレスでボイドフリーな良質のはんだ付け
が実現できるように改良した、特にダイレクトボンデッ
ドカッパー基板を金属ベース上にはんだ接合するのに好
適な電子部品のはんだ付け方法,およびはんだ付け装置
を提供することを目的とする。
The present invention has been made in view of the above points, and has been improved based on the capillary penetration soldering method mentioned above so as to realize flux-less and void-free high-quality soldering. It is an object of the present invention to provide an electronic component soldering method and a soldering apparatus suitable for bonding a bonded copper substrate to a metal base by soldering.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に、本発明のはんだ付け方法によれば、フラックスを用
いずにチップ素子を搭載したダイレクトボンデッドカッ
パー基板などの絶縁基板,および金属ベースを個別には
んだ付け炉に搬入してそのはんだ付け面を還元性雰囲気
に曝露させながらその搬送途上で予熱し、はんだ付けの
直前で金属ベースの上に基板を重ね合わせてはんだ付け
を行うものとする。
In order to achieve the above object, according to the soldering method of the present invention, an insulating substrate such as a direct bonded copper substrate on which a chip element is mounted without using a flux, and a metal base Are individually brought into a soldering furnace, preheated during the transfer while exposing the soldering surface to a reducing atmosphere, and the board is superimposed on a metal base and soldered immediately before soldering. I do.

【0010】また、前記はんだ付け方法の実施に用いる
本発明のはんだ付け装置は、炉内中央に配したはんだ付
け部に連ねてその前後に内部雰囲気をそれぞれ還元性雰
囲気,および低酸素濃度雰囲気に保ったトンネル状の主
チャンバーと、内部雰囲気を還元性雰囲気に保って主チ
ャンバーのはんだ付け部直前位置に連結したトンネル状
の分岐チャンバーとを有し、主チャンバーにははんだ付
け面を上に向けて入口から供給した金属ベースをはんだ
付け部を経て出口に向けて搬送するベース搬送手段,お
よび該搬送手段に沿って主チャンバーの入口からはんだ
付け部の区間,およびはんだ付け部から出口までの区間
に配した金属ベースの予熱,冷却手段を装備し、分岐チ
ャンバーにははんだ付け面を下に向けて入口から供給し
た基板を主チャンバーに搬送して金属ベースの上に重ね
合わせる基板搬送手段,および基板の予熱手段を装備し
て構成するものとする。
In the soldering apparatus of the present invention used for carrying out the above-mentioned soldering method, the internal atmosphere is connected to a reducing atmosphere and a low oxygen concentration atmosphere before and after the soldering portion arranged in the center of the furnace. The main chamber has a tunnel-shaped main chamber and a tunnel-shaped branch chamber connected to the main chamber just before the soldering part while maintaining the internal atmosphere in a reducing atmosphere, with the soldering surface facing up in the main chamber. Transfer means for transferring the metal base supplied from the inlet through the soldering section to the outlet, and a section along the transfer means from the inlet of the main chamber to the soldering section and from the soldering section to the outlet. Equipped with a metal-based preheating and cooling means arranged in the main chamber, and the branch chamber receives the board supplied from the inlet with the soldering surface facing down. It shall constitute equipped substrate transfer means superposed on the metal base and transported to over, and the preheating means of the substrate.

【0011】上記のように、はんだ付け炉に対して金属
ベース,および基板を個別に別々なルートから還元性雰
囲気に保たれたチャンバー内に搬入して予熱し、ベース
と基板とをはんだ付け部の直前で重ね合わせて毛細管浸
透方式ではんだ付けすることにより、ベース,基板を重
ね合わせる以前の段階ではんだ付け面が十分に還元性ガ
スに曝露され、酸化物の還元、および吸着ガス,水分の
置換が行われてはんだ付け面の溶融はんだに対する高い
「濡れ性」が確保される。これにより、続く毛細管浸透
はんだ付け工程では、フラックスを使わずに金属ベース
に基板をボイドの発生なしにはんだ付けすることができ
る。
[0011] As described above, the metal base and the substrate are individually loaded into the chamber kept in the reducing atmosphere through separate routes into the chamber for soldering and preheated, and the base and the substrate are soldered together. And soldering by capillary infiltration method just before the step, the soldering surface is sufficiently exposed to the reducing gas before the base and substrate are overlapped, reducing oxides and reducing adsorbed gas and moisture. Substitution is performed to ensure high "wetting" of the soldered surface with the molten solder. Thus, in the subsequent capillary penetration soldering step, the substrate can be soldered to the metal base without using a flux without generating voids.

【0012】なお、はんだ付け部から出たベースと基板
の組立体は、低酸素濃度雰囲気に保たれた主チャンバー
の下流側経路を通じて出口へ搬送される過程ではんだが
冷却,凝固する。
The base and the substrate assembly coming out of the soldering part are cooled and solidified in the course of being conveyed to the outlet through the downstream path of the main chamber kept in a low oxygen concentration atmosphere.

【0013】[0013]

【発明の実施の形態】以下、パワートランジスタモジュ
ールを対象に、図3に示したセラミックス基板(ダイレ
クトボンデッドカッパー基板)にIGBTなどのチップ
素子をマウントしたパワー回路組立体を金属ベース(銅
板)の上にはんだ付けする場合を例に、本発明の実施例
を図面に基づいて説明する。
BEST MODE FOR CARRYING OUT THE INVENTION A power circuit assembly in which a chip element such as an IGBT is mounted on a ceramic substrate (direct bonded copper substrate) shown in FIG. An embodiment of the present invention will be described with reference to the drawings, taking the case of soldering as an example.

【0014】まず、図1に本発明のはんだ付け方法の実
施に用いるはんだ付け装置を示す。すなわち、はんだ付
け炉は先記した毛細管浸透式のはんだ付け部6を中央に
配してその前後に延在するトンネル状の主チャンバー7
と、はんだ付け部6の直前位置から側方に分岐したトン
ネル状の分岐チャンバー8とからなり、主チャンバー7
に対してはその入口(左側端)から窒素,水素を混合し
た還元性ガスを流してはんだ付け部6までの区間を還元
性雰囲気に保ち、かつはんだ付け部6から主チャンバー
7の出口(右端)までの区間は低酸素雰囲気に保つよう
にしている。また、分岐チャンバー8に対しても、その
入口側から還元性ガスを供給してチャンバー内部を還元
性雰囲気に保っている。
FIG. 1 shows a soldering apparatus used for carrying out the soldering method of the present invention. That is, the soldering furnace has the above-mentioned capillary-penetrating soldering portion 6 arranged at the center thereof and a tunnel-shaped main chamber 7 extending before and after the soldering portion 6.
And a tunnel-shaped branch chamber 8 branched laterally from a position immediately before the soldering portion 6.
, A reducing gas containing a mixture of nitrogen and hydrogen is supplied from the inlet (left end) to keep the section up to the soldering section 6 in a reducing atmosphere, and the solder chamber 6 exits from the main chamber 7 (right end). The section up to) is kept in a low oxygen atmosphere. Also, a reducing gas is supplied to the branch chamber 8 from the inlet side to maintain the inside of the chamber in a reducing atmosphere.

【0015】また、主チャンバー7にはその入口と出口
の間にはんだ付け面を上に向けて金属ベース3を搬送す
るベース搬送部7aが、分岐チャンバー8の内部にはは
んだ付け面を下に向けてセラミックス基板1を真空チャ
ックなどで吊り下げ搬送する3軸ロボットしての基板搬
送部8aが組み込まれている。さらに、主チャンバー7
にはベース搬送部7aに沿ってその入口からはんだ付け
部6との間の加熱経路には金属ベース3を段階的にはん
だ付け温度まで加熱昇温するホットプレート式の予熱部
を、はんだ付け部6と出口の間の冷却経路にはコールド
プレート式の冷却部を備えており、分岐チャンバー8に
は基板搬送部8aの搬送経路に沿って下方からセラミッ
クス基板1のはんだ付け面を加温する赤外線ランプなど
の輻射式予熱源を備えている。
The main chamber 7 has a base transfer section 7a for transferring the metal base 3 with its soldering surface facing upward between its inlet and outlet, and inside the branch chamber 8, the soldering surface faces downward. A substrate transport unit 8a as a three-axis robot that suspends and transports the ceramic substrate 1 with a vacuum chuck or the like is installed. Furthermore, the main chamber 7
The heating path between the entrance and the soldering section 6 along the base transfer section 7a includes a hot plate type preheating section for heating and raising the temperature of the metal base 3 to the soldering temperature stepwise. A cooling path of a cold plate type is provided in a cooling path between the outlet 6 and the outlet, and an infrared ray for heating the soldering surface of the ceramic substrate 1 from below along the transfer path of the substrate transfer section 8a in the branch chamber 8. A radiant preheating source such as a lamp is provided.

【0016】一方、はんだ付け部6には、後記のように
ホットプレートを配して、その上に移載した金属ベース
3をはんだ(例えばSn63%−Pb37%,あるいは
Sn40%−Pb60%)の溶融温度よりも高い290
℃程度に加熱するようにしている。さらに、主チャンバ
ー7に対してその入口側にはトレー上に整列している金
属ベース3を1個ずつピックアップして搬送部7aに受
け渡すローダ9,および出口側には搬送部7aからベー
スと基板のはんだ付け組立体を取り出すアンローダ10
を備え、分岐チャンバー8の入口側にはトレー上に整列
したセラミックス基板(チップ素子実装済みの基板)を
1個ずつピックアップして基板搬送部8aに受け渡す基
板ローダ11を備えている。
On the other hand, a hot plate is disposed on the soldering portion 6 as described later, and the metal base 3 transferred thereon is soldered (for example, Sn 63% -Pb 37%, or Sn 40% -Pb 60%). 290 above melting temperature
Heat to about ° C. Further, the loader 9 picks up the metal bases 3 arranged on the tray one by one and transfers them to the transfer section 7a at the entrance side of the main chamber 7 and the base from the transfer section 7a at the exit side. Unloader 10 for removing a soldering assembly of a substrate
And a substrate loader 11 that picks up ceramic substrates (substrates on which chip elements are mounted) arranged on a tray one by one and transfers them to the substrate transfer unit 8a.

【0017】かかる構成のはんだ付け装置において、主
チャンバー7の入口側でローダ9によりはんだ付け面を
上に向けて金属ベース3をベース搬送部7aに供給し、
はんだ付け部6に向けて炉内を搬送しながらその途上で
金属ベース3を予熱する。一方、分岐チャンバー8側で
は、金属ベース3を炉内に搬入するタクト動作に合わせ
て、ローダ11によりはんだ接合面を下に向けてセラミ
ックス基板1を基板搬送部8aに受渡し、チャンバー内
の搬送途上で基板のはんだ付け面を予熱する。そして、
分岐チャンバー8を通じて主チャンバー7に搬入された
セラミックス基板1を、はんだ付け部6の直前位置に待
機している金属ベース1の上に上方から吊り下ろして定
位置に重ね合わせ、続いてはんだ付け部6に移送しては
んだ付け(はんだ付け部の詳細構造については図2で説
明する)を行い、その後に主チャンバー7の出口に向け
て低酸素雰囲気中を搬送する途上で金属ベース3を冷却
してはんだを凝固させた後、主チャンバー7の出口側で
搬送部7aよりはんだ付け済みの組立体をアンローダ1
0で取り出す。
In the soldering apparatus having such a configuration, the metal base 3 is supplied to the base transfer section 7a by the loader 9 at the entrance side of the main chamber 7 with the soldering surface facing upward.
The metal base 3 is preheated while being transported through the furnace toward the soldering section 6. On the other hand, on the branch chamber 8 side, the ceramic substrate 1 is transferred to the substrate transfer section 8a with the solder joint surface facing downward by the loader 11 in accordance with the tact operation of loading the metal base 3 into the furnace, and the transfer is performed in the chamber. Preheat the soldering surface of the board with. And
The ceramic substrate 1 carried into the main chamber 7 through the branch chamber 8 is suspended from above on the metal base 1 waiting at a position immediately before the soldering section 6 from above, and is superimposed on a fixed position. 6 for soldering (detailed structure of the soldered portion will be described with reference to FIG. 2), and then cool the metal base 3 in the course of transporting to the outlet of the main chamber 7 in a low oxygen atmosphere. After the solder is solidified, the unsoldered assembly is unloaded from the transfer section 7a at the outlet side of the main chamber 7.
Take out at 0.

【0018】次に、前記したはんだ付け部6の構造を図
2に示し、そのはんだ付け部で行う毛細管拡散方式のは
んだ付け法について説明する。すなわち、はんだ付け部
6は、チャンバー12の底部にホットプレート13を設
置し、上方には先端に溶融はんだ供給ヘッダ14(ヘッ
ダは、溶融はんだとの「濡れ性」が低いセラミックス,
W,Moなどの高融点金属,あるいは表面を不働態化し
たステンレス鋼などを材料として作られている)を備え
た昇降式のはんだ供給管15,およびチップ素子2を実
装したセラミックス基板1の中央部を上方から金属ベー
ス3(金属ベース3には、そのはんだ接合面域の周縁数
カ所に0.05〜0.5mmの微小な突起3aが形成され
ており、この突起の上にセラミックス基板1を重ね合わ
せる)に向けて押圧する加圧ピン16がチャンバー内に
突き出して配置されている。なお、17は外部からはん
だ供給管15に送り込む線はんだ(直径1.2mm程度の
糸状はんだ)である。
Next, the structure of the above-mentioned soldering section 6 is shown in FIG. 2, and a description will be given of a soldering method of the capillary diffusion method performed in the soldering section. That is, in the soldering section 6, a hot plate 13 is installed on the bottom of the chamber 12, and a molten solder supply header 14 (the header is made of ceramics having low "wettability" with molten solder,
Made of a material having a high melting point such as W or Mo, or stainless steel having a passivated surface), and a soldering pipe 15 of an elevating type, and a center of the ceramic substrate 1 on which the chip element 2 is mounted. The metal base 3 is formed from above with small protrusions 3a of 0.05 to 0.5 mm formed at several places on the periphery of the solder joint surface area of the metal base 3, and the ceramic substrate 1 is placed on the protrusions. A pressure pin 16 for pressing toward (overlapping) protrudes into the chamber. Reference numeral 17 denotes a wire solder (a thread-like solder having a diameter of about 1.2 mm) sent from outside to the solder supply pipe 15.

【0019】かかる構成のはんだ付け部6に対して、主
チャンバー7の搬送部7a(図1参照)により搬送され
て来た予熱昇温状態の金属ベース3とセラミックス基板
1の重ね合わせ体はホットプレート13の上に載り移
り、ここで線はんだ17の融点以上の温度までさらに加
熱される。また、金属ベース3の移載にタイミングを合
わせて、はんだ供給管15を上方から引き下ろしてヘッ
ダ14の溶融はんだ吐出口14aを基板1の周縁部に向
けて金属ベース板3の上にセットし、かつ線はんだ17
を送り込んでその先端を加熱された金属ベース3に押し
つけるようにするとともに、さらに基板1の中央部を加
圧ピン16で上方から押圧し、前記の突起3aを支点に
セラミックス基板1を凹状に反らせてその中央面域を金
属ベース3の上に軽く接触させる。
The superposed body of the metal base 3 and the ceramic substrate 1 in the preheated and heated state transferred by the transfer section 7a (see FIG. 1) of the main chamber 7 to the soldering section 6 having such a configuration is hot. It is transferred onto the plate 13 where it is further heated to a temperature equal to or higher than the melting point of the wire solder 17. Further, in synchronization with the transfer of the metal base 3, the solder supply pipe 15 is pulled down from above, and the molten solder discharge port 14a of the header 14 is set on the metal base plate 3 toward the periphery of the substrate 1, And wire solder 17
And press the tip thereof against the heated metal base 3, and further press the central portion of the substrate 1 from above with a pressure pin 16, and warp the ceramic substrate 1 in a concave shape with the protrusion 3 a as a fulcrum. The center area of the lever is lightly brought into contact with the metal base 3.

【0020】これにより、ヘッダ14の内部で溶融し、
吐出口14aより基板1と金属ベース3との間の隙間に
向けて供給される溶融はんだは、はんだ接合面の濡れ性
と毛細管浸透作用により矢印のように基板1と金属ベー
ス3との間の接合面域に浸透して広がる。なお、溶融は
んだに含まれる酸化物などのスラグはヘッダ14内で溶
融はんだの表面に浮上するので、吐出口14aからはス
ラグを含まない純粋なはんだのみが供給される。また、
この場合には、セラミックス基板1の中央面域は周縁部
と比べて金属ベース3との間の隙間が狭まってこの部分
の毛細管現象が強く作用するので、溶融はんだは中央面
域から先に広がって行く。したがって、基板/金属ベー
ス間の隙間内に発生,もしくは残存していたガスは基板
1の周辺に押し遣られて隙間から排除されるため、溶融
はんだは隅々まで拡散してボイドの発生が抑制される。
なお、上記したはんだ付け部6の構造,並びにここで行
う毛細管浸透はんだ付け方法については、先に本発明と
同一出願人より出願した特願平7−204119号で提
案したものをそのまま採用することができる。
As a result, the resin melts inside the header 14,
The molten solder supplied from the discharge port 14a toward the gap between the substrate 1 and the metal base 3 is formed between the substrate 1 and the metal base 3 as shown by the arrow due to the wettability of the solder joint surface and the capillary penetration action. Penetrates and spreads through the joint surface area. Since slag such as oxide contained in the molten solder floats on the surface of the molten solder in the header 14, only pure solder containing no slag is supplied from the discharge port 14a. Also,
In this case, the gap between the central surface area of the ceramic substrate 1 and the metal base 3 is narrower than that of the peripheral edge portion, and the capillary phenomenon at this portion acts strongly. Therefore, the molten solder spreads from the central surface area. Go. Therefore, the gas generated or remaining in the gap between the substrate and the metal base is pushed to the periphery of the substrate 1 and is removed from the gap, so that the molten solder diffuses to all corners to suppress generation of voids. Is done.
Regarding the structure of the above-mentioned soldering portion 6 and the capillary penetration soldering method to be performed here, the one proposed in Japanese Patent Application No. 7-204119 previously applied by the same applicant as the present invention should be employed as it is. Can be.

【0021】上記実施例の説明で判るように、本発明の
はんだ付け方式によれば、図1で述べたようにセラミッ
クス基板1と金属ベース3を別々なルートから還元性雰
囲気に保たれたはんだ付け炉のチャンバー内に搬入し、
その搬送途上で予熱しながらそのはんだ付け面を還元性
ガスに十分曝露させた後、はんだ付け部6の直前位置で
金属ベース3の上にセラミックス基板1を重ね合わせ、
続いてはんだ付け部6にて毛細管浸透はんだ付けを行う
ようにしている。したがって、はんだ付け時には還元性
ガスによる還元,置換作用によりはんだ接合面が清浄化
(酸化膜の還元,吸着ガス,水分の除去)されて溶融は
んだに対する高い「濡れ性」が確保でき、これにより毛
細管浸透はんだ付け方法の特長が十分に発揮されて、は
んだ接合層でのボイド発生を防止できる。しかも、フラ
ックスを採用しないことで、フラックス洗浄,乾燥の後
処理が一切不要である。
As can be seen from the above description of the embodiment, according to the soldering method of the present invention, as shown in FIG. 1, the ceramic substrate 1 and the metal base 3 are kept in a reducing atmosphere from different routes. Into the furnace chamber,
After sufficiently exposing the soldering surface to a reducing gas while preheating during the transportation, the ceramic substrate 1 is superimposed on the metal base 3 at a position immediately before the soldering portion 6.
Subsequently, capillary penetration soldering is performed in the soldering section 6. Therefore, at the time of soldering, the solder joint surface is cleaned (reduction of oxide film, removal of adsorbed gas and moisture) by the reduction and replacement action by the reducing gas, and high "wetness" to the molten solder can be ensured, thereby making the capillary tube The features of the infiltration soldering method are fully exhibited, and the occurrence of voids in the solder joint layer can be prevented. In addition, since no flux is used, no post-treatment of flux washing and drying is required.

【0022】なお、本発明のはんだ付け方法は、その用
途が前述したパワートランジスタモジュールなどの半導
体装置に限られるものではなく、その他の各種電子部品
のはんだ付け方法にも適用できることは勿論である。
The application of the soldering method of the present invention is not limited to the above-described semiconductor device such as a power transistor module, but can be applied to other various electronic component soldering methods.

【0023】[0023]

【発明の効果】以上述べたように、本発明のはんだ付け
方法によれば、はんだ付け面を下に向けて基板(チップ
素子をマウントしたセラミックス基板など)を金属ベー
スの上に重ね、基板の外周縁側から金属ベース上に供給
した溶融はんだを毛細管作用により基板と金属ベースの
間の面隙間に浸透させてはんだ接合する方法を基本とし
て、はんだ付け炉に搬入した基板,および金属ベース
を、そのはんだ付け面を還元性雰囲気に曝露させた状態
で個別に予熱し、フラックスを用いずにはんだ付けの直
前で金属ベースの上に基板を重ね合わせてはんだ付けを
行うことにより、ベース,基板のはんだ付け面が重ね合
わせ以前の段階で炉内の還元性ガスに十分曝露され、そ
のはんだ付け面に生じている酸化膜,吸着ガス,水分な
どが還元性ガスにより還元,置換されて殆ど完全に除去
される。この結果、はんだ接合面が清浄化されて溶融は
んだとの高い「濡れ性」が確保でき、これにより毛細管
浸透はんだ付け方法の特長を十分に発揮させて良質,ボ
イドフリーなはんだ付けが達成される。特に、パワート
ランジスタモジュールに採用するダイレクトボンデッド
カッパー基板と金属ベースとの間をはんだ付けする場合
には本発明のはんだ付け法が極めて有効である。
As described above, according to the soldering method of the present invention, a substrate (such as a ceramic substrate on which a chip element is mounted) is placed on a metal base with the soldering surface facing down. Based on a method in which molten solder supplied onto the metal base from the outer peripheral side penetrates into the surface gap between the substrate and the metal base by capillary action to perform solder joining, the board and the metal base carried into the soldering furnace are separated from each other. By preheating individually with the soldering surface exposed to a reducing atmosphere, and superimposing the board on a metal base immediately before soldering without using flux, soldering the base and board The surface to be soldered is sufficiently exposed to the reducing gas in the furnace before the superposition, and the oxide film, adsorbed gas, and moisture on the soldering surface are exposed to the reducing gas. Reduction is almost completely removed substituted. As a result, the solder joint surface is cleaned, and high "wetness" with the molten solder can be ensured. As a result, the features of the capillary infiltration soldering method are fully exhibited, and high quality, void-free soldering is achieved. . In particular, the soldering method of the present invention is extremely effective when soldering between a direct bonded copper substrate and a metal base used in a power transistor module.

【0024】また、本発明のはんだ付け装置を採用する
ことにより、金属ベース,基板の供給から予熱,はんだ
付け,冷却工程を経てはんだ付け済みの組立体を取り出
すまでの各工程を全自動で行うことができる。
Further, by employing the soldering apparatus of the present invention, the steps from supply of a metal base and a substrate to removal of a soldered assembly through preheating, soldering and cooling steps are performed automatically. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のはんだ付け方法の実施に使用するはん
だ付け装置の構成図
FIG. 1 is a configuration diagram of a soldering apparatus used for implementing a soldering method of the present invention.

【図2】図1におけるはんだ付け部の構成断面図FIG. 2 is a cross-sectional view of a configuration of a soldering unit in FIG.

【図3】パワートランジスタモジュールを例に、従来の
はんだ付け方法によりはんだ接合層にボイドの生じた様
子を模式的に表す図
FIG. 3 is a diagram schematically illustrating a state in which voids are generated in a solder bonding layer by a conventional soldering method, taking a power transistor module as an example.

【符号の説明】[Explanation of symbols]

1 セラミックス基板 2 チップ素子 3 金属ベース 4 はんだ層 6 毛細管浸透式のはんだ付け部 7 主チャンバー 7a ベース搬送部 8 分岐チャンバー 8a 基板搬送部 DESCRIPTION OF SYMBOLS 1 Ceramic substrate 2 Chip element 3 Metal base 4 Solder layer 6 Capillary penetration type soldering part 7 Main chamber 7a Base transfer part 8 Branch chamber 8a Substrate transfer part

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】セラミックス板の両面に銅箔を接合してそ
の片面の銅箔にチップ素子を搭載したセラミックス基板
などを対象とする絶縁基板を金属ベースにはんだ付けす
る電子部品のはんだ付け方法であり、はんだ付け面を下
に向けて基板を金属ベースの上に重ねた上で基板の外周
縁側から金属ベース上に供給した溶融はんだを毛細管作
用により基板と金属ベースの間の面隙間に浸透させては
んだ接合するものにおいて、フラックスを用いずに基
板,および金属ベースを個別にはんだ付け炉に搬入して
そのはんだ付け面を還元性雰囲気に曝露させながらその
搬送途上で予熱し、はんだ付けの直前で金属ベースの上
に基板を重ね合わせてはんだ付けを行うことを特徴とす
る電子部品のはんだ付け方法。
1. A method of soldering an electronic component, comprising joining a copper foil to both sides of a ceramic plate and soldering an insulating substrate intended for a ceramic substrate or the like having a chip element mounted on one side of the copper foil to a metal base. Yes, the board is placed on the metal base with the soldering side facing down, and the molten solder supplied to the metal base from the outer peripheral side of the board is penetrated into the surface gap between the board and the metal base by capillary action In the case of soldering by soldering, the substrate and the metal base are individually carried into a soldering furnace without using flux, and the soldering surface is exposed to a reducing atmosphere, and is preheated in the middle of the transfer, immediately before soldering. 3. A method for soldering electronic components, comprising: superposing a substrate on a metal base and performing soldering.
【請求項2】請求項1記載のはんだ付け方法の実施に用
いる電子部品のはんだ付け装置であって、炉内中央に配
したはんだ付け部に連ねてその前後に内部雰囲気をそれ
ぞれ還元性雰囲気,および低酸素濃度雰囲気に保ったト
ンネル状の主チャンバーと、内部雰囲気を還元性雰囲気
に保って主チャンバーのはんだ付け部直前位置に連結し
たトンネル状の分岐チャンバーとを有し、主チャンバー
にははんだ付け面を上に向けて入口より供給した金属ベ
ースをはんだ付け部を経て出口に向けて搬送するベース
搬送手段,および該搬送手段に沿って主チャンバーの入
口からはんだ付け部の区間,およびはんだ付け部から出
口までの区間に配した金属ベースの予熱,冷却手段を装
備し、分岐チャンバーにははんだ付け面を下に向けて入
口から供給したセラミックス基板を主チャンバーに搬送
して金属ベースの上に重ね合わせる基板搬送手段,およ
び基板の予熱手段を装備して構成したことを特徴とする
電子部品のはんだ付け装置。
2. A soldering apparatus for an electronic component used for carrying out the soldering method according to claim 1, wherein an internal atmosphere is connected to a soldering portion disposed in the center of the furnace and before and after the soldering portion. And a tunnel-shaped main chamber maintained in a low oxygen concentration atmosphere and a tunnel-shaped branch chamber connected to a position immediately before a soldering portion of the main chamber while maintaining an internal atmosphere in a reducing atmosphere. Base transfer means for transferring the metal base supplied from the inlet with the mounting surface upward to the outlet via the soldering section, and a section from the inlet of the main chamber to the soldering section along the transfer means, and soldering Equipped with metal-based preheating and cooling means arranged in the section from the section to the outlet, and the branch chamber was supplied with the soldering surface facing down from the inlet. Soldering apparatus of electronic components, characterized by being configured equipped substrate transfer means superposed on the metal base and conveying the mix substrate in the main chamber, and preheating means of the substrate.
JP8321438A 1996-12-02 1996-12-02 Method and apparatus for soldering electronic components Pending JPH10163620A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8321438A JPH10163620A (en) 1996-12-02 1996-12-02 Method and apparatus for soldering electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8321438A JPH10163620A (en) 1996-12-02 1996-12-02 Method and apparatus for soldering electronic components

Publications (1)

Publication Number Publication Date
JPH10163620A true JPH10163620A (en) 1998-06-19

Family

ID=18132565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8321438A Pending JPH10163620A (en) 1996-12-02 1996-12-02 Method and apparatus for soldering electronic components

Country Status (1)

Country Link
JP (1) JPH10163620A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5184359B2 (en) * 2006-08-21 2013-04-17 満男 海老澤 Soldering iron, method of manufacturing electronic equipment using the same, and manufacturing apparatus
CN104253055A (en) * 2013-06-25 2014-12-31 富士电机株式会社 Soldering method and method of manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5184359B2 (en) * 2006-08-21 2013-04-17 満男 海老澤 Soldering iron, method of manufacturing electronic equipment using the same, and manufacturing apparatus
JP2013077840A (en) * 2006-08-21 2013-04-25 Mitsuo Ebisawa Soldering iron, method of manufacturing electronic device using the same, and manufacturing apparatus
CN104253055A (en) * 2013-06-25 2014-12-31 富士电机株式会社 Soldering method and method of manufacturing semiconductor device
JP2015008209A (en) * 2013-06-25 2015-01-15 富士電機株式会社 Soldering method and method of manufacturing semiconductor device

Similar Documents

Publication Publication Date Title
EP1350588B1 (en) Method of manufacturing semiconductor device
US5090609A (en) Method of bonding metals, and method and apparatus for producing semiconductor integrated circuit device using said method of bonding metals
US20070170227A1 (en) Soldering method
JP2786700B2 (en) Method and apparatus for manufacturing semiconductor integrated circuit device
US6206269B1 (en) Soldering of a semiconductor chip to a substrate
JP5778731B2 (en) Array of continuous linear heat treatment equipment
JP2000349123A (en) Mounting of semiconductor element
JP2008041980A (en) Soldering method and soldering equipment
US8747579B2 (en) Solder layer and device bonding substrate using the same and method for manufacturing such a substrate
US8274161B2 (en) Flux-free chip to substrate joint serial linear thermal processor arrangement
JPH10163620A (en) Method and apparatus for soldering electronic components
TW202036822A (en) Semiconductor device manufacturing method
JP2007109859A (en) Method for manufacturing electronic parts
JPH11121921A (en) Method and device for soldering electronic components
JPH03241755A (en) Manufacture of electronic circuit device
JPH10233484A (en) Method and device for assembling semiconductor device
JP2012121046A (en) Soldering method and soldering device
JP4785486B2 (en) Electronic device manufacturing method and manufacturing apparatus
JPH10178261A (en) Method and device for soldering electronic parts
JP2003209347A (en) Method and apparatus for reflow soldering
JP3336999B2 (en) Bump sheet, bump forming apparatus and bump forming method using the same
JP3722096B2 (en) Mounting board manufacturing method
JPH0645377A (en) Semiconductor manufacturing device and semiconductor package, and chip mounting method
JPH09191020A (en) Method of bonding component to substrate and its apparatus, method of bonding semiconductor chip to lead frame and its apparatus
JPH05283452A (en) Manufacture of semiconductor device