JPH10161152A - Liquid crystal pannel substrate, liquid crystal pannel using the same and projection-type display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high reliable substrate without the formation of a projection on the surface of an electrode though the tip of a probe is brought into contact with the pad electrode as an external terminal at the time of probe inspection by constituting the electrode as the terminal by means of a conductive transparent electrode film which constitutes a picture element electrode. SOLUTION: The pad electrode as the external terminal is constituted of the conductive transparent electrode film such as an ITO film which constitutes the picture element electrode. The pad electrode is provided with double structure where the second pad electrode 26 consisting of the ITS film is formed on the first pad electrode 22 consisting of a polysilicon layer. The second pad electrode 26 is constituted of the ITO film being the same as that which constitutes the picture element electrode 6a. One end of a wiring layer 23 consisting of an aluminum layer is connected to the first pad electrode 22 by a contact hole 25 which is formed in a first inter-layer insulating film 13. Thus, the projection is not easily generated on the surface of the electrode through the probe is brought into contact at the time of pannel inspection using the probe.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an external input / output terminal of a liquid crystal panel used for an active matrix type liquid crystal display device and a method of manufacturing the same, and more particularly to a polysilicon thin film transistor (hereinafter referred to as TF) formed on a substrate.
Called T. The present invention relates to a liquid crystal panel for an active matrix type liquid crystal display device for driving a pixel electrode according to (1), a substrate constituting the same, and a technique suitable for being applied to a method of manufacturing the same. The present invention further relates to a technique suitable for use in a projection display device.

[0002]

2. Description of the Related Art Conventionally, as an active matrix type liquid crystal display device, it is known that an IT
A pixel electrode made of O (Indium-Tin Oxide) or the like is formed, and a TFT using amorphous silicon or polysilicon is formed corresponding to each pixel electrode. A liquid crystal display device configured to drive the liquid crystal display has been put to practical use.

Among the active matrix type liquid crystal display devices, a device using a polysilicon TFT is suitable for high integration because transistors constituting peripheral circuits such as a shift register and a driving circuit can be formed in the same process. Has been attracting attention.

In a conventional active matrix type liquid crystal display device using a polysilicon TFT, external input / output such as a connection terminal for connecting to an external drive IC or the like and a test terminal to which a probe is contacted at the time of a test. An electrode called a pad, which is a terminal, is connected to an internal wiring (for example, each TF).
(A data line for supplying a voltage applied to the pixel electrode through T) was formed of the same aluminum layer or aluminum alloy layer as the conductive layer used for the conductive layer.

[0005]

If the pad electrode is made of aluminum as described above, it may be corroded by an etching solution for patterning the ITO film or by sputtering during the formation of the ITO film. The pad electrode must be covered with an interlayer insulating film until the completion of the process, and after forming the pixel electrode composed of the ITO film, the insulating film on the pad electrode must be removed and the opening must be etched. There was a problem that it increased.

In the case of a pad electrode made of an aluminum layer or an aluminum alloy layer, the tip of the probe is brought into contact with the pad electrode at the time of probe inspection, and is separated from the surface of the pad electrode after the inspection is completed. May be raised or turned up to form projections.

In some cases, the inspection terminal is formed not at the periphery of the substrate but at a position opposed to the portion of the counter substrate on which the counter electrode is formed for convenience of layout. In such a case, if the above-described protrusion is formed on the surface of the pad electrode by the probe test, the protrusion may come into contact with the counter electrode provided on the counter substrate, and a desired circuit operation may not be performed. Further, the pixel electrodes arranged in a matrix form have a very small distance between adjacent pixel electrodes due to patterning defects and the like. In some cases, an etching process called a regeneration process for separating the layers is performed again. In this case, since the aluminum constituting the pad electrode has poor etching resistance, the opening on the pad electrode is covered with a resist. And the etchant penetrates along the protrusions and corrodes the pad electrode,
It turned out that there is a problem that there is a possibility of becoming a defective product.

An object of the present invention is to solve the above-mentioned problems, and an object of the present invention is to provide a method for forming a pad electrode which becomes a terminal capable of reducing the number of steps in a manufacturing process.

Another object of the present invention is that, in an active matrix type liquid crystal display device, a projection may be formed on the surface of an electrode even when the tip of the probe contacts a pad electrode as an external terminal during probe inspection. There is no need to provide a highly reliable substrate.

[0010]

According to a method of manufacturing a liquid crystal panel substrate according to the present invention, a first conductive layer (first pad electrode) constituting a pad electrode as an external input / output terminal is provided.
Are formed in the same step as the gate electrode forming the TFT, and the second conductive layer (second pad electrode) forming the pad electrode is formed in the same step as the ITO film forming the pixel electrode. It was made.

According to the above method, the opening in the pad electrode portion is formed simultaneously with the formation of the contact hole for connection between the pixel electrode and the drain region of the TFT, and the pad electrode is formed simultaneously with the pixel electrode. Therefore, the step of forming a hole in the pad electrode portion can be omitted, and the process can be simplified.

According to the present invention, in order to achieve the other object, a pad electrode as an external terminal is formed of a conductive transparent electrode film such as an ITO film forming a pixel electrode. Also,
The connection between the pad electrode and the wiring connecting the data line or the scanning line is mainly made by a metal layer. More preferably, the pad electrode as an external input / output terminal has a two-layer structure in which an ITO film is formed on a conductive film other than aluminum such as a polysilicon layer.

According to the above-mentioned means, since the pad electrode is made of the ITO film having a higher film strength than aluminum, the above-mentioned projection is less likely to be formed on the surface of the pad electrode by the probe test, and thereby the opposite substrate is formed. The vertical conduction failure caused by the contact with the counter electrode provided in the semiconductor device is prevented. Further, in general, pixel electrodes may be short-circuited due to a residual resist or the like during a photolithography process of ITO, thereby causing a point defect.
By cutting the short-circuited portion between the pixel electrodes by performing the photolithography process again using the ITO pattern forming mask, the pad electrode is not corroded by the etching solution, so that the regeneration process can be performed.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described below with reference to the drawings while comparing a pixel portion and a pad electrode portion.

FIGS. 1 and 2 show a plan layout and a sectional view of a first embodiment of a liquid crystal panel substrate to which the present invention is applied. FIGS. 1A and 2A show the layout and cross-sectional structure of one pixel portion of the pixels arranged in a matrix, and FIGS.
(B) shows the layout and cross-sectional structure of the pad electrode portion. FIG. 2A is a cross-sectional structure taken along line AA in FIG. 1A, and FIG. 2B is a cross-section taken along line BB in FIG. 1B.

First, the pixel portion will be described with reference to FIG.
2A, reference numeral 1a denotes a first polysilicon layer constituting an active layer (source / drain / channel region) of a TFT, and the surface of the polysilicon layer 1a is formed as shown in FIG.
As shown in (a), a gate insulating film 12 is formed by thermal oxidation. Reference numeral 2a denotes a scanning line serving as a gate electrode of the TFT, and 3a denotes a source region (or a drain region) of the TFT disposed so as to intersect with the scanning line 2a.
The scanning line 2a is formed by a second polysilicon layer, and the data line 3a is formed by a conductive layer such as an aluminum layer.

Reference numeral 4 denotes a pixel electrode 6a made of an ITO film.
Contact hole for connecting the TFT to the drain region (or source region) of the polysilicon layer 1;
Is a contact hole for connecting the data line 3a to the source region of the TFT in the polysilicon layer 1a.

In FIG. 2A showing a cross section taken along the line AA in FIG. 1A, reference numeral 10 denotes a substrate such as a glass substrate or a quartz substrate, and 12 denotes a polysilicon layer 1a to be an active layer of a TFT. Is a gate insulating film such as a silicon oxide film formed on the surface of the substrate, and is formed by thermal oxidation or the like. Also, 1
Reference numeral 3 denotes a first interlayer insulating film made of an NSG film (a silicate glass film containing neither boron nor phosphorus), and reference numeral 15 denotes a second interlayer insulating film made of a BPSG film (a silicate glass film containing boron and phosphorus). These are formed by high-temperature CVD and low-temperature CVD, respectively, as described later.

Next, the pad electrode portion will be described.
As shown in FIG. 2A, the pad electrode of this embodiment is
The IT is formed on the first pad electrode 22 made of a polysilicon layer.
It has a two-layer structure in which a second pad electrode 26 made of an O film is formed. The first pad electrode 22 is formed of the same polysilicon layer as the polysilicon layer forming the gate electrode 2 of the TFT. On the other hand, the second pad electrode 26 is formed of the same ITO film as the ITO film forming the pixel electrode 6a. The first pad electrode 22 and the second pad electrode 26 are connected via a contact hole 24 formed in the second interlayer insulating film 15. Also the first
The pad electrode 22 has a wiring layer 2 made of an aluminum layer.
3 are connected to each other through a contact hole 25 formed in the first interlayer insulating film 13. The wiring layer 23 is formed of the same aluminum layer as the aluminum layer forming the data line 3.

In this embodiment, the second pad electrode 2
6 is made of an ITO film having a higher film strength than aluminum, so that a projection is less likely to be formed on the surface of the electrode even when the probe is brought into contact during a panel inspection using the probe. Further, as described below, the manufacturing process is simplified.

In this embodiment, the case where an ITO film is used as the conductive transparent electrode film has been described. However, the present invention is not limited to this. For example, a metal oxide having a high melting point such as SnOx, ZnOx, or the like is used. It is also possible to use a transparent electrode material made of a material or the like.

In this embodiment, the case where the second pad electrode 26 made of an ITO film is formed directly on the first pad electrode 22 made of a polysilicon layer has been described. However, molybdenum (Mo), tantalum (Ta) ), Titanium (Ti)
Alternatively, an ITO film may be provided via a buffer layer such as the above.

Next, an example of a manufacturing process of the liquid crystal panel substrate of the present embodiment will be described with reference to FIGS. FIGS. 3 to 5 show TFTs for driving pixels that sequentially advance.
6 to 8 show the steps of forming the pad electrode section, respectively, and show steps (1) to (14) in FIGS.
And the steps (1) to (14) in FIGS. 6 to 8 correspond to each other. 3 to 5 correspond to FIG.
1A shows a cross section along the line AA, and FIGS. 6 to 8 show cross sections along the line BB in FIG. 1B. Hereinafter, TFT
The steps of the section and the pad electrode section will be described by comparing the same steps in FIGS. 3 to 5 and FIGS. 6 to 8.

First, in the step (1), a substrate 10 such as a glass substrate (for example, a non-alkali substrate) or a quartz substrate is used.
The polysilicon layer 1 is deposited on the
Deposit over the entire surface of the substrate a thickness such as 0-2000 Angstroms, preferably about 1000 Angstroms.

In the step (2), the polysilicon layer 1 is patterned by a photolithography step, an etching step, and the like, thereby forming an island-shaped active layer 1a in the TFT portion (FIG. 3). At this time, in the pad electrode portion, the entire polysilicon layer 1 is removed, and the surface of the substrate 10 is exposed (FIG. 6).

In the step (3), the polysilicon layer (1)
The gate insulating film 12 is formed on the active layer 1a by thermally oxidizing the surface a) (FIG. 3). By this process,
The active layer 1a finally has a thickness of 300 to 1500 Å, preferably 350 to 450 Å, and the gate insulating film 12 has a thickness of about 600 to 1500 Å.
Angstrom.

Next, an impurity (for example, phosphorus) is added to the extension 1b (see FIG. 1) of the polysilicon layer constituting the active layer 1a, which extends upward along the data line 3 and forms a storage capacitor. ) To an appropriate dose (eg, 3 × 10 ¹² atms / c)
m ² ), and the polysilicon layer (1
b) to reduce the resistance. The lower limit of the dose is determined from the viewpoint of securing the conductivity necessary for forming the storage capacitor of the polysilicon layer, and the upper limit is determined from the viewpoint of suppressing the deterioration of the gate oxide film. At this time, nothing is performed because there is no polysilicon layer in the pad portion.

In the step (4), the low-resistance polysilicon layer 2 to be a gate electrode and a scanning line is directly formed on the gate insulating film 12 in the TFT section and directly on the insulating substrate in the pad electrode section. It is deposited by a method or the like.

In the step (5), the polysilicon layer 2 is patterned by photoetching, and a gate electrode (including a scanning line) 2a is provided in the TFT portion, and a first layer electrode (first pad) is provided in the pad electrode portion. An electrode 22 is formed.
As the material of the scanning line 2a and the first pad electrode 22,
In addition to polysilicon, refractory metals such as Mo, Ta, Ti, and W, or metal silicides thereof can be used.

In the step (6), ion implantation of an impurity (for example, phosphorus) using the gate electrode 2a as a mask is performed.
In the TFT section, a high-concentration semiconductor region serving as a source region and a drain region self-aligned with the active layer 1a is formed.
At this time, in the pad electrode portion, the resistance is reduced by ion-implanting the first pad electrode 22 as a whole.

The source / drain regions are made of impurities (phosphorus).
Is light-doped at a dose of 1 × 10 ¹³ / cm ^{2 to} 3 × 10 ¹³ / cm ² to form a low concentration region, and then a mask layer wider than the gate electrode is formed on the scanning line 2a. And further add impurities (phosphorus) to 1 × 10 ¹⁵ / cm ^{2 to} 3 ×
10 ¹⁵ / cm ^{2 Roh} masked regions by implantation at a dose amount is lightly doped drain (L
DD) structure. Alternatively, an offset structure is formed by forming a pattern using a mask wider than the width of the gate electrode 2 without performing lightly doping, and then performing ion implantation to form a source / drain and then over-etching the gate electrode. You may make it become.

In the step (7) (see FIGS. 4 and 7), a first NSG film (a silicate glass film containing neither boron nor phosphorus) or the like is formed so as to cover the gate electrode 2a and the first pad electrode 22. Of the interlayer insulating film 13 at a temperature of, for example, 800 ° C. by CVD or the like.
Deposit to a thickness such as 000-15000 angstroms.

In the step (8) (see FIGS. 4 and 7), the first interlayer insulating film 13 is subjected to dry etching or the like to form a contact hole 5 at a position corresponding to the source region and a pad electrode in the TFT portion. In the portion, contact holes 25 are respectively formed at positions corresponding to the edge of the first pad electrode 22 on the center side of the substrate.

Here, the contact hole 5 is formed so as to penetrate the laminated film of the gate insulating film 12 and the first interlayer insulating film 13, and the contact hole 25 penetrates only the first interlayer insulating film 13. Formed.

In forming the contact hole 5,
The polysilicon layer 1 functions as an etching stopper, and when forming the contact hole 25, the first pad electrode 22 functions as an etching stopper.

In the step (9), a low-resistance conductive layer 3 made of aluminum or the like to be the data line 3a also serving as a source electrode is deposited by a sputtering method. This low resistance conductive layer 3 is made of TF
In the T portion, the contact hole 5 is connected to the source region of the active layer 1a. In the pad electrode portion, the contact hole 25 is connected to the first pad electrode 22.

In the step (10), the low-resistance conductive layer 3 is patterned by photoetching, and the data line 3a also serving as a source electrode is formed in the TFT portion, and the first pad electrode 22 and the data line are formed in the pad electrode portion. The wiring 23 for connection is formed.

In the step (11) (see FIGS. 5 and 8), the BPS is formed so as to cover the data line 3a and the wiring 23.
A second interlayer insulating film 15 such as a G film (a silicate glass film containing boron and phosphorus) is formed to a thickness of 5000 to 15000 angstroms at a low temperature of, for example, 500 degrees by a CVD method.

In the step (12), the second interlayer insulating film 15 and the first interlayer insulating film 1 thereunder are formed in the TFT portion.
A contact hole 4 is formed in a position corresponding to the drain region by dry etching or the like in the superposed film composed of the gate insulating film 3 and the gate insulating film 12. In the pad electrode portion, a contact hole is formed at a position corresponding to the center of the first pad electrode 22 by dry etching or the like in the laminated film including the second interlayer insulating film 15 and the first interlayer insulating film 13 thereunder. 24 is opened. At this time, if the resistance at the distance L from the contact hole end 24 to the wiring 23 is set to 10Ω or less, there is no practical problem.

In the step (13), in the pad electrode portion, the ITO film 6 to be the pixel electrode 6a is formed by sputtering to a thickness of, for example, 1500 angstroms. At this time, in the TFT section, the ITO film 14 is connected to the drain region of the active layer 1a through the contact hole 4, and in the pad electrode section, the ITO film 6 is connected to the first pad electrode 22 through the contact hole 24.

In the step (14), the ITO film 6 is patterned by photo-etching,
The pixel electrode 6a is provided in the FT section, and the second electrode is provided in the pad electrode section.
The pad electrode 26 is formed. From the above description, it can be seen that in the above process, the structure of the pad electrode portion is realized simultaneously with the manufacturing process of the pixel TFT portion.

In this embodiment, the case where ITO is used has been described. However, the present invention is not limited to this.
For example, it is also possible to use a transparent electrode material made of a metal oxide having a high melting point such as SnOx, ZnOx, etc., and in such a case, the step coverage inside the contact hole is practical.

Since the ITO film 6 is formed at the final stage of the whole manufacturing process, the substrate is less likely to be contaminated with tin (Sn) or indium (In), which is a composition of ITO. Further, the pixel electrodes 6a may be short-circuited to each other to cause a point defect due to a residual resist or the like during a photolithography process of ITO. In such a case,
After the above-described process, if there is a short-circuit of the pixel electrode as a result of the inspection, a process of cutting the short-circuited portion between the pixel electrodes by performing a photolithography process again using the ITO pattern etching mask can be added.

Although not shown, the pixel electrode 6a
An alignment film made of polyimide or the like is formed on the second interlayer insulating film 15 to a thickness of about 200 to 1000 angstroms, and rubbed (alignment treatment) to obtain a liquid crystal panel substrate.

Next, referring to FIG. 9 to FIG. 11, the process of the liquid crystal panel substrate of this embodiment having the pad electrode of the two-layer structure of the polysilicon layer and the ITO film will be described. The reason why the number of steps is reduced as compared with the reference process for a liquid crystal panel substrate having electrodes will be described.

FIG. 16A shows a plan view of one pixel pattern, and FIG. 16B shows a plan view of a layout of a terminal portion. FIG. 17A is a cross-sectional view taken along line AA of FIG.
FIG. 7B is a cross-sectional view taken along the line BB of FIG.

9 to 11 show steps of forming a conventional pad portion, respectively, and show (1 ') to (1') in FIGS. 9 to 11.
The step 4 ') corresponds to the steps (1) to (14) in FIGS.
And the steps (1) to (14) in FIGS. 6 to 8 correspond to each other.

As is clear from the steps (1 ') to (8') shown in FIGS. 9 and 10, a conventional liquid crystal panel substrate having a pad electrode formed of aluminum or an aluminum alloy. In the manufacturing process, the polysilicon layer 1 serving as the active layer 1a of the TFT and the polysilicon layer 2 serving as the scanning line 2a are completely removed at the pad electrode portion, and only the first interlayer insulating film 13 remains on the substrate. . Then, in steps (9 ′) and (10 ′), TF
When the data line 3a made of an aluminum layer is formed in the portion T, in the pad electrode portion, the aluminum layer 3 formed by the sputtering method is patterned by etching to form the pad electrode 3b.

After that, in the step (11 '), although the second interlayer insulating film 15 is formed simultaneously in the TFT portion and the pad electrode portion, the contact hole 4 for connecting the pixel electrode to the drain region is formed in the TFT portion. In the step (12 '), the pad electrode portion is covered with a resist or the like so that a contact hole is not formed.
Even if the O film 6 is formed, in the next etching step (14 ') for forming the pixel electrode, the ITO film 6 of the pad electrode portion is formed.
Is removed. Thereafter, an etching step (15 ') for forming the opening 7 in the pad electrode portion is performed.

FIG. 12 shows a comparison process diagram of the manufacturing process in which FIGS. 6 to 11 are shown in one drawing. In FIG.
The left side shows the reference process of the conventional example, and the right side shows the process of the present embodiment. As is clear from FIG.
In order to manufacture a conventional liquid crystal panel substrate having a pad electrode portion formed of aluminum or an aluminum alloy, an opening 7 is formed in the interlayer insulating films 13 and 15 above the pad electrode after the structure of the TFT portion is completed. It can be seen that an extra step (15) is required only for the step.

On the other hand, according to the liquid crystal panel substrate having the pad electrode portion having the two-layer structure of the polysilicon layer and the ITO film as in the present embodiment, the second interlayer insulating film 15 and the Since the opening portion can be formed at once by penetrating the laminated film formed of the first interlayer insulating film 13 therebelow, the step of forming the opening portion can be performed only once, and the entire manufacturing process can be performed by the conventional method. It has the advantage that it can be simplified compared to the example reference process.

FIG. 13 shows a TFT of the liquid crystal panel of this embodiment.
An example of the system configuration of the substrate on the side is shown. In the figure, reference numeral 90 denotes a scanning line 2 and a data line 3 which are arranged so as to cross each other.
The pixel 90 is composed of a pixel electrode 6a made of ITO or the like and a pixel electrode 6a made of ITO or the like.
a to apply a voltage corresponding to the image signal on the data line 3 to
FT91. The gate electrodes of the TFTs 91 in the same row are connected to the same scanning line 2, and the drains are connected to the corresponding pixel electrodes 14. Also, TFTs in the same row
The source electrode 91 is connected to the same data line 3. In this embodiment, the transistors constituting the peripheral circuits (X and Y shift registers and sampling means) 50 and 60 are constituted by so-called polysilicon TFTs having a polysilicon layer as an operation layer, similarly to the TFTs for driving pixels. The transistors constituting the peripheral circuits 50 and 60 are formed simultaneously with the pixel driving TFT by the same process.

In this embodiment, a shift register (hereinafter referred to as an X shift register) 51 for sequentially selecting the data lines 3 is arranged on one side (upper side in the figure) of the display area (pixel matrix) 20, and On the other side, a shift register (hereinafter referred to as Y) for sequentially selecting and driving the scanning line 2 is provided.
A shift register) 61 is provided. In the next stage of the Y shift register 61, a buffer 63 is provided as necessary. The other end of each data line 3 is provided with a sampling switch 52 composed of a TFT. Is the external terminal 7
Image signals VID1 to VID input to 4,75,76
3 is connected between the video signal lines 54, 55, and 56 for transmitting the signal 3 and is sequentially turned on / off by a sampling signal output from the X shift register 51. X shift register 51 includes clock signals CLX1 and CLKX externally input through terminals 72 and 73.
Sampling signal X1, which selects all data lines 3 one by one in order during one horizontal scanning period based on
X2, X3, .DELTA.Xn are formed and supplied to the control terminal of the sampling switch 52. On the other hand, the Y shift register 61 is operated in synchronization with clock signals CLY1 and CLY2 input from the outside via terminals 77 and 78, and sequentially drives each scanning line 2.

FIGS. 14A and 14B show a cross-sectional configuration and a planar layout configuration of a liquid crystal panel 30 to which the liquid crystal panel substrate is applied. As shown in FIG. 14A, a transparent conductive film (I
An incident-side opposing substrate 31 having an opposing electrode 33 made of TO) and a black matrix (a color filter layer may be provided as necessary) 13 is disposed at an appropriate interval, and the periphery is sealed with a sealing material 36. A TN (Twisted Nematic) liquid crystal or SH (Sup
The liquid crystal panel 30 is filled with a liquid crystal 37 and the like. In addition, the peripheral circuits 50 and 6
The upper part of 0 is configured to be shielded from light by, for example, a black matrix provided on the counter substrate 31. 3
Reference numeral 8 denotes a liquid crystal injection port provided on the counter substrate 31 side, and reference numeral 39 denotes a parting light shielding layer made of a chromium layer or the like provided on the counter substrate 31.

As shown in FIG. 14B, the opposite substrate 31
Has a shape slightly smaller than the TFT-side substrate 10, and a pad electrode 70 as an external input terminal is formed on the surface of the TFT-side substrate 10 exposed outside the counter substrate 31. It is used to input a clock signal, a start signal, a video signal and the like to the circuits 50 and 60.

Next, the connection between the liquid crystal panel of this embodiment and an external circuit will be described with reference to FIG. FIG. 18 shows the second pad electrode 26 of the pad electrode portion 70 serving as an external input terminal of this embodiment and an anisotropic conductive film (hereinafter, referred to as ACF) in which conductive particles 100 are dispersed in an adhesive 101. FPC (Film Pri
2 is a cross-sectional view of the terminal circuit 103 connected to a terminal electrode 103 of the circuit. The ACF is sandwiched between the second pad electrode 26 on the TFT side substrate and the terminal electrode 103 of the FPC, electrically connected via conductive particles 100 by heating and pressing, and the two electrodes are fixed and held by the adhesive 101. I do. This is an efficient method because many terminals can be connected together at a fine pitch. As the conductive particles 100, metal particles such as solder nickel or metal-plated plastic balls are used.

Further, as shown in FIG.
On the periphery of the FT-side substrate 10, in addition to the pad electrodes 70 for external input / output as described above, pad electrodes as test terminals used for inputting / outputting a signal at the time of inspection by a probe. 170 are provided. On the other hand, the counter substrate 3
1 also has pad electrodes 270 as inspection terminals, and these pad electrodes are used for input / output of a signal for inspecting a short circuit of a data line, a defect of a pixel electrode, and the like.

Reference numeral 80 denotes a terminal for conduction between the upper and lower substrates for applying a common electrode potential from the TFT substrate 10 side to the counter electrode 33 provided on the counter substrate side.
0 has the same structure as that of the above embodiment (FIG. 2B).
It is configured such that a conductive adhesive having a predetermined diameter is interposed on the pad electrode having such a structure so as to conduct with the opposing substrate.

FIG. 15 shows an example of the configuration of a video projector as an example of a projection display apparatus in which the liquid crystal panel of the present embodiment is applied as a light valve.

In FIG. 15, 370 is a light source such as a halogen lamp or a metal halide lamp, 371 is a parabolic mirror, 372 is a heat ray cut filter, 373, 375
376 is a dichroic mirror for blue reflection, green reflection, and red reflection, respectively, 374 and 377 are reflection mirrors, 37
8, 379 and 380 are light valves composed of the liquid crystal panel of the present embodiment, and 383 is a dichroic prism.

In the video projector of this embodiment, the white light emitted from the light source 370 is condensed by the parabolic mirror 371, passes through the heat ray cut filter 372, blocks the infrared rays, and allows only visible light. The light enters the dichroic mirror system. Then, first, blue light (wavelength of approximately 50 nm or less) is reflected by the blue reflecting dichroic mirror 373, and the other light (yellow light) is transmitted. The reflected blue light changes its direction by the reflection mirror 374 and enters the blue modulation light valve 378.

On the other hand, the light transmitted through the blue reflecting dichroic mirror 373 is reflected by the green reflecting dichroic mirror 3.
75, the green light (wavelength of about 500 to 600 nm) is reflected, and the other light, red light (about 600 nm)
nm or more) is transmitted. Dichroic mirror 3
The green light reflected at 75 is a green modulated light valve 379
Incident on. The red light transmitted through the dichroic mirror 375 changes its direction by the reflection mirrors 376 and 377 and enters the red modulation light valve 380.

The light valves 378, 379, 380
Blue, green, supplied from a video signal processing circuit (not shown)
The light that is driven by each of the red primary color signals and is incident on each light valve is modulated by each light valve and then combined by the dichroic prism 383. The dichroic prism 383 is formed such that the red reflection surface 381 and the blue reflection surface 382 are orthogonal to each other. Then, the color image synthesized by the dichroic prism 383 is enlarged and projected on a screen by the projection lens 384 and displayed.

Since the liquid crystal panel substrate of the above embodiment has little leakage at the TFT, the video projector using the liquid crystal panel using the same as a light valve can obtain a display image with high contrast.

[0065]

As described above, conventionally, when the pad electrode portion as a terminal is made of aluminum, it may be corroded by an etching solution for patterning ITO or sputtering at the time of forming ITO.
Until patterning is completed, the pad must be covered with an interlayer insulating film, and after forming the ITO pixel electrode, etching for opening the insulating film on the pad must be performed. Therefore, there is a problem that the number of steps increases.

On the other hand, in the method of manufacturing a liquid crystal panel substrate according to the present invention, the first conductive layer (first pad electrode) constituting the pad electrode portion as the terminal is formed by the polysilicon layer constituting the TFT. And the second conductive layer (second pad electrode) forming the pad electrode portion is formed in the same step as the ITO film forming the pixel electrode. As described above, according to the method of the present invention, the formation of the opening in the pad electrode portion is performed by the pixel electrode and the TF.
Since the pad electrode can be formed simultaneously with the formation of the contact hole for forming the contact hole for connection with the drain region of T, the step of forming the opening in the pad electrode portion can be omitted. There is an effect that the manufacturing process can be simplified.

Further, the substrate for a liquid crystal panel according to the present invention comprises:
Since the pad electrode as a terminal is made of a conductive transparent electrode film such as an ITO film that constitutes a pixel electrode,
Since the pad electrode is composed of an ITO film that is stronger than aluminum, projections are less likely to occur on the pad electrode surface during probe testing, thereby preventing vertical conduction failure caused by contact with the counter electrode provided on the counter substrate. In addition, since the pad electrode is not corroded by the etching solution when the short-circuited portion between the pixel electrodes 6a is cut again by the photolithography process using the mask for the ITO pattern, the effect that the regeneration process can be performed is obtained. is there.

[Brief description of the drawings]

FIG. 1A is a plan layout view of one pixel in one embodiment of a liquid crystal panel substrate to which the present invention is applied, and FIG.
Is a plan view of a terminal portion.

FIG. 2 is a cross-sectional view of one embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 3 is a cross-sectional view illustrating a manufacturing process (first half) of a TFT portion of a liquid crystal panel substrate according to an embodiment in the order of steps.

FIG. 4 is a cross-sectional view showing a manufacturing process (middle stage) of a TFT portion of the liquid crystal panel substrate of the embodiment in the order of steps.

FIG. 5 is a cross-sectional view showing a manufacturing process (second half) of the TFT portion of the liquid crystal panel substrate according to the embodiment in the order of steps.

FIG. 6 is a cross-sectional view showing a manufacturing process (first half) of the pad portion of the liquid crystal panel substrate according to the embodiment in the order of steps.

FIG. 7 is a sectional view showing a manufacturing process (middle stage) of a pad portion of the liquid crystal panel substrate according to the embodiment in the order of steps.

FIG. 8 is a sectional view showing a manufacturing process (second half) of the pad portion of the liquid crystal panel substrate according to the embodiment in the order of steps.

FIG. 9 is a sectional view showing a manufacturing process (first half) of a conventional pad portion of a liquid crystal panel substrate in the order of steps.

FIG. 10 is a sectional view showing a manufacturing process (middle stage) of a conventional pad portion of a liquid crystal panel substrate in the order of steps.

FIG. 11 is a cross-sectional view showing a manufacturing process (second half) of a conventional pad portion of a liquid crystal panel substrate in the order of steps.

FIG. 12 is a comparative process diagram of the manufacturing process in which FIGS. 3 to 11 are illustrated in one drawing.

FIG. 13 is a block diagram showing an example of a system configuration of a liquid crystal panel substrate suitable for applying this embodiment.

14A and 14B are a cross-sectional view and a plan view illustrating a configuration example of a liquid crystal panel using the liquid crystal panel substrate according to the present embodiment.

FIG. 15 is a schematic configuration diagram of a video projector as an example of a projection display device in which an LCD using a liquid crystal panel substrate according to an embodiment is applied as a light valve.

16A is a plan view of one pixel in a conventional liquid crystal panel substrate, and FIG. 16B is a plan view of a terminal portion.

17A is a cross-sectional view taken along the line AA in FIG. 16A, and FIG.
The BB sectional drawing in (b).

FIG. 18 is a sectional view showing an example of a liquid crystal panel using the liquid crystal panel substrate according to the present example.

[Explanation of symbols]

Reference Signs List 1 polysilicon layer 1a semiconductor layer (active layer) 2a scanning line (gate electrode) 3 low resistance conductive layer (aluminum layer) 3a data line 4 contact hole between pixel electrode and TFT drain region 5 between data line and TFT source region Contact hole 10 glass substrate or quartz substrate 12 gate insulating film 13 first interlayer insulating film 6 ITO film 6a pixel electrode 15 second interlayer insulating film 20 display area 30 liquid crystal panel 31 counter substrate 33 counter electrode 36 sealant 37 liquid crystal 50, 60 Peripheral circuit 51 X shift register 52 Sampling switch 54 to 56 Video signal line 61 Y shift register 72 to 78 External input terminal 90 Pixel 91 Pixel driving TFT 370 Lamp 373, 375, 376 Dichroic mirror 374, 377 Reflection mirror 378, 379 , 3 0 light valve 383 dichroic prism 384 a projection lens

Claims (16)

[Claims] A plurality of scanning lines and a plurality of data lines arranged in a matrix on a substrate; a plurality of thin film transistors connected to the plurality of scanning lines and the plurality of data lines;
A liquid crystal panel substrate having a plurality of pixel electrodes connected to the plurality of thin film transistors, a wiring connected to at least one of the plurality of scanning lines and a plurality of data lines, and a terminal connected to the wiring; A substrate for a liquid crystal panel, wherein an electrode serving as a terminal is formed of a conductive transparent electrode film forming a pixel electrode. 2. The liquid crystal panel substrate according to claim 1, wherein said wiring is formed of a metal layer. 3. An electrode as a terminal having a second pad electrode formed of a conductive transparent electrode film on a first pad electrode formed of a conductive film other than aluminum or an alloy thereof. The substrate for a liquid crystal panel according to claim 1 or 2, wherein 4. A conductive film forming the first pad electrode,
4. The liquid crystal panel substrate according to claim 1, wherein the substrate is formed of the same conductive layer as a conductive layer serving as an electrode of the switching element that applies a voltage to the pixel electrode. 5. 5. The switching element is a thin film transistor, and a conductive film forming the first pad electrode is formed of the same conductive layer as a conductive layer serving as a gate electrode of the thin film transistor. Item 6. A liquid crystal panel substrate according to item 4. 6. The wiring according to claim 2, wherein the wiring is mainly formed of the same metal layer as a metal layer forming a wiring for supplying a signal to the data line. LCD panel substrate. 7. The liquid crystal panel according to claim 1, wherein the conductive transparent electrode film forming the second pad electrode is formed of an ITO film. substrate. 8. The liquid crystal panel substrate according to claim 1, wherein the semiconductor layer is made of polysilicon. 9. The method according to claim 1, wherein said metal layer is made of aluminum or an alloy thereof.
9. The liquid crystal panel substrate according to 3, 4, 5, 6, 7, or 8. 10. The method of claim 1, 2, 3, 4, 5, 6, 7, or 8.
Or the liquid crystal panel substrate according to 9 and a counter substrate having a counter electrode are arranged at an appropriate interval, and liquid crystal is sealed in a gap between the liquid crystal panel substrate and the counter substrate. A liquid crystal panel characterized by the above-mentioned. 11. A light source, a liquid crystal panel configured to modulate and transmit or reflect light from said light source, and projection for condensing and enlarging and projecting the light modulated by these liquid crystal panels. A projection display device comprising: an optical unit. 12. A plurality of scanning lines and data lines formed in a matrix on a substrate, a plurality of thin film transistors connected to the plurality of scanning lines and the plurality of data lines, and a plurality of thin film transistors connected to the plurality of thin film transistors. A method for manufacturing a substrate for a liquid crystal panel, comprising: a plurality of pixel electrodes; a wiring connected to at least one of the plurality of scanning lines and a plurality of data lines; and an external terminal connected to the wiring. Forming an active layer of the thin film transistor; forming a gate electrode and a scanning line of the thin film transistor and a first pad electrode constituting the terminal with the same conductive layer; and forming the active layer, the gate electrode and the scanning line. Forming a first interlayer insulating film above the substrate; forming a contact hole in the first interlayer insulating film; Forming the data line connected to the data line and the wiring connected to the first pad electrode with the same material; forming a second interlayer insulating film on the data line and the wiring; A contact hole is opened in the second interlayer insulating film, and the pixel electrode connected to the thin film transistor and a second pad electrode constituting the terminal are connected to the first pad, and the thin film transistor is connected to the first pad. Forming the same material as the pixel electrode to be connected. 13. The resistance from a contact hole end for connecting the first pad electrode to the second pad electrode to a wiring connected to the first pad electrode is 10Ω or less. The manufacturing method of the liquid crystal panel substrate described in the above. 14. The method according to claim 13, wherein the gate electrode and the first pad electrode are formed of the same polysilicon layer. 15. The method according to claim 13, wherein the pixel electrode and the second pad electrode are made of an ITO film. 16. The method according to claim 12, wherein the second pad electrode is connected to an electrode disposed on a polyimide tape via an anisotropic conductive film.