JPH10154698A - Method and device for etching semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer etching technique by which the coverage of the bottom section of a through hole formed through a thin film, such as the interlayer insulating film, etc., can be improved in a semiconductor wafer etching process. SOLUTION: A plasma etching device utilizing reactive gas plasma is constituted of a chamber 2 in which a semiconductor wafer 1 is etched, a waveguide 3 through which microwaves are introduced to the chamber 2, a wafer stage 4 on which the wafer 1 is placed, a rotationally driving motor 5 which rotates the stage 4, coils 6 and 7 which generate a magnetic field in the chamber 2, etc. The wafer 1 placed on the stage 4 is inclined by a prescribed angle from the horizontal plane and rotated by means of the motor 5 at a prescribed speed so that a opening for through hole having an inverted conical shape can be formed through the interlayer insulating film of the wafer 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer etching technique, and more particularly to a semiconductor wafer etching method and apparatus suitable for improving metal coverage of through holes in an LSI having a multilayer wiring structure in general. About technology.

[0002]

2. Description of the Related Art For example, as a technique studied by the inventor, a dry etching apparatus for etching a semiconductor wafer in a gas phase in a process of manufacturing an LSI having a multilayer wiring structure generally includes an active gas plasma under reduced pressure. It is considered that a method of etching a thin film formed on a semiconductor wafer by using the method is often used.

In this dry etching apparatus, for example, a cylindrical opening is formed in an interlayer insulating film of a multilayer wiring structure laminated on a semiconductor wafer by dry etching to form an upper metal wiring layer. Is formed in the interlayer insulating film between the lower metal wiring layer and the upper metal wiring layer.

[0004] As a technique relating to such a dry etching apparatus, for example, November 30, 1984
These are described in documents such as “LSI Handbook”, pages 267 to P273, published by Ohm Co., Ltd. and edited by the Institute of Electronics, Communication and Communication Engineers of Japan.

[0005]

In the dry etching apparatus as described above, the width direction of the through-hole portion is becoming narrower with the miniaturization of the LSI wiring structure. The aspect ratio expressed by the ratio of the dimension in the depth direction to the dimension increases, and the coverage of the bottom of the through hole to the metal wiring layer tends to be deteriorated.

Accordingly, an object of the present invention is to improve the coverage of a bottom portion of a through hole by devising a shape of a through hole formed in a thin film such as an interlayer insulating film in a semiconductor wafer etching process. An object of the present invention is to provide a wafer etching method and apparatus.

[0007] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0008]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, according to the method of etching a semiconductor wafer of the present invention, when etching a thin film formed on a semiconductor wafer, the semiconductor wafer is inclined by a predetermined angle with respect to the horizontal direction. The semiconductor wafer is rotated at a predetermined speed so that a thin film is formed at a predetermined angle in the longitudinal sectional shape.

In particular, a thin film formed on a semiconductor wafer is used as an interlayer insulating film to be laminated between metal wiring layers, and the vertical cross-sectional shape of the interlayer insulating film is inverted trapezoidal to form an inverted conical through hole. At this time, the semiconductor wafer is set at about 5 to 20 degrees (preferably about 15
゜) and tilt the semiconductor wafer by about 20 to 6
It is designed to rotate at a speed of 0 rpm.

Further, the semiconductor wafer etching apparatus of the present invention has a sample stage inclined at a predetermined angle with respect to the horizontal direction, and rotating means for rotating the sample stage at a predetermined speed. A semiconductor wafer is mounted, the semiconductor wafer is inclined by a predetermined angle with respect to the horizontal direction, and the sample stage is rotated by a rotating means to rotate the semiconductor wafer at a predetermined speed.

Therefore, according to the semiconductor wafer etching technique, the thin film formed on the semiconductor wafer is formed into a vertical sectional shape having a predetermined angle of inclination, and in particular, the vertical sectional shape of the interlayer insulating film as the thin film is inverted trapezoidal. Thus, a through hole having an inverted conical shape can be formed, so that the coverage of the bottom of the through hole to the metal wiring layer can be improved.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a schematic structural view showing a main part of a dry etching apparatus according to an embodiment of the present invention, FIG. 2 is an explanatory view schematically showing an etching method by the dry etching apparatus according to the present embodiment, and FIG. Is a cross-sectional view showing a through-hole portion of a semiconductor wafer in the present embodiment, and FIG. 4 is a cross-sectional view showing a through-hole portion of a semiconductor wafer as a comparative example corresponding to the present embodiment.

First, a schematic configuration of a main part of a dry etching apparatus according to the present embodiment will be described with reference to FIG.

The dry etching apparatus according to the present embodiment
For example, a plasma etching apparatus using reactive gas plasma is used, and a chamber 2 for performing an etching process on a semiconductor wafer 1, a waveguide 3 for introducing a microwave into the chamber 2, and the semiconductor wafer 1 are mounted. It comprises a wafer stage 4 (sample stage), a rotary drive motor 5 (rotating means) for rotating the wafer stage 4, and coils 6, 7 for generating a magnetic field inside the chamber 2.

A wafer stage 4 is provided at the center of the chamber 2 at a predetermined angle with respect to the horizontal direction, and the semiconductor wafer 1 is placed at the center of the upper surface of the wafer stage 4. A gas introduction port 8 and an exhaust port 9 are provided on the side wall of the chamber 2 so that the inside of the chamber 2 is maintained at a predetermined degree of vacuum and a reaction gas G for etching is supplied.

Inside the chamber 2, an upper portion of the wafer stage 4 is constituted by a discharge tube 10 made of quartz, and a plurality of coils 6, 7 for cyclotron-moving electrons are arranged on the outer periphery of the discharge tube 10. The coils 6 and 7 form a magnetic field having a predetermined magnetic flux density above the wafer stage 4. Further, a waveguide 3 is provided above the chamber 2, and a microwave generated from a magnetron (not shown) attached to a back end thereof is introduced into the discharge tube 10.

The wafer stage 4 is connected to a high-frequency power supply 11, and a ground electrode 12 is provided near the wafer stage 4, which also serves as a high-frequency application electrode. Bias voltage is applied. Further, the wafer stage 4 is rotated at a predetermined speed by a rotation drive motor 5.

Next, with respect to the operation of the present embodiment, an outline of an etching procedure of the semiconductor wafer 1 will be described.

First, the semiconductor wafer 1 introduced into the chamber 2 is, for example,
The wafer is placed on the wafer stage 4 inclined by an angle of 0 °. Then, the wafer stage 4 is rotated by a rotary drive motor 5.
, For example, at a speed of about 20 to 60 rpm. Thereby, as shown in FIG. 2, the semiconductor wafer 1 is tilted at an inclination angle θ of about 5 to 20 ° with respect to the horizontal direction.
, It can be rotated at a speed of about 20 to 60 rpm.

In this state, the exhaust port 9 of the chamber 2
Then, the atmosphere is suctioned by a vacuum pump to maintain the inside of the discharge tube 10 at a predetermined degree of vacuum, for example, about 10 ^-1 to ¹ Torr, and the reaction gas G is supplied from the gas inlet 8. At the same time, for example, in a magnetic field of 875 Gauss or more generated by the coils 6 and 7,
, A high frequency bias voltage is applied to the wafer stage 4 and, at the same time, a microwave is generated from the magnetron.

At this time, the microwave generated inside the chamber 2 is transmitted to the inside of the waveguide 3 and further introduced into the inside of the discharge tube 10, and the interaction between the magnetic field and the microwave causes the microwave to be generated in the discharge tube 10. A high-density plasma containing radicals, + ions, and the like is generated inside, and the etching treatment of the semiconductor wafer 1 with the + ions and radicals whose energy is controlled by the high frequency bias voltage is started.

After the completion of the etching, the semiconductor wafer 1 placed on the wafer stage 4 is taken out. Thereafter, similarly, the next semiconductor wafer 1 is similarly tilted at an inclination angle θ of about 5 to 20 ° with respect to the horizontal direction, and rotated at a speed of about 20 to 60 rpm,
The plurality of semiconductor wafers 1 are sequentially subjected to etching processing by single-wafer processing.

The above-described etching process can be performed, for example, on an interlayer insulating film having a multilayer wiring structure laminated on the semiconductor wafer 1. That is, as shown in FIG. 3, a lower metal wiring layer 13 made of aluminum, an interlayer insulating film 14 made of a silicon oxide film, and an upper metal wiring layer 15 made of aluminum are sequentially stacked on the main surface of the semiconductor wafer 1 made of a silicon substrate, for example. In such a structure, when the interlayer insulating film 14 is laminated,
Opening 16 for through hole by dry etching
To form

Since the through-hole opening 16 is dry-etched with the semiconductor wafer 1 in a horizontal state, for example, in a comparative example corresponding to this embodiment, for example, as shown in FIG. A cylindrical opening 16a is formed in interlayer insulating film 14, and upper metal wiring layer 15 is formed.
In this case, the coverage of the bottom metal wiring layer 13 at the bottom of the through hole is problematic.

On the other hand, in the present embodiment,
Since the dry etching for the interlayer insulating film 14 is performed in a state where the semiconductor wafer 1 is inclined by an inclination angle θ of about 5 to 20 ° with respect to the horizontal direction, the opening 16
Has an inverted trapezoidal shape in which the lower metal wiring layer 13 side is narrow and the upper metal wiring layer 15 side is wide (for example, at an inclination angle θ of about 15 °, the upper base = 1 μm, the lower base = 0.5 μm,
(Inverted trapezoid of height = 0.9 μm), and can be formed in the inverted conical opening 16.

Then, the upper metal wiring layer 15 is deposited in the inverted conical opening 16 so that the upper metal wiring layer 15 sufficiently covers the lower metal wiring layer 13 at the bottom of the through hole through the through hole. Therefore, the lower metal wiring layer 13 and the upper metal wiring layer 15 can be reliably connected via the through holes of the interlayer insulating film 14.

Therefore, according to the dry etching apparatus of the present embodiment, the semiconductor wafer is provided in a state where the wafer stage 4 is inclined at a predetermined angle with respect to the horizontal direction and is rotated at a predetermined speed. Since the vertical cross-sectional shape of the interlayer insulating film 14 formed in 1 is inverted trapezoidal and an inverted conical through-hole can be formed, the coverage of the bottom metal wiring layer 13 at the bottom of the through-hole can be improved. it can.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, the etching apparatus of the above embodiment has been described as being a plasma etching apparatus using reactive gas plasma. However, the present invention is not limited to the above embodiment, and the present invention is not limited thereto. The present invention is widely applicable to single-wafer processing type etching apparatuses using a rotating sample stage, such as other dry etching apparatuses such as an ion etching apparatus and wet etching apparatuses.

The case where the semiconductor wafer is inclined by about 5 to 20 ° (preferably about 15 °) with respect to the horizontal direction and rotated at a speed of about 20 to 60 rpm has been described. The angle can be variously changed according to the thickness of a thin film such as an interlayer insulating film, the size of a through hole, an LSI manufacturing process, and the like.

Further, in the plasma etching apparatus as described above, the degree of vacuum of the chamber, the magnetic flux density of the coil, the frequency of the high-frequency power supply, etc. can be appropriately changed according to the target of the etching process. Nor.

[0034]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1) When etching a thin film formed on a semiconductor wafer, the semiconductor wafer is inclined at a predetermined angle with respect to the horizontal direction, and the semiconductor wafer in the inclined state is rotated at a predetermined speed. By doing so, the etching can be performed so that the vertical cross-sectional shape of the thin film has a predetermined angle of inclination, so that the coatability of the thin film laminated on the thin film can be improved.

(2) In particular, in an interlayer insulating film laminated between metal wiring layers on a semiconductor wafer, the through-hole having an inverted conical shape can be formed by making the vertical sectional shape of the interlayer insulating film an inverted trapezoid. Therefore, it is possible to improve the coverage of the bottom of the through hole to the metal wiring layer.

(3) As a result, in the process of etching the semiconductor wafer, the inclination angle and the rotation speed of the semiconductor wafer are set to predetermined values, and the shape of the through hole formed in the thin film such as the interlayer insulating film is devised. As the metal coverage can be improved, non-conduction defects can be eliminated and high reliability of the through-hole part can be obtained even when the through-hole part is narrowed due to the miniaturization of the multilayer wiring structure. Becomes

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a main part of a dry etching apparatus according to an embodiment of the present invention.

FIG. 2 is an explanatory view schematically showing an etching method using a dry etching apparatus according to one embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a through-hole portion of a semiconductor wafer in one embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a through hole portion of a semiconductor wafer as a comparative example corresponding to one embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Chamber 3 Waveguide 4 Wafer stage (sample stage) 5 Rotation drive motor (rotation means) 6, 7 Coil 8 Gas inlet 9 Exhaust port 10 Discharge tube 11 High frequency power supply 12 Ground electrode 13 Lower metal wiring layer 14 Interlayer insulating film 15 Upper metal wiring layer 16, 16a Opening

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H05H 1/46 H01L 21/306 E

Claims (4)

[Claims] 1. An etching method for etching a thin film formed on a semiconductor wafer, wherein the semiconductor wafer is tilted by a predetermined angle with respect to a horizontal direction, and the semiconductor wafer in the tilted state is tilted by a predetermined angle. A method for etching a semiconductor wafer, comprising: rotating the semiconductor wafer at a speed to etch the thin film formed on the semiconductor wafer so that a vertical cross-sectional shape of the thin film has a predetermined angle of inclination. 2. The method for etching a semiconductor wafer according to claim 1, wherein said thin film formed on said semiconductor wafer is an interlayer insulating film laminated between metal wiring layers, and a longitudinal section of said interlayer insulating film. A method for etching a semiconductor wafer, comprising forming an inverted trapezoidal shape into an inverted conical through hole. 3. The method for etching a semiconductor wafer according to claim 2, wherein when forming an inverted conical through hole in said interlayer insulating film, said semiconductor wafer is tilted by 5 to 20 ° with respect to a horizontal direction. A method of etching a semiconductor wafer, wherein the semiconductor wafer is tilted and rotated at a speed of 20 to 60 rpm. 4. An etching apparatus for etching a thin film formed on a semiconductor wafer, comprising: a sample stage inclined at a predetermined angle with respect to a horizontal direction; and rotating means for rotating the sample stage at a predetermined speed. The semiconductor wafer is mounted on the sample stage, the semiconductor wafer is inclined by a predetermined angle with respect to the horizontal direction, and the sample stage is rotated by the rotating means, and the semiconductor wafer is rotated by a predetermined angle. An apparatus for etching a semiconductor wafer, comprising: means for etching the thin film formed on the semiconductor wafer so that the thin film formed on the semiconductor wafer has a predetermined angle of inclination when rotated at a high speed.