JP3190830B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a semiconductor device for manufacturing a semiconductor device by performing dry etching and then removing deposits (so-called deposits) attached to an object to be etched. And a method for producing the same.

[0002]

2. Description of the Related Art Conventionally, in a semiconductor device having a multilayer wiring structure, a through hole is opened in an interlayer insulating film to connect an upper layer and a lower layer wiring, and then the surface of the lower wiring exposed in the through hole is exposed. Until the beginning of 1990, Japanese Patent Application Laid-Open No. 4-129217 and Japanese Patent Application Laid-Open No. 62-35
An RF etching method as shown in the prior art such as Japanese Patent No. 645 is generally adopted.

[0003] However, in this method, the above-mentioned publication or the known document (Akira ISOBE et.a.
l. , "Via Hole Failure Studio
y ”, NEC RESEARCH & DEVELOP
MENT, Vol. 34, no. 1, p. 77-83,
January 1993),
The side wall of the through-hole is also etched during the above-mentioned cleaning, and deposits are deposited on the lower aluminum wiring in the through-hole, which is a problem in terms of yield and reliability.

As the miniaturization of semiconductor devices progresses, the reliability of through-holes becomes a major problem. In the conventional connection method between upper and lower wirings using only the sputter etching method, the step coverage has been limited to the limit. .8μ
In the processes after m, the wiring material forming method by embedding and sputtering of a chemical vapor deposition (CVD) method of tungsten or the like as a through hole connecting method has become mainstream.

However, in the conventional method (JP-A-62-35645) in which the etching effect is given an angle to enhance the cleaning effect, the method of forming the upper layer wiring is accompanied by the sputtering method in accordance with the miniaturization of the semiconductor device. From the above to the wiring material forming method by embedding and sputtering, and when performing the embedding of wiring material such as tungsten, it is necessary to form a through hole nearly vertical, so it is applied to the current semiconductor device. Can not.

Accordingly, with the change in the method of forming the through hole, the post-processing method after the through hole etching has been improved. In addition to the conventional RF etching method, the deposition formed during the dry etching of the through hole has been improved. For the purpose of positively removing the substance, a method of removing the deposit attached to the side wall of the through hole using an alkaline or amine-based chemical has come to be adopted.

On the other hand, also in the etching of wiring materials, the incorporation of copper into the wiring material and the formation of laminated wiring have progressed, and the deposits on the side walls during dry etching have become thicker than in the past due to the high bias of the etching conditions. However, there is a problem that the resist cannot be sufficiently removed by the method of removing the resist. For this reason,
In order to remove deposits after etching the wiring material, a technique using an alkaline or amine-based chemical has been adopted.

[0008]

In the above-mentioned conventional method for manufacturing a semiconductor device, the through-hole or the deposited film formed during aluminum dry etching contains a large amount of aluminum in the film. Is a chemical solution having an etching power for aluminum. For example, as shown in FIG. 4A, an insulating film 9, a wiring member 10, and an interlayer insulating film 11 are sequentially stacked on a substrate 8, and
When a chemical having an etching power for aluminum is used to remove the deposit 13 attached to the side wall of the through hole of the semiconductor device having the through hole opened in the interlayer insulating film 11, the deposit 13 is removed. Also, the wiring member 10 made of aluminum is also etched, and FIG.
As shown in (b), the surface of the wiring member 10 is damaged.

Further, as shown in FIG.
0 is etched on the side wall of the wiring member 10 after the etching.
Is attached, in order to remove the sediment 13,
When a chemical having an etching power for aluminum is used, the deposit 13 is removed, but the wiring member 10 made of aluminum is also etched, and the wiring member 10 becomes thin as shown in FIG. Would. Such damage to the surface of the wiring member 10 (so-called wiring crack),
The thinning of the wiring member 10 cannot be ignored if the design rule is reduced to 0.35 μm or less.

[0010] Conventionally, since the current is excessively etched in a portion where a current path such as a ground line can be formed due to a battery effect, if a chemical solution is used for removing the deposit, the wiring material is locally excessively etched, and This leads to reduced retention and lower reliability.

The present invention has been made in view of the above points,
Removing the deposits generated when etching through holes and wiring materials without damaging the wiring materials,
It is an object of the present invention to provide a method of manufacturing a semiconductor device that can improve the product yield and the reliability.

[0012]

In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device including a step of removing a deposit formed on a dry-etched workpiece above a substrate. As an object removing step, an ion sputter etching is used in which an inert gas is ionized and the object to be etched is inclined with respect to the direction of the ion beam without changing the direction of the ion beam. . In the present invention, the deposit can be etched by performing ion sputter etching at an angle having a high sputtering rate.

In order to achieve the above object, the present invention is characterized in that the substrate and the object to be etched are rotated during ion sputter etching. Thereby, the deposit can be etched while maintaining the angle of incidence of the ion beam at a predetermined angle during the ion sputter etching.

[0014]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic view of a manufacturing apparatus used in an embodiment of a method of manufacturing a semiconductor device according to the present invention. The manufacturing apparatus includes a chamber 3 having an upper electrode 1 and a lower electrode 2 provided substantially opposed to each other and having a gas inlet 5, a vacuum exhaust system 4 for evacuating the chamber 3, an upper electrode 1 and a high-frequency power supply 6 for applying a high-frequency power to the lower electrode 2. In addition, an apparatus for implementing the method for manufacturing a semiconductor device includes a lower electrode 2
It has a mechanism that can tilt the electrode plate.

Next, the operation when the present embodiment is implemented by a dry etching apparatus will be described. First, when performing dry etching, the upper electrode 1 and the lower electrode 2
Are held in parallel, and anisotropic processing is performed on the wafer 7 placed on the lower electrode 2. After the end of the dry etching, the lower electrode 2 is moved 5
An inert gas such as argon (Ar) is introduced into the chamber 3 through the gas introduction unit 5 while being tilted at an angle of 20 ° to 20 ° and rotated about the vertical axis in the direction of the arrow.

As a result, the argon gas is ionized, and the ion beam obliquely collides with the wafer 7 placed on the lower electrode 2, thereby removing the deposits formed on the etched side walls. As described above, in this embodiment, the deposit attached to the side wall of the object to be etched of the wafer 7 is removed by the ion sputter etching method.

Note that, as described above, the dry etching and the ion sputter etching may be performed by dedicated apparatuses, respectively, even if they are not continuously performed in the dry etching apparatus. Further, as for the device type, an ion beam device such as a Kauffman ion source may be used without providing a parallel plate type device.

Next, the operation of the embodiment of the present invention will be described in detail with reference to FIG. FIG. 2 is a sectional view of the apparatus when the present invention is applied to etching of a through hole. First, as shown in FIG. 2A, on the wiring member 10 of the device in which the insulating film 9 and the wiring member 10 are formed on the substrate 8,
For example, an interlayer insulating film 1 of silicon dioxide (SiO ₂ )
After 1 is formed by a chemical vapor deposition (CVD) method, a pattern of a PR (photoresist) 12 is formed in a through-hole opening by using a lithography method.

Subsequently, the upper electrode 1 and the lower electrode 2 are held in parallel using the dry etching apparatus shown in FIG. 1, and the wafer 7 having the structure shown in FIG. On the other hand, the interlayer insulating film 11 is etched using a hydrofluoric acid-based gas such as CF ₄ , CHF ₃ or C ₂ F ₆ , and a through hole 14 is opened as shown in FIG.
At this time, the deposit 13 is formed on the side wall of the through hole 14.

Next, as shown in FIG. 1, by tilting the lower electrode 2 by 5 ° to 20 ° with respect to the horizontal axis, the wafer 7 after the above-mentioned opening of the through hole is moved 70 ° with respect to the ion incident direction.
After holding on the lower electrode 2 at an angle of from about 85 ° to about 85 °, rotation is given about an axis, and an inert gas is introduced into the chamber 3 through the gas introduction section 5 of FIG. FIG. 2 (c)
The ion sputter etching is performed as shown in FIG.

As conditions for the sputter etching, in the case of a flat plate type apparatus, Ar gas is used as an inert gas,
Power density of 50 to 10 under pressure of 10 ^-1 to 10 ^-2 Torr
When the operation is performed at about 0 W / cm ² , the deposit 13 can be efficiently removed without damaging the substrate or the like as shown in FIG.

It is known that a high sputtering rate can be obtained by setting the ion incident angle in the range of 70 ° to 85 ° (Japanese Patent Laid-Open Publication No. Hei.
This is because, when the incident angle is smaller than 70 °, the ion does not reach the bottom of the through hole in the through hole having a high aspect, and the ability to remove the deposit is reduced.

As described above, after the deposit 13 is removed by performing the ion sputter etching, the PR 12 is ashed to form the deposit 13 as shown in FIG.
A semiconductor device having a through-hole 14 with no adhesion is opened in the interlayer insulating film 11 is obtained. Further, in this embodiment, since a chemical solution is not used for removing the deposit 13, a battery effect does not occur, so that a phenomenon in which etching is locally excessively advanced can be prevented.

Next, a second embodiment of the present invention will be described with reference to FIG. This embodiment is an example in which the present invention is applied to etching of wiring of a semiconductor device. In FIG.
The same parts as those in FIG. 2 are denoted by the same reference numerals. First, FIG.
As shown in (a), after forming a wiring member 10 mainly composed of aluminum on an insulating film 9 by a sputtering method,
The PR 12 is patterned on the wiring member 10 by a lithography method.

Subsequently, a power density of 1 in a gas atmosphere of Cl ₂ + BCl ₃ using the dry etching apparatus shown in FIG.
When the wiring member 10 is etched using the PR12 as a mask under the condition of about 0 to 50 W / cm ² , as shown in FIG. 3B, the deposit 13 called a rabbit ear is formed on the side walls of the etched wiring member 10 and PR12. Is formed.

Next, as shown in FIG. 1, the lower electrode 2 is inclined by 5 ° to 20 ° with respect to the horizontal axis so that the wafer 7 having the structure shown in FIG. After being held on the lower electrode 2 in a state of having an angle of 70 ° to 85 ° with respect to the incident direction, the rotation is given about the axis, and the inert gas is passed through the gas introduction unit 5 of FIG. After being introduced into the chamber 3, ion sputter etching is performed as shown in FIG.

The conditions for sputter etching are the same as in the first embodiment. By this ion sputter etching, the deposit 13 can be efficiently removed without damaging the substrate or the like as shown in FIG. Finally, by ashing the PR 12, as shown in FIG. 3E, a wiring is obtained in which the deposit 13 is not attached and the wiring is hardly thin.

The present invention is not limited to the above embodiment, but may be a method in which ions are sputter-etched at an angle and then ions are vertically incident to remove deposits.

[0029]

As described above, according to the present invention,
Deposits can be efficiently removed by performing ion sputter etching at a high sputtering rate at an angle with a high sputtering rate, so that the deposits adhering to the wiring material such as aluminum can be removed with little damage. be able to. In particular, by performing ion sputter etching while the substrate or the like is in a rotating state, deposits can be more efficiently removed, thereby improving product yield and reliability.

Further, according to the present invention, since no chemical solution is used for removing the deposit, no cell effect is generated, and therefore, excessive etching does not locally proceed. Does not occur, and the reliability can be improved as compared with the related art.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a manufacturing apparatus used in an embodiment of the present invention.

FIG. 2 is a cross-sectional view of an apparatus for explaining each step of the first embodiment of the present invention.

FIG. 3 is a cross-sectional view of an apparatus for explaining each step according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view of a semiconductor device illustrating a conventional problem.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Upper electrode 2 Lower electrode 3 Chamber 4 Vacuum exhaust system 5 Gas introduction part 6 High frequency power supply part 7 Wafer 8 Substrate 9 Insulating film 10 Wiring material 11 Interlayer insulating film 12 PR 13 Deposit (deposit) 14 Through hole

 ────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-5-326454 (JP, A) JP-A-5-82484 (JP, A) JP-A-4-267337 (JP, A) 171723 (JP, A) JP-A-61-135125 (JP, A)

Claims (4)

(57) [Claims] 1. A step of removing deposits formed on a dry-etched workpiece above a substrate in a dry etching apparatus comprising a high-frequency power supply for applying a high-frequency power to an upper electrode and a lower electrode. In the method for manufacturing a semiconductor device, the direction of the ion beam is changed by ionizing an inert gas, fixing the upper electrode, and tilting the lower electrode with respect to the upper electrode as the deposit removing step. the method of manufacturing a semiconductor device according to claim without the use of ion sputter-etching for etching by the etching object placed on the lower electrode obliquely to the direction of the ion <br/> Nbimu be. 2. The method according to claim 1, wherein the substrate and the object to be etched are rotated during the ion sputter etching. 3. The method for manufacturing a semiconductor device according to claim 1, wherein an angle of the object to be etched with respect to an incident direction of the ion beam is set to an angle in a range of 70 ° to 85 °. . 4. The deposit formed on the object to be etched is a deposit adhered to an inner side wall of a through hole or an outer side wall of a wiring material.
The manufacturing method of the semiconductor device described in the above.