JPH10135369A - Semiconductor integrated circuit device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decrease the rigidity of an element mounting portion of an element mounting board, so as to reduce the stress applied onto a bump connection part of a semiconductor element and improve connection reliability of the bump connection part of the semiconductor element, by forming the element mounting portion of the element mounting board with a thickness smaller than that of a non-element mounting portion. SOLUTION: In an element mounting board 2 for supporting a semiconductor chip 1, an element mounting portion 2a is formed with a thickness smaller than that of a non-element mounting portion 2b. Thus, the rigidity of the element mounting portion 2 in the element mounting board 2 may be decreased. Therefore, when BGA is heated or cooled to cause the element mounting board 2 to expand or contract, the element mounting portion 2a may be deformed in accordance with the degree of deformation of the semiconductor chip 1, since the element mounting portion 2a having a coefficient of thermal expansion greater than that of the semiconductor chip 1 has flexibility. As a result, the stress applied onto a bump connection part 3a may be reduced, and connection reliability of the bump connection part 3a may be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique, and more particularly, to a semiconductor integrated circuit device and a method for manufacturing the same, which improve bump connection reliability in flip chip connection.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

[0003] In a method of manufacturing a semiconductor integrated circuit device such as a BGA (Ball Grid Array) having a semiconductor chip (semiconductor element) mounted thereon, a semiconductor chip and an element mounting substrate supporting the semiconductor chip are solder bumps and plated bumps. Alternatively, a technique called flip-chip connection for electrically connecting via a conductive organic material or the like is used.

Since the element mounting board is often formed to have relatively high rigidity, if a stress is generated between the semiconductor chip and the element mounting board, an electrical disconnection may occur at the bump connection portion. .

Therefore, in order to obtain high connection reliability at the bump connection portion, a liquid insulating resin is dropped or injected around the gap or the bump formed between the semiconductor chip and the element mounting substrate, and then the insulating material is formed. The hardening resin is cured.

Here, regarding the flip chip connection,
For example, it is described in Nikkei BP, issued May 31, 1993, Susumu Kayama and Kunihiko Naruse (monitoring), "Practical Course VLSI Packaging Technology (Lower)", pages 175 to 178.

[0007]

However, in the BGA for performing flip-chip connection in the above-mentioned technology, when a printed circuit board is used as an element mounting board, a difference in thermal expansion coefficient between the semiconductor chip and the element mounting board due to the material is large. After mounting the semiconductor chip via the bump, when the temperature is returned to room temperature (cooled), or under actual use conditions, excessive thermal stress is generated at the bump connection portion.

At this time, the element mounting board is often much thicker and more rigid than the semiconductor chip.

Therefore, there is a problem that disconnection occurs at the bump connection portion because the deformation of the element mounting substrate is small and a large stress is applied to the bump connection portion.

Further, even when the gap or bump connection between the semiconductor chip and the element mounting board is reinforced with an insulating resin, if the element is mounted on the mounting board as a BGA, the warpage of the element mounting board is restrained. A problem is that connection failure may occur due to heat history due to reflow during mounting.

An object of the present invention is to provide a semiconductor integrated circuit device which improves the connection reliability at a bump connection portion of a semiconductor element, and a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, a semiconductor integrated circuit device according to the present invention has a semiconductor element mounted thereon, has an element mounting substrate supporting the semiconductor element via bumps, and has an element mounting portion in the element mounting substrate. Are formed thinner than the non-element mounting portion.

Accordingly, the rigidity of the element mounting portion of the element mounting substrate can be reduced because the element mounting portion is formed thinner than the non-element mounting portion in the element mounting substrate.

Therefore, since the element mounting portion of the element mounting substrate has flexibility, when the semiconductor integrated circuit device is heated or cooled, the element mounting portion of the element mounting substrate is deformed in accordance with the degree of deformation of the semiconductor element. can do.

As a result, the stress applied to the bump connection of the semiconductor element can be reduced, and the connection reliability of the bump connection of the semiconductor element can be improved.

Furthermore, the semiconductor integrated circuit device of the present invention
Concave portions are formed on both sides of the element mounting surface of the element mounting substrate and the non-element mounting surface on the opposite side, and the element mounting portion is formed thin.

Further, according to the method of manufacturing a semiconductor integrated circuit device of the present invention, there is provided a step of preparing an element mounting substrate which supports a semiconductor element and has an element mounting portion formed thinner than a non-element mounting portion, via a bump. Mounting the semiconductor element on an element mounting portion of the element mounting board.

[0020]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a cross-sectional view showing an embodiment of the structure of a BGA which is a semiconductor integrated circuit device of the present invention. FIG. 2 is an embodiment of a structure of an element mounting board of a BGA which is a semiconductor integrated circuit device of the present invention. FIG. 3 is a cross-sectional view showing an example of an embodiment of the structure of the BGA which is a semiconductor integrated circuit device according to the present invention when the element mounting substrate is deformed.

In the semiconductor integrated circuit device of the present embodiment, a semiconductor chip (semiconductor element) 1 is flip-chip connected to an element mounting substrate 2.

That is, the semiconductor chip 1 is mounted on the element mounting substrate 2 via the ball-shaped electrodes, that is, the bumps 3.

In this embodiment, a BGA will be described as an example of the semiconductor integrated circuit device.

The structure of the BGA includes a semiconductor chip 1 on which a semiconductor integrated circuit is formed, and an element mounting substrate 2 (also referred to as a base substrate or a package substrate) that supports the semiconductor chip 1 via bumps 3. Mounting board 2
Of the element mounting portion 2a in the area
It is formed thinner than.

Further, as shown in FIG. 1, in the BGA of the present embodiment, a concave portion 2e is formed in a non-element mounting surface 2d opposite to the element mounting surface 2c of the element mounting substrate 2 so that the element mounting portion 2a Are formed thinly.

The semiconductor chip 1 has a thermal expansion coefficient of, for example, about 3.5 × 10 ⁻⁶ / ° C., and a plurality of electrodes for connecting the bumps 3 are provided on the outer periphery of the bump connection surface 1a. Pads are provided in a grid pattern.

Further, the bump 3 is made of, for example, Sn-3w.
It is formed by solder of t% Ag.

Here, the element mounting substrate 2 in the present embodiment is formed of, for example, a glass epoxy resin, and has a coefficient of thermal expansion of about 15 × 10 ⁻⁶ / ° C. Further, as shown in FIG. 2, the planar shape of the element mounting board 2 is a quadrangle.

Further, only the mount area immediately below the semiconductor chip 1 on the element mounting board 2, that is, only the element mounting portion 2a is formed thinner than the surrounding non-element mounting portion 2b.

That is, in this embodiment, since the semiconductor chip 1 is mounted substantially at the center of the element mounting surface 2c of the element mounting substrate 2, the non-element mounting of the element mounting substrate 2 is performed as shown in FIG. The semiconductor chip 1 is located substantially at the center of the surface 2d.
A concave portion 2e having substantially the same area as that of FIG. 1 is formed, and a plurality of terminal electrodes 2f are provided around the concave portion 2e.

Here, the thickness of the element mounting portion 2a of the element mounting substrate 2 is, for example, 0.1 to 0.2 mm, and the thickness of the non-element mounting portion 2b around the element mounting portion 2a is 0.6 to 1 mm. .

A method for manufacturing the semiconductor integrated circuit device according to the present embodiment will be described.

The method for manufacturing the semiconductor integrated circuit device is the method for manufacturing the BGA.

First, an element mounting board 2 supporting the semiconductor chip 1 and having the element mounting portion 2a formed thinner than the non-element mounting portion 2b is prepared.

Here, the element mounting substrate 2 according to the present embodiment has a concave portion 2e formed on the non-element mounting surface 2d of the element mounting substrate 2, the element mounting portion 2a is formed thin, and a glass epoxy resin is used. (May be a single layer) formed by the same manufacturing method as a generally used multilayer printed wiring board, for example, a bonding technique.

That is, a desired wiring pattern is formed on a substrate for each layer, and after laminating the substrates, electrical connection between layers is performed by through-hole processing.

In the case of the element mounting substrate 2 of the present embodiment, the concave portion 2e is formed by forming a plurality of substrates each having an area of a predetermined size corresponding to the concave portion 2e and opening in a square (or a circular shape). This is performed by bonding a plurality of substrates that are not open.

As a result, the element mounting substrate 2 in which the recess 2e is formed in the non-element mounting surface 2d of the element mounting substrate 2 and the element mounting portion 2a is formed thinly can be prepared.

Thereafter, the bump connection surface 1 of the semiconductor chip 1
The bumps 3 made of solder are temporarily attached to the electrode pads provided in a lattice pattern by a flux.

Subsequently, the bumps 3 are fixed to the semiconductor chip 1 by, for example, reflowing in a furnace at 240 ° C. exceeding the melting point of the solder.

After that, the semiconductor chip 1 is
Is mounted on the element mounting portion 2a of the element mounting substrate 2.

That is, the element mounting portion 2 of the element mounting substrate 2
After the flux is applied to the element mounting surface 2a, the semiconductor chip 1 is placed on the element mounting surface 2a of the element mounting substrate 2 so that the bumps 3 face down and the corresponding electrodes placed on the element mounting substrate 2 are aligned. Place on 2c.

Thereafter, the semiconductor chip 1 and the element mounting substrate 2 are connected by bumps 3 by reflowing again in a furnace at 240 ° C.

As a result, the semiconductor chip 1 can be mounted on the element mounting portion 2a formed thin on the element mounting substrate 2.

As a result, a BGA in which the semiconductor chip 1 and the element mounting substrate 2 are electrically connected via the bumps 3 can be manufactured.

Subsequently, the BGA mounting bumps 4 are attached to the terminal electrodes 2f provided on the element mounting board 2, and the BG
The BGA is mounted on the mounting substrate 5 via the A mounting bumps 4.

At this time, the BGA is mounted on the mounting board 5 by reflow or the like, but the semiconductor chip 1 is deformed (warped) during the reflow.

However, as shown in FIG. 3, the element mounting board 2 is also deformed (warped) according to the degree of deformation of the semiconductor chip 1.

Thus, the stress applied to the bump connection portion 3a between the semiconductor chip 1 and the element mounting board 2 can be reduced.

According to the semiconductor integrated circuit device and the method of manufacturing the same according to the present embodiment, the following operational effects can be obtained.

That is, in the element mounting substrate 2 supporting the semiconductor chip 1, the element mounting portion 2a is replaced with the non-element mounting portion 2b.
The rigidity of the element mounting portion 2a in the element mounting substrate 2 can be reduced by being formed thinner than that.

As a result, the BGA is heated or cooled. As a result, when the element mounting substrate 2 is about to expand or contract, the element mounting portion 2a of the element mounting substrate 2 having a larger thermal expansion coefficient than the semiconductor chip 1 is flexible. Therefore, the element mounting portion 2a of the element mounting substrate 2 can be deformed according to the degree of deformation of the semiconductor chip 1.

Here, the heating is, for example, heating during reflow, and the cooling is, for example, cooling when returning to room temperature after heating.

As a result, the element mounting portion 2a is deformed according to the degree of deformation of the semiconductor chip 1, so that the stress applied to the bump connection portion 3a of the semiconductor chip 1 can be reduced, and the bump connection portion of the semiconductor chip 1 can be reduced. 3a can be improved in connection reliability.

Therefore, it is possible to reduce connection failures that occur at the time of reflow during mounting on the mounting board 5.

It is to be noted that by forming the mount area immediately below the semiconductor chip 1 on the element mounting substrate 2, that is, only the element mounting portion 2 a, to be thin, it is possible to cope with the multilayer mounting of the element mounting substrate 2.

Also, since the element mounting portion 2a of the element mounting substrate 2 is formed thin, the semiconductor chip 1
Since the connection reliability of the bump connection portion 3a can be improved, there is no need to reinforce the gap between the semiconductor chip 1 and the element mounting substrate 2 or the bump connection portion 3a with an insulating resin.

Thus, flip-chip connection B is performed.
In the manufacturing process of the GA, the resin sealing process can be omitted, and as a result, the productivity of the BGA can be improved.

Since the element mounting substrate 2 is formed of a glass epoxy resin, the difference in the coefficient of thermal expansion between the semiconductor chip 1 and the element mounting substrate 2 is large. The connection reliability of 3a and the manufacturability of the BGA can be further improved.

As described above, the invention made by the inventor has been specifically described based on the embodiments of the present invention. However, the present invention is not limited to the embodiments of the present invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the semiconductor integrated circuit device (BGA) described in the above embodiment, a concave portion is formed on the non-element mounting surface of the element mounting substrate opposite to the element mounting surface, and the element mounting portion is formed thin. However, in the semiconductor integrated circuit device, the recess 2e is formed in the element mounting surface 2c of the element mounting substrate 2 like the semiconductor integrated circuit device (BGA) of another embodiment shown in FIG. Thus, the element mounting portion 2a may be formed thin.

In this case, the semiconductor chip 1 is housed and mounted in the concave portion 2e of the element mounting board 2.

Thus, the connection reliability of the bump connection portion 3a of the semiconductor chip 1 can be improved as in the case of the BGA of the above-described embodiment, and the height of the semiconductor integrated circuit device (BGA) can be reduced. And as a result, B
The thickness of the GA can be reduced.

The semiconductor integrated circuit device is similar to the semiconductor integrated circuit device (BGA) of another embodiment shown in FIG. 5 in that the device mounting surface 2c of the device mounting substrate 2 and the non- A concave portion 2e may be formed on both sides of the surface 2d, and the element mounting portion 2a may be formed thin.

In this case also, the BGA shown in FIG.
In the same manner as described above, the semiconductor chip 1
Is housed and mounted.

Since the concave portions 2e are formed on both sides of the element mounting surface 2c and the non-element mounting surface 2d of the element mounting substrate 2, the element mounting portion 2a of the element mounting substrate 2 can be formed thinner. The flexibility of the portion 2a can be increased, whereby the connection reliability of the bump connection portion 3a of the semiconductor chip 1 can be further improved.

Further, similarly to the BGA shown in FIG. 4, the height of the semiconductor integrated circuit device (BGA) can be reduced, so that the BGA can be made thinner.

Here, the method of manufacturing the semiconductor integrated circuit device (BGA) shown in FIG. 4 and FIG.
Needless to say, this is the same as the method of manufacturing the GA.

The other functions and effects obtained by the semiconductor integrated circuit device (BGA) shown in FIGS. 4 and 5 are the same as the functions and effects obtained by the BGA of the above-described embodiment. Omitted.

In the above-described embodiment and the other embodiments, the case where the semiconductor integrated circuit device is a BGA has been described. However, the semiconductor integrated circuit device has an element mounting substrate for supporting a semiconductor chip. And if the semiconductor chip is flip-chip connected, BG
Other semiconductor integrated circuit devices such as PGA (Pin Grid Array) other than A may be used.

Further, in the BGA of the above-described embodiment and the other embodiments, the case where the gap between the semiconductor chip and the element mounting substrate and the bump connection portion are not sealed with resin has been described. The semiconductor chip or the bump connection portion may be sealed with a resin, or may be sealed with a cap or the like.

In the BGA of the above embodiment and the other embodiments, the case where the element mounting substrate is formed of a glass epoxy resin has been described, but the element mounting substrate is made of ceramic or the like. It may be formed of another material.

[0074]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). Since the element mounting portion of the element mounting substrate supporting the semiconductor element is formed thinner than the non-element mounting portion, the rigidity of the element mounting portion of the element mounting substrate can be reduced. Thereby, the stress applied to the bump connection portion of the semiconductor element can be reduced,
The connection reliability of the bump connection part of the semiconductor element can be improved.

(2). Since the connection reliability of the bump connection portion of the semiconductor element can be improved, connection failures that occur at the time of reflow during mounting on the mounting board can be reduced.

(3). Since the element mounting portion of the element mounting substrate is formed to be thin, it is not necessary to reinforce a gap or a bump connection portion between the semiconductor element and the element mounting substrate with an insulating resin. This makes it possible to omit the resin sealing step in the manufacturing process of the semiconductor integrated circuit device performing the flip-chip connection, thereby improving the manufacturability of the semiconductor integrated circuit device.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a structure of a BGA which is a semiconductor integrated circuit device of the present invention.

FIG. 2 is a bottom view showing an example of an embodiment of the structure of an element mounting substrate of a BGA which is a semiconductor integrated circuit device of the present invention.

FIG. 3 is a cross-sectional view showing an example of an embodiment of a structure when a device mounting substrate in a BGA as a semiconductor integrated circuit device of the present invention is deformed.

FIG. 4 is a cross-sectional view illustrating a structure of a semiconductor integrated circuit device (BGA) according to another embodiment of the present invention.

FIG. 5 is a cross-sectional view showing a structure of a semiconductor integrated circuit device (BGA) according to another embodiment of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor chip (semiconductor element) 1a bump connection surface 2 element mounting substrate 2a element mounting portion 2b non-element mounting portion 2c element mounting surface 2d non-element mounting surface 2e recess 2f terminal electrode 3 bump 3a bump connection portion 4 BGA mounting bump 5 Mounting board

 ──────────────────────────────────────────────────の Continuing from the front page (72) Inventor Taku Kikuchi 2326 Imai, Ome-shi, Tokyo Inside the Hitachi, Ltd.Device Development Center (72) Inventor Takashi Miwa 2326 Imai, Ome-shi, Tokyo Device Development Center, Hitachi, Ltd. Inside

Claims (6)

[Claims] 1. A semiconductor integrated circuit device having a semiconductor element mounted thereon, comprising: an element mounting board supporting the semiconductor element via bumps, wherein the element mounting portion of the element mounting board is a non-element mounting section. A semiconductor integrated circuit device characterized in that the semiconductor integrated circuit device is formed to be thinner than a semiconductor integrated circuit device. 2. The semiconductor integrated circuit device according to claim 1, wherein a concave portion is formed on an element mounting surface of said element mounting substrate, and said element mounting portion is formed to be thin. apparatus. 3. The semiconductor integrated circuit device according to claim 1, wherein a concave portion is formed on a non-element mounting surface of the element mounting substrate opposite to the element mounting surface, and the element mounting portion is formed thin. A semiconductor integrated circuit device characterized by the above-mentioned. 4. The semiconductor integrated circuit device according to claim 1, wherein concave portions are formed on both sides of an element mounting surface of the element mounting substrate and a non-element mounting surface opposite thereto, so that the element mounting portion is thin. A semiconductor integrated circuit device characterized by being formed. 5. The semiconductor integrated circuit device according to claim 1, wherein the element mounting substrate is formed of a resin. 6. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the semiconductor device is supported and the device mounting portion is formed thinner than the non-device mounting portion. Preparing a device mounting substrate, and mounting the semiconductor device on a device mounting portion of the device mounting substrate via a bump.