JPH07193162A - Ball-grid array semiconductor device and mounting substrate thereof - Google Patents

Abstract

PURPOSE:To provide a BGA semiconductor device, which does not have defective electric connections even if a package is warped, a mounting substrate for the BGA semiconductor device and the mounting method thereof. CONSTITUTION:A semiconductor chip 3 is mounted on a substrate 1 having the circuit wiring. The electrodes of the semiconductor chip 3 and the circuit wirings are electrically connected. At least the semiconductor chip and the electric connecting part are sealed with resin 5. A plurality of solder bumps 8 are provided at the face on the opposite side of the face of the substrate 1, on which the semiconductor chip 3 is mounted. In this BGA semiconductor device, the central part of the substrate l is warped in the direction of the face 6 on the opposite side with respect to the face 2, on which the semiconductor chip 3 is mounted, in the protruding shape.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array (hereinafter referred to as "BGA") semiconductor device having excellent mountability and a mounting board on which the semiconductor device is mounted. In particular, a semiconductor chip is mounted on a board having circuit wiring. And electrically connecting the electrodes of the semiconductor chip to the circuit wiring, at least the semiconductor chip portion is sealed with resin, and a plurality of surfaces of the substrate opposite to the surface on which the semiconductor chip is mounted are provided. The present invention relates to a technique effectively applied to a ball grid array semiconductor device provided with solder bumps.

[0002]

2. Description of the Related Art As semiconductor devices have become more sophisticated in recent years, the number of external leads in surface-mounting type packages tends to increase. Typical examples of these semiconductor devices are QFP (Quad Fla
t Package). Since the QFP has external leads on the side surface of the semiconductor device, the package size tends to increase due to the increase in the number of external leads even if the interval between the external leads is narrowed. On the other hand, a surface mounted package developed in recent years is a BGA semiconductor device.
In this BG semiconductor A device, as shown in FIG. 14, a semiconductor chip is mounted on a surface 2 on one side of a substrate 1 having circuit wiring, and the substrate 1 and the semiconductor chip are electrically connected by a gold wire or the like. The surface 2 on which the semiconductor chip is mounted is sealed with the sealing resin 5. A plurality of electrodes 7 electrically connected to the semiconductor chip are formed on the surface 6 of the substrate 1 opposite to the surface on which the semiconductor chip is mounted, and the solder bumps 8 are formed on the electrodes 7.
Is provided as an external electrode. This solder bump 8 is
Since they are arranged in an array on the surface 6, more external electrodes are provided as compared with the QFP, and if the number of external electrodes is the same, the package size can be made smaller than the QFP. This BGA semiconductor device is positioned and mounted on the mounting substrate 9, and the mounting substrate 9 and the package are heated to reflow the solder bumps 8 and connect to the electrodes 10 on the mounting substrate 9.

Regarding the technique relating to the BGA semiconductor device, US Pat. No. 5,241,133 (Aug, 31, 19)
93).

[0004]

The present inventor has found the following problems as a result of examining the above-mentioned prior art.

That is, as shown in FIG. 14, since the BGA semiconductor device has a structure in which one side of the substrate 1 is resin-sealed, the difference in thermal expansion coefficient between the semiconductor chip inside, the substrate 1 and the sealing resin 5 is different. This may warp the package of the BGA semiconductor device. At this time, when the BGA semiconductor device is mounted on the mounting substrate 9, a gap 11 is formed between the electrode 10 on the mounting substrate 9 and the solder bump 8 as shown in FIG. There is a problem that the solder bumps 8 are not connected.

In particular, when the encapsulating resin 5 having a large coefficient of thermal expansion is used, the encapsulating resin 5 on the upper surface of the substrate 1 expands greatly when heated to the solder reflow temperature, and the package warps upward. At this time, the solder bumps 8 near the end faces of the package are connected, but the solder bumps 8 near the center of the package are not connected. further,
In the BGA semiconductor device, since the solder bumps 8 as external terminals are located under the package, the connection point between the mounting substrate 9 and the package is hidden under the package, and the visual inspection of the connection is practically impossible. Therefore, even if the solder bumps 8 have a defective connection due to the warp of the package, they cannot be found until an electrical inspection is performed after the mounting is completed.

An object of the present invention is to provide a BGA semiconductor device which can be mounted without electrical connection even if the package warps.

Another object of the present invention is to provide a mounting substrate for a BGA semiconductor device, which can be mounted electrically connected even if the package warps.

Another object of the present invention is to provide a technique capable of improving the mounting yield of a BGA semiconductor device.

Another object of the present invention is to provide a technique capable of inspecting the mounting appearance of a BGA semiconductor device.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0012]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, (1) a semiconductor chip is mounted on a substrate having circuit wiring, and an electrode of the semiconductor chip and the circuit wiring are electrically connected, and at least the semiconductor chip and the electrical connection portion are sealed with resin. A BGA semiconductor device in which a plurality of solder bumps are provided on the surface of the substrate opposite to the surface on which the semiconductor chip is mounted, wherein the thermal expansion coefficient of the sealing resin is the heat of the substrate. Less than expansion coefficient.

(2) The solder bumps on the outermost periphery of the BGA semiconductor device of (1) are outside the end surface of the sealing resin.

(3) The size of the contact area of the electrode with the solder bump is changed according to the amount of warpage of the BGA semiconductor device.

(4) A mounting board having a plurality of electrodes corresponding to the solder bumps, on which a BGA semiconductor device having a plurality of solder bumps provided on the side opposite to the side on which the semiconductor chip is mounted is mounted. The contact area of the electrodes on the mounting board with the solder bumps depends on the gap between the solder bumps and the electrodes generated when the BGA semiconductor device is mounted on the mounting board and the solder is reflowed. It is the size of the area.

(5) The ball grid array semiconductor device having a plurality of solder bumps on the surface of the substrate opposite to the surface on which the semiconductor chip is mounted is mounted on a mounting substrate, and the ball grid is formed when the solder is reflowed. This is a mounting method in which the central portion of the substrate of the array semiconductor device is convexly warped in the surface direction opposite to the surface on which the semiconductor chip is mounted to electrically connect the electrodes on the mounting substrate to the solder bumps.

[0018]

According to the above (1), by using the sealing resin having the coefficient of thermal expansion smaller than that of the board when mounted on the mounting board and heated to the solder reflow temperature,
Since the central portion of the substrate is convexly warped in the surface direction opposite to the surface on which the semiconductor chip is mounted, all solder bumps near the central portion of the package can be reliably connected, and
The connection portion of the solder bump at the connection point between the mounting board and the package can be observed from the side surface.

According to the above (2), since the solder bumps on the outermost periphery of the BGA semiconductor device are outside the end face of the sealing resin, the connecting portion at the connecting point between the mounting substrate and the package can be more easily made from the side surface. It can be observed and the visual inspection can be performed more reliably. As a result, even if the solder bump connection failure occurs due to the warp of the package, it can be immediately detected.

According to (3), the height of the solder bump formed on the electrode is changed by changing the area of the electrode under the solder bump on the substrate according to the warpage of the package of the BGA semiconductor device. Therefore, it is possible to prevent or reduce the connection failure of the solder bump due to the warp of the package.

According to (4) above, the contact area of the electrodes on the mounting substrate with the solder bumps is such that when the BGA semiconductor device is mounted on the mounting substrate and the solder is reflowed, the solder bumps and the electrodes are contacted. By adjusting the size of the area according to the gap between the solder bumps, the height difference between the solder bumps before and after mounting can be controlled, so solder bump connection failure due to package warpage can be prevented or reduced. can do.

According to the above (1) and (5), when mounted on the mounting substrate, the central portion of the substrate is convexly warped in the surface direction opposite to the surface on which the semiconductor chip is mounted,
All the solder bumps of the package can be reliably connected, and the connection portion of the solder bumps at the connection point between the mounting substrate and the package can be observed from the side surface. As a result, a visual inspection can be performed easily, and a solder bump connection failure due to package warpage can be prevented or reduced.

[0023]

Embodiments of the present invention will now be described in detail with reference to the drawings.

In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

(Embodiment 1) FIG. 1 is a sectional view showing the structure of Embodiment 1 of a BGA semiconductor device of the present invention, and FIG. 2 is a plan view showing the arrangement of solder bumps of the BGA semiconductor device of this embodiment. 3 is a cross-sectional view in each manufacturing process of the BGA semiconductor device of the present embodiment, FIG. 4 is a plan view showing an array of electrodes of a mounting board on which the BGA semiconductor device of the first embodiment is mounted, and FIG.
FIG. 6 is a diagram for explaining a method of mounting the BGA semiconductor device of the first embodiment on a mounting board.

In FIGS. 1 to 5, 1 is a substrate having circuit wiring on its surface and inside thereof, 2 is a surface on which a semiconductor chip of the substrate is mounted, 3 is a semiconductor chip, 4 is Au wire, 5 is sealing resin. , 6 is a surface of the substrate on which solder bumps are provided, 7 is an electrode on the substrate, 8 is a solder bump, 20 is a mounting substrate, and 22 is an electrode on the mounting substrate. Further, in FIG. 14, reference numeral 11 denotes a gap that will occur between the electrode on the mounting substrate and the solder bump at the temperature during reflow.

In the BGA semiconductor device according to the first embodiment, as shown in FIG. 1, a semiconductor chip 3 is mounted on a substrate 1 having circuit wiring, and electrodes of the semiconductor chip 3 and the circuit wiring are connected by Au wires 4. Are electrically connected to each other, and at least the semiconductor chip 3, the Au wire 4 and an electrically connected portion are sealed with a sealing resin 5, and the surface of the substrate 1 opposite to the surface 2 on which the semiconductor chip 3 is mounted is mounted. As shown in FIG. 2, a plurality of substantially uniform solder bumps 8 are arranged in an array on the surface 6. The outermost solder bump 8A of the BGA semiconductor device is arranged outside the end surface 5A of the sealing resin 5.

The material of the substrate 1 is a coefficient of thermal expansion α
= 17 × 10 ~ ⁶ / ℃ of glass epoxy (JIS "FR-
4 ″). Further, a resin is used as the sealing resin 5, and a resin whose coefficient of thermal expansion is smaller than that of the substrate 1 is used. when using the glass epoxy coefficient ^{α = 17 × 10 ~ 6 /} ℃, the thermal expansion coefficient of the ideal resin alpha, 1
Although it is 7 × 10 ⁶ / ° C., a resin of 17 × 10 ⁶ / ° C. ⁶ or less is used because of the coefficient of thermal expansion of the semiconductor chip 3 of silicon (Si). The thermal expansion coefficient α of the preferable resin is
It is 10 × 10 ^{6 to} 14 × 10 ⁶ / ° C.

The dimensions of each part of the BGA semiconductor device of the first embodiment are, as shown in FIG. 1, 1.5 mm in height from the bottom surface of the substrate 1 to the top surface of the sealing resin 5 and the sealing resin 5. Is 0.9 mm, the thickness of the substrate 1 is 0.6 mm, and the height of the solder bumps 8 including electrodes is 0.6 mm. Then, for example, 119 solder bumps 8 are arranged in a 7 × 17 array with a pitch of 1.27 mm. The outer shape is 14 mm
It is a rectangle of × 22 mm.

Next, a method of manufacturing the BGA semiconductor device of the first embodiment will be described.

First, as shown in FIG. 3A, the semiconductor chip 3 is bonded onto the substrate 1 with an epoxy paste or the like. Next, as shown in FIG. 3B, the substrate 1 and the semiconductor chip 3 are
With an Au wire 4. Next, as shown in FIG. 3C, the surface 2 of the substrate 1 is resin-molded by transfer molding. At this time, a sealing resin having a coefficient of thermal expansion of 17 × 10 ⁶ / ° C. or less is used. For example, the coefficient of thermal expansion α is 10 ×
It is preferred to use a resin of ^{10 ~ 6 / ℃ ~14 × 10} ~ 6 / ℃. After sealing, the resin is cured, but the BGA semiconductor device is almost horizontal or slightly curved as shown in FIG. 1 due to the curing shrinkage of the resin. Curing shrinkage of resin is 5
%, The size of the sealing resin part is 10 mm □
In the case of (square), the contraction amount on one side is about 2.5 μm.
Finally, as shown in FIG. 2D, after the solder bumps 8 are transferred to the electrodes 7 on the substrate 1, the solder bumps 8 are formed through the substrate 1 in a solder reflow furnace, and the BGA semiconductor device is completed.

FIG. 4 is a plan view of the mounting substrate according to the first embodiment as seen from above, in which 20 is a mounting substrate, 21 is a circular electrode having a normal diameter, and 22 is a circular electrode having a large diameter.

FIG. 5 shows a step of mounting a package of the BGA semiconductor device (hereinafter, simply referred to as a package) on the mounting substrate 20. First, as shown in FIG. 5A, the flux 23 is applied to the electrodes 21 and 22 on the mounting substrate 20.
Apply. Next, as shown in FIG. 5B, the semiconductor device is positioned and mounted on the mounting substrate 20. Then
When the mounting board 20 and the BGA semiconductor device are passed through a solder reflow furnace to reflow the solder bumps 8, the solder bumps 8 and the electrodes 21 on the mounting board 20 are first connected to each other by BG.
This is performed from the central portion of the A semiconductor device, and the bumps 8A on the outermost periphery are connected last as shown in FIG. 5 (C). Between the outermost solder bumps 8A and the electrodes 21 on the mounting substrate 20, the central portion of the package warps downward due to the difference between the thermal expansion coefficient of the substrate 1 and the thermal expansion coefficient of the encapsulation resin 5, and the package central portion warps downwards by about 50.
Although a gap of μm to 60 μm (depending on the data) is generated, as shown in FIG. 5C, the solder bumps 8A on the outermost periphery and the electrodes 22 on the mounting substrate 20 are connected to each other, and 8A is connected and the mounting is completed.

That is, after mounting, the bump height near the central portion of the BGA semiconductor device is about 430 μm, and the difference in bump height from before mounting is about 70 μm. This allows the outermost solder bumps 8A and the mounting substrate 2 to be mounted before mounting.
The gap with the electrode 21 on the electrode 0 is absorbed, and the solder bumps 8A on the outermost periphery also come into contact with the electrode 21 on the mounting substrate 1, so that the solder wets and spreads on the electrode 21 to establish a connection.

In the first embodiment, the diameter of the electrode 21 on the mounting substrate 20 is increased, but the mounting substrate 20
As shown in FIG. 6, the electrodes of the BGA semiconductor device package have the same diameter, and the electrodes 31 of the solder bumps 8A near the outermost periphery are the solder bumps 8 near the center of the package of the BGA semiconductor device. Even if the diameter is smaller than that of the electrode 32, the same effect can be obtained.
Further, since the distance between the electrodes 31 is increased by further reducing the diameter of the electrodes 31 of the solder bumps 8A near the outermost circumference, the degree of freedom in routing the wiring 34 on the mounting substrate 20 is increased.

Here, the relationship between the area of the electrode and the height of the solder bump formed thereon will be described.

The relationship between the electrode area and the solder bump height can be approximately expressed by the following equation.

[0038]

[Equation 1]

For example, the volume of solder V = 1.03 mm ³
Then, when the electrode diameter is 0.60 mm, the bump height is 0.61 mm, and when the electrode diameter is 0.4, the solder bump height is 0.7 mm.

As described above, even if the weight of the solder to be supplied is constant, the height of the solder bump can be changed by changing the area of the electrode.

7 to 10 show experimental results of the warpage amount of each package when the thermal expansion coefficient α of the preferable resin is 10 × 10 to ^{6 to} 14 × 10 to ⁶ / ° C. 7 If the thermal expansion coefficient α was used and the resin of 10 × 10 ~ ⁶ / ℃, 8 thermal expansion coefficient α is 12 × 10 ~ ⁶
Fig. 9 shows that the thermal expansion coefficient α is 1 when the resin of / ° C is used.
When a resin having a temperature of 3 × 10 ⁶ / ° C. is used, FIG. 10 shows a resin having a thermal expansion coefficient α of 14 × 10 ⁶ / ° C. Here, the warpage amount of the package is, as shown in FIG. 11, the sealing resin 5 on the substrate 1 supported downward, and the horizontal plane including the end portion of the upper surface of the substrate 1 is used as a reference S. S
Is the height of the upper surface H of the substrate 1 from. As the material of the substrate 1, glass epoxy (JIS “FR-4”) having a coefficient of thermal expansion α = 17 × 10 ⁶ / ° C. was used.

7 to 10, the horizontal axis represents the distance (mm) from the edge of the substrate 1, and the vertical axis represents the warp amount (μm).
The triangle marks indicate the reflow temperature (170
(° C) package warp amount, □ indicates package warp amount when molding is completed at room temperature (22 ° C), quadrilateral black mark indicates between room temperature (22 ° C) and reflow temperature (170 ° C) Is the amount of warpage of the package at any temperature (90 ° C, 93 ° C, 86 ° C, 95 ° C). This arbitrary temperature is a temperature for checking the tendency of the warp amount of the package.

As can be seen from FIGS. 7 to 10, at the reflow temperature (170 ° C.) when mounting on the mounting substrate 9 indicated by Δ, the package becomes warped and convex downward. . In particular, as shown in FIGS. 1 and 2,
At room temperature (22 ° C.) at which molding is completed as indicated by □, the package is flat or convex downward in the opposite direction, and does not have the downward convex shape desired by the present invention, but is indicated by Δ. Reflow temperature (170 ℃) when mounting on the mounting board 9
At the time of, it is understood that the central portion of the package is warped and a downward warp is generated with respect to the mounting surface of the mounting substrate 9.

As can be seen from the above description, according to the first embodiment, the expansion of the sealing resin 5 due to the heating at the time of mounting causes the expansion of the substrate 1.
Is smaller than the expansion of the package 1, the outer peripheral portion of the substrate 1 of the package warps in the direction of the side of the surface 2 on which the semiconductor chip 3 is mounted with respect to the central portion, and the package is positioned below the mounting surface of the mounting substrate 9. Since the warpage of the convex is generated, the warpage of the package of the BGA semiconductor device is kept in the state of being convex downward. At this time, the connection between the solder bump 8 and the electrode 10 on the mounting substrate 9 is performed from the central portion of the package, and the outermost solder bump 8 is connected last. Therefore, a visual inspection of the connection of the outermost peripheral bumps is performed, and if all the outermost peripheral solder bumps 8A are connected, it can be determined that the innermost solder bumps 8 are also connected.

Further, since the outermost solder bumps 8 of the package are located outside the end surface 5A of the sealing resin 5,
Since the connection portion at the connection point between the mounting substrate 9 and the package can be observed from the surroundings, even if the solder bump has a defective connection due to the warp of the package, it can be immediately found.

(Embodiment 2) FIG. 12 is a plan view showing a structure of a mounting board for a BGA semiconductor device according to the present invention in Embodiment 2, and FIG. 13 is a plan view showing a BGA semiconductor device mounted on the mounting board according to Embodiment 2. It is sectional drawing which shows a state.

In the mounting substrate of the BGA semiconductor device of the second embodiment, the contact area of the electrodes on the mounting substrate is set by mounting the BGA semiconductor device on the mounting substrate and warping the substrate 1 by heat during solder reflow. The size of the area is determined according to the gap between the solder bump and the electrode.

For example, as shown in FIG. 1, unless the coefficient of thermal expansion of the sealing resin 5 is smaller than the coefficient of thermal expansion of the substrate 1, the surface 2 of the substrate 1 on which the semiconductor chip 3 is mounted is used. When a BGA semiconductor device in which a plurality of solder bumps 8 are provided on the surface 6 on the opposite side is mounted on the mounting substrate 9, the central portion of the substrate 1 of the BGA semiconductor device is in the direction of the surface 2 on which the semiconductor chip 3 is mounted. The case where it is convexly warped (the case where it is warped in the direction opposite to that of Example 1) occurs. Also in this case, in order to reliably electrically connect the electrodes on the mounting substrate 9 and the solder bumps 8, as shown in FIG. 13, the solder bumps 8 formed in the central portion of the package substrate 1 are formed. The solder bump 8 must be raised by a height corresponding to the gap 33 between the electrode 32 and the electrode 32. On the other hand,
The solder bumps 8A in the vicinity of the peripheral portion of the substrate 1 of the package are pressed downward and the height becomes low. Therefore, the second embodiment
As shown in FIG. 12, the electrodes on the mounting board 9 of the mounting board 9 have the area of the electrode 32 of the portion corresponding to the solder bumps 8 in the vicinity of the central portion of the package substrate 1 of the electrodes on the mounting board 9 in the vicinity of the peripheral portion. The electrode 31 is smaller than the electrode 31.

By doing so, after the solder reflow, it is cooled and the sealing resin 5 contracts, the warp of the semiconductor device increases again, and the solder bumps 8A near the center portion
Are greatly extended upward, but the solder of the solder bumps 8A is soldered to the electrodes 31 on the mounting substrate 30 and the electrodes 7 on the substrate 1 by reducing the diameter of the electrodes 31 on the mounting substrate 30 as described above. Even if it is stretched between and, it is not cut because the solder does not run short, and it is electrically connected reliably.

In the second embodiment, of the electrodes on the mounting substrate 9, the area of the electrode 31 of the portion corresponding to the solder bump 8 in the central portion of the substrate 1 of the package is made small. 32 of the electrodes of the electrodes corresponding to the solder bumps 8A near the periphery of the package substrate 1.
Even if the area of the electrode is larger than that of the electrode in the vicinity of the central portion, the same effect can be obtained.

The inventions made by the present inventors are as follows.
Although the present invention has been specifically described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

[0052]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

(1) When a BGA semiconductor device is mounted on a mounting substrate, it is possible to prevent or reduce defective connection of bumps near the center of the package due to warpage of the package.

(2) When the BGA semiconductor device is mounted on the mounting substrate, the connection can be determined only by the visual inspection of the outermost bumps of the package, and the visual inspection of the mounting can be facilitated.

(3) When the BGA semiconductor device is mounted on the mounting board, even if the package of the BGA semiconductor device is warped, there is no electrical connection failure and the mounting can be performed easily and reliably, and the yield is improved. can do.

[Brief description of drawings]

FIG. 1 is a sectional view showing a configuration of a first embodiment of a BGA semiconductor device of the present invention.

FIG. 2 is a plan view showing an array of bare bumps of the BGA semiconductor device according to the first embodiment.

FIG. 3 is a cross-sectional view in each manufacturing process of the BGA semiconductor device of the first embodiment.

FIG. 4 is a plan view showing an arrangement of electrodes on a mounting board on which the BGA semiconductor device of the first embodiment is mounted.

FIG. 5 is a diagram for explaining a method of mounting the BGA semiconductor device of the first embodiment on a mounting board.

FIG. 6 is a plan view showing a modification of the electrodes of the BGA semiconductor device according to the first embodiment.

FIG. 7 is a diagram showing an experimental result of a warp amount when a resin having a thermal expansion coefficient α of 10 × 10 ⁶ was used in Example 1 of the present invention.

FIG. 8 is a diagram showing an experimental result of a warp amount when a resin having a thermal expansion coefficient α of 12 × 10 ⁶ was used in Example 1 of the present invention.

FIG. 9 is a diagram showing an experimental result of a warp amount when a resin having a thermal expansion coefficient α of 13 × 10 ⁶ was used in Example 1 of the present invention.

FIG. 10 is a diagram showing an experimental result of a warp amount when using a resin having a thermal expansion coefficient α of 14 × 10 ⁶ in Example 1 of the present invention.

FIG. 11 is a diagram for explaining an experiment of a warpage amount of a package according to the first embodiment.

FIG. 12 is a plan view of a mounting board according to a second embodiment of the present invention as viewed from above.

FIG. 13 is a cross-sectional view showing a state where the PGA semiconductor device of the second embodiment is mounted on a mounting board.

FIG. 14 is a side view of a conventional BGA device mounted on a mounting substrate for explaining problems.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate having circuit wiring, 2 ... Surface on which semiconductor chip is mounted, 3 ... Semiconductor chip, 4 ... Au wire, 5 ...
Sealing resin, 6 ... Surface of substrate on which solder bumps are provided, 7 ... Electrodes on substrate, 8, 8A ... Solder bumps, 9 ... Mounting substrate,
10 ... Electrode on mounting board, 11 ... Gap between electrode on mounting board and solder bump, 20 ... Mounting board, 21 ... Circular electrode with normal diameter, 22 ... Circular electrode with large diameter, 30 ...
Mounting substrate, 31 ... Electrode corresponding to bump 8A, 32 ... Electrode corresponding to bump 8, 33 ... Gap between electrode on mounting substrate and solder bump.

Front Page Continuation (72) Inventor Sueo Kawai 5-20-1 Kamimizuhoncho, Kodaira-shi, Tokyo Inside the Semiconductor Business Division, Hitachi, Ltd. (72) Inventor Kunihiro Tsubozaki 5-20, Kamimizuhoncho, Kodaira-shi, Tokyo No. 1 Incorporated company Hitachi Ltd. Semiconductor Division (72) Kunihiko Nishi Nishi 5-20-1, Kamimizuhonmachi, Kodaira-shi, Tokyo Incorporated Hitachi Ltd Semiconductor Division (72) Kenichi Otsuka Kodaira, Tokyo 5-20-1 Kamimizuhonmachi, Semiconductor Company, Hitachi Ltd. Semiconductor Division

Claims (5)

[Claims] 1. A semiconductor chip is mounted on a substrate having circuit wiring, electrodes of the semiconductor chip and the circuit wiring are electrically connected, and at least the semiconductor chip and the electrical connection portion are sealed with resin, A ball grid array semiconductor device in which a plurality of solder bumps are provided on the surface of the substrate opposite to the surface on which the semiconductor chip is mounted, wherein the thermal expansion coefficient of the sealing resin is the thermal expansion of the substrate. A ball grid array semiconductor device characterized by being smaller than a coefficient. 2. The ball grid array semiconductor device according to claim 1, wherein the outermost solder bumps of the ball grid array semiconductor device are outside the end faces of the sealing resin. 3. A semiconductor chip is mounted on a substrate having circuit wiring, and an electrode of the semiconductor chip and the circuit wiring are electrically connected to each other, and at least the semiconductor chip and the electrical connection portion are sealed with resin, A ball grid array semiconductor device in which a plurality of solder bumps are provided on the surface of the substrate opposite to the surface on which the semiconductor chip is mounted, the solder bumps of the electrodes depending on the amount of warpage of the semiconductor device. A ball grid array semiconductor device, wherein the size of the contact area with the ball grid array semiconductor is changed. 4. A mounting having a plurality of electrodes corresponding to the solder bumps, on which a ball grid array semiconductor device having a plurality of solder bumps provided on a surface opposite to a surface of the substrate on which the semiconductor chip is mounted is mounted. The area of contact between the electrodes on the mounting board and the solder bumps is between the solder bumps and the electrodes generated when the ball grid array semiconductor device is mounted on the mounting board and solder is reflowed. A mounting board having an area corresponding to a gap. 5. The ball grid array when a ball grid array semiconductor device having a plurality of solder bumps provided on the surface opposite to the surface on which a semiconductor chip is mounted is mounted on a mounting board and the solder is reflowed. A mounting method characterized in that a central portion of a substrate of a semiconductor device is convexly warped in a surface direction opposite to a surface on which the semiconductor chip is mounted to electrically connect electrodes on the mounting board to the solder bumps. .