JPH10126006A - Nitride semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high luminous-efficiency nitride semiconductor device which has an active layer containing nitride semiconductor including indium. SOLUTION: A first nitride semiconductor layer 101 having band gap energy higher than that of an active layer 16 is formed on at least one surface of the active layer 16. Further a second nitride semiconductor layer 102 having band gap energy lower than that of the first nitride semiconductor layer 101, and a third nitride semiconductor layer 103 having band gap energy higher than that of the second nitride semiconductor layer 102, are formed on the first nitride semiconductor layer 101.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a nitride semiconductor device, and more particularly, to a laser diode (L)
D) Devices, nitride semiconductor light emitting devices such as light emitting diode (LED) devices, and light receiving devices such as solar cells, and more particularly to nitride semiconductor light emitting devices.

[0002]

2. Description of the Related Art Nitride semiconductors can have bandgap energies from 1.95 to 6.0 eV depending on their composition, so that light emitting diode (LED) devices,
BACKGROUND ART As a material for semiconductor light emitting devices such as a laser diode (LD) device, it has been attracting attention. Recently, high-luminance blue LED devices and green LED devices have been put to practical use using this nitride semiconductor material. These LED devices have a double heterostructure with a pn junction, and both have outputs exceeding 1 mW.

[0003] Conventional LED devices basically have I
The active layer made of nGaN has a double hetero structure sandwiched between n-type and p-type cladding layers both made of AlGaN. An n-type contact layer made of GaN is formed on the n-type clad layer, and a p-type contact layer made of GaN is formed on the p-type clad layer. This laminated structure is provided on a substrate made of, for example, sapphire.

[0004] An LD device can basically have the same structure as the LED device. However, especially LD
In the case of a device, a separate confinement type structure in which light and carriers are separately confined is often used. For example, Japanese Patent Laid-Open Publication No.
-21511. This publication includes an InGaN active layer sandwiched between two light guide layers, one of which is made of n-type GaN and the other is made of p-type GaN.
A carrier confinement layer made of n-type AlGaN is formed on the n-type light guide layer, and p-type Al is formed on the p-type light guide layer.
A light emitting device having a separate confinement structure in which another carrier confinement layer made of GaN is formed is disclosed.

[0005] In a conventional semiconductor device having a double hetero structure, a first cladding layer having a bandgap energy larger than that of the active layer is provided in contact with the active layer, and in contact with the first cladding layer. And a second cladding layer having a band gap energy larger than that of the first cladding layer. This is so that electrons and holes are efficiently injected into the active layer according to the energy level.

Similarly, in the case of a nitride semiconductor LD device, a cladding layer such as an optical guide layer and a carrier confinement layer (optical confinement layer) is sequentially formed so that the band gap energy gradually increases in contact with the active layer. (For example, see the above publication).

[0007]

However, it has been found that a conventional nitride semiconductor device, particularly an LD device, having an active layer containing indium has a low luminous efficiency with the above structure. In particular, it was found that when the device temperature was increased as the current applied to the device was increased, the luminous efficiency was significantly reduced.

Accordingly, an object of the present invention is to provide a nitride semiconductor device having an active layer containing a nitride semiconductor containing indium and having a high luminous efficiency. Another object of the present invention is to provide a nitride semiconductor device in which the luminous efficiency does not decrease much even when the device temperature rises.

[0009]

According to a first aspect of the present invention, there is provided a quantum well having first and second surfaces and including a nitride semiconductor containing indium. An active layer having a structure, a first nitride semiconductor layer formed in contact with a first surface of the active layer and having a band gap energy larger than a band gap energy of the active layer; A second nitride layer formed at a position farther from the active layer than the first nitride semiconductor layer on the surface side of the first nitride semiconductor layer and having a bandgap energy smaller than the bandgap energy of the first nitride semiconductor layer. A second nitride semiconductor layer formed on the first surface side of the active layer, at a position farther from the active layer than the second nitride semiconductor layer, and a band gap of the second nitride semiconductor layer. Providing a third nitride semiconductor light emitting device comprising the nitride semiconductor layer structure including a nitride semiconductor layer having a band gap energy than Energy.

In the nitride semiconductor device of the present invention,
The active layer is sandwiched between a layer structure that ultimately contacts the positive electrode and a layer structure that ultimately contacts the negative electrode. In the following description, the side where the layer structure that ultimately contacts the positive electrode is formed is referred to as the p-side, and the side where the layer structure that ultimately contacts the negative electrode is formed is the n-side. .

Therefore, the nitride semiconductor layer structure can be provided on the p-side or the n-side of the active layer, or on both the p-side and the n-side. The first nitride semiconductor layer includes:
It is preferable that the carrier has a thickness small enough to enable tunneling, and more specifically, it is preferable that the carrier has a thickness of 0.1 μm or less. Usually, it is preferable that the first nitride semiconductor layer has a thickness of at least 10 angstroms or more.

Further, the present invention provides, in a second aspect, n
A first cladding layer made of a type nitride semiconductor; a first cladding layer provided on the first cladding layer, made of a nitride semiconductor containing indium and gallium and having a thickness of 70 angstroms or less; An active layer having a quantum well structure including at least one well layer provided in a lattice mismatch with respect to the active layer, the active layer including a plurality of indium-rich regions and an indium-poor region;
And a nitride semiconductor device provided on the active layer and comprising a second cladding layer made of a nitride semiconductor doped with an acceptor impurity.

In the present invention, when widely referred to as a nitride semiconductor, a nitride of an element of Group 3 of the periodic table, more specifically,
Formula _{In x Al y Ga 1-xy} N (0 ≦ x ≦ 1,0 ≦ y ≦
1, 0 ≦ x + y ≦ 1).

The present inventors have studied on a decrease in luminous efficiency with a rise in temperature, particularly in a nitride semiconductor device having an active layer containing indium. as a result,
The main cause of the decrease in luminous efficiency is that a nitride semiconductor containing indium, particularly InGaN, has a property that it is difficult to grow as compared with a nitride semiconductor containing aluminum or gallium nitride (GaN). I understood. That is, InN and GaN constituting InGaN
Has a significantly different decomposition temperature, and InGaN tends to phase-separate into InN and GaN during growth. If the indium content is increased, it is difficult to obtain an active layer having a uniform composition. Therefore, in a conventional nitride semiconductor having an InGaN active layer, the indium content tends to be kept low.

InG having such a low indium content
When an optical guide layer made of GaN is formed in contact with the aN active layer, the band offset between the active layer and the optical guide layer becomes extremely small. This will be described with reference to FIG. 6 showing an energy band corresponding to a conventional nitride semiconductor light emitting device. As shown in FIG. 6, in the conventional nitride semiconductor device, the bandgap energy of the light guide layer (GaN) directly sandwiching the InGaN active layer is not so large as compared with the bandgap energy of the active layer (InGaN). (In in InGaN
Is low, so that the InGaN composition approximates the GaN composition). For this reason, when the temperature of the device rises as the current value applied to the semiconductor device increases,
Due to the effect of its thermal energy, the n-layer and p-layer respectively
Before the electrons and holes injected from the layer into the active layer recombine and emit light (hν), the electrons and holes overflow the active layer and each of the guide layer (GaN) on the side opposite to the injection side. ), That is, the electrons are transferred to the p-type light guide layer,
The holes reach the n-type light guide layer. as a result,
In the conventional structure, the luminous efficiency is low, and particularly, when the temperature increases, the efficiency decreases.

Therefore, in the nitride semiconductor device of the present invention, two first layers (a first p-side layer and a first p-side layer) formed in contact with and sandwiching an active layer containing a nitride semiconductor containing indium. The first n-side layer) is formed of a nitride semiconductor having a band gap energy larger than that of the active layer. These first layers only need to have a band gap energy larger than the band gap energy of the active layer, and preferably, the two first layers are 0.01 to 4.05 higher than the active layer.
eV has a large band gap energy. The presence of the first layer having such a large band gap energy prevents electrons or holes injected into the active layer from overflowing the active layer. And, on each of the first layers, preferably has a band gap energy smaller than the band gap energy of the first layer in contact with the first layer, but preferably has a band gap energy larger than the band gap energy of the active layer. Two second layers (a second p-side layer and a second n-side layer) formed of a nitride semiconductor are provided. These second layers only need to have a band gap energy smaller than the band gap energy of the first layer, and are preferably 0.01 to more than the first band gap energy.
It has a small bandgap energy of 4.05 eV. Furthermore, on each second layer, preferably in contact therewith, two third layers (third layers) formed of a nitride semiconductor having a band gap energy larger than the band gap energy of the second layer. (a p-side layer and a third n-side layer). These third layers only need to have a bandgap energy larger than the bandgap energy of the second layer, and preferably 0.01 to 4.05 eV larger than the bandgap energy of the second layer. It has band gap energy. Thus, the third
Are efficiently injected into the second layer having a smaller bandgap energy, but are injected into the active layer because the first layer has a large bandgap energy. Tend to be blocked by the first layer. Therefore, in the present invention, the first layer is formed thin enough to allow electrons or holes to penetrate the first layer by tunnel effect (tunneling). Thus, electrons or holes are efficiently injected from the third layer to the active layer. Thus, in the device of the present invention, electrons and holes are efficiently injected from the third layer into the active layer, and electrons or holes are blocked by the first layer on the side opposite to the injection side. Even if the device temperature rises, the active layer does not overflow. The band gap energy of the nitride semiconductor is described as follows. The band gap energy of AlN is 6.0.
eV, and the bandgap energy of GaN is 3.
4 eV, and the band gap energy of InN is 1.95 eV.

As is apparent from the above description, in the present invention, the three-layer structure including the first layer, the second layer, and the third layer is provided if it is provided on one surface of the active layer. ,
One of the electrons or holes is prevented from overflowing the active layer. Most preferably, the three-layer structure is provided on both sides (p-side and n-side) of the active layer.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to FIGS. In these drawings, the same elements and members are denoted by the same reference numerals. FIG. 1 is a schematic sectional view showing one structure of an LD device according to the first embodiment of the present invention. In this LD device, the three-layer structure of the present invention is provided on the p-side.

The LD device shown in FIG. 1 has an n-type contact layer 13 on a substrate 11 via a buffer layer 12.
n-type carrier confinement layer (optical confinement layer) 14, n-type light guide layer 15, active layer 16, first p-side nitride semiconductor layer 1 having a larger band gap energy than active layer 16
01, the second p-side nitride semiconductor layer 102 having a smaller band gap energy than the first p-side nitride semiconductor layer,
A nitride semiconductor laminated structure including a third p-side nitride semiconductor layer 103 having a larger band gap than the second p-side nitride semiconductor layer 102 and a p-type contact layer 17 is provided. On the p-type contact layer 17, a current confinement layer 18 provided with a contact hole 18a is provided. A negative electrode 19 is provided on the exposed surface of the n-type contact layer 13, and a positive electrode 20 is provided on the current confinement layer 20. The positive electrode 20 is in contact with the p-type contact layer 17 through the contact hole 18a of the current confinement layer 18.

The substrate 11 is made of spinel (MgAl ₂ O).
₄ ), sapphire (including Al ₂ O ₃ , A-plane, R-plane, C-plane), SiC (including 6H, 4H, 3C), ZnS, Z
Conventional materials proposed for growing nitride semiconductors such as nO, GaAs, and GaN can be used.

The buffer layer 12 is made of AlN, GaN, Al
It can be formed of GaN or the like, and can be formed at a temperature of 900 ° C. or less with a thickness of several tens angstroms to several hundred angstroms. The buffer layer 12 is formed on the substrate 1
1 is formed to reduce lattice constant mismatch between the nitride semiconductor layer 1 and the nitride semiconductor layer formed thereon. Therefore,
When a substrate lattice-matched with a nitride semiconductor, a substrate having a lattice constant close to the lattice constant of a nitride semiconductor, or the like is used, it may be omitted depending on a nitride semiconductor growth method or the like.

The n-type contact layer 13 is formed of a nitride semiconductor, and in particular, GaN, In _a Ga ₁ -aN (0 <a <
It is preferable to form in 1). (In this specification,
_{In a Ga 1-a N (} 0 <a <1) or simply as InGaN nitride semiconductor represented by similar expressions). In particular, when the n-type contact layer 13 is formed of Si-doped GaN, an n-type layer having a high carrier concentration is obtained, and a favorable ohmic contact with the negative electrode 19 is obtained, so that the threshold current of the laser device is reduced. be able to. Although the thickness of the n-type contact layer 13 is not particularly limited, it can be usually formed with a thickness of 0.1 μm to 5 μm.

The negative electrode 19 formed on the exposed surface of the n-type contact layer 13 can obtain a preferable ohmic contact with the n-type contact layer 13.
It is preferable to use a metal such as Al, Ti, W, Cu, Zn, Sn, or In or an alloy thereof.

The n-type carrier confinement layer 14 and the n-type light guide layer 15 formed on this layer 14 are each formed of an n-type nitride semiconductor. In the embodiment shown in FIG. 1, the n-type light guide layer 15 has a bandgap energy larger than the bandgap energy of the active layer 16, and the n-type carrier confinement layer 14 has a bandgap energy of the n-type light guide layer 15. It has a larger bandgap energy. It is desirable that the n-type carrier confinement layer 14 is usually formed with a thickness of 0.1 μm to 1 μm, and the n-type light guide layer 15 is usually formed with a thickness of 100 Å to 1 μm.

The active layer 16 formed on the n-type light guide layer 15 has a quantum well structure (that is, a single quantum well structure or a multiple quantum well structure), and the quantum well structure is an n-type light guide. The indium-containing nitride semiconductor having a band gap smaller than the band gap of both the guide layer 15 and the first p-side nitride semiconductor layer 101, ie, I
_nd Al _e Ga _1-de N (0 <d ≦ 1, 0 ≦ e ≦ 1, 0
<D + e ≦ 1). Preferably,
Well layer of a ternary mixed crystal _{In f Ga 1-f N (} 0 <f <1)
Is formed. Since the ternary mixed crystal InGaN provides a layer having better crystallinity than the quaternary mixed crystal, the light emission output is improved.

Among them, the active layer 16 has a multiple quantum well structure (minimum three-layer structure) in which well layers made of InGaN and barrier layers made of a nitride semiconductor having a larger band gap energy than the well layers are alternately stacked. Is particularly preferable. In the present invention, the multiple quantum well structure includes a well layer as a lowermost layer directly provided on an n-type layer such as the n-type light guide layer 15 and a p-type layer such as a first p-side nitride semiconductor 101 described later. Structure, or a barrier layer and a first p-side nitride semiconductor as a lowermost layer provided directly on an n-type layer such as an n-type light guide layer 15 even if the structure has a well layer as an uppermost layer directly in contact with A structure having a barrier layer as an uppermost layer directly in contact with a p-type layer such as the layer 101 may be employed. Ga nitride is used for the nitride semiconductor forming the barrier layer.
N, AlGaN, and the like. However, as with the well barrier layer layer of a ternary mixed crystal _{In f 'Ga 1-f'} N (0 <f '
<1, however, it is particularly preferable to form f ′ <f). As described above, when the active layer 16 has a multiple quantum well structure in which InGaN layers having different band gap energies are stacked, the indium mole fraction of the active layer 16 is changed, or the first or third n-side or p-side nitridation described later is performed. About 365 nm to 660 nm by quantum level emission by changing the aluminum mole fraction of the semiconductor layer.
And a high-power LD device having a wavelength of Further, when an InGaN barrier layer is stacked on the well layer, the crystal of the InGaN barrier layer is softer than that of AlGaN. Therefore, excellent laser oscillation can be realized.

In the multiple quantum well structure, it is particularly desirable that the well layer has a thickness of 70 angstroms or less and the barrier layer has a thickness of 150 angstroms or less. On the other hand, it is particularly desirable that the active layer having a single quantum well structure composed of one quantum well layer has a thickness of 70 Å or less. The lower limit of the thickness of both the well layer and the barrier layer is preferably 5 angstroms.

The active layer 16 may be one in which no impurity is doped (non-doped), or one in which a well layer and / or a barrier layer is doped with an impurity (acceptor impurity and / or donor impurity). Particularly preferred active layer 1
Reference numeral 6 denotes a non-doped active layer and a silicon or germanium-doped active layer. Of the active layers doped with impurities, a particularly preferable one is a silicon-doped active layer. In particular, when the active layer is doped with silicon, the threshold current tends to decrease in LD devices. The silicon doping is carried out during the growth of the nitride semiconductor to form the active layer, for example, when the source gas is an organic silicon gas such as tetraethylsilane, a silicon hydride gas such as silane, or a silicon halide gas such as silicon tetrachloride. And the like.

The first p-side nitride semiconductor layer 101 provided in contact with the active layer 16 is formed of a nitride semiconductor having a larger band gap energy than the active layer 16 (more strictly, its well layer). Have been. Particularly preferably, the first nitride semiconductor layer is made of a nitride semiconductor containing Al, that is, In _g Al _h Ga _1-gh N (0 ≦ g ≦ 1, 0 <h ≦
1, 0 <g + h ≦ 1), particularly preferably, ternary mixed crystal Al _j Ga _{1 -jN} (0 <j <1).
(In this specification, Al _j Ga _1-j N (0 <j <1)
Alternatively, a nitride semiconductor represented by a similar expression is simply referred to as AlG
aN).

The first p-side nitride semiconductor layer 101 is preferably an i-type or a p-type. In particular, AlGaN can easily obtain a p-type with a high carrier concentration, and when formed in contact with the active layer 16 including a well layer containing InGaN, an element having a high light emission output can be obtained.

In the present invention, in order to make the nitride semiconductor (including the nitride semiconductor of the active layer) p-type, an acceptor impurity such as Mg, Zn, C, Be, Ca, or Ba is added during crystal growth. Obtained by doping. The acceptor impurity concentration is 1 × 10 ¹⁷ to 1 × 10 ²² / cm ³
It is preferred that Particularly, when the acceptor impurity is magnesium, its concentration is 1 × 10 ¹⁸ to 1 × 1.
It is particularly preferred that it is 0 ²⁰ / cm ³ , especially 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . In any case, in order to obtain a p-layer having a high carrier concentration, it is more desirable to perform annealing (heat treatment) at 400 ° C. or more in an inert gas atmosphere after doping with an acceptor impurity. By performing annealing, usually, Mg-doped p-type AlGa
In the case of N, a carrier concentration of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ can be obtained. To obtain an i-type nitride semiconductor,
For example, by growing a nitride semiconductor having a value of j of 0.5 or more in Al _j Ga ₁ -jN, an i-type nitride semiconductor can be obtained without doping an acceptor impurity. In addition, the i-type nitride semiconductor is obtained by doping the p-type nitride semiconductor layer with a donor impurity that only compensates for the hole carrier concentration, or by accepting the n-type nitride semiconductor layer only by compensating the electron carrier concentration. It can also be obtained by doping impurities.

It is preferable that the thickness of the first nitride semiconductor layer 101 is thin enough to allow carriers to tunnel through the first nitride semiconductor layer 101. More specifically, the semiconductor layer 101 preferably has a thickness of 0.1 μm or less, more preferably 0.05 μm (500 Å) or less, and most preferably 0.03 μm (300 Å) or less. Semiconductor layer 1
When the thickness of the first p-side nitride semiconductor layer 01 is reduced as described above, cracks in the first p-side nitride semiconductor layer 101 can be prevented, and a nitride semiconductor layer having good crystallinity can be grown. A
When AlGaN having a larger ratio of 1 is formed thinner, laser oscillation becomes easier. For example, when the value of j is 0.2 or more, Al _j
When Ga _{1 -jN} is used, it is desirable to form the semiconductor layer 101 with a thickness of 500 Å or less. The lower limit of the thickness of the first p-side nitride semiconductor layer 101 is not particularly limited, but is preferably formed to a thickness of 10 Å or more.

The second p-side nitride semiconductor layer 102 is formed of the first
Has a band gap energy smaller than the band gap energy of the p-side nitride semiconductor layer 101, and is located farther from the active layer than the first p-side nitride semiconductor layer 101. As shown, the first
Is formed in contact with the p-side nitride semiconductor layer 101. The second p-side nitride semiconductor layer 102 is preferably made of In _k Ga
_1-k N (0 ≦ k ≦ 1), especially GaN or I
Preferably, it is formed of nGaN. When the second p-side nitride semiconductor layer 102 is formed of GaN or InGaN, the second semiconductor layer 102 having few cracks and high crystallinity can be obtained even when formed relatively thick. Second
P-side nitride semiconductor layer 102 is 0.01 μm to 5 μm,
More preferably, it has a thickness of 0.02 μm to 1 μm, and in this range of thickness, it can act, for example, as a preferred light guide layer. Note that the second p-side nitride semiconductor layer 102 contains an acceptor impurity and is preferably a p-type.

Further, the second p-side nitride semiconductor layer 102 formed of InGaN or GaN in particular also functions as a buffer layer when growing a third p-side nitride semiconductor layer 103 described later. InGaN or GaN
Has a softer crystal than AlGaN. Accordingly, a second p-side nitride semiconductor layer made of InGaN or GaN is provided between the first p-side nitride semiconductor layer 101 having a larger band gap than the active layer and the third p-side nitride semiconductor layer 103. The presence of 102 prevents cracks from occurring in the third p-side nitride semiconductor layer 103, whereby the third p-side nitride semiconductor layer 103 can be replaced with the first p-side nitride semiconductor layer. 101 can be formed thicker.

The third p-side nitride semiconductor layer 103 is formed on the second
Has a band gap energy larger than the band gap energy of the p-side nitride semiconductor layer 102 of the second
1 is more distant from the active layer than the p-side nitride semiconductor layer 102, and is most preferably formed in contact with the second p-side nitride semiconductor layer 102 as shown in FIG. The third p-side nitride semiconductor layer 103 is made of a nitride semiconductor containing Al, that is, In _m Al _n Ga _1-mn N (0 ≦ m ≦ 1, 0 <n ≦
1, 0 <m + n ≦ 1), and is particularly preferably formed of ternary mixed crystal AlGaN.

This third p-side nitride semiconductor layer 103
The second p-side nitride semiconductor layer 102 is required to have a band gap energy larger than the band gap energy. The third p-side nitride semiconductor layer 103 is
This is because it functions as a carrier confinement layer and a light confinement layer. This third p-side nitride semiconductor layer 103
0.01 μm or more and 2 μm or less, more preferably 0.1 μm or less.
It is desirable to have a thickness of not less than 05 μm and not more than 1 μm, and within this thickness range, it can act as a carrier confinement layer having good crystallinity. Note that the third p-side nitride semiconductor layer 103 contains an acceptor impurity, and is preferably a p-type.

The p-type contact layer 17 formed on the third p-side nitride semiconductor layer 103 is formed of a p-type nitride semiconductor. In particular, the p-type contact layer 103 is made of InG
aN or GaN, especially p-type Ga doped with Mg
When formed with N, a p-type layer having the highest carrier concentration is obtained, and good ohmic contact with the positive electrode is achieved, whereby the threshold current can be reduced.

The positive electrode 20 is preferably formed of a metal having a relatively high work function such as Ni, Pd, Ir, Rh, Pt, Ag, or Au, or an alloy thereof, preferably, in order to obtain ohmic contact. .

The current confinement layer 18 is formed of an insulating material, preferably silicon dioxide. This current confinement layer 18
Can be omitted. By the way, in FIG. 1, the n-type carrier confinement layer 14 has the n-type
It is formed on the mold contact layer 13.

That is, the nitride semiconductor containing aluminum has such a property that, when the nitride semiconductor is grown to a large thickness, cracks are easily generated in the grown crystal. In particular, an n-type aluminum-containing nitride semiconductor is made of a GaN layer or AlG
It is difficult to grow directly thick without generating cracks on the aN layer. For example, an n-type layer that needs to be formed as thick as 0.1 μm or more, such as an n-type carrier confinement layer 14, on an n-type contact layer 13 formed of n-type GaN or the like nitride containing aluminum It is difficult to form a semiconductor, especially AlGaN. Therefore,
On the n-type contact layer 13, a nitride semiconductor containing indium, preferably I
After forming an n-type layer made of n _p Ga _1-p N (0 <p ≦ 1), an n-type carrier confinement layer 14 made of an n-type aluminum-containing nitride semiconductor is formed. Due to the presence of the crack prevention layer 30, the n-type carrier confinement layer 14
The desired thickness (e.g.,
0.1 μm or more). The crack preventing layer 30 has a thickness of at least 100 Å and a thickness of 0.5 μm.
m. The same effect can be obtained even when the crack prevention layer 30 is provided inside the n-type contact layer 13 layer.

FIG. 2 is a sectional view schematically showing a nitride semiconductor LD device according to a second embodiment of the present invention, and the same reference numerals as in FIG. 1 denote the same members. Referring to FIG.
On the substrate 11, an n-type contact layer 13, a crack prevention layer 30, a third n-side nitride semiconductor layer 203, a second n-side nitride semiconductor layer 202,
N-side nitride semiconductor layer 201, active layer 16, p-type light guide layer 31, p-type carrier confinement layer (light confinement layer) 3
2. A p-type contact layer 17 and a current confinement layer 18 are sequentially formed. The n-type contact layer 13 has a negative electrode 19,
The positive electrode 20 is electrically connected to the p-type contact layer 17.

In the LD device shown in FIG. 2, the first n-side nitride semiconductor layer 201, the second n-side nitride semiconductor layer 202, and the third n-side nitride semiconductor layer 203 have the same structure except for the conductivity type. In terms of their band gap energies, their constituent nitride semiconductor materials and their thickness ranges, the corresponding first p-side nitride semiconductor layer 101 and second p-side Nitride semiconductor layer 102 and third p-side nitride semiconductor layer 103
Is basically the same as that of the first p-side nitride semiconductor layer 10.
1. the preference of the materials described for the second p-side nitride semiconductor layer 102 and the third p-side nitride semiconductor layer 103;
The favorable thickness and the like can be applied to the first n-side nitride semiconductor layer 201, the second n-side nitride semiconductor layer 202, and the third n-side nitride semiconductor layer 203, respectively.

To briefly repeat, the first n-side nitride semiconductor layer 201 formed in contact with the active layer 16 has a larger band gap energy than the active layer 16 (more strictly, its well layer). It is formed of a nitride semiconductor. Particularly preferably, the first n-side nitride semiconductor layer 201
Is formed of a nitride semiconductor containing Al, and is particularly preferably formed of ternary mixed crystal AlGaN.

The thickness of the first n-side nitride semiconductor layer 201 is similar to that of the first p-side nitride semiconductor 101 so that carriers (electron carriers) can tunnel through the first n-side nitride semiconductor layer 201. It has a sufficiently thin thickness. More specifically, the semiconductor layer 201 preferably has a thickness of 0.1 μm or less, more preferably 0.05 μm (500 angstroms) or less, and most preferably 0.03 μm (300 angstroms) or less. It is desirable that the first n-side nitride semiconductor layer 201 also has a thickness of 10 Å or more.

The first n-side nitride semiconductor layer 201
Is preferably n-type or i-type. In the present invention, an n-type nitride semiconductor (including the case of an active layer) can be obtained even in a non-doped state (in a state where impurities are not doped). However, in order to obtain a preferable n-type, Si, Ge, S
It is obtained by doping a donor impurity such as n or S. In that case, the donor impurity is 1 × 10 ¹⁶ to 1 × 1
It is preferable to dope at a concentration of 0 ²² / cm ³ . In particular, silicon is particularly preferably at a concentration of 1 × 10 ¹⁷ to 1 × 10 ²¹ / cm ³ , and most preferably at a concentration of 1 × 10 ¹⁸ to 1 × 10 ²⁰ / cm ³ .

The second n-side nitride semiconductor layer 202 is formed of the first
2 has a band gap energy smaller than the band gap energy of the n-side nitride semiconductor layer 201, and is located at a position farther from the active layer than the first n-side nitride semiconductor layer 201. As shown, the first
Is formed in contact with the n-side nitride semiconductor layer 201. The second n-side nitride semiconductor layer 202 is preferably made of In _k Ga
_1-k N (0 ≦ k ≦ 1), especially GaN or I
Preferably, it is formed of nGaN. The second n-side nitride semiconductor layer 202 preferably has a thickness of 0.01 μm to 5 μm, more preferably 0.02 μm to 1 μm, and in this range of thickness, for example, can act as a preferred light guide layer . Second n-side nitride semiconductor layer 202
Is n-type. As described with reference to FIG.
The second p-side nitride semiconductor layer 102 functions as a buffer layer for growing a relatively thick third p-side nitride semiconductor layer 103 formed thereon. Similarly,
The second n-side nitride semiconductor layer 202 also functions as a buffer layer when growing the first n-side nitride semiconductor layer 201, but since the first n-side nitride semiconductor layer 201 is thin,
Its role as a buffer layer is not very important.

The third n-side nitride semiconductor layer 203 is also a third
Similarly to the p-side nitride semiconductor layer 103, the second n-side nitride semiconductor layer 202 has a band gap energy larger than that of the second n-side nitride semiconductor layer 202 because it acts as a carrier confinement layer and a light confinement layer. It is located at a position farther from the active layer 16 than the side nitride semiconductor layer 202, and is most preferably formed in contact with the second n-side nitride semiconductor layer 202 as shown in FIG. The third n-side nitride semiconductor layer 203 is also preferably formed of a nitride semiconductor containing Al, particularly preferably a ternary mixed crystal AlGaN.
Formed. This third n-side nitride semiconductor layer 203 also
0.01 μm or more and 2 μm or less, more preferably 0.1 μm or less.
It is desirable to have a thickness of not less than 05 μm and not more than 1 μm, and within this thickness range, it can act as a carrier confinement layer and a light confinement layer with good crystallinity. Note that the third n-side nitride semiconductor layer 203 is an n-type. The third n-side nitride semiconductor layer 203 preferably made of a nitride semiconductor containing aluminum is preferably made of n-type G
On the n-type contact layer 13 formed of aN, a crack preventing layer 30 is formed.

The p-type light guide layer 31 and the p-type carrier confinement layer (light confinement layer) 32 are each formed of a p-type nitride semiconductor. The band gap energy of the p-type carrier confinement layer (light confinement layer) 32 is larger than that of the p-type light guide layer 31.

FIG. 3 shows both sides (p side and n side) of the active layer.
1 shows a nitride semiconductor LD device according to the presently most preferred embodiment in which the three-layer laminated structure of the present invention is formed. Referring to FIG. 3, an n-type contact layer 13, a crack prevention layer 30, a third n-side nitride semiconductor layer 203, and a second n-side nitride semiconductor layer are provided on a substrate 11 via a buffer layer 12. 202, first n-side nitride semiconductor layer 201, active layer 16, first p-side nitride semiconductor layer 10
A nitride semiconductor multilayer structure including a first, second p-side nitride semiconductor layer 102, a third p-side nitride semiconductor layer 103, and a p-type contact layer 17 is provided. On the p-type contact layer 17, a current confinement layer 18 provided with a contact hole 18a is provided. A negative electrode 19 is provided on the exposed surface of the n-type contact layer 13, and a positive electrode 20 is provided on the current confinement layer 20. The positive electrode 20 is in contact with the p-type contact layer 17 through the contact hole 18a of the current confinement layer 18. Elements that make up the device shown in FIG. 3 are as described with respect to FIGS.

The nitride semiconductor layer constituting the nitride semiconductor device of the present invention is formed by metal organic chemical vapor deposition (MOV).
PE) can be preferably grown. However, the nitride semiconductor layer may also be grown by other methods conventionally used for growing nitride semiconductors, such as hydride vapor deposition (HDVPE), molecular beam vapor deposition (MBE), and the like. Can be.

FIG. 4 schematically shows the energy band of an LD device having an active layer of a multiple quantum well structure having the structure shown in FIG. As shown in FIG. 4, in the LD device having the double hetero structure according to the present invention, the first p-side nitride semiconductor layer 101 and the first n-side are in contact with the active layer 16 containing the indium-containing nitride semiconductor. Nitride semiconductor layer 201
Is provided. That is, it is larger than the band gap energy of the active layer 16 (more strictly, the well layer), and is larger than the band gap energy of the second p-side nitride semiconductor layer 102 and the second p-side nitride semiconductor layer 202. Also have a large bandgap energy 2
The first nitride semiconductor layers 101 and 201 are
6 is provided. Moreover, these two first
Since the thickness of the nitride semiconductor layer is set to be small, these semiconductor layers 101 and 201 do not act as a barrier against carriers, and the second n-side Electron carriers injected into the n-side nitride semiconductor layer 202 of FIG.
The hole carriers injected into the second p-side nitride semiconductor layer 102 from the side may pass through the first n-side nitride semiconductor layer 201 and the first p-side nitride semiconductor layer 101 by a tunnel effect, respectively. Then, they are efficiently recombined in the active layer 16 and emit light (hν).

The injected carriers have a large hand gap energy of the first nitride semiconductor layers 101 and 201. Therefore, even if the device temperature rises or the injected current density increases, the carriers will remain in the active layer. 16 is prevented by the first nitride semiconductor layers 101 and 201 without overflowing, carriers can be effectively accumulated in the active layer 16 and light can be efficiently emitted. Therefore, in the nitride semiconductor device of the present invention, the luminous efficiency does not easily decrease even when the device temperature increases, and the low threshold current L
It becomes a D device.

The present inventors have studied in detail the active layer in the device of the present invention, particularly an active layer having a well layer made of a nitride semiconductor containing indium and gallium. As a result, it has been found that, for example, when InGaN is grown, depending on the conditions, the grown InGaN layer becomes entirely nonuniform in the indium content, thus forming an indium-rich region and an indium-poor region. Electron carriers and hole carriers are localized in the indium-rich region thus formed, and emit light based on excitons or light based on biexcitons. That is, the indium-rich region forms a quantum dot or a quantum box. In order for the InGaN well layer to form such a quantum dot or quantum box, the well layer is formed on the n-type semiconductor layer (aluminum layer) as in the device described with reference to FIGS. It has been found that it is necessary that the n-type semiconductor layer be formed on the containing nitride semiconductors 15 and 201) in a state of lattice mismatch with the n-type semiconductor layer and have a thickness of 70 Å or less. This well layer structure is conveniently formed by forming a semiconductor layer thereon a short time after the formation thereof, preferably for 2 to 20 seconds. Note that the additional layer formed on the active layer having the well layer may contain an acceptor impurity. An LD device having such a configuration has a lower threshold current and may have a higher characteristic temperature than a normal quantum well laser.

Thus, the present invention provides a first cladding layer comprising an n-type nitride semiconductor; a first cladding layer provided on the first cladding layer, comprising a nitride semiconductor containing indium and gallium and having a thickness of 70 angstroms or less. An active layer having a quantum well structure including at least one well layer provided on the underlayer in a lattice mismatch with respect to the underlayer, wherein the well layer includes a plurality of indium-rich regions. And an active layer including an indium-poor region; and a second cladding layer provided on the active layer and made of a nitride semiconductor doped with an acceptor impurity. . Here, when referring to the underlayer, the first cladding layer itself or the first cladding layer such as an n-type semiconductor layer (aluminum-containing nitride semiconductor 15, 201) as in the device described with reference to FIGS. It refers to the barrier layer provided on the layer or the barrier layer itself. FIG. 5 is a sectional view conceptually showing this device. In FIG. 5, the active layer is shown as having a single quantum well structure for convenience. As shown in FIG. 5, a first n-type nitride semiconductor
Quantum well layer (active layer) 5 formed in a lattice mismatched state to a thickness of 70 Å or less on the cladding layer 52 of FIG.
4 is formed, for example, entirely of InGaN, but is caused by phase separation to form an indium-rich region 5.
4a and the indium poor region 54b. More specifically, indium-rich region 54a and indium-poor region 54b are present as dots or boxes, which may be between 20 and 50 angstroms in size, with each indium-rich region 54a and each indium-poor region 5a.
4b are alternately and almost regularly arranged in the plane direction of the well layer. On this active layer 54, a second cladding layer 56 made of a nitride semiconductor doped with an acceptor impurity is provided.

Of course, the active layer having a well layer constituting a quantum dot or quantum box preferably constitutes the active layer 16 in the device described with reference to FIGS. Note that the band gap energy of the phase-separated well layer is determined by the average composition of the well layer.

When an active layer having a well layer constituting such a quantum dot or quantum box is doped with an acceptor impurity and / or a donor impurity,
The threshold current may be even lower.

That is, the fact that the indium content is not uniform in the plane of one well layer means that the InGaN regions (indium rich region and indium poor region) having different band gaps in the plane direction of the single well layer.
Means that there is. Therefore, the electrons existing in the conduction band once fall into the indium-rich region, and recombine therefrom with the holes existing in the valence band, thereby emitting hν energy. In other words, electron carriers and hole carriers are localized in the indium-rich region (phase) of the well layer, forming localized excitons, helping to lower the threshold current of the laser, and improving the emission output of the laser. Let it.

When such a well layer is doped with a donor impurity and / or an acceptor impurity such as silicon, an impurity level energy level is further formed between the conduction band and the valence band. Therefore, the electron carriers fall to the energy level of the deeper impurity level, and the hole carriers move to the level of the p-type impurity, where the electron carriers and the hole carriers recombine to generate a smaller energy hν. discharge. It is believed that the electron carriers and the hole carriers are more localized, and the threshold current of the laser device is reduced due to the effect of the excitons formed by the more localized electron carriers and hole carriers. As impurities to be doped into the well layer, silicon and germanium are preferable, and silicon is particularly preferable. In particular, doping with silicon tends to further reduce the threshold current of the device. Incidentally, impurities such as silicon and magnesium may be doped not only in the well layer but also in the barrier layer. In the case of an active layer having a multiple quantum well structure, only one well layer or one barrier layer is formed. You may dope only.

[0059]

The present invention will be described below with reference to examples. Example 1 In this example, a nitride semiconductor LD device having the structure shown in FIG. 3 was manufactured.

First, the spinel substrate 11 (M
gAl ₂ O ₄ ) was set in the reaction vessel, and after sufficiently replacing the inside of the reaction vessel with hydrogen, the temperature of the substrate was increased to 1050 ° C. while flowing hydrogen to clean the substrate.

Then, the temperature is lowered to 510 ° C., hydrogen is used as a carrier gas, ammonia and trimethylgallium (TMG) are used as source gases, and a GaN buffer layer 12 is grown to a thickness of about 200 angstroms on the substrate 11. I let it.

After the growth of the buffer layer, the temperature was increased to 1030 ° C. while only the TMG flow was stopped and the ammonia gas was flown. At 1030 ° C., a TMG gas is added, a silane gas (SiH ₄ ) is used as a dopant gas, and a Si-doped n-type GaN layer is formed as an n-type contact layer 13 by 4 μm.
Grown to a thickness of

Next, the temperature was lowered to 800 ° C., a crack prevention layer 30 made of Si-doped In _0.1 Ga _0.9 N was formed by using TMG, TMI (trimethylindium) and ammonia as source gases, and using silane gas as an impurity gas. Grow to a thickness of 500 angstroms.

Then, the temperature was raised to 1030 ° C., trimethylaluminum (TMA), TMG and ammonia were used as source gases, silane was used as a dopant, and a third n-type nitride of Si-doped n-type Al _0.2 Ga _0.8 N was used. The target semiconductor layer 203 was grown to a thickness of 0.5 μm.

Next, the temperature was lowered to 800 ° C., only the TMA flow was stopped, and a second n-type nitride semiconductor layer 202 made of Si-doped n-type GaN was grown to a thickness of 0.2 μm.
Then, the temperature was raised to 1050 ° C., and TMA was added to the raw material gas.
Using TMG and ammonia and silane as a dopant, a first n-type nitride semiconductor layer 201 made of Si-doped n-type Al _0.1 Ga _0.9 N was grown to a thickness of 300 Å.

Next, the active layer 16 was grown as follows using TMG, TMI and ammonia as source gases. First, the temperature was maintained at 800 ° C.
_A well layer of _0.2 Ga _0.8 N was grown to a thickness of 25 Å. Next, by changing the molar ratio of TMI, a barrier layer made of non-doped In _0.01 Ga _0.99 N is grown at the same temperature with a thickness of 50 Å.
This operation was repeated twice, and finally, the well layers were stacked to grow a total of seven active layers having a multiple quantum well structure.

Next, the temperature was raised to 1050 ° C., and TMG,
Using TMA, ammonia and cyclopentadienyl magnesium (Cp ₂ Mg), Mg-doped p-type Al _0.1 Ga
The first p-type nitride semiconductor layer 101 of _0.9 N
It was grown to a thickness of 0 Å.

Subsequently, at 1050 ° C., TMG, ammonia and Cp ₂ Mg were used to form Mg-doped p-type GaN.
The second p-type nitride semiconductor layer 102 of 0.2 μm
Grown to a thickness of

Then, at 1050 ° C., TMG, TMA,
Ammonia, cyclopentadienyl magnesium (Cp
₂ Mg) using Mg-doped p-type Al _0.2 Ga _0.8 N
The third p-type nitride semiconductor layer 103 of 0.5 μm
Grow to a thickness of

Finally, at 1050 ° C., Mg-doped p-type Ga
A p-type contact layer 17 made of N was grown to a thickness of 0.5 μm. After completion of all the reactions, the temperature was lowered to room temperature, the wafer was taken out of the reaction vessel, and the wafer was annealed at 700 ° C. to further reduce the resistance of the p-type layer.
Next, strip etching was performed until the surface of the n-type contact layer 13 was exposed from the uppermost p-type contact layer 17. After the etching, a current confinement layer 18 made of silicon dioxide is formed on the surface of the p-type contact layer 17, a contact hole is formed in the current confinement layer 18, and Ni is then contacted with the p-type contact layer 17 via the current confinement layer 30. And Au
The positive electrode 20 was formed in a stripe shape. On the other hand, T
A negative electrode 19 made of i and Al was formed in a stripe shape.

Next, the wafer was cut into bars in the direction perpendicular to the striped electrodes, and the cut surface was polished to form a parallel mirror. Then, SiO ₂ and TiO ₂ were alternately stacked on the parallel mirror. A dielectric multilayer film was formed. Finally, the bar is cut in a direction parallel to the electrode, and the stripe size is 4 μm × 600.
After forming a laser chip of μm, the chip was set on a heat sink and laser oscillation was attempted at room temperature. Under pulse current (pulse width 10 microseconds, duty ratio 10%)
In laser oscillation of the oscillation wavelength 400nm was confirmed, the threshold pulse current density _{^{= 2kA / cm 2, T 0}} ( characteristic temperature) =
It was 200K.

Next, the LD device of the present invention was evaluated based on the temperature dependence of the threshold current density of the device. The LD threshold current density J _th is exp (T / T ₀ ) (where T: operating temperature (K), T ₀ : characteristic temperature (K))
Is proportional to That is, as T ₀ is larger, the LD device operates stably with a lower threshold current density even at a high temperature.

In the device of Example 1, when neither the first nitride semiconductor layer 101 nor 201 was formed, laser oscillation did not occur. Further, in Example 1, when only one of the first nitride semiconductor layers 101 and 201 was not formed, the LD device of the present invention had J _th = 3 kA / cm ² and T ₀ was 100K. Was.
The LD device according to the first embodiment includes a first nitride semiconductor layer 10
1,201 If j values of both the Al _j Ga _1-j N is 0.1 (Example 1), as mentioned previously, J _th = 2kA / c
m ² , T ₀ = 200 K, but when the j value is 0.2, J _th = 1.5 kA / cm ² , when T ₀ = 300 K, and when the j value is 0.3, J _th = 1. 0.4 kA / cm ² , T ₀ = 4
00K, which indicates that the temperature characteristics of the LD device of the present invention are very excellent.

Example 2 An LD device of the present invention was obtained in the same manner as in Example 1 except that the first n-side nitride semiconductor layer 201 was not grown. This LD has the same structure as the LD device shown in FIG. 1, and the n-type carrier confinement layer (light confinement layer) 14 in FIG. 1 corresponds to the third n-side nitride semiconductor layer 203, and n The mold light guide layer 15 corresponds to the second n-side nitride semiconductor layer 202. This LD device is J _th
= 3 kA / cm ² , laser oscillation with an oscillation wavelength of 400 nm was confirmed, and T ₀ = 100K.

Example 3 An LD device of the present invention was obtained in the same manner as in Example 1, except that the first p-side nitride semiconductor layer 101 was not grown. This LD has the same structure as the LD device shown in FIG. 2, and the p-type carrier confinement layer (light confinement layer) 32 in FIG. 2 corresponds to the third p-side nitride semiconductor layer 103, The mold light guide layer 31 corresponds to the second p-side nitride semiconductor layer 102. In this LD device, laser oscillation with an oscillation wavelength of 400 nm was confirmed at J _th = 3 kA / cm ² , as in the LD of Example 2, and T ₀ = 100 K
Met.

Embodiment 4 The active layer 16 has a single quantum well structure consisting of a well layer of non-doped In _0.2 Ga _0.8 N having a thickness of 50 Å, and the first p-type nitride semiconductor layer 101 is formed of Al _0.3 G
An LD device of the present invention was obtained in the same manner as in Example 2, except that the LD device was formed of a _0.7 N. This LD also has J _th = 5 kA / c
Laser oscillation with an oscillation wavelength of 410 nm was confirmed at m ² , and T
₀ = 50K.

Embodiment 5 The second n-type nitride semiconductor layer 202 is made of Si-doped n-type In
The second p-type nitride semiconductor 10 formed of _0.01 Ga _0.99 N
Except that 2 was formed by Mg-doped p-type In _0.01 Ga _0.99 N as in Example 1 to prepare an LD device in the same manner. This LD device showed exactly the same characteristics as the LD device of Example 1.

Example 6 The LD device of the present invention was manufactured in the same manner as in Example 1 except that the well layer and the barrier layer of the active layer were each doped with silicon at a concentration of 1 × 10 ¹⁹ / cm ³ as a donor impurity. Was prepared. In this LD device, the threshold current was reduced by about 5% and T ₀ was improved by about 10% as compared with the LD device of Example 1.

Example 7 The LD device of the present invention was manufactured in the same manner as in Example 1, except that the active layer well layer and the barrier layer were each doped with magnesium at a concentration of 1 × 10 ¹⁸ / cm ³ as an acceptor impurity. Was prepared. This LD device exhibited almost the same characteristics as the LD device of Example 1.

Example 8 In the well layer and the barrier layer of the active layer, silicon was used as a donor impurity at a concentration of 1 × 10 ¹⁹ / cm ³ and magnesium was used as an acceptor impurity at 1 × 10 ¹⁸ / cm ^3.
An LD device of the present invention was produced in the same manner as in Example 1, except that the LD device was doped at a concentration of cm ³ . This LD device showed almost the same characteristics as the LD device of Example 6.

Example 9 After forming each non-doped In _0.2 Ga _0.8 N (average composition) well layer, an LD device was manufactured in the same manner as in Example 1 except that each barrier layer was formed after holding for 5 seconds. . In this LD device, the well layer is phase-separated into an indium-rich region and an indium-poor region,
The composition of the indium-rich region is almost In _0.4 Ga _0.6 N
And the composition of the indium-poor region is almost In _0.02 G
a _0.98 N. In addition, a cross-sectional TEM photograph of the well layer confirmed that indium-rich regions and indium-poor regions each having an average size of 30 Å were alternately and regularly arranged in the plane direction (see FIG. 5). . The LD device manufactured in this manner had a threshold current density reduced by about 30% and an improvement in T _{0 by} 20% with respect to the LD device of Example 1.

Example 10 An LD device was manufactured in the same manner as in Example 9 except that each well layer was doped with silicon. This LD device is
Decreased approximately 40% in the threshold current density with respect to LD device of Example 1, was increased by 30% at T _0. In each of the above examples, the impurities whose concentration was not specifically indicated were all doped within the preferable ranges described above.

In the embodiment described above, as the most preferable example, the active layer, the first nitride semiconductor layer, the second nitride semiconductor layer, and the third nitride semiconductor layer are formed in contact with each other. However, in the present invention, only the first nitride semiconductor layer may be formed in contact with the active layer, and the first nitride semiconductor layer and the second nitride semiconductor layer may be formed in contact with the active layer. During this time, another nitride semiconductor layer can be inserted between the second nitride semiconductor layer and the third nitride semiconductor layer. The concentration of the doped impurity is

[0084]

As described above, according to the present invention, there is provided a nitride semiconductor device having an active layer containing a nitride semiconductor containing indium and having high luminous efficiency. Also provided is a nitride semiconductor device in which the decrease in luminous efficiency is small even when the device temperature increases.

[Brief description of the drawings]

FIG. 1 is a sectional view schematically showing an LD device according to a first embodiment of the present invention.

FIG. 2 is a sectional view schematically showing an LD device according to a second embodiment of the present invention.

FIG. 3 is a sectional view schematically showing an LD device according to a third embodiment of the present invention.

FIG. 4 is a view showing an energy band corresponding to the device structure shown in FIG. 3;

FIG. 5 is a sectional view schematically showing an LD device according to a fourth embodiment of the present invention.

FIG. 6 is a diagram showing an energy band corresponding to a layer structure of a conventional LD device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 ... Substrate 13 ... n-type contact layer 14 ... n-type carrier confinement layer 15 ... n-type light guide layer 16, 54 ... Active layer 17 ... p-type contact layer 19 ... negative electrode 20 ... positive electrode 30 ... crack prevention layer 52 ... First cladding layer 54a Indium rich region 54b Indium poor region 56 Second cladding layer 101 First p-side nitride semiconductor layer 102 Second p-side nitride semiconductor layer 103 Third p Side nitride semiconductor layer 201: first n-side nitride semiconductor layer 202: second n-side nitride semiconductor layer 203: third n-side nitride semiconductor layer.

Claims (36)

[Claims] 1. An active layer having a quantum well structure including first and second surfaces and including a nitride semiconductor containing indium, and an active layer formed in contact with the first surface of the active layer,
A first nitride semiconductor layer having a bandgap energy larger than the bandgap energy of the active layer; and a first surface of the active layer further away from the active layer than the first nitride semiconductor layer. A second nitride semiconductor layer formed at a different position and having a bandgap energy smaller than the bandgap energy of the first nitride semiconductor layer; and a second surface on the first surface side of the active layer. A third nitride semiconductor layer formed at a position farther from the active layer than the nitride semiconductor layer and having a bandgap energy larger than the bandgap energy of the second nitride semiconductor layer; A nitride semiconductor device having a layer structure. 2. The device of claim 1, wherein the first nitride semiconductor layer has a thickness that is small enough to allow carriers to tunnel. 3. The device according to claim 1, wherein the first nitride semiconductor layer has a thickness of 0.1 μm or less. 4. The device according to claim 3, wherein the first nitride semiconductor layer has a thickness of 10 Å or more. 5. The device according to claim 1, wherein the nitride semiconductor layer structure is formed on the p-side of the active layer. 6. The device according to claim 5, wherein the second nitride semiconductor layer is provided in contact with the first nitride semiconductor layer. 7. The device according to claim 6, wherein the third nitride semiconductor layer is provided in contact with the second nitride semiconductor layer. 8. The device according to claim 1, wherein the nitride semiconductor layer structure is formed on the n-side of the active layer. 9. The device according to claim 8, wherein the second nitride semiconductor layer is provided in contact with the first nitride semiconductor layer. 10. The device according to claim 9, wherein the third nitride semiconductor layer is provided in contact with the second nitride semiconductor layer. 11. An active layer having a quantum well structure including first and second surfaces and including an indium-containing nitride semiconductor, a nitride semiconductor formed in contact with the first surface of the active layer. A first layer having a bandgap energy greater than that of the active layer, formed on the first surface side of the active layer at a position further away from the active layer than the first layer, and A second layer having a bandgap energy smaller than the bandgap energy of the first layer, and a first surface side of the active layer, the second layer having a bandgap energy smaller than that of the first layer. It is formed at a position away from the active layer, is made of a nitride semiconductor containing an acceptor impurity, and has a band gap energy larger than that of the second layer. A nitride semiconductor device comprising a third layer. 12. The first nitride semiconductor layer has a thickness small enough to allow carriers to tunnel.
The described device. 13. The method according to claim 1, wherein the first nitride semiconductor layer has a thickness of 0.1 μm.
A device according to claim 11 or claim 12, having the following thickness: 14. The device according to claim 13, wherein the first nitride semiconductor layer has a thickness of 10 Å or more. 15. The device according to claim 11, wherein the second layer is provided in contact with the first layer. 16. The device according to claim 15, wherein the third nitride semiconductor layer is provided in contact with the second nitride semiconductor layer. 17. An active layer having a quantum well structure including a first and second surface and including an indium-containing nitride semiconductor, and a nitride semiconductor formed in contact with the second surface of the active layer. And having a band gap energy larger than the band gap energy of the active layer.
Is formed on the second surface side of the active layer at a position farther from the active layer than the first layer, is made of an n-type nitride semiconductor, and has a bandgap energy of the first layer. A second layer having a small bandgap energy, and formed on a second surface side of the active layer at a position farther from the active layer than the second layer, comprising an n-type nitride semiconductor; A nitride semiconductor device comprising a third layer having a band gap energy larger than the band gap energy of the second layer. 18. The semiconductor device according to claim 17, wherein the first nitride semiconductor layer has a thickness small enough to allow tunneling of carriers.
The described device. 19. The method according to claim 19, wherein the first nitride semiconductor layer has a thickness of 0.1 μm.
19. A device according to claim 17 or claim 18 having the following thickness. 20. The device according to claim 19, wherein the first nitride semiconductor layer has a thickness of 10 Å or more. 21. The device according to claim 17, wherein the second layer is provided in contact with the first layer. 22. The device according to claim 21, wherein the third layer is provided in contact with the second layer. 23. An active layer having a quantum well structure including a first and second surfaces and including an indium-containing nitride semiconductor; an active layer formed in contact with a first surface of the active layer; A first p-side nitride semiconductor layer having a bandgap energy larger than that of the active layer, and a first surface side of the active layer, the first p-side nitride semiconductor layer being closer to the active layer than the first p-side nitride semiconductor layer. A second p-side nitride semiconductor layer formed at a distant position and having a bandgap energy smaller than the bandgap energy of the first p-side nitride semiconductor layer; and a first surface side of the active layer. Formed at a position further away from the active layer than the second p-side nitride semiconductor layer, and having a band gap energy larger than the band gap energy of the second p-side nitride semiconductor layer. A first nitride semiconductor layer structure including a third p-side nitride semiconductor layer;
A first n-side nitride semiconductor layer formed in contact with the surface of the active layer and having a bandgap energy larger than the bandgap energy of the active layer; and the first n-side nitride semiconductor layer on the second surface side of the active layer. A second n-side nitride semiconductor layer formed at a position farther from the active layer than the side-side nitride semiconductor layer and having a band gap energy smaller than a band gap energy of the first n-side nitride semiconductor layer; Formed on the second surface side of the active layer at a position farther from the active layer than the second n-side nitride semiconductor layer, and based on the bandgap energy of the second n-side nitride semiconductor layer. And a third n-side nitride semiconductor layer having a large band gap energy. 24. The device of claim 23, wherein the first p-side nitride semiconductor layer has a thickness small enough to allow carriers to tunnel. 25. The first p-side nitride semiconductor layer has a thickness of 0.1
25. The device according to claim 23 or 24, having a thickness of less than or equal to μm. 26. The device according to claim 25, wherein the first p-side nitride semiconductor layer has a thickness of 10 Å or more. 27. The device according to claim 23, wherein the first n-side nitride semiconductor layer has a thickness small enough for tunneling of carriers. 28. The first n-side nitride semiconductor layer has a thickness of 0.1
28. The device according to any one of claims 23 to 27, having a thickness of less than or equal to μm. 29. The device according to claim 28, wherein the first n-side nitride semiconductor layer has a thickness of 10 Å or more. 30. A second p-side nitride semiconductor layer provided in contact with the first p-side nitride layer, and a third p-side nitride semiconductor in contact with the second p-side nitride semiconductor 30. A device according to any one of claims 23 to 29 provided. 31. A second n-side nitride semiconductor layer is provided in contact with the first n-side nitride layer, and a third n-side nitride semiconductor is provided in contact with the second n-side nitride semiconductor. 31. The device according to any one of claims 23 to 30 provided. 32. A first cladding layer made of an n-type nitride semiconductor; provided on the first cladding layer, made of a nitride semiconductor containing indium and gallium and having a thickness of 70 Å or less; An active layer having a quantum well structure including at least one well layer provided on the base layer so as to be lattice-mismatched with respect to the underlayer, wherein the well layer includes a plurality of indium-rich regions and indium-poor regions. An active layer comprising a nitride semiconductor provided on the active layer and doped with an acceptor impurity.
A nitride semiconductor device, comprising: 33. well layer, wherein _{In f Ga 1-f N (} 0 <
33. The device according to claim 32, comprising a nitride semiconductor represented by f <1). 34. The device according to claim 1, 11, 17, 23 or 32, wherein the active layer is doped with impurities. 35. The device according to claim 34, wherein the impurity doped into the active layer is silicon or germanium. 36. The device according to claim 34, wherein the impurity doped into the active layer is doped into at least one well layer.