JPH10125813A - Nonvolatile semiconductor storage device and manufacture thereof - Google Patents
Nonvolatile semiconductor storage device and manufacture thereofInfo
- Publication number
- JPH10125813A JPH10125813A JP8293363A JP29336396A JPH10125813A JP H10125813 A JPH10125813 A JP H10125813A JP 8293363 A JP8293363 A JP 8293363A JP 29336396 A JP29336396 A JP 29336396A JP H10125813 A JPH10125813 A JP H10125813A
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- JP
- Japan
- Prior art keywords
- film
- nitride film
- nonvolatile semiconductor
- memory device
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本願の発明は、窒化膜と酸化
膜との界面における捕獲準位に電荷を捕獲することによ
って情報を記憶する不揮発性半導体記憶装置及びその製
造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile semiconductor memory device for storing information by capturing charges at a trap level at an interface between a nitride film and an oxide film, and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】情報を電気的に書き換えることができ且
つ電源を切っても情報を保持することができる不揮発性
半導体記憶装置の一種として、絶縁膜と酸化膜との界面
に存在する捕獲準位に電荷を捕獲してトランジスタの閾
値電圧をシフトさせることによって情報を記憶する不揮
発性半導体記憶装置がある。2. Description of the Related Art As one type of a nonvolatile semiconductor memory device capable of electrically rewriting information and retaining information even when power is turned off, a trap level existing at an interface between an insulating film and an oxide film is known. There is a nonvolatile semiconductor memory device that stores information by capturing electric charges and shifting the threshold voltage of a transistor.
【０００３】この不揮発性半導体記憶装置はＭＩＯＳ
（Metal Insulator Oxide Semiconductor ）型やＭＯＩ
ＯＳ（Metal Oxide Insulator Oxide Semiconductor ）
型と称されているが、絶縁膜としては主に窒化膜が用い
られているので、これらは、特に、ＭＮＯＳ型やＭＯＮ
ＯＳ型と称されている。[0003] This nonvolatile semiconductor memory device is a MIOS.
(Metal Insulator Oxide Semiconductor) type and MOI
OS (Metal Oxide Insulator Oxide Semiconductor)
Although these are referred to as molds, nitride films are mainly used as insulating films.
It is called OS type.
【０００４】図２は、ＭＯＮＯＳ型の不揮発性半導体記
憶装置の一従来例を示している。この一従来例では、Ｓ
ｉ基板（図示せず）上に、厚さが２ｎｍであるトンネル
用のＳｉＯ2 膜１１と、厚さが８ｎｍであるＳｉＮ膜１
２と、厚さが４ｎｍであるＳｉＯ2 膜１３とが順次に積
層されており、更に、このＳｉＯ2 膜１３上にゲート電
極としての多結晶Ｓｉ膜（図示せず）等が形成されてい
る。FIG. 2 shows a conventional example of a MONOS type nonvolatile semiconductor memory device. In this conventional example, S
An SiO 2 film 11 for tunnel having a thickness of 2 nm and a SiN film 1 having a thickness of 8 nm are formed on an i-substrate (not shown).
2 and an SiO 2 film 13 having a thickness of 4 nm are sequentially laminated, and a polycrystalline Si film (not shown) or the like as a gate electrode is formed on the SiO 2 film 13. .
【０００５】[0005]
【発明が解決しようとする課題】ところが、ＭＮＯＳ型
やＭＯＮＯＳ型の不揮発性半導体記憶装置では、大容量
化のための微細化や低消費電力化のための低電圧動作化
に伴って、１ビット当たりの面積やＳｉＮ膜１２等の厚
さが減少してきている。この結果、ＳｉＮ膜１２とＳｉ
Ｏ2 膜１１、１３との界面の面積が減少すると共にＳｉ
Ｎ膜１２中に含まれる捕獲準位量も減少することによっ
て、捕獲電荷量が減少して記憶保持特性が低下してい
た。However, in the MNOS and MONOS nonvolatile semiconductor memory devices, one bit is required in accordance with miniaturization for large capacity and low voltage operation for low power consumption. The area per contact and the thickness of the SiN film 12 and the like are decreasing. As a result, the SiN film 12 and Si
The area of the interface with the O 2 films 11 and 13 is reduced and Si
Since the amount of trap levels contained in the N film 12 also decreased, the amount of trapped charges decreased, and the memory retention characteristics deteriorated.
【０００６】[0006]
【課題を解決するための手段】本願の発明による不揮発
性半導体記憶装置は、窒化膜と酸化膜との界面における
捕獲準位に電荷を捕獲することによって情報を記憶する
不揮発性半導体記憶装置において、前記窒化膜中に酸化
膜が含まれていることを特徴としている。According to the present invention, there is provided a nonvolatile semiconductor memory device for storing information by capturing electric charges at a trap level at an interface between a nitride film and an oxide film. An oxide film is included in the nitride film.
【０００７】本願の発明による不揮発性半導体記憶装置
は、前記窒化膜中の前記酸化膜が前記界面に沿って連続
的に広がっていてもよい。In the nonvolatile semiconductor memory device according to the present invention, the oxide film in the nitride film may continuously spread along the interface.
【０００８】本願の発明による不揮発性半導体記憶装置
は、前記窒化膜中の前記酸化膜が前記界面に沿って離散
的に広がっていてもよい。[0008] In the nonvolatile semiconductor memory device according to the present invention, the oxide film in the nitride film may be discretely spread along the interface.
【０００９】本願の発明による不揮発性半導体記憶装置
は、前記窒化膜中の前記酸化膜が前記窒化膜と交互に積
層された状態の複数層であってもよい。In the nonvolatile semiconductor memory device according to the present invention, a plurality of layers in which the oxide film in the nitride film is alternately stacked with the nitride film may be provided.
【００１０】本願の発明による不揮発性半導体記憶装置
の製造方法は、窒化膜と酸化膜との界面における捕獲準
位に電荷を捕獲することによって情報を記憶する不揮発
性半導体記憶装置の製造方法において、前記窒化膜中に
酸化膜を形成することを特徴としている。A method for manufacturing a nonvolatile semiconductor memory device according to the present invention is directed to a method for manufacturing a nonvolatile semiconductor memory device for storing information by capturing electric charges at a trap level at an interface between a nitride film and an oxide film. An oxide film is formed in the nitride film.
【００１１】本願の発明による不揮発性半導体記憶装置
の製造方法は、前記窒化膜とこの窒化膜中の前記酸化膜
とを順次に堆積させて形成してもよい。The method of manufacturing a nonvolatile semiconductor memory device according to the present invention may be formed by sequentially depositing the nitride film and the oxide film in the nitride film.
【００１２】本願の発明による不揮発性半導体記憶装置
の製造方法は、前記窒化膜の表面を酸化することによっ
てこの窒化膜中の前記酸化膜を形成してもよい。In the method of manufacturing a nonvolatile semiconductor memory device according to the present invention, the oxide film in the nitride film may be formed by oxidizing a surface of the nitride film.
【００１３】本願の発明による不揮発性半導体記憶装置
の製造方法は、前記窒化膜中にイオン注入した酸素によ
って前記窒化膜中の前記酸化膜を形成してもよい。In the method of manufacturing a nonvolatile semiconductor memory device according to the present invention, the oxide film in the nitride film may be formed by oxygen ion-implanted in the nitride film.
【００１４】本願の発明による不揮発性半導体記憶装置
の製造方法は、前記イオン注入を点状に行ってもよい。In the method of manufacturing a nonvolatile semiconductor memory device according to the invention of the present application, the ion implantation may be performed in a dot shape.
【００１５】本願の発明による不揮発性半導体記憶装置
では、窒化膜中に酸化膜が含まれているので、同じ平面
的な面積で比べると、窒化膜と酸化膜との界面の面積が
広くて、捕獲電荷量が多い。しかも、窒化膜中の酸素に
起因する深い捕獲準位も多く形成されているので、捕獲
された電荷が自然放出されにくい。In the nonvolatile semiconductor memory device according to the present invention, since the oxide film is contained in the nitride film, the area of the interface between the nitride film and the oxide film is large when compared with the same planar area. Large amount of trapped charge. In addition, since many trap levels due to oxygen in the nitride film are also formed, the trapped charges are not easily released spontaneously.
【００１６】また、窒化膜中の酸化膜がそれらの界面に
沿って離散的に広がっていれば、窒化膜中の酸化物の含
有量が同じでも、窒化膜と酸化膜との界面の面積が更に
広くて、捕獲電荷量が更に多い。If the oxide film in the nitride film is discretely spread along the interface between them, the area of the interface between the nitride film and the oxide film is increased even if the oxide content in the nitride film is the same. Wider and more trapped charge.
【００１７】また、窒化膜中の酸化膜が窒化膜と交互に
積層された状態の複数層であれば、同じ平面的な面積で
比べると、窒化膜と酸化膜との界面の面積が更に広く
て、捕獲電荷量が更に多い。Further, if the oxide film in the nitride film is a plurality of layers alternately stacked with the nitride film, the area of the interface between the nitride film and the oxide film becomes wider as compared with the same planar area. Therefore, the amount of trapped charges is even larger.
【００１８】本願の発明による不揮発性半導体記憶装置
の製造方法では、窒化膜中に酸化膜を形成しているの
で、同じ平面的な面積が比べると、窒化膜と酸化膜との
界面の面積を広くして、捕獲電荷量を多くすることがで
きる。しかも、窒化膜中の酸素に起因する深い捕獲準位
も多く形成されるので、捕獲された電荷が自然放出され
にくくすることができる。In the method of manufacturing a nonvolatile semiconductor memory device according to the present invention, since the oxide film is formed in the nitride film, the area of the interface between the nitride film and the oxide film can be reduced in comparison with the same planar area. By making it wider, the amount of trapped charges can be increased. In addition, since many deep trap levels due to oxygen in the nitride film are also formed, the trapped charges can be hardly released spontaneously.
【００１９】また、窒化膜中に酸化膜を形成する際に酸
素を窒化膜中に点状にイオン注入すれば、窒化膜との界
面に沿って離散的に広がる酸化膜を形成することができ
るので、イオン注入する酸素の量が同じでも、窒化膜と
酸化膜との界面の面積を更に広くして、捕獲電荷量を更
に多くすることができる。Further, when oxygen is ion-implanted into the nitride film in a dotted manner when forming the oxide film in the nitride film, an oxide film which spreads discretely along the interface with the nitride film can be formed. Therefore, even if the amount of oxygen to be ion-implanted is the same, the area of the interface between the nitride film and the oxide film can be further increased, and the trapped charge amount can be further increased.
【００２０】[0020]
【発明の実施の形態】以下、本願の発明の第１及び第２
実施形態を、図１を参照しながら説明する。第１実施形
態では、例えば、抵抗加熱型の熱処理炉にＯ2 ／Ｎ2 ＝
３００ＳＣＣＭ／１０ＳＬＭのガスを供給してＳｉ基板
（図示せず）を希釈酸化することによって、このＳｉ基
板の表面に厚さが２ｎｍのＳｉＯ2 膜１１を形成する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the first and second embodiments of the present invention will be described.
An embodiment will be described with reference to FIG. In the first embodiment, for example, O 2 / N 2 =
By supplying 300 SCCM / 10 SLM gas to dilute and oxidize a Si substrate (not shown), a SiO 2 film 11 having a thickness of 2 nm is formed on the surface of the Si substrate.
【００２１】次に、例えば、抵抗加熱型の減圧ＣＶＤ装
置にＮＨ3 ／ＳｉＨ2 Ｃｌ2 ＝２０００ＳＣＣＭ／５０
ＳＣＣＭのガスを７０Ｐａで供給し、７６０℃、２分間
の堆積を行って、厚さが３ｎｍのＳｉＮ膜１４をＳｉＯ
2 膜１１上に形成する。なお、減圧ＣＶＤ装置にロード
ロック機構を設けておいて、ＣＶＤ炉内へＳｉ基板を挿
入する際は真空搬送を行い、且つ、純度の高いガスを用
いることによって、酸素や炭化水素がＳｉＮ膜１４中に
混入することを極力避ける様にする。Next, for example, NH 3 / SiH 2 Cl 2 = 2000 SCCM / 50 is applied to a resistance heating type low pressure CVD apparatus.
An SCCM gas is supplied at 70 Pa, deposition is performed at 760 ° C. for 2 minutes, and a 3 nm-thick SiN film 14 is
2 Formed on the film 11. In addition, a load lock mechanism is provided in the low pressure CVD apparatus, and when inserting the Si substrate into the CVD furnace, vacuum transfer is performed and high purity gas is used so that oxygen and hydrocarbon can be removed from the SiN film 14. Avoid mixing in as much as possible.
【００２２】また、上述の堆積時の温度が比較的高温で
あるので、ＳｉＮ膜１４中への水素の混入も比較的抑制
されている。以上の条件によって、膜質が均一で、緻密
で、不純物や構造欠陥の少ないＳｉＮ膜１４を形成する
ことができる。この様なＳｉＮ膜１４では、不純物や構
造欠陥を介したリーク電流が少なくて、記憶保持特性を
向上させることができる。Further, since the above-mentioned deposition temperature is relatively high, the incorporation of hydrogen into the SiN film 14 is also relatively suppressed. Under the above conditions, it is possible to form the SiN film 14 which is uniform, dense, and has few impurities and structural defects. In such a SiN film 14, the leakage current via impurities and structural defects is small, and the memory retention characteristics can be improved.
【００２３】次に、例えば、抵抗加熱型の減圧ＣＶＤ装
置にＮ2 Ｏ／ＳｉＨ2 Ｃｌ2 ＝２００ＳＣＣＭ／１００
０ＳＣＣＭのガスを７０Ｐａで供給し、８００℃、５分
間の堆積を行って、厚さが１ｎｍのＳｉＯ2 膜１５をＳ
ｉＮ膜１４上に形成する。そして、ＳｉＮ膜１４を形成
した場合と同じ条件で、厚さが３ｎｍのＳｉＮ膜１６を
ＳｉＯ2 膜１５上に形成する。Next, for example, N 2 O / SiH 2 Cl 2 = 200 SCCM / 100 is applied to a resistance heating type low pressure CVD apparatus.
A gas of 0 SCCM is supplied at 70 Pa, deposition is performed at 800 ° C. for 5 minutes, and the SiO 2 film 15 having a thickness of 1 nm is
It is formed on the iN film 14. Then, a 3 nm-thickness SiN film 16 is formed on the SiO 2 film 15 under the same conditions as those for forming the SiN film 14.
【００２４】その後、堆積時間を２０分にすること以外
はＳｉＯ2 膜１５を形成した場合と同じ条件で、厚さが
４ｎｍのＳｉＯ2 膜１３をＳｉＮ膜１６上に形成する。
そして、更に、ゲート電極等を従来公知の工程で形成し
て、この不揮発性半導体記憶装置を完成させる。Thereafter, an SiO 2 film 13 having a thickness of 4 nm is formed on the SiN film 16 under the same conditions as in the case of forming the SiO 2 film 15 except that the deposition time is set to 20 minutes.
Then, a gate electrode and the like are further formed by a conventionally known process to complete the nonvolatile semiconductor memory device.
【００２５】ＳｉＯ2 膜１１、１３、１５及びＳｉＮ膜
１４、１６は巨視的には非晶質であるが、微視的には何
れも規則的な構造を有しており、それらの界面には、結
晶格子の様な構造欠陥が生じていて、この構造欠陥に起
因する捕獲準位が形成されている。The SiO 2 films 11, 13, 15 and the SiN films 14, 16 are macroscopically amorphous, but microscopically all have a regular structure. Has a structural defect such as a crystal lattice, and a trap level due to this structural defect is formed.
【００２６】また、窒化膜内の酸素に起因して深い捕獲
準位の形成されることが報告されており（V.J.Kapoor a
nd S.B.Bibyk,"Energy distribution and electron tra
pping defects in thick-oxide MNOS structures",in"T
he Physics of MOS Insulators",edited by G.Lucousky
et al.(Pergamon,New York,1980)p.117）、ＳｉＯ2膜
１１、１３、１５とＳｉＮ膜１４、１６との界面には、
この深い捕獲準位も形成されている。It has also been reported that a deep trap level is formed due to oxygen in a nitride film (VJ Kapoor a.
nd SBBibyk, "Energy distribution and electron tra
pping defects in thick-oxide MNOS structures ", in" T
he Physics of MOS Insulators ", edited by G. Lucousky
et al. (Pergamon, New York, 1980) p. 117), at the interface between the SiO 2 films 11, 13, 15 and the SiN films 14, 16,
This deep trap level is also formed.
【００２７】しかも、深い捕獲準位に捕獲された電荷が
そこから脱出するためには、より大きなエネルギーが必
要であるので、深い捕獲準位に捕獲された電荷は自然放
出されにくい。このことは、一旦記憶された情報が失わ
れにくいことを意味しており、このことによっても記憶
保持特性を向上させることができる。Moreover, since the charge trapped in the deep trap level needs more energy in order to escape therefrom, the charge trapped in the deep trap level is unlikely to be spontaneously released. This means that the information once stored is hard to be lost, and this can also improve the storage retention characteristics.
【００２８】次に、第２実施形態を説明する。この第２
実施形態も、ＳｉＮ膜１６の堆積に先立って、例えば、
ランプ加熱型の熱処理装置にＮＨ3 を１ＳＬＭで供給し
て、ＳｉＯ2 膜１５の表面に対して１０００℃、１分間
の高速熱窒化を行うことを除いて、上述の第１実施形態
と実質的に同様の工程を実行する。Next, a second embodiment will be described. This second
In the embodiment, for example, prior to the deposition of the SiN film 16, for example,
Except that NH 3 is supplied at 1 SLM to the heat treatment apparatus of the lamp heating type and the surface of the SiO 2 film 15 is subjected to high-speed thermal nitridation at 1000 ° C. for 1 minute, substantially the same as the above-described first embodiment. A similar process is performed.
【００２９】この様な熱窒化を行うと、次に行うＳｉＮ
膜１６の堆積に際して、堆積初期のＳｉＯ2 膜１５の表
面における堆積種のマイグレーション等に起因するＳｉ
Ｎ膜１６の表面荒れが抑制される。この結果、より膜質
が均一で、より緻密なＳｉＮ膜１６を形成することがで
きて、記憶保持特性を更に向上させることができる。When such thermal nitriding is performed, SiN to be performed next is performed.
When depositing the film 16, Si caused by migration of deposited species on the surface of the SiO 2 film 15 in the initial stage of the deposition.
The surface roughness of the N film 16 is suppressed. As a result, a denser SiN film 16 having a more uniform film quality can be formed, and the memory retention characteristics can be further improved.
【００３０】なお、以上の第１及び第２実施形態では、
図１に示した様に、ＳｉＮ膜１４、１６の間に単層のＳ
ｉＯ2 膜１５が含まれているだけであるが、ＳｉＮ膜と
ＳｉＯ2 膜とが交互に積層された状態でＳｉＮ膜の間に
複数層のＳｉＯ2 膜が含まれていてもよい。In the first and second embodiments described above,
As shown in FIG. 1, a single layer of S is formed between the SiN films 14 and 16.
Although only the iO 2 film 15 is included, a plurality of SiO 2 films may be included between the SiN films in a state where the SiN films and the SiO 2 films are alternately stacked.
【００３１】また、以上の第１及び第２実施形態では、
ＳｉＯ2 膜１１上のＳｉＮ膜１４、１６及びＳｉＯ2 膜
１３、１５の総てを堆積によって形成したが、例えばＳ
ｉＮ膜１４の表面を熱酸化することによってＳｉＯ2 膜
１５を形成してもよく、ＳｉＮ膜１４、１６中に酸素を
多量にイオン注入した後に熱処理を行うことによってＳ
ｉＯ2 膜１５を形成してもよい。In the first and second embodiments,
All of the SiN films 14, 16 and the SiO 2 films 13, 15 on the SiO 2 film 11 were formed by deposition.
The SiO 2 film 15 may be formed by thermally oxidizing the surface of the iN film 14, and heat treatment is performed after a large amount of oxygen is ion-implanted into the SiN films 14 and 16.
An iO 2 film 15 may be formed.
【００３２】更に、ＳｉＮ膜１４、１６中に酸素をイオ
ン注入する際に、ＳｉＮ膜１４、１６の全面に対してイ
オン注入を行うのではなく点状に行えば、ＳｉＮ膜１
４、１６との界面に沿って離散的に広がるＳｉＯ2 膜１
５を形成することができるので、イオン注入する酸素の
量が同じでも、ＳｉＮ膜１４、１６とＳｉＯ2 膜１５と
の界面の面積を更に広くして、捕獲電荷量を更に多くす
ることができる。Further, when oxygen is ion-implanted into the SiN films 14 and 16, the ion implantation is not performed on the entire surfaces of the SiN films 14 and 16 but is performed in a dot-like manner.
SiO 2 film 1 discretely spreads along the interface with 4 and 16
5, it is possible to further increase the area of the interface between the SiN films 14, 16 and the SiO 2 film 15 and to further increase the trapped charge amount, even if the amount of oxygen to be ion-implanted is the same. .
【００３３】[0033]
【発明の効果】本願の発明による不揮発性半導体記憶装
置では、同じ平面的な面積で比べると捕獲電荷量が多
く、しかも、捕獲された電荷が自然放出されにくいの
で、微細化されていても記憶保持特性が優れている。In the nonvolatile semiconductor memory device according to the present invention, the amount of trapped charges is large compared to the same planar area, and the trapped charges are unlikely to be released spontaneously. Excellent retention characteristics.
【００３４】また、窒化膜中の酸化膜がそれらの界面に
沿って離散的に広がっていれば、捕獲電荷量が更に多い
ので、記憶保持特性が更に優れている。Further, if the oxide films in the nitride film are spread discretely along their interfaces, the amount of trapped charges is further increased, so that the memory retention characteristics are further improved.
【００３５】また、窒化膜中の酸化膜が窒化膜と交互に
積層された状態の複数層であれば、捕獲電荷量が更に多
いので、記憶保持特性が更に優れている。If the oxide film in the nitride film is a plurality of layers alternately stacked with the nitride film, the amount of trapped charges is further increased, so that the memory retention characteristics are further improved.
【００３６】本願の発明による不揮発性半導体記憶装置
の製造方法では、同じ平面的な面積が比べると捕獲電荷
量を多くすることができ、しかも、捕獲された電荷が自
然放出されにくくすることができるので、微細化されて
いても記憶保持特性が優れている不揮発性半導体記憶装
置を製造することができる。In the method of manufacturing a nonvolatile semiconductor memory device according to the present invention, the amount of trapped charges can be increased as compared with the same planar area, and the trapped charges can be made less likely to be spontaneously released. Therefore, it is possible to manufacture a nonvolatile semiconductor memory device which has excellent memory retention characteristics even if it is miniaturized.
【００３７】また、窒化膜中に酸化膜を形成する際に酸
素を窒化膜中に点状にイオン注入すれば、捕獲電荷量が
更に多くすることができるので、記憶保持特性が更に優
れている不揮発性半導体記憶装置を製造することができ
る。Further, when oxygen is ion-implanted into the nitride film at the time of forming the oxide film in the nitride film, the amount of trapped charges can be further increased, so that the memory retention characteristics are further improved. A non-volatile semiconductor storage device can be manufactured.
【図１】本願の発明の第１及び第２実施形態の要部の側
断面図である。FIG. 1 is a side sectional view of a main part of first and second embodiments of the present invention.
【図２】本願の発明の一従来例の要部の側断面図であ
る。FIG. 2 is a side sectional view of a main part of a conventional example of the present invention.
１１、１３、１５ ＳｉＯ2 膜 １４、１６ Ｓ
ｉＮ膜11, 13, 15 SiO 2 film 14, 16 S
iN film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 ＦＩ Ｈ０１Ｌ 27/115 ──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. 6 Identification code FI H01L 27/115
Claims (9)
位に電荷を捕獲することによって情報を記憶する不揮発
性半導体記憶装置において、 前記窒化膜中に酸化膜が含まれていることを特徴とする
不揮発性半導体記憶装置。1. A non-volatile semiconductor memory device which stores information by capturing electric charges at a trap level at an interface between a nitride film and an oxide film, wherein the nitride film includes an oxide film. Nonvolatile semiconductor memory device.
沿って連続的に広がっていることを特徴とする請求項１
記載の不揮発性半導体記憶装置。2. The semiconductor device according to claim 1, wherein said oxide film in said nitride film continuously spreads along said interface.
14. The nonvolatile semiconductor memory device according to claim 1.
沿って離散的に広がっていることを特徴とする請求項１
記載の不揮発性半導体記憶装置。3. The semiconductor device according to claim 1, wherein said oxide film in said nitride film is discretely spread along said interface.
14. The nonvolatile semiconductor memory device according to claim 1.
と交互に積層された状態の複数層であることを特徴とす
る請求項１記載の不揮発性半導体記憶装置。4. The nonvolatile semiconductor memory device according to claim 1, wherein said oxide film in said nitride film is a plurality of layers alternately stacked with said nitride film.
位に電荷を捕獲することによって情報を記憶する不揮発
性半導体記憶装置の製造方法において、 前記窒化膜中に酸化膜を形成することを特徴とする不揮
発性半導体記憶装置の製造方法。5. A method for manufacturing a nonvolatile semiconductor memory device in which information is stored by capturing electric charge at a trap level at an interface between a nitride film and an oxide film, wherein an oxide film is formed in the nitride film. A method for manufacturing a nonvolatile semiconductor memory device, characterized by:
とを順次に堆積させて形成することを特徴とする請求項
５記載の不揮発性半導体記憶装置の製造方法。6. The method for manufacturing a nonvolatile semiconductor memory device according to claim 5, wherein said nitride film and said oxide film in said nitride film are sequentially deposited and formed.
てこの窒化膜中の前記酸化膜を形成することを特徴とす
る請求項５記載の不揮発性半導体記憶装置の製造方法。7. The method according to claim 5, wherein said oxide film in said nitride film is formed by oxidizing a surface of said nitride film.
って前記窒化膜中の前記酸化膜を形成することを特徴と
する請求項５記載の不揮発性半導体記憶装置の製造方
法。8. The method for manufacturing a nonvolatile semiconductor memory device according to claim 5, wherein said oxide film in said nitride film is formed by oxygen implanted into said nitride film.
とする請求項８記載の不揮発性半導体記憶装置の製造方
法。9. The method for manufacturing a nonvolatile semiconductor memory device according to claim 8, wherein said ion implantation is performed in a point-like manner.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29336396A JP3818402B2 (en) | 1996-10-15 | 1996-10-15 | Nonvolatile semiconductor memory device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29336396A JP3818402B2 (en) | 1996-10-15 | 1996-10-15 | Nonvolatile semiconductor memory device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10125813A true JPH10125813A (en) | 1998-05-15 |
| JP3818402B2 JP3818402B2 (en) | 2006-09-06 |
Family
ID=17793826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29336396A Expired - Fee Related JP3818402B2 (en) | 1996-10-15 | 1996-10-15 | Nonvolatile semiconductor memory device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3818402B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002222875A (en) * | 2001-01-25 | 2002-08-09 | Sony Corp | Non-volatile semiconductor memory device and method of manufacturing the same |
| JP2002222876A (en) * | 2001-01-25 | 2002-08-09 | Sony Corp | Non-volatile semiconductor memory device and method of manufacturing the same |
| JP2009289823A (en) * | 2008-05-27 | 2009-12-10 | Renesas Technology Corp | Nonvolatile semiconductor storage device |
| KR101086497B1 (en) | 2006-06-29 | 2011-11-25 | 주식회사 하이닉스반도체 | Non volatile memory device and method for manufacturing the same |
-
1996
- 1996-10-15 JP JP29336396A patent/JP3818402B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002222875A (en) * | 2001-01-25 | 2002-08-09 | Sony Corp | Non-volatile semiconductor memory device and method of manufacturing the same |
| JP2002222876A (en) * | 2001-01-25 | 2002-08-09 | Sony Corp | Non-volatile semiconductor memory device and method of manufacturing the same |
| KR101086497B1 (en) | 2006-06-29 | 2011-11-25 | 주식회사 하이닉스반도체 | Non volatile memory device and method for manufacturing the same |
| JP2009289823A (en) * | 2008-05-27 | 2009-12-10 | Renesas Technology Corp | Nonvolatile semiconductor storage device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3818402B2 (en) | 2006-09-06 |
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