JPH0964367A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the occurrence of a parasitic MOS at an overlapped region between the element isolation edge of a semiconductor layer and a gate electrode by making thicker the oxide film at the region than that of a gate oxide film. SOLUTION: A semiconductor device which is provided at an SOI substrate 4 consisting of a supporting substrate 1, an insulation film 2, and a semiconductor layer 3 has a boundary region covering 15 where the side surface and upper surface insulation films of the island-shaped semiconductor layer 3 on the insulating film 2 are thicker than a gate insulating film only on a surface where a gate electrode exists.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a metal-oxide film-semiconductor (MOS) type semiconductor device formed on a semiconductor substrate and a method of manufacturing the same, and more particularly to a semiconductor for reducing a leak current generated at an edge of an element isolation region. The present invention relates to a device structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art A semiconductor substrate having a semiconductor layer on an insulating film formed on a supporting substrate, a so-called SOI (Silicon)
A semiconductor device using an On Insulator substrate is known.

It is known that a semiconductor device using this SOI substrate has an advantage that elements can be completely isolated from each other and latch-up and soft error can be suppressed.

Furthermore, in the semiconductor device in which the semiconductor layer formed on the insulating film is thinned, most of the depletion layer charge is controlled by the potential of the gate electrode, so that the short channel effect is suppressed and the current driving capability is improved. And the like.

The structure of a conventional semiconductor device using this SOI substrate will be described with reference to the sectional view of FIG. As shown in FIG. 16, an SOI substrate 4 including a supporting substrate 1, an insulating film 2 and a semiconductor layer 3 is used. The semiconductor layer 3 is completely insulated and separated by the interlayer insulating film 32 and the insulating film 2 below the semiconductor layer 3.

A gate oxide film 14 and a gate electrode 8 are provided on the channel region provided in the semiconductor layer 3, so-called MO.
It constitutes an S-type semiconductor device.

Further, the semiconductor layer 3 in the region matching the gate electrode 8 is provided with a source and a drain, which are not shown in FIG.

Further, a wiring 33 connecting to the source / drain and the gate electrode 8 is provided through the contact hole 21 provided in the interlayer insulating film 32.

Next, a plane pattern structure of a conventional MOS type semiconductor device using the SOI substrate 4 will be described with reference to the plan view of FIG. Here, the cross-sectional view of FIG. 16 illustrates a cross section taken along the line AB of FIG.

As shown in FIG. 15, an interlayer insulating film 32 is provided in the peripheral region of the semiconductor layer 3 formed on the SOI substrate 4, and the interlayer insulating film 32 completely insulates the semiconductor layer 3.

A gate electrode 8 is provided on the channel region provided in the semiconductor layer 3 via a gate oxide film, so-called MO.
It constitutes an S-type semiconductor device.

Further, a source 6 and a drain 5 are provided in the semiconductor layer 3 in a region matching the gate electrode 8.

Further, a wiring 33 connected to the source 6, the drain 5 and the gate electrode 8 is provided through the contact hole 21 provided in the interlayer insulating film 32.

A semiconductor device using this SOI substrate 4 is
A parasitic MOS region 9 is formed by the semiconductor layer 3 and the element isolation region edge that is the boundary between the semiconductor layer 3 and the interlayer insulating film 32 in the peripheral region of the semiconductor layer 3, and the gate electrode 8 formed on the element isolation region edge.

The structure of the parasitic MOS region 9 will be described with reference to FIG. 16 which is a sectional view of the prior art showing a cross section taken along the line AB in FIG. 15 showing the planar pattern shape of the prior art.

The parasitic MOS region 9 is a boundary between the semiconductor layer 3 and the interlayer insulating film 32, and is composed of a gate oxide film 14 and a gate electrode 8 in the direction perpendicular to the channel region 7.
Form the OS structure.

In the parasitic MOS region 9, the electric field from the normal channel region 7 and the electric field from the MOS formed on the side wall of the semiconductor layer 3 are added, and the normal channel region 7 is added.
A channel is formed in a lower electric field than that, and a leak current is generated.

[0018]

In the MOS type semiconductor device described with reference to FIG. 16, the parasitic MOS region 9 is formed. Therefore, when driving a MOS semiconductor device,
In the parasitic MOS region 9, an electric field in a direction perpendicular to the normal gate electrode 8 and an electric field in a parallel direction from the gate electrode 8 formed on the sidewall portion of the semiconductor layer 3 are added, so that a leak current is generated. .

The characteristics of the leak current due to the parasitic MOS region 9 will be described with reference to the graph of FIG.

FIG. 17 shows the correlation between the gate voltage and the drain current of the MOS type semiconductor device. The horizontal axis represents the gate voltage, and the vertical axis represents the drain current in logarithm.

In a normal MOS type semiconductor device, the drain current at a gate voltage of 0 V is as small as 1 pA or less as shown by the solid line 63 in FIG.

However, in the MOS type semiconductor device in which the parasitic MOS region 9 exists, the drain current flows even if the gate voltage is zero V due to the leakage current as shown by the broken line 65 in FIG. This leakage current causes a malfunction in the system and an increase in power consumption, which becomes a problem.

The amount of this leak current differs between the N-channel semiconductor device and the P-channel semiconductor device even within the same system. The reason for this is that, in general, boron that forms the well of the N-channel semiconductor device is incorporated into the oxide film by selective oxidation for forming the element region or oxidation treatment after the element formation. This is a problem because the concentration in the parasitic MOS region becomes low and the leak current becomes larger in the N-channel semiconductor device.

Further, the leak current varies depending on the type of transistor. In a system composed of MOS type semiconductors, a transistor having a short channel length has a short channel length of a parasitic MOS, which increases a leak current, which is a problem particularly in a transistor having a short channel length.

An object of the present invention is to solve the above problems and provide a structure and a manufacturing method for obtaining a semiconductor device capable of reducing a leak current due to a parasitic MOS region.

[0026]

In order to achieve the above object, the structure of the semiconductor device of the present invention and the manufacturing method thereof adopt the following means.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
A boundary region coating is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
A boundary region film having a thickness larger than that of the gate oxide film is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
A boundary region coating film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
It is characterized in that a boundary region coating larger than the gate electrode is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
It is characterized in that a boundary region film having a thickness larger than that of the gate oxide film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
It is characterized in that a boundary region film larger than the gate electrode and thicker than the gate oxide film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, the SOI substrate including the supporting substrate, the insulating film and the island-shaped semiconductor layer, the gate oxide film provided on the semiconductor layer, and the semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
A boundary region coating is provided on the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. And a gate electrode provided in
It is characterized in that a boundary region film having a thickness larger than that of the gate oxide film is provided on the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a support substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, and a boundary region coating film is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

The semiconductor device according to the present invention comprises an SOI substrate composed of a support substrate, an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode is provided so as to cross the semiconductor layer, and a boundary region film having a thickness larger than that of the gate oxide film is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

A semiconductor device according to the present invention comprises an SOI substrate composed of a support substrate, an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, and a boundary region coating film is provided on two opposing sides of a semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a supporting substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, and a boundary region coating larger than the gate electrode is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

The semiconductor device according to the present invention comprises an SOI substrate composed of a support substrate, an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to traverse the semiconductor layer, and a boundary region film having a thickness larger than that of the gate oxide film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. To do.

The semiconductor device according to the present invention comprises an SOI substrate composed of an island-shaped semiconductor layer surrounded by a support substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, and a boundary region film larger than the gate electrode and thicker than the gate oxide film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. It is characterized in that it is provided.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a support substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode is provided so as to cross the semiconductor layer, and a boundary region coating film is provided in the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

The semiconductor device according to the present invention comprises a support substrate, an SOI substrate formed of an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode is provided so as to cross the semiconductor layer, and a boundary region film having a thickness larger than that of the gate oxide film is provided in the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer.

In the semiconductor device of the present invention, an SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided in the peripheral region of the semiconductor layer. The boundary region film of the N-channel type semiconductor device is higher than that of the P-channel type semiconductor device. It is characterized in that its width dimension is large.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode provided in the semiconductor device, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided on two opposing sides of the semiconductor layer peripheral region, the boundary region film being more N-channel type than the P-channel type semiconductor device. The semiconductor device is characterized in that its width dimension is larger.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region coating larger than the gate electrode on two opposing sides of the semiconductor layer peripheral region, the boundary region coating more than the P-channel semiconductor device. The N-channel semiconductor device is characterized by having a larger width dimension.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode provided in the semiconductor device, an N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region film having a thickness larger than that of the gate oxide film on two opposing sides of the semiconductor layer peripheral region, the boundary region film being a P channel The width dimension of the N-channel semiconductor device is larger than that of the N-type semiconductor device.

In the semiconductor device of the present invention, an SOI substrate including a supporting substrate, an insulating film and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode provided in the semiconductor device, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film larger than the gate electrode and thicker than the gate oxide film on two opposing sides of the semiconductor layer peripheral region,
The boundary region coating is characterized in that the N-channel semiconductor device has a larger width dimension than the P-channel semiconductor device.

In the semiconductor device of the present invention, the SOI substrate including the supporting substrate, the insulating film and the island-shaped semiconductor layer, the gate oxide film provided on the semiconductor layer, and the semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode provided in the semiconductor device, an N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film provided over the entire peripheral region of the semiconductor layer, the boundary region film of the N-channel semiconductor device being better than that of the P-channel semiconductor device. It is characterized in that its width dimension is larger.

In the semiconductor device of the present invention, the SOI substrate including the supporting substrate, the insulating film and the island-shaped semiconductor layer, the gate oxide film provided on the semiconductor layer, and the semiconductor layer provided on the gate oxide film so as to cross the semiconductor layer. A gate electrode, an N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film having a thickness larger than that of the gate oxide film over the entire semiconductor layer peripheral region, the boundary region film being a P-channel semiconductor device. The width of the N-channel semiconductor device is larger than that of the N-channel semiconductor device.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a supporting substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided in a peripheral region of the semiconductor layer are provided. The channel type semiconductor device is characterized by having a larger width dimension.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a supporting substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. The semiconductor device includes a gate electrode provided so as to cross the semiconductor layer, an N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region coating provided on two opposing sides of the semiconductor layer peripheral region, the boundary region coating being a P-channel type. The width of the N-channel semiconductor device is larger than that of the semiconductor device.

The semiconductor device according to the present invention comprises an SOI substrate composed of a support substrate, an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, an N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region coating larger than the gate electrode on two opposing sides of the semiconductor layer peripheral region are provided. The width dimension of the N-channel type semiconductor device is larger than that of the P-channel type semiconductor device.

A semiconductor device according to the present invention comprises a support substrate, an SOI substrate composed of an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, an N-channel semiconductor device and a P-channel semiconductor device, and a boundary region film having a thickness larger than that of the gate oxide film on two opposing sides of the semiconductor layer peripheral region, The boundary region coating is characterized in that the N-channel semiconductor device has a larger width dimension than the P-channel semiconductor device.

The semiconductor device according to the present invention includes an SOI substrate including an island-shaped semiconductor layer surrounded by a supporting substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A gate electrode provided so as to cross the semiconductor layer, an N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region which is larger than the gate electrode and is thicker than the gate oxide film on two opposing sides of the semiconductor layer peripheral region. The boundary region coating is characterized in that the N-channel semiconductor device has a larger width dimension than the P-channel semiconductor device.

The semiconductor device according to the present invention comprises an SOI substrate composed of a support substrate, an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. The semiconductor device further includes a gate electrode provided so as to cross the semiconductor layer, an N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film provided over the entire semiconductor layer peripheral region. The N-channel semiconductor device is characterized by having a larger width dimension.

A semiconductor device according to the present invention comprises a support substrate, an SOI substrate formed of an island-shaped semiconductor layer surrounded by an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a gate oxide film provided on the gate oxide film. A boundary electrode film is provided which includes a gate electrode provided so as to cross the semiconductor layer, an N-channel semiconductor device and a P-channel semiconductor device, and a boundary region film having a thickness larger than that of the gate oxide film over the entire semiconductor layer peripheral region. Is characterized in that the N-channel semiconductor device has a larger width dimension than the P-channel semiconductor device.

The method for manufacturing a semiconductor device according to the present invention comprises:
The semiconductor layer of the SOI substrate including the supporting substrate, the insulating film and the semiconductor layer is entirely oxidized in an oxidizing atmosphere to form a thinned insulating film, and the thinned insulating film is entirely etched to form a predetermined semiconductor layer film. Thickening step, forming a photosensitive resin on the semiconductor layer, etching the semiconductor layer using the photosensitive resin as an etching mask to form an island-shaped semiconductor layer, and the semiconductor layer in an oxidizing atmosphere. Oxidation treatment to form a boundary region film, and a photosensitive resin is formed on the entire surface, and the photosensitive resin is used as an etching mask so as to leave the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer. Etching the boundary region film and performing an oxidation treatment in an oxidizing atmosphere to form a gate insulating film, forming a gate electrode material on the entire surface, forming a photosensitive resin on the gate electrode material, A step of forming a gate electrode by etching a gate electrode material using a resin as an etching mask, and forming a high-concentration impurity layer having a conductivity type opposite to that of a semiconductor layer in a source / drain formation region using a photosensitive resin as an ion implantation mask A step of activating the ion-implanted impurities by performing a heat treatment, an interlayer insulating film is formed,
The method is characterized by including a step of forming a contact hole in the interlayer insulating film by a photoetching technique and a step of forming a wiring.

The method for manufacturing a semiconductor device according to the present invention comprises:
A step of forming a photosensitive resin on a semiconductor layer of an SOI substrate including a support substrate, an insulating film, and a semiconductor layer, and etching the semiconductor layer using the photosensitive resin as an etching mask to form an island-shaped semiconductor layer; A step of oxidizing the semiconductor layer in an oxidizing atmosphere to form a boundary region film, and forming a photosensitive resin on the entire surface so that the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer are left. Etching the boundary region film using a photosensitive resin as an etching mask and forming a gate insulating film by oxidizing the film in an oxidizing atmosphere, and forming a gate electrode material on the entire surface, and then forming a photosensitive resin on the gate electrode material. And forming a gate electrode by etching the gate electrode material using a photosensitive resin as an etching mask, and using the photosensitive resin as an ion implantation mask to form a source and a drain. A high-concentration impurity layer having a conductivity type opposite to that of the semiconductor layer, a step of activating the ion-implanted impurities by heat treatment, an interlayer insulating film is formed, and an interlayer insulating film is formed by a photoetching technique. The method is characterized by including a step of forming a contact hole in the film and a step of forming a wiring.

The method for manufacturing a semiconductor device according to the present invention comprises:
The semiconductor layer of the SOI substrate including the supporting substrate, the insulating film and the semiconductor layer is entirely oxidized in an oxidizing atmosphere to form a thinned insulating film, and the thinned insulating film is entirely etched to form a predetermined semiconductor layer film. A step of thickening, a step of oxidizing the entire surface in an oxidizing atmosphere to form a pad oxide film, a step of forming a silicon nitride film on the entire surface by chemical vapor deposition, and a photosensitive resin formed on this silicon nitride film Then, a step of etching the silicon nitride film other than the element formation region by using a photosensitive resin as an etching mask, and a selective oxidation process of forming a field oxide film other than the element region by performing oxidation in an oxidizing atmosphere are performed. A step of forming a layer, a step of removing the silicon nitride film and the pad oxide film, an oxidation treatment in an oxidizing atmosphere to form a sacrificial oxide film on the entire surface, and a step of removing the sacrificial oxide film in an oxidizing atmosphere. Oxidation treatment to form the boundary region film, and the photosensitive resin is formed on the entire surface, and the boundary region film is etched by using the photosensitive resin as an etching mask so that the boundary region film on the upper surface of the semiconductor layer is left and then oxidized. A step of forming a gate insulating film by oxidizing in an atmosphere, a gate electrode material is formed on the entire surface, a photosensitive resin is formed on the gate electrode material, and the photosensitive resin is used as an etching mask. To form a gate electrode by etching, a step of forming a high-concentration impurity layer having a conductivity type opposite to that of the semiconductor layer in a source / drain formation region by using a photosensitive resin as an ion implantation mask, and ion implantation by performing heat treatment. And a step of forming an interlayer insulating film and forming a contact hole in the interlayer insulating film by a photoetching technique. Characterized by a step of forming a wiring.

The method for manufacturing a semiconductor device according to the present invention comprises:
A step of forming a pad oxide film by oxidizing the entire surface of a semiconductor layer of an SOI substrate including a supporting substrate, an insulating film and a semiconductor layer in an oxidizing atmosphere, and forming a silicon nitride film on the entire surface by a chemical vapor deposition method; A step of forming a photosensitive resin on the silicon nitride film and etching the silicon nitride film outside the element formation region by using the photosensitive resin as an etching mask; A step of forming an island-shaped semiconductor layer by performing a selective oxidation process for forming a film, a step of removing the silicon nitride film and the pad oxide film, and performing an oxidation process in an oxidizing atmosphere to form a sacrificial oxide film on the entire surface. The step of removing the oxide film and performing oxidation treatment in an oxidizing atmosphere to form a boundary region film, and forming a photosensitive resin on the entire surface, and then removing the photosensitive resin so as to leave the boundary region film on the upper surface of the semiconductor layer Etching the boundary region film using the etching mask, forming a gate insulating film by oxidizing in an oxidizing atmosphere, and forming a gate electrode material on the entire surface, forming a photosensitive resin on the gate electrode material, A step of forming a gate electrode by etching a gate electrode material using a photosensitive resin as an etching mask, and a high-concentration impurity layer having a conductivity type opposite to that of a semiconductor layer in a source / drain formation region using a photosensitive resin as an ion implantation mask. A step of forming, a step of activating the ion-implanted impurities by performing heat treatment, a step of forming an interlayer insulating film and forming a contact hole in the interlayer insulating film by a photoetching technique, and a step of forming a wiring. It is characterized by having.

The method of manufacturing a semiconductor device according to the present invention is
Implanting oxygen ions into the first conductivity type semiconductor substrate,
Heat treatment is performed to form S including a supporting substrate, an insulating film and a semiconductor layer.
A step of forming an OI substrate, a step of oxidizing the entire surface of the semiconductor layer in an oxidizing atmosphere to form a thinned insulating film, and a step of completely etching the thinned insulating film to a predetermined semiconductor layer thickness; A step of forming a photosensitive resin on the layer and etching the semiconductor layer using the photosensitive resin as an etching mask to form an island-shaped semiconductor layer; and a step of oxidizing the semiconductor layer in an oxidizing atmosphere to form a boundary region film. And a step of forming a photosensitive resin on the entire surface, and the photosensitive resin is used as an etching mask to etch the boundary area film so as to leave the boundary area film on the side surface of the semiconductor layer and the boundary area film on the upper surface of the semiconductor layer. , A step of forming a gate insulating film by oxidizing in an oxidizing atmosphere, and forming a gate electrode material on the entire surface,
Forming a photosensitive resin on the gate electrode material and using the photosensitive resin as an etching mask to etch the gate electrode material to form a gate electrode, and forming the source and drain using the photosensitive resin as an ion implantation mask. A step of forming a second-conductivity-type high-concentration impurity layer in the region, a step of activating the ion-implanted impurities by heat treatment, an interlayer insulating film is formed, and a contact hole is formed in the interlayer insulating film by a photoetching technique. And a step of forming a wiring.

The method for manufacturing a semiconductor device according to the present invention comprises:
Implanting oxygen ions into the first conductivity type semiconductor substrate,
A step of forming an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer by heat treatment; forming a photosensitive resin on the semiconductor layer; and etching the semiconductor layer using the photosensitive resin as an etching mask. A step of forming an island-shaped semiconductor layer; a step of oxidizing the semiconductor layer in an oxidizing atmosphere to form a boundary region film; a step of forming a photosensitive resin on the entire surface; The step of forming the gate insulating film by etching the boundary area film using a photosensitive resin as an etching mask so as to leave the boundary area film on the upper surface and performing an oxidation treatment in an oxidizing atmosphere, and forming the gate electrode material on the entire surface. Forming a photosensitive resin on the gate electrode material, etching the gate electrode material using the photosensitive resin as an etching mask to form the gate electrode, and Of a high-concentration impurity layer of the second conductivity type in the source and drain formation regions using a conductive resin as an ion implantation mask, a step of activating the ion-implanted impurities by heat treatment, and forming an interlayer insulating film. The method is characterized by including a step of forming a contact hole in the interlayer insulating film by a photo etching technique and a step of forming a wiring.

The method of manufacturing a semiconductor device according to the present invention is
Implanting oxygen ions into the first conductivity type semiconductor substrate,
A step of forming an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer by performing heat treatment; and the whole surface of the semiconductor layer is oxidized in an oxidizing atmosphere to form a thinned insulating film. To form a pad of a pad oxide film by oxidizing the entire surface in an oxidizing atmosphere to form a silicon nitride film on the entire surface by a chemical vapor deposition method. A step of forming a photosensitive resin on the film and etching the silicon nitride film outside the element formation region using the photosensitive resin as an etching mask, and a step of forming a field oxide film outside the element region by oxidation in an oxidizing atmosphere A step of performing an oxidation process to form an island-shaped semiconductor layer; a step of removing the silicon nitride film and the pad oxide film and performing an oxidation process in an oxidizing atmosphere to form a sacrificial oxide film over the entire surface. A step of removing the sacrificial oxide film and performing an oxidation treatment in an oxidizing atmosphere to form a boundary region film, and forming a photosensitive resin on the entire surface, and etching mask of the photosensitive resin so that the boundary region film on the upper surface of the semiconductor layer is left. The step of forming the gate insulating film by etching the boundary region coating film and oxidizing it in an oxidizing atmosphere, and forming the gate electrode material on the entire surface and forming the photosensitive resin on the gate electrode material, Of forming a gate electrode by etching a gate electrode material using a photosensitive resin as an etching mask, and forming a second conductivity type high-concentration impurity layer in a source / drain formation region using a photosensitive resin as an ion implantation mask And a step of activating the ion-implanted impurities by heat treatment, forming an interlayer insulating film, and contacting the interlayer insulating film by a photoetching technique. And having a step of forming a hole, and forming a wiring.

The method of manufacturing a semiconductor device according to the present invention comprises:
Implanting oxygen ions into the first conductivity type semiconductor substrate,
A step of forming an SOI substrate composed of a supporting substrate, an insulating film and a semiconductor layer by heat treatment, a pad oxide film is formed by oxidizing the entire surface in an oxidizing atmosphere, and a silicon oxide film is formed on the entire surface by chemical vapor deposition. Performing a process of forming a nitride film, a process of forming a photosensitive resin on the silicon nitride film and etching the silicon nitride film other than the element formation region by using the photosensitive resin as an etching mask, and an oxidizing treatment in an oxidizing atmosphere. A step of forming an island-shaped semiconductor layer by performing a selective oxidation process to form a field oxide film in a region other than the element region, a process of removing the silicon nitride film and the pad oxide film, and performing an oxidation process in an oxidizing atmosphere to form a sacrificial oxide film over the entire surface. And a step of removing the sacrificial oxide film and performing an oxidation treatment in an oxidizing atmosphere to form a boundary region film. A photosensitive resin is formed on the entire surface to form a boundary region on the upper surface of the semiconductor layer. The step of forming the gate insulating film by etching the boundary region film using a photosensitive resin as an etching mask so as to leave the film and performing an oxidation treatment in an oxidizing atmosphere, and forming the gate electrode material on the entire surface Forming a photosensitive resin on the material, etching the gate electrode material using the photosensitive resin as an etching mask to form the gate electrode, and using the photosensitive resin as an ion implantation mask in the source and drain formation regions. A step of forming a high-concentration impurity layer of the second conductivity type, a step of activating ion-implanted impurities by heat treatment, an interlayer insulating film is formed, and a contact hole is formed in the interlayer insulating film by a photoetching technique. And a step of forming a wiring.

As described above, in the semiconductor device of the present invention, the boundary region film made of the insulating film having a thickness larger than that of the gate insulating film is provided in the peripheral region of the semiconductor layer in the overlapping portion with the gate electrode at the end of the element isolation region. There is.

Furthermore, in the semiconductor device of the present invention, a boundary region coating film made of an insulating film having a thickness larger than that of the gate insulating film is provided in the semiconductor layer peripheral region in the overlapping portion with the gate electrode at the edge of the element isolation region, The boundary region coating is provided wider in the N-channel semiconductor device than in the P-channel semiconductor device.

Furthermore, in the semiconductor device of the present invention, in a semiconductor device having a short channel length of the MOS type semiconductor device constituting the system, the boundary is formed in the semiconductor layer peripheral region in the overlapping portion with the gate electrode at the end of the element isolation region. The area of the area coating is large.

In the semiconductor device of the present invention, since the insulating film in the parasitic MOS region is made thick as described above, the electric field from the gate electrode is weakened and the threshold voltage is made higher than in the normal channel region.

Therefore, the leakage due to the parasitic MOS region can be reduced, and the leakage current at the gate voltage zero V can be eliminated.

Further, since it is possible to employ a means for changing the region of the boundary film having a large film thickness between the N-channel semiconductor device and the P-channel semiconductor device, or a device for changing the region depending on the channel length, it is possible to adopt a semiconductor. The design can be tailored to the characteristics of the device, and the degree of freedom in system design can be increased.

[0071]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of a semiconductor device and a method of manufacturing the same according to an embodiment of the present invention will be described below with reference to the drawings. First, the structure of a semiconductor device according to an embodiment of the present invention will be described with reference to the sectional view of FIG.

As shown in FIG. 1, the semiconductor device of the present invention is an SO including a support substrate 1, an insulating film 2 and a semiconductor layer 3.
I substrate 4 is used. Then, on this SOI substrate 4, a MOS type semiconductor device including the gate electrode 8, the gate oxide film 14 and the semiconductor layer 3 is provided. The gate electrode 8 is provided so as to cross the semiconductor layer 3.

The insulating film in the peripheral region of the semiconductor layer in the region where the side surface of the semiconductor layer 3 and the upper surface of the semiconductor layer 3 and the gate electrode 8 overlap each other is covered with a boundary region film 15 made of an insulating film having a thickness larger than that of the gate oxide film 14. It is provided.

The boundary region film 15 weakens the electric field from the gate electrode 8 in the semiconductor layer 3 and suppresses the leak current due to the parasitic MOS.

Further, a wiring 33 connected to the gate electrode 8 through the contact hole 21 provided in the interlayer insulating film 32 is provided.

Next, the planar structure of the semiconductor device provided with the boundary region film 15 for reducing the leak current will be described with reference to FIG. FIG. 2 is a plan view showing a plane pattern shape of the semiconductor device according to the embodiment of the present invention.

As shown in FIG. 2, in the semiconductor device of the present invention, an interlayer insulating film 32 is provided all over the periphery of the semiconductor layer 3 provided by using the SOI substrate 4, and the semiconductor layer 3 is completely covered by the interlayer insulating film 32. The insulation is separated. Further, the gate electrode 8 is provided through the gate oxide film provided on the semiconductor layer 3 and the boundary region coating film 15 provided in the semiconductor layer peripheral region in the region where the semiconductor layer 3 and the gate electrode 8 overlap. The boundary region coating 15 is provided on two opposing sides of the peripheral region of the semiconductor layer 3. Further, the boundary region coating 15 has a pattern size larger than that of the gate electrode 8.

In the region of the semiconductor layer 3 aligned with the gate electrode 8, a source 6 and a drain 5 which are high-concentration impurity layers.
Are provided. Further, a wiring 33 connected to the source 6, the drain 5 and the gate electrode 8 is provided through the contact hole 21 provided in the interlayer insulating film 32.

In the semiconductor device of the present invention shown in FIGS. 1 and 2, a current is applied between the drain 5 and the source 6 in the channel region formed under the gate electrode 8 as in the case of a normal MOS semiconductor device. Drive by flowing.

In the semiconductor device of the present invention shown in FIGS. 1 and 2, the insulating film in the semiconductor layer peripheral region, which is the overlapping portion of the end of the element isolation region and the gate electrode 8, is replaced with the gate oxide film 14.
The boundary region coating film 15 made of a thicker insulating film is used. Therefore, the gate electric field can be weakened, the leakage current is not generated by the parasitic MOS region, the gate voltage-drain current characteristic shown by the solid line 63 in the graph of FIG. 17 is obtained, and stable transistor operation can be obtained. it can.

Next, the structure of a semiconductor device according to another embodiment of the present invention will be described with reference to FIG. First, the structure of the semiconductor device according to the embodiment of the present invention will be described with reference to the plan view of FIG.

FIG. 3 shows a planar structure of a semiconductor device according to another embodiment of the present invention. The same reference numerals as those in FIGS. 1 and 2 are given to the same reference numerals in FIG.

In the embodiment shown in FIG. 3, the insulating film in the entire element isolation region, which is the semiconductor layer peripheral region at the boundary between the semiconductor layer 3 and the interlayer insulating film 32, is made thicker than the gate oxide film 14. The boundary region coating 15 is made of For this reason, since the boundary region film 15 is present in the overlapping portion with the gate electrode 8 provided so as to cross the semiconductor layer 3, the electric field from the gate electrode 8 can be weakened and the leak current due to the parasitic MOS can be suppressed. It is possible.

A semiconductor device according to still another embodiment is
This will be described with reference to FIG. The sectional view of FIG. 4 shows a sectional structure of a semiconductor device according to another embodiment of the present invention. The same reference numerals as those in FIGS. 1 and 2 are given to the same reference numerals in FIG.

In the semiconductor device according to the embodiment shown in FIG. 4, element isolation of the semiconductor layer 3 is performed by selective oxidation (LOCOS).
Method), and the semiconductor layer 3 is insulated and separated by the field oxide film 10.

The boundary between the semiconductor layer 3 and the field oxide film 10 has a bird's beak shape and is called a bar beak. In the N-channel semiconductor device, the semiconductor layer 3
The boron impurity introduced into the silicon oxide diffuses into the oxide film during the selective oxidation for LOCOS separation, and the concentration is lowered particularly in the bird's beak region. Therefore, this bird's beak region becomes a parasitic MOS and a leak current is generated.

Therefore, in the semiconductor device of the present invention shown in FIG. 4, a boundary region film 15 made of an insulating film having a thickness larger than that of the gate oxide film 14 is provided on the bird's beak portion of the field oxide film 10. By providing this boundary region coating 15, the electric field from the gate electrode 8 is weakened and the generation of leak current is suppressed.

A semiconductor device according to still another embodiment is
This will be described with reference to FIG. FIG. 5 shows a planar structure of a semiconductor device according to another embodiment of the present invention. The semiconductor device shown in FIG. 5 is an inverter circuit composed of an N-channel type semiconductor device 61 and a P-channel type semiconductor device 62.

In this inverter circuit, the first boundary region coating 15a made of a thick insulating film at the element isolation end of the semiconductor layer peripheral region of the N-channel semiconductor device 61 is the semiconductor layer of the P-channel semiconductor device 62. Second boundary region film 15 made of a thick insulating film at the element isolation end in the peripheral region
The width dimension is larger than b. Therefore, in the N-channel semiconductor device 61, it is possible to prevent the threshold value of the parasitic MOS region from lowering due to the diffusion of boron into the oxide film.
In the case of the P-channel type semiconductor device 62, the phosphorus concentration increases conversely in this region, so that the second boundary region coating 15
The width dimension of b may be small. Therefore, there is an effect that the channel width of the P-channel type semiconductor device 62, which is inferior to the N-channel type semiconductor device 61 in current driving capability, can be increased.

Therefore, in the P-channel semiconductor device 62, it is possible to minimize the width dimension of the second boundary region coating 15b while suppressing the leakage due to the parasitic MOS region, and the current driving capability is reduced. Can be suppressed.

Further, as another embodiment of the present invention, when the channel length is short, the channel length of the parasitic MOS is also short and the leak current increases. Therefore, it is possible to widen the width dimension of the boundary region film in a transistor having a short channel length in the system, and to narrow the width dimension of the boundary region film in a region having a long channel length.

Next, a manufacturing method for forming the structure of the semiconductor device shown in FIGS. 1 and 2 will be described with reference to the sectional views of FIGS. 6 to 8 and the plan view of FIG.

First, as shown in FIG. 6, an oxygen ion implantation amount of 4 × is applied to a P-type single crystal silicon substrate.
Ion implantation is performed under the conditions of 10 ¹⁷ cm ^-2 and energy of 120 KeV. Then, thermal annealing is performed at a temperature of 1320 ° C. for 6 hours to form a so-called supporting substrate 1, an insulating film 2 having a film thickness of 80 nm, and a P-type semiconductor layer 3 having a film thickness of 180 nm on the insulating film 2. A SIMOX SOI substrate 4 is formed.

After that, a photosensitive resin 51 is formed on the entire surface of the SOI substrate 4 by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form a photosensitive layer on the formation region of the semiconductor layer 3. The photosensitive resin 51 is patterned so as to form the resin 51.

After that, the patterned photosensitive resin 51 is formed.
Is used as an etching mask to completely etch the semiconductor layer 3 to a thickness of 180 nm until it reaches the insulating film 2. This etching treatment uses a reactive ion etching device and uses sulfur hexafluoride (S
F ₆ ), helium (He), and oxygen (O ₂ ) are used as a mixed gas.

After etching the semiconductor layer 3, the photosensitive resin 51 used as the etching mask is removed. As a result, M
The island-shaped semiconductor layer 3 forming the OS type semiconductor device can be formed.

Then, as shown in FIG. 7, an oxidation treatment is performed to form a boundary region coating film 15 made of silicon oxide on the surface of the semiconductor layer 3 with a film thickness of 20 nm. The boundary region film 15 is formed under the conditions of a temperature of 1000 ° C. and a time of 25 minutes in a mixed gas atmosphere of oxygen and nitrogen.

Then, a photosensitive resin 51 is formed on the entire surface by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to open the photosensitive resin 51 in the channel formation region of the semiconductor layer 3. Moreover, patterning is performed so as to form the boundary region coating film 15 in the plan view of FIG.

As shown in FIG. 9, the boundary region coating 15 has two sides of the semiconductor layer 3 facing each other in the peripheral region of the semiconductor layer 3.
Patterning is performed so that 0.6 μm remains from the end of the element toward the element region side. Further, the boundary region coating 15 is configured to have a pattern larger than the gate electrode 8.

Next, using the photosensitive resin 51 as an etching mask, the boundary region film 15 in the channel forming region is etched. The etching of the boundary region coating film 15 is performed by wet etching using hydrogen fluoride (HF) as an etching solution.

As a result of this etching treatment, the boundary region film 1 is formed on the portion 0.6 μm from the end of the semiconductor layer 3 toward the device region.
5 can be formed. Then, the photosensitive resin 51 used as the etching mask is removed.

Then, as shown in FIG. 8, an oxidation treatment is performed to form a gate oxide film 14 of silicon oxide on the surface of the semiconductor layer 3 with a film thickness of 10 nm. The gate oxide film 14 is formed in an oxygen atmosphere at a temperature of 900 ° C. for 25 minutes.

After that, monosilane (Si
The film thickness is 400 by the chemical vapor deposition method using H ₄ ).
A gate electrode material 81 made of a polycrystalline silicon film of nm thickness is formed on the entire surface.

Next, a photosensitive resin 51, which is a photosensitive material, is formed on the entire surface by spin coating. After that, an exposure process and a development process are performed using a predetermined photomask, and patterning is performed so that the photosensitive resin 51 is formed in the region where the gate electrode of the MOS type element is formed.

Then, the patterned photosensitive resin 51 is used as an etching mask, and a mixed gas of sulfur hexafluoride (SF ₆ ) and oxygen (O ₂ ) is used as an etching gas by a dry etching method to form polycrystalline silicon. The gate electrode material 81 made of a film is etched to form the gate electrode 8. Then, the photosensitive resin 51 used as the etching mask is removed.

Next, as shown in the plan view of FIG. 9, the semiconductor layer 3 is formed on the semiconductor layer 3 in the region aligned with the gate electrode 8.
Arsenic, which is an opposite conductivity type impurity, is introduced by an ion implantation process to form a high-concentration impurity layer in the source 6 region and the drain 5 region. The ion implantation amount of arsenic for forming this high-concentration impurity layer is performed under the condition of about 3 × 10 ¹⁵ cm ⁻² .

After that, activation processing of the high-concentration impurity layers of the source 6 and the drain 5 is performed. The activation of the impurities implanted into the semiconductor layer 3 by this ion implantation treatment is performed in a nitrogen atmosphere at a temperature of 900 ° C. for annealing time of 20 minutes.

After that, an interlayer insulating film 32 made of a silicon oxide film containing phosphorus and boron is formed on the entire surface by chemical vapor deposition to have a film thickness of about 400 nm.

Next, a photosensitive resin (not shown) is formed on the interlayer insulating film 32 by a spin coating method, and then an exposure process and a development process are performed using a predetermined photomask to correspond to the contact holes 21. Patterning is performed so as to form a photosensitive resin having an opening to be formed.

After that, the interlayer insulating film 32 is etched using the patterned photosensitive resin as an etching mask to form the contact hole 21.

For the etching for forming the contact hole 21, a reactive ion etching apparatus is used, and trifluoromethane (CHF ₃ ) and difluoromethane (CH ₂ F) are used.
₂ ) The mixed gas with is used as an etching gas.

Then, using a sputtering apparatus, a wiring material made of aluminum containing silicon and copper was used.
It is formed on the entire surface with a film thickness of about 800 nm.

Then, a photosensitive resin (not shown) is formed on the wiring material by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form a photosensitive film having a pattern corresponding to the wiring 33. Patterning the resin.

Thereafter, the wiring material is etched using the photosensitive resin as an etching mask to form the wiring 33.

The wiring 33 is etched by using a reactive ion etching apparatus and a mixed gas of chlorine (Cl ₂ ) and boron trichloride (BCl ₃ ) as an etching gas.

As a result, it is possible to form the semiconductor device of the present invention shown in FIG. 2 as a planar structure having the structure shown in FIG. 1 as a sectional structure.

Next, a method of manufacturing the semiconductor device described above and a method of manufacturing another embodiment will be described with reference to the sectional views of FIGS. 6 to 8 and the plan view of FIG.

First, as shown in FIG. 6, an SOI substrate 4 including a supporting substrate 1, an insulating film 2 having a film thickness of 80 nm, and a semiconductor layer 3 having a film thickness of 180 nm and a conductivity type of P type is used. Then, an oxidation treatment is performed to form a thin insulating film (not shown) made of silicon oxide on the surface of the semiconductor layer 1.
It is formed with a film thickness of 80 nm. After that, this thin insulating film is entirely etched with hydrogen fluoride (HF). By this etching process, the semiconductor layer 3 has a film thickness of about 100 nm.

As described above, by thinning the semiconductor layer 3 to a thickness of 100 nm or less, most of the depletion layer charges in the semiconductor device are governed by the potential of the gate, and the short-channel effect can be obtained. Effects such as suppression and improvement of current drive capability can be obtained.

After that, a photosensitive resin 51 is formed on the entire surface of the SOI substrate 4 by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to expose the region where the semiconductor layer 3 is formed. The photosensitive resin 51 is patterned so as to form the photosensitive resin 51.

After that, the photosensitive resin 51 is used as an etching mask until the semiconductor layer 3 reaches the insulating film 2.
Etch the entire film thickness of 0 nm. This etching process is performed by using a reactive ion etching apparatus using a mixed gas of sulfur hexafluoride (SF ₆ ), helium (He) and oxygen (O ₂ ) as an etching gas.

After the semiconductor layer 3 is etched, the photosensitive resin 51 used as the etching mask is removed. As a result, M
The island-shaped semiconductor layer 3 forming the OS type semiconductor device can be formed.

Then, as shown in FIG. 7, oxidation treatment is performed to form a boundary region coating film 15 made of silicon oxide with a film thickness of 20 nm on the surface of the semiconductor layer 3. This boundary region coating 1
The formation conditions of No. 5 are as follows: in a mixed gas atmosphere of oxygen and nitrogen,
The temperature is 1000 ° C. and the time is 25 minutes.

After that, a photosensitive resin 51 is formed on the entire surface by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to open the photosensitive resin 51 in the channel formation region of the semiconductor layer 3. Moreover, patterning is performed so as to form the boundary region coating film 15 shown in the plan view of FIG.

As shown in FIG. 9, the boundary region coating 15 has two sides of the semiconductor layer 3 facing each other in the peripheral region of the semiconductor layer 3.
Patterning is performed so that 0.6 μm remains from the end of the element toward the element region side. Further, the boundary region coating 15 is configured to have a pattern larger than the gate electrode 8.

Next, this patterned photosensitive resin 5 was used.
Using 1 as an etching mask, the boundary region film 15 in the channel formation region is etched. This boundary region coating 1
In the etching of No. 5, hydrogen fluoride (H
Wet etching using F) is performed.

As a result of this etching treatment, the boundary region coating film 1 is formed on the portion 0.6 μm from the end of the semiconductor layer 3 on the element region side.
5 can be formed. Then, the photosensitive resin 51 used as the etching mask is removed.

Then, as shown in FIG. 8, an oxidation treatment is performed to form a gate oxide film 14 made of silicon oxide with a film thickness of 10 nm on the surface of the semiconductor layer 3. This gate oxide film 1
The formation condition of No. 4 is performed in an oxygen atmosphere at a temperature of 900 ° C. for 25 minutes.

After that, monosilane (Si
The film thickness is 400 by the chemical vapor deposition method using H ₄ ).
A gate electrode material 81 made of a polycrystalline silicon film of nm thickness is formed on the entire surface.

Next, a photosensitive resin 51 which is a photosensitive material is formed on the entire surface by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form a gate electrode of a MOS type device. The photosensitive resin 51 is formed in the area to be used.

Then, using this photosensitive resin 51 as an etching mask, a mixed gas of sulfur hexafluoride (SF ₆ ) and oxygen (O ₂ ) is used as an etching gas by a dry etching method to form a polycrystalline silicon film. The gate electrode material 81 made of is etched to form the gate electrode 8. Then, the photosensitive resin 5 used for the etching mask
Remove 1.

Next, as shown in the plan view of FIG. 9, the semiconductor layer 3 is formed on the semiconductor layer 3 in the region aligned with the gate electrode 8.
Arsenic, which is an opposite conductivity type impurity, is introduced by an ion implantation method to form a high-concentration impurity layer to be the source 6 region and the drain 5 region. The ion implantation amount of arsenic for forming this high-concentration impurity layer is performed under the condition of about 3 × 10 ¹⁵ cm ⁻² .

Next, the activation treatment of the impurities introduced into the semiconductor layer 3 by ion implantation is performed. The activation of the impurities may be performed in a nitrogen atmosphere at a temperature of 900 ° C. for annealing time of 20 minutes.

After that, an interlayer insulating film 32 made of a silicon oxide film containing phosphorus and boron is formed on the entire surface by chemical vapor deposition to have a film thickness of about 400 nm.

Next, a photosensitive resin (not shown) is formed on the inter-layer insulating film 32 by a spin coating method, and then an exposure process and a development process are performed using a predetermined photomask to correspond to the contact holes 21. The photosensitive resin having openings is patterned.

After that, the interlayer insulating film 32 is etched by using the patterned photosensitive resin as an etching mask to form the contact hole 21.

The contact hole 21 is etched by using a reactive ion etching apparatus and a mixed gas of methane trifluoride (CHF ₃ ) and methane difluoride (CH ₂ F ₂ ) as an etching gas.

After that, a wiring material made of aluminum containing silicon and copper was formed by using a sputtering device.
It is formed on the entire surface with a film thickness of about 800 nm.

Thereafter, a photosensitive resin (not shown) is formed on the wiring material by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form a photosensitive film having a pattern corresponding to the wiring 33. Patterning the resin.

After that, the wiring material is etched using the photosensitive resin as an etching mask to form the wiring 33.

The etching of the wiring 33 is performed by using a reactive ion etching device and a mixed gas of chlorine (Cl ₂ ) and boron trichloride (BCl ₃ ) as an etching gas.

As a result, it is possible to form the semiconductor device of the present invention having the structure shown in FIG. 1 as a sectional structure and the planar structure shown in FIG. In the semiconductor device described above, by thinning the semiconductor layer 3 to a film thickness of 100 nm or less, in the semiconductor device, most of the depletion layer charges are controlled by the potential of the gate.
Effects such as suppression of the short channel effect and improvement of current driving capability can be obtained.

Next, a manufacturing method for forming the structure of the semiconductor device shown in FIG. 4 which is an embodiment of the present invention will be described with reference to FIG.
13 to 13 and the plan view of FIG.

First, as shown in FIG. 10, oxygen ions are implanted into a P-type single crystal silicon substrate under the conditions of an ion implantation dose of 4 × 10 ¹⁷ cm ^-2 and an energy of 120 KeV. Then, thermal annealing is performed at a temperature of 1320 ° C. for 6 hours, and the supporting substrate 1 and the film thickness of 80 n
A so-called SIMOX SOI substrate 4 including an insulating film 2 having a thickness of m and a P-type semiconductor layer 3 having a thickness of 180 nm is formed.

Then, an oxidation treatment is performed to form a thin insulating film (not shown) made of silicon oxide on the surface of the semiconductor layer 3.
It is formed with a film thickness of 80 nm. After that, the thinned insulating film is entirely etched using hydrogen fluoride (HF) as an etching solution. By this etching process, the semiconductor layer 3 has a film thickness of about 100 nm.

Next, the semiconductor layer 3 is oxidized to form a pad oxide film 1 made of silicon oxide on the surface of the semiconductor layer 3.
7 is formed with a film thickness of 100 nm. This pad oxide film 1
The oxidation treatment conditions for forming 7 are performed in an oxygen atmosphere at a temperature of 900 ° C. for 25 minutes.

Thereafter, the film thickness is reduced to 1 by the chemical vapor deposition method using dichlorosilane and ammonia as reaction gases.
A 00 nm silicon nitride film 18 is formed on the pad oxide film 17.

After that, a photosensitive resin 51 is formed on the entire surface by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form the photosensitive resin 51 in the channel formation region of the semiconductor layer 3. Patterning as follows.

Next, this patterned photosensitive resin 5
The silicon nitride film 18 is etched by using 1 as an etching mask. The etching of the silicon nitride film 18 is performed by using a reactive ion etching device and a mixed gas of sulfur hexafluoride (SF ₆ ), methane trifluoride (CHF ₃ ) and helium (He) as an etching gas. .

Then, as shown in FIG. 11, the photosensitive resin 5
Remove 1. Then, the field oxide film 10 is formed to a thickness of 240 nm by a so-called selective oxidation process in which a region where the silicon nitride film 18 is not formed is oxidized by using the silicon nitride film 18 as an oxidation resistant film mask. This selective oxidation treatment is performed in a steam atmosphere at a temperature of 950 ° C. for 60 minutes.

Next, the silicon nitride film 18 used as the oxidation resistant film mask is removed with heated phosphoric acid, and then the pad oxide film 17 is removed. As a result, as shown in FIG. 11, the semiconductor layer 3 has a structure in which the field oxide film 10 around the semiconductor layer 3 and the insulating film 2 below the semiconductor layer 3 are completely insulated and separated.

Then, as shown in FIG. 12, an oxidation treatment is performed to form a boundary region film 15 made of silicon oxide with a film thickness of 20 nm on the surface of the semiconductor layer 3. The boundary region film 15 is formed under the conditions of a temperature of 1000 ° C. and a time of 25 minutes in a mixed gas atmosphere of oxygen and nitrogen.

After that, a photosensitive resin 51 is formed on the entire surface by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to open the photosensitive resin 51 in the channel formation region of the semiconductor layer 3. Moreover, patterning is performed so as to form the boundary region coating film 15 in the plan view of FIG.

As shown in FIG. 14, the boundary region coating film 15 is patterned so that 0.6 μm remains from the end of the semiconductor layer 3 toward the element region side.

Next, using the photosensitive resin 51 as an etching mask, the boundary region film 15 in the channel forming region is etched. The etching of the boundary region coating film 15 is performed by wet etching using hydrogen fluoride (HF) as an etching solution.

As a result, the boundary region coating film 15 can be formed from the end of the semiconductor layer 3 to the portion 0.6 μm closer to the element region. Then, the photosensitive resin 51 used as the etching mask is removed.

Next, as shown in FIG. 13, an oxidation treatment is performed to form a gate oxide film 14 made of silicon oxide with a film thickness of 10 nm on the surface of the semiconductor layer 3. The gate oxide film 14 is formed in an oxygen atmosphere at a temperature of 900 ° C. for 25 minutes.

Thereafter, monosilane (Si
The film thickness is 400 by the chemical vapor deposition method using H ₄ ).
A gate electrode material 81 made of a polycrystalline silicon film of nm thickness is formed on the entire surface.

Next, a photosensitive resin 51, which is a photosensitive material, is formed on the entire surface of the gate electrode material 81 by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to obtain a MOS type device. Patterning is performed so that the photosensitive resin 51 is formed in the region where the gate electrode is formed.

Then, using the patterned photosensitive resin 51 as an etching mask, a polycrystal is formed by a dry etching method using a mixed gas of sulfur hexafluoride (SF ₆ ) and oxygen (O ₂ ) as an etching gas. The gate electrode material 81 made of a silicon film is etched,
The gate electrode 8 is formed. Then, the photosensitive resin 51 used as the etching mask is removed.

Next, as shown in the plan view of FIG. 14, arsenic, which is an impurity having a conductivity type opposite to that of the semiconductor layer 3, is introduced into the semiconductor layer 3 in a region aligned with the gate electrode 8 by an ion implantation method, A high-concentration impurity layer in the source 6 region and the drain 5 region is formed. The ion implantation amount of arsenic for forming this high-concentration impurity layer is performed under the condition of about 3 × 10 ¹⁵ cm ⁻² .

After that, the activation process of the impurities of the source 6 and the drain 5 is performed. The activation process of the impurities introduced into the semiconductor layer layer 3 by this ion implantation is performed in a nitrogen atmosphere.
The annealing is performed at a temperature of 900 ° C. for 20 minutes.

Thereafter, an interlayer insulating film 32 made of a silicon oxide film containing phosphorus and boron is formed on the entire surface by chemical vapor deposition to have a film thickness of about 400 nm.

Next, a photosensitive resin (not shown) is formed on the inter-layer insulation film 32 by a spin coating method, and then an exposure process and a development process are performed using a predetermined photomask to correspond to the contact holes 21. Patterning is performed so as to form a photosensitive resin having openings.

After that, the interlayer insulating film 32 is etched using the patterned photosensitive resin as an etching mask to form the contact hole 21.

For the etching for forming the contact hole 21, a reactive ion etching apparatus is used, and methane trifluoride (CHF ₃ ) and difluoromethane (CH ₃ ) are used.
₂ F ₂ ) is used as an etching gas.

After that, a wiring material made of aluminum containing silicon and copper was formed by using a sputtering device.
It is formed on the entire surface with a film thickness of about 800 nm.

Then, a photosensitive resin (not shown) is formed on the wiring material by a spin coating method, and an exposure process and a development process are performed using a predetermined photomask to form a photosensitive layer having a pattern corresponding to the wiring 33. Patterning the resin.

After that, the wiring material is etched using the photosensitive resin as an etching mask to form the wiring 33.

The wiring 33 is etched by using a reactive ion etching apparatus and a mixed gas of chlorine (Cl ₂ ) and boron trichloride (BCl ₃ ) as an etching gas.

As a result, it is possible to form the semiconductor device of the present invention having the structure shown in FIG. 4 as a sectional structure and the planar structure shown in FIG.

Next, another embodiment of the present invention in an embodiment different from the above description will be described with reference to the plan view of FIG.

FIG. 5 shows an N-channel semiconductor device 61 and P
An inverter circuit including the channel type semiconductor device 62 is shown.

The cross-sectional structure of the N-channel type semiconductor device 61 and the P-channel type semiconductor device 62 is the same as that of the embodiment of the present invention shown in FIG. 1 or 4.

In the case of the N-channel semiconductor device 61,
Due to the thermal history in the manufacturing process, boron introduced into the semiconductor layer 3 is taken into the oxide film, and the boron impurity concentration is reduced.

On the other hand, in the case of the P-channel type semiconductor device 62, since the impurity contained in the semiconductor layer 3 is phosphorus,
Due to the thermal history, phosphorus piles up on the oxide film and the semiconductor layer 3, so that the phosphorus impurity concentration increases.

Therefore, the threshold value of the parasitic MOS formed at the end of the semiconductor layer 3 is lower in the N-channel semiconductor device 61, and the leak current is larger.

Therefore, in the inverter circuit as shown in FIG. 5, the region of the first boundary region film 15a of the N-channel semiconductor device 61 is set to 0.8 μm from the semiconductor layer 3 toward the channel region, and the P-channel semiconductor device is formed. The region of the second boundary region coating 15b of the device 62 can be shortened to 0.4 μm from the semiconductor layer 3 to the channel side.

Therefore, in the N-channel type semiconductor device 61, the leak current due to the parasitic MOS can be reduced, and in the P-channel type semiconductor device 62, the channel width can be made larger than that of the N-channel type semiconductor device 61. Therefore, since the carrier is originally a hole, it is possible to increase the current of the P-channel type semiconductor device 62, which is inferior to the N-channel type semiconductor device 61 in current driving capability, in terms of design.

Next, another embodiment of the present invention will be described.
When the channel length of the transistor is shortened to, for example, 0.5 μm or less, the channel length of the parasitic MOS is also shortened and the leak current is increased. On the contrary, it decreases when the channel length is long. Therefore, in a transistor having a channel length of 0.5 μm or less in the system, for example, a region of the boundary film is 0.6 μm from the semiconductor layer to the channel side.
m and the channel length is larger than 0.5 μm,
The area of the boundary area coating is 0.3 μm. in this way,
It is possible to reduce the leak current due to the parasitic MOS while utilizing the characteristics of the transistor in the system.

In the above-described embodiments, the boundary region coating film has been described as an example in which the pattern shape is larger than that of the gate electrode, but it may be the same size pattern shape as the gate electrode. Also at this time, the boundary region coating is provided on the two opposite sides of the semiconductor layer peripheral region.

Further, in the embodiments described with reference to FIGS. 5 and 14, the boundary film is provided on two opposite sides of the region under the gate electrode, but the boundary region is formed over the entire peripheral region of the semiconductor layer. A coating may be provided.

In the embodiments described above, the SIMOX substrate is used as the SOI substrate. However, after the silicon substrate having the silicon oxide film formed thereon is bonded, the DWB (Direct Wafer) is used to polish the silicon substrate.
The semiconductor device of the present invention can also be formed by using an (r Bonding) substrate.

[0184]

As is apparent from the above description, in the structure of the semiconductor device of the present invention and the manufacturing method thereof, S
In the semiconductor device using the OI substrate, the parasitic MOS generation in the overlapping region of the element isolation end of the semiconductor layer and the gate electrode, which has been a problem in the past, is caused by the boundary region coating that makes the oxide film in this region thicker than the gate oxide film. By providing, the leakage current can be suppressed and the leakage current can be reduced, and a semiconductor device having stable transistor operation can be obtained.

Further, in the semiconductor device of the present invention, since the region of the boundary region film is formed by using the mask, it can be changed between the N-channel type semiconductor device and the P-channel type semiconductor device, and the degree of freedom in design is increased. In addition, the leakage current due to the parasitic MOS can be reduced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 2 is a plan view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 3 is a plan view showing a structure of a semiconductor device and a method for manufacturing the same according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 5 is a plan view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 9 is a plan view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 10 is a cross-sectional view showing the structure of the semiconductor device and the manufacturing method thereof according to the embodiment of the present invention.

FIG. 11 is a cross-sectional view showing the structure of the semiconductor device and the manufacturing method thereof in the embodiment of the present invention.

FIG. 12 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 13 is a cross-sectional view showing the structure of the semiconductor device and the method for manufacturing the same in the embodiment of the present invention.

FIG. 14 is a plan view showing a structure of a semiconductor device and a manufacturing method thereof according to an embodiment of the present invention.

FIG. 15 is a plan view showing a semiconductor device in the related art.

FIG. 16 is a cross-sectional view showing a semiconductor device in the related art.

FIG. 17 is a graph showing gate voltage and drain current characteristics of the semiconductor device of the present invention and the prior art.

[Explanation of symbols]

 1 Supporting Substrate 2 Insulating Film 3 Semiconductor Layer 4 SOI Substrate 5 Drain 6 Source 8 Gate Electrode 9 Parasitic MOS Region 14 Gate Oxide Film 15 Boundary Region Coating 21 Contact Hole 32 Interlayer Insulating Film 33 Wiring 51 Photosensitive Resin

Claims (38)

[Claims] 1. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film provided in a peripheral region of the semiconductor layer between the gate electrode and the semiconductor layer. 2. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film having a thickness larger than that of a gate oxide film is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 3. A support substrate, an SOI substrate including an insulating film and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film provided on two opposing sides of a semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 4. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region coating larger than the gate electrode, provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 5. An SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film having a thickness larger than that of a gate oxide film, provided on two opposing sides of a semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 6. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device comprising: a boundary region film which is larger than the gate electrode and thicker than the gate oxide film, and which is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 7. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film provided on the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 8. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. A semiconductor device, comprising: a boundary region film having a thickness larger than that of a gate oxide film provided over the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 9. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so that
A semiconductor device, characterized in that a boundary region film is provided in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 10. An SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film having a thickness larger than that of the gate oxide film in a semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 11. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 12. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film larger than the gate electrode on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 13. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film having a thickness larger than that of the gate oxide film on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 14. An SOI substrate including an island-shaped semiconductor layer surrounded by a supporting substrate, an insulating film and a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided as
A semiconductor device, characterized in that a boundary region film larger than the gate electrode and thicker than the gate oxide film is provided on two opposing sides of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 15. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film on the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 16. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. And a gate electrode provided so as to provide a boundary region film having a thickness larger than that of the gate oxide film over the entire region of the semiconductor layer peripheral region between the gate electrode and the semiconductor layer. 17. An SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided in a peripheral region of the semiconductor layer, and the boundary region film has a larger width dimension in the N-channel type semiconductor device than in the P-channel type semiconductor device. A semiconductor device characterized by the above. 18. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided on two opposing sides of the semiconductor layer peripheral region, the boundary region film being more in the N-channel semiconductor device than in the P-channel semiconductor device. A semiconductor device having a large width dimension. 19. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film larger than the gate electrode on two opposing sides of the semiconductor layer peripheral region, the boundary region film being more N-channel semiconductor device than the P-channel semiconductor device. Is a semiconductor device characterized by having a larger width dimension. 20. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region film having a thickness larger than that of the gate oxide film on two opposing sides of the semiconductor layer peripheral region,
The semiconductor device characterized in that the boundary region film has a larger width dimension in the N-channel type semiconductor device than in the P-channel type semiconductor device. 21. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device and a P-channel type semiconductor device, and a boundary region film larger than the gate electrode and thicker than the gate oxide film on two opposing sides of the semiconductor layer peripheral region, the boundary region film being a P-channel A semiconductor device in which the N-channel semiconductor device has a larger width dimension than the N-type semiconductor device. 22. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film provided over the entire peripheral region of the semiconductor layer, and the boundary region film has a width dimension which is larger in the N-channel semiconductor device than in the P-channel semiconductor device. A semiconductor device characterized by being large. 23. An SOI substrate including a supporting substrate, an insulating film and an island-shaped semiconductor layer, a gate oxide film provided on the semiconductor layer, and a gate electrode provided on the gate oxide film so as to cross the semiconductor layer. , An N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film having a thickness larger than that of a gate oxide film over the entire semiconductor layer peripheral region, and the boundary region film is more N-channel type semiconductor than the P-channel type semiconductor device. A semiconductor device characterized in that the device has a larger width dimension. 24. An SOI substrate including a support substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. A gate electrode, a N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film provided in a peripheral region of the semiconductor layer, the boundary region film being more preferable than the P-channel semiconductor device. Is a semiconductor device characterized by having a larger width dimension. 25. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. The gate electrode, the N-channel type semiconductor device, the P-channel type semiconductor device, and the boundary region coating provided on two opposing sides of the semiconductor layer peripheral region, the boundary region coating being more N-type than the P-channel semiconductor device. A semiconductor device characterized in that the channel type semiconductor device has a larger width dimension. 26. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. A gate electrode, a N-channel semiconductor device, a P-channel semiconductor device, and a boundary region coating larger than the gate electrode on two opposing sides of the semiconductor layer peripheral region, the boundary region coating being a P-channel semiconductor. A semiconductor device in which an N-channel type semiconductor device has a larger width dimension than the device. 27. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. The gate electrode, the N-channel semiconductor device, the P-channel semiconductor device, and the boundary region film having a thickness larger than that of the gate oxide film on two opposing sides of the semiconductor layer peripheral region. A semiconductor device in which an N-channel semiconductor device has a larger width dimension than a P-channel semiconductor device. 28. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. A gate electrode, an N-channel semiconductor device, a P-channel semiconductor device, and a boundary region film larger than the gate electrode and thicker than the gate oxide film on two opposing sides of the semiconductor layer peripheral region. The semiconductor device characterized in that the boundary region coating has a larger width dimension in the N-channel type semiconductor device than in the P-channel type semiconductor device. 29. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. The gate electrode, the N-channel type semiconductor device, the P-channel type semiconductor device, and the boundary region film provided over the entire semiconductor layer peripheral region. The boundary region film is more N-channel semiconductor than the P-channel semiconductor device. A semiconductor device characterized in that the device has a larger width dimension. 30. An SOI substrate including a supporting substrate, an insulating film, and an island-shaped semiconductor layer surrounded by a field oxide film, a gate oxide film provided on the semiconductor layer, and a semiconductor layer provided on the gate oxide film and traversing the semiconductor layer. A gate electrode, an N-channel type semiconductor device, a P-channel type semiconductor device, and a boundary region film thicker than the gate oxide film over the entire semiconductor layer peripheral region. A semiconductor device in which an N-channel semiconductor device has a larger width dimension than a semiconductor device. 31. A thinned insulating film is formed by oxidizing the entire surface of a semiconductor layer of an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer in an oxidizing atmosphere, and the thinned insulating film is entirely etched to give a predetermined thickness. And the step of forming a photosensitive resin on the semiconductor layer and etching the semiconductor layer using the photosensitive resin as an etching mask to form an island-shaped semiconductor layer. A step of forming a boundary region film by oxidation treatment in an oxidizing atmosphere, a photosensitive resin is formed on the entire surface, and a photosensitive resin is formed so that the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer are left. Etching the boundary region film using the etching mask and forming a gate insulating film by oxidizing in an oxidizing atmosphere, and forming a gate electrode material on the entire surface, and a photosensitive resin on the gate electrode material. Forming the gate electrode material by etching the gate electrode material using the photosensitive resin as an etching mask, and using the photosensitive resin as an ion implantation mask, in the source / drain formation region, a high concentration of the conductivity type opposite to that of the semiconductor layer A step of forming an impurity layer, a step of activating the ion-implanted impurities by performing heat treatment, a step of forming an interlayer insulating film, a step of forming a contact hole in the interlayer insulating film by a photoetching technique, and a wiring formation A method of manufacturing a semiconductor device, comprising: 32. An island-shaped semiconductor layer in which a photosensitive resin is formed on a semiconductor layer of an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer, and the semiconductor layer is etched using the photosensitive resin as an etching mask. And a step of forming a boundary region film by oxidizing the semiconductor layer in an oxidizing atmosphere, a photosensitive resin is formed on the entire surface, and the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer are formed. And a step of forming a gate insulating film by oxidizing the boundary region film by using a photosensitive resin as an etching mask so as to leave, and oxidizing the film in an oxidizing atmosphere. Forming a gate electrode by forming a photosensitive resin on the gate electrode material using the photosensitive resin as an etching mask, and using the photosensitive resin as an ion implantation mask Forming a high-concentration impurity layer having a conductivity type opposite to that of the semiconductor layer in the source / drain formation region, activating the ion-implanted impurities by heat treatment, forming an interlayer insulating film, and performing a photoetching technique. A method of manufacturing a semiconductor device, comprising: a step of forming a contact hole in an interlayer insulating film by means of; and a step of forming a wiring. 33. A thinned insulating film is formed by oxidizing the entire surface of a semiconductor layer of an SOI substrate including a supporting substrate, an insulating film and a semiconductor layer in an oxidizing atmosphere, and the thinned insulating film is entirely etched. A step of forming a predetermined semiconductor layer thickness, a step of oxidizing the entire surface in an oxidizing atmosphere to form a pad oxide film, and a step of forming a silicon nitride film on the entire surface by chemical vapor deposition, and a step of forming a silicon nitride film on the silicon nitride film. A step of forming a photosensitive resin and using the photosensitive resin as an etching mask to etch the silicon nitride film outside the element formation region, and a selective oxidation treatment of oxidizing in an oxidizing atmosphere to form a field oxide film outside the element region are performed. The step of forming an island-shaped semiconductor layer, the step of removing the silicon nitride film and the pad oxide film, the step of oxidizing in an oxidizing atmosphere to form a sacrificial oxide film on the entire surface, and the step of removing the sacrificial oxide film A step of forming a boundary region film by oxidizing in an oxidizing atmosphere, and forming a photosensitive resin on the entire surface and using the photosensitive resin as an etching mask so as to leave the boundary region film on the upper surface of the semiconductor layer. And forming a gate insulating film by oxidizing in an oxidizing atmosphere, and forming a gate electrode material on the entire surface, forming a photosensitive resin on the gate electrode material, and using the photosensitive resin as an etching mask. A step of etching the gate electrode material by using it to form a gate electrode; a step of forming a high-concentration impurity layer having a conductivity type opposite to that of the semiconductor layer in the source and drain formation regions using a photosensitive resin as an ion implantation mask; By performing the process of activating the ion-implanted impurities, the interlayer insulating film is formed, and a contact hole is formed in the interlayer insulating film by photoetching technology. The method of manufacturing a semiconductor device, characterized in that it comprises the steps of forming, and forming a wiring. 34. A pad oxide film is formed by oxidizing the entire surface of a semiconductor layer of an SOI substrate consisting of a supporting substrate, an insulating film and a semiconductor layer in an oxidizing atmosphere, and a silicon nitride film is formed on the entire surface by chemical vapor deposition. And a step of forming a photosensitive resin on the silicon nitride film and etching the silicon nitride film other than the element formation region using the photosensitive resin as an etching mask, and performing oxidation in an oxidizing atmosphere to perform the element region. In addition to the step of forming an island-shaped semiconductor layer by performing a selective oxidation process to form a field oxide film, the silicon nitride film and pad oxide film are removed, and an oxidation process is performed in an oxidizing atmosphere to form a sacrificial oxide film over the entire surface. And the step of removing the sacrificial oxide film,
The step of forming a boundary region film by oxidation treatment in an oxidizing atmosphere, and forming a photosensitive resin on the entire surface and using the photosensitive resin as an etching mask to leave the boundary region film on the upper surface of the semiconductor layer A step of forming a gate insulating film by etching and oxidizing in an oxidizing atmosphere;
Forming a gate electrode material on the entire surface, forming a photosensitive resin on the gate electrode material, and etching the gate electrode material using the photosensitive resin as an etching mask to form a gate electrode; As a implantation mask, a step of forming a high-concentration impurity layer having a conductivity type opposite to that of the semiconductor layer in the source and drain formation regions, a step of activating the ion-implanted impurities by performing heat treatment, an interlayer insulating film is formed, and A method of manufacturing a semiconductor device, comprising: a step of forming a contact hole in an interlayer insulating film by an etching technique; and a step of forming a wiring. 35. A step of implanting oxygen ions into a first-conductivity-type semiconductor substrate and performing heat treatment to form an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer; and the semiconductor layer in an oxidizing atmosphere. The process of oxidizing the entire surface to form a thinned insulating film, and etching the entire thinned insulating film to a predetermined semiconductor layer thickness, and forming a photosensitive resin on the semiconductor layer, and etching the photosensitive resin A step of etching the semiconductor layer using a mask to form an island-shaped semiconductor layer, a step of oxidizing the semiconductor layer in an oxidizing atmosphere to form a boundary region film, and forming a photosensitive resin on the entire surface, The gate insulating film is formed by etching the boundary region film using a photosensitive resin as an etching mask so as to leave the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer, and performing an oxidation treatment in an oxidizing atmosphere. And a step of forming a gate electrode material over the entire surface, a photosensitive resin is formed on the gate electrode material, and the gate electrode material is etched by using the photosensitive resin as an etching mask to form a gate electrode. A step of forming a second-conductivity-type high-concentration impurity layer in a source / drain formation region using a photosensitive resin as an ion implantation mask; a step of activating the ion-implanted impurities by heat treatment; and interlayer insulation A method of manufacturing a semiconductor device, comprising: forming a film, forming a contact hole in an interlayer insulating film by a photoetching technique, and forming a wiring. 36. A step of forming an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer by ion-implanting oxygen ions into a semiconductor substrate of the first conductivity type and performing a heat treatment, and a photosensitive layer on the semiconductor layer. A step of forming a resin and etching the semiconductor layer using a photosensitive resin as an etching mask to form an island-shaped semiconductor layer; and a step of oxidizing the semiconductor layer in an oxidizing atmosphere to form a boundary region film. , A photosensitive resin is formed on the entire surface, and the boundary region film is etched using the photosensitive resin as an etching mask so that the boundary region film on the side surface of the semiconductor layer and the boundary region film on the upper surface of the semiconductor layer are left in an oxidizing atmosphere. A step of forming a gate insulating film by oxidation treatment, and forming a gate electrode material on the entire surface,
A step of forming a photosensitive resin on the gate electrode material and etching the gate electrode material by using the photosensitive resin as an etching mask to form a gate electrode; and a step of forming the gate electrode by using the photosensitive resin as an ion implantation mask in the source and drain formation regions. A step of forming a high-concentration impurity layer of the second conductivity type, a step of activating ion-implanted impurities by heat treatment, an interlayer insulating film is formed, and a contact hole is formed in the interlayer insulating film by a photoetching technique. And a step of forming a wiring, the method for manufacturing a semiconductor device. 37. A step of forming an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer by implanting oxygen ions into the first conductivity type semiconductor substrate and performing a heat treatment; and the semiconductor layer in an oxidizing atmosphere. To oxidize the entire surface to form a thinned insulating film, and then etch the entire thinned insulating film to a predetermined semiconductor layer thickness, and oxidize the entire surface in an oxidizing atmosphere to form a pad oxide film. , A step of forming a silicon nitride film on the entire surface by chemical vapor deposition, forming a photosensitive resin on the silicon nitride film, and etching the silicon nitride film other than the element formation region using the photosensitive resin as an etching mask A step of forming an island-shaped semiconductor layer by performing a selective oxidation process of forming a field oxide film in a region other than the element region by oxidizing in an oxidizing atmosphere, and removing the silicon nitride film and the pad oxide film. Away, and then oxidizing in an oxidizing atmosphere to form a sacrificial oxide film over the entire surface; removing the sacrificial oxide film and oxidizing in an oxidizing atmosphere to form a boundary region film; A step of forming a gate insulating film by forming a resin, etching the boundary region film using a photosensitive resin as an etching mask so that the boundary region film on the upper surface of the semiconductor layer is left, and performing an oxidation treatment in an oxidizing atmosphere; Forming a gate electrode material on the entire surface, forming a photosensitive resin on the gate electrode material, and etching the gate electrode material using the photosensitive resin as an etching mask to form a gate electrode; Forming a second-conductivity-type high-concentration impurity layer in the source / drain formation region as an implantation mask; activating the ion-implanted impurities by heat treatment; Forming an insulating film, a method of manufacturing a semiconductor device, characterized in that it comprises a step of forming a contact hole in the interlayer insulating film by photoetching techniques, and forming a wiring. 38. A step of forming an SOI substrate including a supporting substrate, an insulating film, and a semiconductor layer by implanting oxygen ions into a first conductivity type semiconductor substrate and performing a heat treatment, and the entire surface in an oxidizing atmosphere. A step of forming a pad oxide film by oxidation treatment and forming a silicon nitride film on the entire surface by chemical vapor deposition, and forming a photosensitive resin on the silicon nitride film and using the photosensitive resin as an etching mask A step of etching a silicon nitride film other than the formation region, a step of performing an oxidation treatment in an oxidizing atmosphere to form a field oxide film in a portion other than the element region to form an island-shaped semiconductor layer, and a silicon nitride film, Remove pad oxide,
Forming a sacrificial oxide film on the entire surface by oxidizing in an oxidizing atmosphere, removing the sacrificial oxide film and forming a boundary region film by oxidizing in an oxidizing atmosphere, and forming a photosensitive resin on the entire surface Then, the boundary region film is etched using a photosensitive resin as an etching mask so as to leave the boundary region film on the upper surface of the semiconductor layer, and the gate insulating film is formed by performing an oxidation treatment in an oxidizing atmosphere, and the gate is formed on the entire surface. Forming an electrode material, forming a photosensitive resin on the gate electrode material,
A step of etching a gate electrode material by using a photosensitive resin as an etching mask to form a gate electrode, and a step of forming a second conductivity type high concentration impurity layer in a source / drain formation region by using the photosensitive resin as an ion implantation mask. A step of forming, a step of activating the ion-implanted impurities by performing heat treatment, a step of forming an interlayer insulating film and forming a contact hole in the interlayer insulating film by a photoetching technique, and a step of forming a wiring. A method of manufacturing a semiconductor device, comprising: