JPH0955577A - Production of printed wiring board - Google Patents

Production of printed wiring board

Info

Publication number
JPH0955577A
JPH0955577A JP22707695A JP22707695A JPH0955577A JP H0955577 A JPH0955577 A JP H0955577A JP 22707695 A JP22707695 A JP 22707695A JP 22707695 A JP22707695 A JP 22707695A JP H0955577 A JPH0955577 A JP H0955577A
Authority
JP
Japan
Prior art keywords
insulating layer
layer
photosensitive
conductor wiring
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22707695A
Other languages
Japanese (ja)
Other versions
JP2748895B2 (en
Inventor
Yasuji Furui
靖二 古井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7227076A priority Critical patent/JP2748895B2/en
Publication of JPH0955577A publication Critical patent/JPH0955577A/en
Application granted granted Critical
Publication of JP2748895B2 publication Critical patent/JP2748895B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a printed wiring board comprising a step for forming an insulation layer on a conductor wiring pattern in which the reliability of insulation layer is enhanced by making uniform the thickness. SOLUTION: A build-up method for forming an insulation layer comprises step B for applying a photosensitive insulation material 14a for first layer onto an insulation board 11 including conductor wiring patterns 12, 13, step D for developing and removing the insulation layer on the conductor wiring patterns 12, 13, and step E for smoothing the surface by mechanical polishing. Subsequently, a photosensitive insulation material for second layer is applied, photovias are made, and the surface is polished to obtain a printed wiring board. Since the photosensitive insulation material for second layer can be applied smoothly while filling the gap between patterns, polishing pressure difference caused by coarseness of wiring pattern is eliminated resulting in smooth polishing.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、印刷配線板の製造
方法に関し、特に微細ピツチの回路パタ−ンを有する印
刷配線板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having a circuit pattern of fine pitch.

【0002】[0002]

【従来の技術】近年、IC,LSI等の高集積化、高速
化が非常な勢いで進められているのに伴って、これらを
実装する印刷配線板においても、高密度化する必要が高
まってきている。
2. Description of the Related Art In recent years, as ICs, LSIs, etc. have been highly integrated and speeded up very rapidly, it has become necessary to increase the density of printed wiring boards on which they are mounted. ing.

【0003】印刷配線板を高密度化する方法の一つとし
て、ビルドアップによる多層印刷配線板の製造法が知ら
れている。ここで、従来のビルドアップによる絶縁層形
成方法(以下“従来法”という)について、図3を参照し
て説明する。なお、図3は、ビルドアップによる多層印
刷配線板の製造工程における従来法を説明するための工
程A〜Eからなる工程順断面図である。
As one of the methods for increasing the density of a printed wiring board, a method for manufacturing a multilayer printed wiring board by buildup is known. Here, a conventional build-up insulating layer forming method (hereinafter referred to as “conventional method”) will be described with reference to FIG. 3A to 3C are cross-sectional views in order of the processes including Processes A to E for explaining the conventional method in the process of manufacturing a multilayer printed wiring board by buildup.

【0004】従来法は、図3に示すように、工程A(配
線パタ−ンの形成工程)→工程B(感光性材料の塗布工
程)→工程C(フォトビアの露光工程)→工程D(フォ
トビアの現像工程)→工程E(感光性材料の研磨工程)
より構成されている。
In the conventional method, as shown in FIG. 3, step A (wiring pattern forming step) → step B (photosensitive material applying step) → step C (photovia exposing step) → step D (photovia) Developing step) → step E (photosensitive material polishing step)
It is composed of

【0005】従来法について更に詳細に説明すると、こ
の方法は、図3工程Aに示すように、絶縁基板31上に、
導体材料によりGVパタ−ンのような導体配線パタ−ン
32及び信号回路パタ−ンのような導体配線パタ−ン33を
形成した後、同工程Bに示すように、感光性絶縁材料34
を公知のスクリ−ン法やカ−テンコ−ト法などにより絶
縁基板31上に塗布する。続いて、図3工程C〜工程Dに
示すように、マスクフイルム35を用いて公知のフォト印
刷法により層間を接続するためのフォトビア36を形成す
る。
The conventional method will be described in more detail. In this method, as shown in step A of FIG.
Conductor wiring pattern such as GV pattern depending on the conductor material
After forming a conductor wiring pattern 33 such as 32 and a signal circuit pattern, as shown in the same process B, a photosensitive insulating material 34 is formed.
Is coated on the insulating substrate 31 by a known screen method or a curtain coating method. Subsequently, as shown in Step C to Step D of FIG. 3, a photo via 36 for connecting the layers is formed by a known photo printing method using the mask film 35.

【0006】その後、感光性絶縁材料34の表層の過度に
光重合した部分を除去するため、また、所望の絶縁層厚
を得るため、図3工程Eに示すように、感光性絶縁材料
34の表層をベルトサンダ−等の機械的手段により研磨し
て印刷配線板37を得る。
Thereafter, in order to remove the excessively photopolymerized portion of the surface layer of the photosensitive insulating material 34 and to obtain a desired insulating layer thickness, as shown in FIG.
The surface layer 34 is polished by a mechanical means such as a belt sander to obtain a printed wiring board 37.

【0007】ところで、上記従来法による絶縁層形成工
程において、導体配線パタ−ン32,同33を形成する導体
層自体の厚みにより絶縁基板31の表面が凸凹状になって
いるため、印刷不良が発生しやすいという問題があっ
た。
By the way, in the insulating layer forming step according to the above-mentioned conventional method, since the surface of the insulating substrate 31 is uneven due to the thickness of the conductor layer itself forming the conductor wiring patterns 32 and 33, defective printing may occur. There was a problem that it was likely to occur.

【0008】上記問題点を解決する手段として、2度塗
りによる絶縁層の平滑化法(以下“公知例”という)が提
案されている(特開昭61−242095号公報参照)。この公知
例について、図4を参照して説明する。なお、図4は、
2度塗り手段を採用した公知例による絶縁層形成を説明
するための工程順断面図であって、工程A(配線パタ−
ンの形成工程)→工程B(第一の感光性材料の塗布工
程)→工程C(第一の感光性材料の研磨工程)→工程D
(第二の感光性材料の塗布工程)→工程E(フォトビア
の露光工程)→工程F(第二の感光性材料の研磨工程)
より構成されている。
As a means for solving the above problems, a method of smoothing an insulating layer by double coating (hereinafter referred to as "known example") has been proposed (see JP-A-61-242095). This known example will be described with reference to FIG. In addition, in FIG.
FIG. 7A is a sectional view in order of the steps, for illustrating the formation of an insulating layer according to a known example that employs a double-coating means, including step A (wiring pattern).
Forming step) → step B (first photosensitive material coating step) → step C (first photosensitive material polishing step) → step D
(Second photosensitive material coating step) → step E (photovia exposure step) → step F (second photosensitive material polishing step)
It is composed of

【0009】即ち、公知例では、図4工程Aに示すよう
に、絶縁基板41上に導体材料により導体配線パタ−ン4
2,同43を形成した後、同工程Bに示すように、公知の
スクリ−ン法により導体配線パタ−ン42,同43の導体厚
み以上の厚みをもって、第一層目の感光性絶縁材料44a
を絶縁基板41上に塗布する。次に図4工程Cに示すよう
に、第一層目の感光性絶縁材料44aの上記導体厚み以上
に盛り上がった部分を機械的研磨手段により除去し、表
面を平滑化する。
That is, in the known example, as shown in FIG. 4A, the conductor wiring pattern 4 is formed on the insulating substrate 41 by the conductor material.
After the formation of the second and the same 43, as shown in the same step B, the first layer of the photosensitive insulating material having a thickness equal to or larger than the conductor thickness of the conductor wiring patterns 42 and 43 by a known screen method. 44a
Is applied on the insulating substrate 41. Next, as shown in step C of FIG. 4, the surface of the photosensitive insulating material 44a of the first layer, which is raised above the conductor thickness, is removed by mechanical polishing means to smooth the surface.

【0010】続いて、図4工程Dに示すように、再度公
知のスクリ−ン法により第二層目の感光性絶縁材料44b
を塗布する。次に、図4工程Eに示すように、マスクフ
イルム45を用い、公知のフォト印刷法により層間を接続
するため、フォトビア46を形成する。
Subsequently, as shown in FIG. 4D, the photosensitive insulating material 44b of the second layer is again formed by the known screen method.
Is applied. Next, as shown in FIG. 4E, a photo via 46 is formed using the mask film 45 to connect the layers by a known photo printing method.

【0011】その後、第二層目の感光性絶縁材料44bの
表層に存在する過度に光重合した部分を除去するため、
また、所望の絶縁層厚を得るため、図4工程Fに示すよ
うに、第二層目の感光性絶縁材料44bの表層をベルトサ
ンダ−等の機械的手段により研磨して印刷配線板47を得
る。
Thereafter, in order to remove the excessively photopolymerized portion existing on the surface layer of the second layer photosensitive insulating material 44b,
Further, in order to obtain a desired insulating layer thickness, as shown in FIG. 4F, the surface layer of the second layer of photosensitive insulating material 44b is polished by a mechanical means such as a belt sander to form the printed wiring board 47. obtain.

【0012】[0012]

【発明が解決しようとする課題】ところで、前記従来法
では、前掲の図3工程Eにおいて、配線パタ−ン上の絶
縁層を機械的に研磨する際、 ・配線パタ−ンが蜜な部分(例えば電源供給、接地の役
割を果たすためのベタパタ−ンであるGVパタ−ン部
分、又は、非常に信号回路パタ−ンが混み合っている部
分)と、 ・配線パタ−ンが粗な部分(例えば信号回路パタ−ンが
単独に存在する部分、又は、配線パタ−ンのない部
分)、とでは、研磨圧力に差が生じるため、均一に絶縁
層を研磨することができず、配線パタ−ン上の絶縁層の
厚さがばらつくという問題があった。
By the way, in the above-mentioned conventional method, in mechanically polishing the insulating layer on the wiring pattern in the step E shown in FIG. For example, a GV pattern part which is a solid pattern for supplying power and grounding, or a part where the signal circuit pattern is extremely crowded), and a part where the wiring pattern is rough ( For example, since the polishing pressure is different between the portion where the signal circuit pattern exists independently or the portion where the wiring pattern does not exist), the insulating layer cannot be uniformly polished, and the wiring pattern cannot be polished. There is a problem that the thickness of the insulating layer on the screen varies.

【0013】上記問題点を解消する方法として、前記し
たとおり、2度塗り手段を採用した公知例による絶縁層
の形成法が提案されているが、この公知例による方法に
おいても、第1回目の絶縁層研磨時には機械的研磨を用
いているため(前掲の図4工程C参照)、上述した従来
法と同様な欠点が生じ、表面を均一に平滑化できず、最
終的には絶縁層厚がばらついてしまう。
As a method for solving the above-mentioned problems, as described above, a method of forming an insulating layer by a publicly known example that employs a double coating means has been proposed, but even in the method by this publicly known example, the first time Since mechanical polishing is used when the insulating layer is polished (see step C in FIG. 4 described above), the same drawbacks as those of the above-described conventional method occur, the surface cannot be uniformly smoothed, and finally the insulating layer thickness is reduced. It will be scattered.

【0014】即ち、例えば前掲の図3工程Eないしは図
4工程Cに示したように、信号回路パタ−ン(導体配線
パタ−ン33,同43)の部分は、配線パタ−ンのない部分
とほぼ同様な研磨圧で研磨されるが、GVパタ−ン(導
体配線パタ−ン32,同42)の部分はベタパタ−ンである
ため、他の部分よりは研磨されにくく、この導体配線パ
タ−ン(32,42)上の絶縁層厚が厚めになってしまう。そ
の結果、同一層面上で配線パタ−ン上の絶縁層厚の不均
衡が生じてしまい、絶縁特性や耐湿特性などの不良を招
きやすいという欠点を有している。
That is, as shown in, for example, FIG. 3E or FIG. 4C, the signal circuit pattern (conductor wiring patterns 33, 43) has no wiring pattern. Although the polishing is performed with substantially the same polishing pressure as the above, the GV pattern (conductor wiring patterns 32, 42) is a solid pattern, so it is harder to polish than other portions, and this conductor wiring pattern is less likely to be polished. -The thickness of the insulating layer on the horns (32, 42) becomes thicker. As a result, the thickness of the insulating layer on the wiring pattern is unbalanced on the same layer surface, which has a drawback that defects such as insulation characteristics and moisture resistance characteristics are likely to occur.

【0015】本発明は、上述した従来の問題点、欠点に
鑑み成されたものであり、その目的とするところは、絶
縁層厚の均一性を向上させ、絶縁層の信頼性を向上させ
る印刷配線板の製造方法を提供するものである。
The present invention has been made in view of the above-mentioned conventional problems and drawbacks, and an object of the present invention is to improve the uniformity of the insulating layer thickness and improve the reliability of the insulating layer. A method for manufacturing a wiring board is provided.

【0016】[0016]

【課題を解決するための手段】本発明は、前述した従来
の問題点、欠点を解消し、上記目的を達成するため、前
記公知例のように2度塗り手段を採用するものである
が、特に絶縁層として感光性絶縁材料を使用し、この絶
縁材料が感光性であることを利用して導体配線パタ−ン
上の絶縁材料を化学的に除去し、その上で機械的研磨を
行うことを特徴としたものであり、これにより絶縁層厚
の均一性を向上させ、絶縁層の信頼性を向上させる印刷
配線板の製造方法を提供するものである。
In order to solve the above-mentioned problems and drawbacks of the prior art and to achieve the above object, the present invention adopts a double coating means as in the above-mentioned known example. In particular, a photosensitive insulating material is used as the insulating layer, and the photosensitive material of this insulating material is used to chemically remove the insulating material on the conductor wiring pattern and then perform mechanical polishing. The present invention provides a method for manufacturing a printed wiring board that improves the uniformity of the insulating layer thickness and improves the reliability of the insulating layer.

【0017】即ち、本発明は、「印刷配線板の製造方法
において、絶縁基板上に導体配線パタ−ンの形成された
印刷配線板の上面及び下面に絶縁層を形成する際、(1)
少なくとも導体配線パタ−ンの高さと同等以上の絶縁層
を塗布する工程、(2) 導体配線パタ−ン上の絶縁層のみ
を現像除去する工程、(3) 機械的研磨手段により導体配
線パタ−ンと絶縁層を平滑にする工程、(4) 導体配線パ
タ−ン間に残った絶縁層を加熱硬化する工程、(5) 露出
した導体配線パタ−ンの銅表面を粗化する工程、(6) 所
望の厚さの絶縁層を再度塗布する工程、(7) 所望の絶縁
層パタ−ンを露光〜現像により形成する工程、(8) 露光
により生じた絶縁層の表面の光重合部分を機械的研磨手
段により研磨除去する工程、を含むことを特徴とする印
刷配線板の製造方法。」(請求項1)を要旨とするもので
ある。
That is, according to the present invention, "In the method for manufacturing a printed wiring board, when the insulating layer is formed on the upper surface and the lower surface of the printed wiring board having the conductor wiring pattern formed on the insulating substrate, (1)
At least a step of applying an insulating layer equal to or higher than the height of the conductor wiring pattern, (2) a step of developing and removing only the insulating layer on the conductor wiring pattern, (3) a conductor wiring pattern by a mechanical polishing means. Smoothing the insulating layer and the insulating layer, (4) heating and curing the insulating layer remaining between the conductor wiring patterns, (5) roughening the copper surface of the exposed conductor wiring pattern, 6) a step of re-applying an insulating layer having a desired thickness, (7) a step of forming a desired insulating layer pattern by exposure to development, (8) a photopolymerization portion of the surface of the insulating layer generated by the exposure. And a step of polishing and removing by a mechanical polishing means. (Claim 1) is the gist.

【0018】[0018]

【発明の実施の形態】本発明では、前記(1)の工程にお
ける絶縁層として、特に感光性絶縁材料を使用するもの
であり、この“感光性である”ことを利用して「マスク
を使った露光・現像」により、導体配線パタ−ン上の絶
縁材料を化学的に除去することを特徴とし、これにより
導体配線パタ−ン間を絶縁層で充填でき、しかも絶縁層
高さと導体配線パタ−ン高さとを同一にすることができ
るものである。
BEST MODE FOR CARRYING OUT THE INVENTION In the present invention, a photosensitive insulating material is particularly used as the insulating layer in the above step (1). By exposing and developing ", the insulating material on the conductor wiring pattern is chemically removed. This allows the space between the conductor wiring patterns to be filled with an insulating layer, and the height of the insulating layer and the conductor wiring pattern can be increased. -The height can be the same.

【0019】本発明において、感光性絶縁材料として
は、ネガ型又はポジ型の任意の感光性絶縁材料を使用す
ることができ、本発明で特に限定するものではない。ま
た、前記(1)の工程における絶縁層と(6)の工程のそれと
は、同一の感光性絶縁材料を用いることができ、また、
異なる材料とすることもでき、いずれも本発明に包含さ
れるものである。
In the present invention, as the photosensitive insulating material, any negative or positive type photosensitive insulating material can be used, and it is not particularly limited in the present invention. Further, the insulating layer in the step (1) and that in the step (6) can use the same photosensitive insulating material, and
Different materials are possible and all are included in the present invention.

【0020】[0020]

【実施例】以下、本発明による印刷配線板の製造方法の
一実施例を図1及び図2に基づいて説明する。なお、図
1及び図2は、本発明による印刷配線板の製造方法の一
実施例を説明する図であって、このうち図1は工程A〜
Eからなる工程順断面図であり、図2は図1の工程Eに
続く工程F〜Kからなる工程順断面図である。また、以
下の実施例における印刷配線板は、両面基板もしくは多
層基板であるが、説明を簡略化するため、一方の面につ
いてのみ説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a printed wiring board according to the present invention will be described below with reference to FIGS. 1 and 2 are views for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention, in which FIG.
FIG. 2 is a sectional view of a process sequence including step E, and FIG. 2 is a sectional view of a process sequence including steps F to K subsequent to the step E of FIG. 1. The printed wiring board in the following embodiments is a double-sided board or a multilayer board, but only one surface will be described for the sake of simplicity.

【0021】本実施例では、図1の工程A(配線パタ−
ンの形成工程)→同工程B(第一の感光性材料の塗布工
程)→同工程C(第一の感光性材料の露光工程)→同工
程D(第一の感光性材料の現像工程)→同工程E(第一
の感光性材料の研磨工程)の順より構成される。更に続
いて、図2の工程F(配線パタ−ン表面の粗化工程)→
同工程G(第二の感光性材料の塗布工程)→同工程H
(フォトビアの露光工程)→同工程J(フォトビアの現
像工程)→同工程K(第二の感光性材料の研磨工程)の
順で印刷配線板を製造する方法である。
In this embodiment, step A (wiring pattern) of FIG.
Forming step) → the same step B (first photosensitive material applying step) → the same step C (first photosensitive material exposing step) → the same step D (first photosensitive material developing step) -> The same process E (polishing process of the first photosensitive material) is included. Further subsequently, step F of FIG. 2 (step of roughening the surface of the wiring pattern) →
Same process G (second photosensitive material coating process) → same process H
This is a method of manufacturing a printed wiring board in the order of (exposure step of photo via) → the same step J (developing step of photo via) → the same step K (polishing step of second photosensitive material).

【0022】即ち、本実施例では、まず図1工程Aに示
すように、絶縁基板11上に導体配線パタ−ン12,13
(“電源供給又は接地の役割を果たすGVパタ−ン”か
らなる導体配線パタ−ン12,“信号回路パタ−ン”から
なる導体配線パタ−ン13等で構成される)を銅等の導体
材料により形成する。なお、これらの導体配線パタ−ン
12,13の形成手段としては、例えばサブトラクティブ法
あるいはアディディブ法等を用いることができる。
That is, in this embodiment, first, as shown in FIG. 1A, the conductor wiring patterns 12, 13 are formed on the insulating substrate 11.
(Consists of conductor wiring pattern 12 consisting of "GV pattern that plays a role of power supply or ground", conductor wiring pattern 13 consisting of "signal circuit pattern", etc.) It is made of a material. In addition, these conductor wiring patterns
As the means for forming 12 and 13, for example, a subtractive method or an additive method can be used.

【0023】次に、図1工程Bに示すように、導体配線
パタ−ン12,13を含む絶縁基板11上を完全に覆うよう
に、かつ導体配線パタ−ン12,13の厚み約30μmと同等
以上の厚みである30μmから40μmの厚みをもって、第
一層目の感光性絶縁材料14a(例えばチバガイギ社製プ
ロビマ−52)を塗布する。その際の塗布方法としては、
例えばスクリ−ン法やカ−テンコ−ト法等を用いること
ができる。
Next, as shown in step B of FIG. 1, the insulating wiring board 11 including the conductor wiring patterns 12 and 13 is completely covered and the thickness of the conductor wiring patterns 12 and 13 is about 30 μm. The first layer of photosensitive insulating material 14a (for example, Probima-52 manufactured by Ciba-Geigy Co., Ltd.) is applied with a thickness of 30 μm to 40 μm, which is equal to or more than the same. As the application method at that time,
For example, a screen method or a curtain coating method can be used.

【0024】続いて、図1工程Cに示すように、第一層
目の感光性絶縁材料14aの配線パタ−ン厚み以上に盛り
上がった部分を除去するため、導体配線パタ−ン12,13
の部分以外の絶縁材料をマスクフイルム15aを用いて密
着露光し光重合させる。
Subsequently, as shown in step C of FIG. 1, the conductor wiring patterns 12, 13 are formed in order to remove a portion of the photosensitive insulating material 14a of the first layer which is thicker than the wiring pattern thickness.
The insulating material other than the above portion is exposed by contact using the mask film 15a and photopolymerized.

【0025】その後、図1工程Dに示すように、光重合
していない感光性絶縁材料(即ち導体配線パタ−ン12,
13上の感光性絶縁材料14a)を1%炭酸ナトリウム水溶
液で現像除去する。なお、本実施例では、ネガ型の感光
性絶縁材料14aを用いたが、ポジ型の感光性絶縁材料を
用いて配線パタ−ン厚み以上に盛り上がった部分を光分
解させて現像除去することもできる。
Thereafter, as shown in step D of FIG. 1, a photosensitive insulating material which is not photopolymerized (that is, the conductor wiring pattern 12,
The photosensitive insulating material 14a) on 13 is developed and removed with a 1% aqueous sodium carbonate solution. In this embodiment, the negative type photosensitive insulating material 14a is used, but a positive type photosensitive insulating material may be used to photo-decompose and remove the portion raised above the wiring pattern thickness by development. it can.

【0026】現像除去後の感光性絶縁材料14aは、導体
配線パタ−ン12,13の導体エッジ部分で若干の盛り上が
りがあるため(図1工程D参照)、図1工程Eに示すよう
に、その部分を機械的研磨手段により除去し、表面を平
滑化する。上記研磨手段としては、例えばベルトサンダ
−研磨機等を用いればよく、平面度の高い研磨材例えば
三共理化学(株)製の“レジンクロスベルトRAXB”
“AA#600”を用いることにより、次に塗布する第
二層目の感光性絶縁材料14b(後記図2工程G参照)を平
滑に塗布するのに十分な平滑面を実現することができ
る。
Since the photosensitive insulating material 14a after development has a slight bulge at the conductor edge portions of the conductor wiring patterns 12 and 13 (see step D in FIG. 1), as shown in step E in FIG. The portion is removed by mechanical polishing means to smooth the surface. As the polishing means, for example, a belt sander polishing machine may be used, and a polishing material having high flatness, for example, "resin cross belt RAXB" manufactured by Sankyo Rikagaku Co., Ltd.
By using "AA # 600", it is possible to realize a smooth surface sufficient to apply the second layer of photosensitive insulating material 14b (see step G in FIG. 2 described later) to be applied next smoothly.

【0027】その後、導体配線パタ−ン12,13の厚みと
同等になった第一層目の感光性絶縁材料14aの硬度を高
めるため、熱キュア(例えば温度130℃で90分のベ−キ
ング等による熱キュア)又は紫外線キュア(例えば露光
量600mj/cm2の紫外線照射等による紫外線キュア)
のポストキュアを行う。
Thereafter, in order to increase the hardness of the photosensitive insulating material 14a of the first layer having the same thickness as that of the conductor wiring patterns 12 and 13, thermal curing (for example, baking for 90 minutes at a temperature of 130 ° C.) is performed. Heat cure) or UV cure (for example, UV cure by exposure to UV light with an exposure dose of 600 mj / cm 2 )
Perform post cure.

【0028】さらに、図2工程Fに示すように、次の工
程Gで塗布する第二層目の感光性絶縁材料14bと導体配
線パタ−ン12,13の表面の密着度を向上させる目的で、
この導体配線パタ−ン12,13の表面を過硫酸カリウム等
の薬品により粗面化し、該配線パタ−ン12,13の表面に
深さ0.1〜1μm程度の微細な凸凹を形成する。
Further, as shown in step F of FIG. 2, for the purpose of improving the degree of adhesion between the surface of the second layer of photosensitive insulating material 14b applied in the next step G and the conductor wiring patterns 12 and 13. ,
The surfaces of the conductor wiring patterns 12 and 13 are roughened with a chemical such as potassium persulfate to form fine irregularities having a depth of about 0.1 to 1 μm on the surfaces of the wiring patterns 12 and 13.

【0029】次に、図2工程Gに示すように、所望する
絶縁層厚が得られるように前記第一層目の感光性絶縁材
料14aと同一の材料である第二層目の感光性絶縁材料14
bを、スクリ−ン法やカ−テンコ−ト法などにより塗布
する。この際、その絶縁層を光重合した後の研磨除去す
る厚みを考慮して塗布することが必要である。例えば、
導体配線パタ−ン12,13上の絶縁層厚を50μmに設定し
たい場合、第一層目の絶縁層(第一層目の感光性絶縁材
料14a)と導体配線パタ−ン12,13の高さは同じ高さと
なっているため、所望とする配線パタ−ン上の絶縁層厚
50μmに研磨除去される厚み10μmを加算した60μmの
厚みの感光性絶縁材料を第二層目の感光性絶縁材料14b
として塗布すれば良い。
Next, as shown in step G of FIG. 2, a second layer of photosensitive insulating material, which is the same material as the first layer of photosensitive insulating material 14a, is formed so as to obtain a desired insulating layer thickness. Material 14
b is applied by a screen method or a curtain coating method. At this time, it is necessary to apply the insulating layer in consideration of the thickness to be removed by polishing after photopolymerization. For example,
If you want to set the insulating layer thickness on the conductor wiring patterns 12 and 13 to 50 μm, the height of the first insulating layer (the first layer of the photosensitive insulating material 14a) and the conductor wiring patterns 12 and 13 must be high. Since the height is the same, the thickness of the insulation layer on the desired wiring pattern is
The photosensitive insulating material having a thickness of 60 μm, which is obtained by adding 10 μm which is removed by polishing to 50 μm, is used as the photosensitive insulating material 14b for the second layer.
It may be applied as.

【0030】次に、層間を接続するためのフォトビア16
を形成するため、図2工程Hに示すように、フォトビア
形成用のマスクフイルム15bを用いて密着露光し、フォ
トビア16以外の部分の第二層目の感光性絶縁材料14bを
光重合させる。続いて、図2工程Jに示すように、光重
合していない部分を1%炭酸ナトリウム水溶液等で現像
除去し、フォトビア16を形成する。
Next, a photo via 16 for connecting the layers
2H, as shown in FIG. 2H, contact exposure is carried out using a mask film 15b for forming photo vias, and the second layer of photosensitive insulating material 14b other than the photo vias 16 is photopolymerized. Subsequently, as shown in Step J of FIG. 2, the photo-polymerized portion is developed and removed with a 1% sodium carbonate aqueous solution to form a photo via 16.

【0031】その後、図2工程Kに示すように、第二層
目の感光性絶縁材料14bの表層の過度に光重合した部分
(ほぼ10μm程度の厚みの部分)を機械的手段により研
磨除去して印刷配線板17を得る。上記研磨手段として
は、例えばベルトサンダ−研磨機械等を用いればよく、
平面度の高い研磨材、例えば三共理化学(株)製の“レジ
ンクロスベルトRAXB”“AA#600”を用いる。
Then, as shown in step K of FIG. 2, the excessively photopolymerized portion (thickness of about 10 μm) of the surface layer of the second layer of photosensitive insulating material 14b is removed by polishing by mechanical means. The printed wiring board 17 is obtained. As the polishing means, for example, a belt sander polishing machine or the like may be used,
An abrasive having high flatness, for example, "resin cross belt RAXB""AA#600" manufactured by Sankyo Rikagaku Co., Ltd. is used.

【0032】従来法では、配線パタ−ン密度の影響によ
り研磨量がばらついていたが、本実施例によれば、導体
配線パタ−ン12,13が第一層目の感光性絶縁材料14aに
より充填され、平滑となっているため(前掲の図1工程
E参照)、第二層目の感光性絶縁材料14bの研磨工程(図
2工程K)において、バラツキのない研磨が実施でき、
均一な絶縁層厚を有する印刷配線板17を得ることができ
る。
In the conventional method, the polishing amount varies due to the influence of the wiring pattern density, but according to this embodiment, the conductor wiring patterns 12 and 13 are formed by the first layer photosensitive insulating material 14a. Since it is filled and is smooth (see step E in FIG. 1 above), it is possible to perform uniform polishing in the polishing step (FIG. 2 step K) of the second layer photosensitive insulating material 14b,
The printed wiring board 17 having a uniform insulating layer thickness can be obtained.

【0033】以上、本発明に係る印刷配線板の製造方法
の一実施例について詳細に説明したが、本発明は、上記
実施例にのみ限定されるものではなく、前記した本発明
の要旨内で種々の変更が可能であり、これらも本発明に
包含されるものである。
Although one embodiment of the method for manufacturing a printed wiring board according to the present invention has been described above in detail, the present invention is not limited to the above-mentioned embodiment, and is within the scope of the present invention described above. Various modifications are possible, and these are also included in the present invention.

【0034】[0034]

【発明の効果】本発明は、以上詳記したとおり、導体配
線パタ−ン上に絶縁層を形成する工程を含む印刷配線板
の製造方法において、該絶縁層として感光性絶縁材料を
使用し、この絶縁材料が感光性であることを利用して導
体配線パタ−ン上の絶縁材料を化学的に除去し、その上
で機械的研磨を行うことを特徴とし、これにより、 ・配線パタ−ン間を絶縁層で充填でき、なおかつ絶縁層
高さと配線パタ−ン高さを同一にでき、 ・第2層目の絶縁材料を塗布する際、平滑な塗布が可能
になると共にパタ−ン間が絶縁層で充填されているか
ら、配線パタ−ンの粗密による研磨圧力差が生じず、均
一な研磨が可能となる効果が生じ、その結果、 ・絶縁層厚の均一性を向上させ、絶縁層の信頼性を向上
させ得る印刷配線板の製造方法を提供することができる
効果が生じる。
As described in detail above, the present invention is a method for manufacturing a printed wiring board including a step of forming an insulating layer on a conductor wiring pattern, wherein a photosensitive insulating material is used as the insulating layer, Utilizing the fact that the insulating material is photosensitive, the insulating material on the conductor wiring pattern is chemically removed, and mechanical polishing is performed on the insulating material. The space can be filled with an insulating layer, and the height of the insulating layer and the height of the wiring pattern can be made the same. ・ When applying the insulating material of the second layer, smooth application is possible and the space between the patterns is Since it is filled with the insulating layer, the polishing pressure difference due to the density of the wiring pattern does not occur, and the effect that uniform polishing can be achieved is obtained. As a result, To provide a method for manufacturing a printed wiring board that can improve the reliability of printed circuit boards Can effect occurs.

【0035】そして、本発明の方法によれば、従来、回
路密度が密な部分(例えばGVパタ−ン又はライン/ス
ペ−ス=100/150μmに代表される高密度回路パタ−ン
部)では、研磨量が5〜10μm程度と少なく、回路密度
が粗な部分(例えば単独回路パタ−ン部等)では、研磨
量が15〜25μm程度と多いため、配線パタ−ン上の絶縁
層厚精度は±10μm程度であったものが、回路密度に関
係なく均一に研磨可能となったため、パタ−ン上の絶縁
層厚精度を±5μmに制御できるという効果が生じる。
According to the method of the present invention, conventionally, in a portion having a high circuit density (for example, a GV pattern or a high-density circuit pattern portion represented by line / space = 100/150 μm). The polishing amount is as small as about 5 to 10 μm, and the polishing amount is large at about 15 to 25 μm in a portion where the circuit density is rough (for example, a single circuit pattern portion), so the insulation layer thickness accuracy on the wiring pattern is high. Was about ± 10 μm, but since it was possible to polish it uniformly regardless of the circuit density, there is an effect that the accuracy of the insulating layer thickness on the pattern can be controlled to ± 5 μm.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による印刷配線板の製造方法の一実施例
を説明する図であって、工程A〜Eからなる工程順断面
図。
FIG. 1 is a diagram for explaining one embodiment of a method for manufacturing a printed wiring board according to the present invention, which is a cross-sectional view in order of steps A to E.

【図2】図1工程Eに続く工程F〜Kからなる工程順断
面図。
2A to 2C are sectional views in order of the processes, including the processes F to K following the process E in FIG.

【図3】ビルドアップによる多層印刷配線板の製造工程
における従来法を説明するための工程A〜Eからなる工
程順断面図。
FIG. 3 is a cross-sectional view in order of the processes, which includes processes A to E for explaining a conventional method in a process for manufacturing a multilayer printed wiring board by buildup.

【図4】2度塗り手段を採用した公知例による絶縁層形
成を説明するための工程A〜Fからなる工程順断面図。
4A to 4C are cross-sectional views in order of steps including steps A to F for explaining formation of an insulating layer according to a known example that adopts a double coating means.

【符号の説明】[Explanation of symbols]

11 絶縁基板 12 導体配線パタ−ン(GVパタ−ン) 13 導体配線パタ−ン(信号回路パタ−ン) 14a 第一層目の感光性絶縁材料 14b 第二層目の感光性絶縁材料 15a マスクフイルム 15b マスクフイルム(フォトビア形成用) 16 フォトビア 17 印刷配線板 31 絶縁基板 32,33 導体配線パタ−ン 34 感光性絶縁材料 35 マスクフイルム 36 フォトビア 37 印刷配線板 41 絶縁基板 42,43 導体配線パタ−ン 44a 第一層目の感光性絶縁材料 44b 第二層目の感光性絶縁材料 45 マスクフイルム 46 フォトビア 47 印刷配線板 11 Insulating Substrate 12 Conductor Wiring Pattern (GV Pattern) 13 Conductor Wiring Pattern (Signal Circuit Pattern) 14a First Photosensitive Insulating Material 14b Second Layer Photosensitive Insulating Material 15a Mask Film 15b Mask film (for photo via formation) 16 Photo via 17 Printed wiring board 31 Insulating substrate 32, 33 Conductor wiring pattern 34 Photosensitive insulating material 35 Mask film 36 Photo via 37 Printed wiring board 41 Insulating substrate 42, 43 Conductor wiring pattern 44a First layer photosensitive insulating material 44b Second layer photosensitive insulating material 45 Mask film 46 Photovia 47 Printed wiring board

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 印刷配線板の製造方法において、絶縁基
板上に導体配線パタ−ンの形成された印刷配線板の上面
及び下面に絶縁層を形成する際、(1) 少なくとも導体配
線パタ−ンの高さと同等以上の絶縁層を塗布する工程、
(2) 導体配線パタ−ン上の絶縁層のみを現像除去する工
程、(3) 機械的研磨手段により導体配線パタ−ンと絶縁
層を平滑にする工程、(4) 導体配線パタ−ン間に残った
絶縁層を加熱硬化する工程、(5) 露出した導体配線パタ
−ンの銅表面を粗化する工程、(6) 所望の厚さの絶縁層
を再度塗布する工程、(7) 所望の絶縁層パタ−ンを露光
〜現像により形成する工程、(8) 露光により生じた絶縁
層の表面の光重合部分を機械的研磨手段により研磨除去
する工程、を含むことを特徴とする印刷配線板の製造方
法。
1. A method for manufacturing a printed wiring board, wherein when forming an insulating layer on the upper surface and the lower surface of a printed wiring board having a conductor wiring pattern formed on an insulating substrate, (1) at least a conductor wiring pattern The step of applying an insulating layer equal to or higher than the height of
(2) Step of developing and removing only the insulating layer on the conductor wiring pattern, (3) Step of smoothing the conductor wiring pattern and the insulating layer by mechanical polishing means, (4) Between conductor wiring patterns Step of heating and curing the remaining insulating layer, (5) Step of roughening the copper surface of the exposed conductor wiring pattern, (6) Step of re-applying an insulating layer of a desired thickness, (7) Desired Printed wiring, which comprises a step of forming an insulating layer pattern of (1) by exposure to development, and (8) a step of polishing and removing a photopolymerized portion of the surface of the insulating layer generated by exposure by mechanical polishing means. Method of manufacturing a plate.
【請求項2】 前記請求項1の(1)及び(6)の工程におけ
る絶縁層が、感光性絶縁材料からなることを特徴とする
請求項1に記載の印刷配線板の製造方法。
2. The method for manufacturing a printed wiring board according to claim 1, wherein the insulating layer in the steps (1) and (6) of claim 1 is made of a photosensitive insulating material.
JP7227076A 1995-08-11 1995-08-11 Manufacturing method of printed wiring board Expired - Fee Related JP2748895B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7227076A JP2748895B2 (en) 1995-08-11 1995-08-11 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7227076A JP2748895B2 (en) 1995-08-11 1995-08-11 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH0955577A true JPH0955577A (en) 1997-02-25
JP2748895B2 JP2748895B2 (en) 1998-05-13

Family

ID=16855146

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09321412A (en) * 1996-05-27 1997-12-12 Noda Screen:Kk Manufacture of printed wiring board
JPH1169684A (en) * 1997-08-14 1999-03-09 Asahi Chem Ind Co Ltd Printed coil for actuator
US6165544A (en) * 1998-01-09 2000-12-26 Noda Screen Co., Ltd. Method of exposure of photo-curing resin applied to printed circuit board
WO2003100850A1 (en) * 2002-05-28 2003-12-04 Hitachi Chemical Co., Ltd. Substrate, wiring board, semiconductor package-use substrate, semiconductor package and production methods for them
JP2004071946A (en) * 2002-08-08 2004-03-04 Hitachi Chem Co Ltd Wiring substrate, substrate for semiconductor package, semiconductor package, and their manufacturing method
JP2013008809A (en) * 2011-06-24 2013-01-10 Ngk Spark Plug Co Ltd Wiring board manufacturing method
JP2016184647A (en) * 2015-03-26 2016-10-20 住友ベークライト株式会社 Method of manufacturing organic resin substrate, organic resin substrate, and semiconductor device
JP2018060918A (en) * 2016-10-05 2018-04-12 株式会社ディスコ Method for manufacturing wiring board
JP2018060906A (en) * 2016-10-05 2018-04-12 株式会社ディスコ Method for manufacturing wiring board
JP2018064001A (en) * 2016-10-11 2018-04-19 株式会社ディスコ Method for manufacturing wiring board
US10468314B2 (en) 2017-03-02 2019-11-05 Mitsubishi Electric Corporation Semiconductor power module and power conversion apparatus
JP2019204974A (en) * 2019-08-21 2019-11-28 住友ベークライト株式会社 Method of manufacturing organic resin substrate, organic resin substrate, and semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH033298A (en) * 1989-05-31 1991-01-09 Ibiden Co Ltd Multilayer printed circuit board and manufacture thereof
JPH0442992A (en) * 1990-06-06 1992-02-13 Fujitsu Ltd Forming method for conductor pattern multilayer structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH033298A (en) * 1989-05-31 1991-01-09 Ibiden Co Ltd Multilayer printed circuit board and manufacture thereof
JPH0442992A (en) * 1990-06-06 1992-02-13 Fujitsu Ltd Forming method for conductor pattern multilayer structure

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09321412A (en) * 1996-05-27 1997-12-12 Noda Screen:Kk Manufacture of printed wiring board
JPH1169684A (en) * 1997-08-14 1999-03-09 Asahi Chem Ind Co Ltd Printed coil for actuator
US6165544A (en) * 1998-01-09 2000-12-26 Noda Screen Co., Ltd. Method of exposure of photo-curing resin applied to printed circuit board
US6583849B1 (en) 1998-01-09 2003-06-24 Noda Screen Co., Ltd. Apparatus for exposure of photo-curing resin applied to printed circuit board
WO2003100850A1 (en) * 2002-05-28 2003-12-04 Hitachi Chemical Co., Ltd. Substrate, wiring board, semiconductor package-use substrate, semiconductor package and production methods for them
JP2004071946A (en) * 2002-08-08 2004-03-04 Hitachi Chem Co Ltd Wiring substrate, substrate for semiconductor package, semiconductor package, and their manufacturing method
JP2013008809A (en) * 2011-06-24 2013-01-10 Ngk Spark Plug Co Ltd Wiring board manufacturing method
JP2016184647A (en) * 2015-03-26 2016-10-20 住友ベークライト株式会社 Method of manufacturing organic resin substrate, organic resin substrate, and semiconductor device
JP2018060918A (en) * 2016-10-05 2018-04-12 株式会社ディスコ Method for manufacturing wiring board
JP2018060906A (en) * 2016-10-05 2018-04-12 株式会社ディスコ Method for manufacturing wiring board
JP2018064001A (en) * 2016-10-11 2018-04-19 株式会社ディスコ Method for manufacturing wiring board
US10468314B2 (en) 2017-03-02 2019-11-05 Mitsubishi Electric Corporation Semiconductor power module and power conversion apparatus
JP2019204974A (en) * 2019-08-21 2019-11-28 住友ベークライト株式会社 Method of manufacturing organic resin substrate, organic resin substrate, and semiconductor device

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