JPH09319330A - Driving method for plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the contrast by setting such subfields that the ratio of sustained discharge frequency becomes larger just before a subfield in which all writing discharge and erasing discharge are not performed to reduce the number of times of all writing discharges and ereasing discharges in all writing and erasing periods in one field. SOLUTION: In all writing and erasing periods 1 provided in respective subfields SF2∼SF8c, wall electric charges are formed by performing discharges in all cells and by generating charged particles. In address periods 2, whether sustained discharges are to be performed in sustained discharge periods 3 by performing discharges or not are selected. Then, subfields are arranged from the beginning of the field in the order of subfields SF2∼SF8c and the subfield SF1a equivalent to the lowest order in which the number of times of sustained discharges is smallest and which does not have an all writing and erasing period 1 is set at right after the subdield SF8c equivalent to the highest order in which the number of times of sustained discharges is largest. Thus, contrast is enhanced by lowering luminance at the time of a black level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix type display panel composed of a set of display elements (cells) having a memory function, particularly an AC type plasma display panel (PDP), which has a gray scale. The present invention relates to a driving method for displaying.

[0002]

2. Description of the Related Art In a conventional AC type plasma display panel, one field period is, for example, disclosed in Japanese Patent Laid-Open No. 6186927.
As disclosed in the publication, it is divided into a plurality of subfields, and each of the subfields is composed of a full write / erase period, an address period, and a sustain discharge period. The sustain discharge period of each subfield is determined by the number of repetitions of the sustain discharge weighted with a binary code, for example, 1: 2: 4: 8: ...: 128, and the number of emission times within one field period. The gradation is displayed by selecting and combining. In the entire write / erase period, all write and erase discharges are performed in all cells, charged particles are generated on the address electrodes, and the sustain discharge is performed a preset number of times only in the cells in which the address discharge is performed in the address period. It emits light and displays gradation. Therefore, there is always a full write / erase period in which all write discharges and erase discharges are performed in each subfield.

[0003]

In such a conventional gray scale display method, regardless of the gray scale level to be displayed, the number of cells, etc., the total number of write / erase periods is equal to the number of subfields within one field period. Existence exists, and all writing discharges and erasing discharges are performed in all cells to emit light. Therefore, there is a problem that light emission is performed even when the gradation level is 0, that is, black display, and the contrast is lowered.

An object of the present invention is to provide a gradation display method for a plasma display panel, which aims to improve the contrast by reducing the number of all write discharges and erase discharges without reducing the number of subfields in one field. To provide.

[0005]

According to the present invention, one or more subfields that do not have a full write / erase period, that is, do not perform a full write discharge and an erase discharge are set, and a subfield that does not perform a full write discharge and an erase discharge is set. By setting a subfield in which the number of sustain discharges is larger than that of the field immediately before the subfield in which the full write discharge and the erase discharge are not performed, all write discharges and erases in the entire write and erase periods in one field are performed. By reducing the number of discharges and reducing the brightness during black display,
Achieve improved contrast.

Specifically, immediately after the subfield (MSF) corresponding to the highest number of sustain discharges and having the highest number of sustain discharges, the subfield (L) corresponding to the lowest and lowest number of sustain discharges is generated.
(SF) is set to eliminate all writing discharge and erasing discharge of the LSF, so that the number of light emission of all writing discharge and erasing discharge in one field is reduced, the brightness at the black level is lowered, and the contrast is improved. To be realized.

Alternatively, one subfield is set immediately after the MSF by setting a subfield corresponding to one higher than the LSF and eliminating all write discharges and erase discharges of the subfield corresponding to one higher than the LSF. The total number of writing discharges and erasing discharges is reduced, and the contrast is improved.

Alternatively, by setting the LSF immediately after the subfield corresponding to one lower than the MSF and eliminating all the write discharges and the erase discharges of the LSF, all the write discharges and the erase discharges in one field are eliminated. The number of times of light emission is reduced, and the contrast is improved.

Alternatively, immediately after the subfield corresponding to one lower than the MSF, a subfield corresponding to one higher than the LSF is set, and all write discharges of the subfield corresponding to one higher than the LSF and By eliminating the erase discharge, the number of light emission of all write discharge and erase discharge in one field is reduced, and the contrast is improved.

Alternatively, when the number of the MSFs is plural, the LSF is set immediately after one of the MSFs, and the LSs are set.
By eliminating all write discharge and erase discharge of F, 1
The number of light emission of all writing discharge and erasing discharge in the field is reduced, and the contrast is improved.

In order to improve the contrast, the time of each subfield within one field is excluded, except for the combination of the subfield having the full writing discharge and the erasing discharge and the subfield having no full writing discharge and the erasing discharge. The arrangement is optional.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described with reference to FIGS.

FIG. 2 is an exploded perspective view showing a part of the structure of the AC type plasma display panel. The panel is configured by forming each cell having a discharge space 13 in a space sandwiched between a rear glass substrate 12 and a front glass substrate 4. A plurality of address electrodes 11 are arranged in parallel on the rear glass substrate 12, and a dielectric layer 8b is formed so as to completely cover the address electrodes 11. A partition wall 9 is formed on the dielectric layer 8b at a position between two address electrodes 11 in parallel with the address electrode 11. The stripe-shaped grooves formed by the partition walls 9 and the dielectric layer 8b on the rear glass substrate 12 are fluorescers 10R, 10G, and 10B that emit red, green, and blue respectively by irradiation of ultraviolet rays. It is applied on the wall surface of the partition wall and the dielectric layer 8b in each case. On the other hand, on the front glass substrate 4, an X transparent electrode 5a and a plurality of Y transparent electrodes 6a are formed in parallel in a direction orthogonal to the address electrodes 11 formed on the rear glass substrate 12. Further, an X bus electrode 5b and a Y bus electrode 6b are formed on the X transparent electrode 5a and the Y transparent electrode 6a, respectively. A dielectric layer 8a is formed so as to completely cover the X transparent electrode 5a, the Y transparent electrode 6a, the X bus electrode 5b, and the Y bus electrode 6b, and a protective film (MgO Etc.) 7 are formed. The rear glass substrate side and the front glass substrate side are arranged on the partition wall 9 on the rear glass substrate 12 in the direction of the arrow in FIG.
The upper protective film 7 is fitted so as to contact. A pair of X electrode 5 and Y electrode 6 such that the bus electrode is outside the transparent electrode.
A groove between the barrier ribs between them forms a discharge space 13 of one cell. Further, a predetermined gas is sealed between the front plate and the back plate.

FIG. 3 shows a wiring diagram in the panel. The X electrode 5 is connected outside the cell with one end all connected in common,
Or it is divided into several blocks and connected in common, and a common drive voltage is applied, but Y electrodes Y1 to Ym (m is
The number of Y electrodes) and the address electrodes A1 to An (n is the number of address electrodes) are individually arranged, and different drive waveforms can be applied to each.

FIG. 4 shows an embodiment of a conventional subfield driving method. Horizontal axis is time, vertical axis is Y electrode Y
Represents 1 to Ym. Here, one field consists of eight subfields SF1 to SF8, and the subfields are set in order from SF1 to SF8 from the beginning of one field.

FIG. 5 shows the structure of a drive waveform of one subfield. The subfield 20 is composed of an entire write / erase period 1, an address period 2, and a sustain discharge period 3, and all the subfields have the same structure. The entire write / erase period 1 and the address period 2 each require the same time in each subfield. For example, the time of the address period 2 is determined by the number of Y electrodes and the scan pulse cycle between the Y electrodes. The sustain discharge period 3 is determined by the number of sustain discharge pulses.

Further, in FIG. 5, in the entire write / erase period 1 provided in each subfield, discharge is performed between the X and Y electrodes in all cells to generate charged particles to form wall charges. In the address period 2, the discharge is performed between the Y electrode and the address electrode to select whether to perform the sustain discharge in the sustain discharge period 3 in the cell. Subfields SF1 to SF8
The number of sustain discharge pulses NSF1 to NSF8 is given to NSF1: to: NSF8 = 1: 2: 4: 8: to: 128.
Then, it is possible to realize 256 gradation display by combining these subfields.

FIG. 1 shows an embodiment of a driving method for realizing the present invention. In the figure, the sustain discharge frequency ratio of SF2 to SF8 is NSF2: to:
NSF8 = 2: 4: 8: to: 128 and the explanation is omitted. Here, SF2 to SF8 are arranged in order from the beginning of the field,
Immediately after the subfield SF8, which corresponds to the highest number of times of the most sustain discharge, corresponds to the lowest number of the least number of sustain discharges, and the sustain discharge frequency ratio is NSF2: to: NSF8 = 2: 4: 8:
The subfield SF1a is set to 1 for 128: 128 and does not have the entire write / erase period.

FIG. 6 is a part of the drive waveform of the conventional drive method shown in FIG. 4, wherein the horizontal axis represents time and the vertical axis represents voltage. In FIG. 6, drive waveforms applied to the address electrodes A1 to An, the X electrodes, the Y1, Y2, and Ym electrodes are shown in order from the top. Here, the total write / erase period of SF8, which is the sub-field MSF having the largest number of sustain discharges in a certain field, and SF1 ′, which is the first LSF having the smallest number of sustain discharges in the next field, are shown. In the all write / erase period 1 of SF8, all write pulses 15 are applied to the X electrode 5 and all Y electrodes Y1 to Y
A thin line erasing pulse 16 is applied to m. The address period 2 is set after the entire write / erase period 1, and each Y electrode Y1
Address pulses 14-1 to 14-m are applied to the address electrodes A1 to An according to the selection of light emission, in time correspondence with the scan pulses 17-1 to 17-m applied to Ym. In the sustain discharge period 3 immediately after the address discharge period 2, the sustain discharge pulse 18 is applied to the X electrode 5 and the sustain discharge pulse 19 is applied to the Y electrodes Y1 to Ym alternately. After the sustain discharge period 3 of SF8, which is this subfield MSF, the subfield LSF of the next field
SF1 'which is the total write / erase period 1'is set,
After that, the same operation as the SF8 is performed.

FIG. 7 shows a part of drive waveforms of an embodiment of the drive method of the present invention. The horizontal axis represents time and the vertical axis represents voltage. In FIG. 7, address electrodes A1, X electrodes, Y1, Y are sequentially arranged from the top.
The drive waveforms applied to the 2, Y3, and Y4 electrodes are shown. Here, a part of the address period and the sustain discharge period of SF8c, which is the subfield MSF with the highest sustain discharge frequency of a certain field, and SF1a, which is the LSF with the lowest sustain discharge frequency that does not have the entire write / erase period immediately after that, are shown. Shows. Y
Similar to FIG. 6, there are m electrodes in total, but here, as an example, only four electrodes, Y1 to Y4, are described. Also, the total number of address electrodes is n
There are books, but here, as an example, only one A1 is described.

In the all write / erase period 1 of SF8, the all write pulse 15 is applied to the X electrode 5, and the thin line erase pulse 16 is applied to all the Y electrodes after the all write pulse. The address period 2 is set after the all-write / erase period 1 and each Y
Scan pulses 17-1 to 17-4 are applied to the electrodes Y1 to Y4, and address electrodes are simultaneously formed corresponding to the scan pulses 17-1 and 17-2.
Address pulses 14-1 and 14-2 are applied to A1.
In this case, the address pulses 14-3 and 14-4 corresponding to the scan pulses 17-3 and 17-4 are not applied to the address electrode A1. In the sustain discharge period 3 immediately after the address discharge period 2,
A sustain discharge pulse 18 is applied to the X electrode 5 and a sustain discharge pulse 19 is applied to the Y electrodes Y1 to Y4 alternately. After the sustain discharge period 3c of SF8c that is the subfield MSF, the address period 2a of the subfield SF1a that does not have the full write / erase period is set. In the address period 2a of the subfield SF1a that does not have the full write / erase period, the scan pulses 17-1a to 17-4a are applied to the Y electrodes Y1 to Y4, respectively, in correspondence with the scan pulses 17-1a and 17-3a. At the same time, address pulses 14-1a and 14-3a are applied to the address electrode A1, respectively. In this case, the address pulses 14-2a and 14-4a corresponding to the scan pulses 17-2a and 17-4a are the address electrodes.
Not applied to A1.

A sustain discharge period immediately after the address discharge period 2a
In 3a, the sustain discharge pulse 18a is applied to the X electrodes 5 and the sustain discharge pulse 19 is applied to all the Y electrodes alternately.

An embodiment of the present invention will be described with reference to FIGS. 1 and 7.

FIG. 7 shows an example in which Y1 and Y2 of the Y electrodes Y1 to Y4 are sustain-discharged in the sustain-discharge period SF8c, and Y3 and Y4 are not sustain-discharge in the sustain-discharge period SF8c.

First, in the all write / erase period 1 in SF8, which is the subfield MSF with the largest number of sustain discharges, X
A full write pulse 15 is applied to the electrodes, and full write discharge is generated between the X electrode and the Y electrode. After this full write discharge, an erase discharge is performed by a thin line erase pulse 16 applied to the X electrodes and a Y erase pulse 21 applied to all the Y electrodes to neutralize excess wall charges to some extent.

Next, in the address period 2, address pulses 14-1 and 14-2 are simultaneously applied to the address electrode A1 corresponding to the scan pulses 17-1 and 17-2 applied to the Y1 and Y2 electrodes, respectively. Therefore, the address discharge is performed in the cell located at the intersection of the address electrode A1 and the Y electrodes Y1 and Y2.

In the sustain discharge period 3c, the sustain discharge pulses 18 are alternately applied to the X and Y electrodes in the cells located at the intersections of the address electrodes A1 and the Y electrodes Y1 and Y2 where the address discharge is performed. By 19, the sustain discharge is repeated between the X and Y electrodes in the cell.

On the other hand, the address period 2 is applied to the Y3 and Y4 electrodes.
Therefore, since the address pulse is not simultaneously applied to the address electrode A1 corresponding to the scan pulses 17-3 and 17-4,
In each cell located at the intersection of the address electrode A1 and the Y electrodes Y3 and Y4, the address discharge is not performed, and even in the sustain discharge period 3c following the address period 2, the sustain discharge pulse 18 and the sustain discharge pulse 18 that are alternately applied to the X and Y electrodes. No sustain discharge occurs due to 19.

After the sustain discharge period 3c of the subfield SF8, the scan pulse 17-1a is first applied to the Y1 electrode in the address period 2a of the subfield SF1a which has the smallest number of sustain discharge pulses and does not have the entire write / erase period. Since the address pulse 14-1a is applied to the address electrode A1 in response to the scan pulse 17-1a, the address discharge is performed in the cells located at the intersections of the address electrode A1 and the Y electrode Y1, respectively. Even during the sustain discharge period 3a following the period 2a, X
And sustain discharge pulses 18a and 19a applied alternately to the Y electrodes
Thus, the sustain discharge is performed.

On the other hand, at the Y2 electrode, the scan pulse 17-2a
Since the address pulse corresponding to is not applied, the address discharge is not performed, but since the charged particles generated by the sustain discharge in the sustain discharge period 3c of the subfield SF8 are maintained, the address electrode A1 and the Y electrode In the cell located at the intersection of Y2, the sustain discharge period of subfield SF1a
The sustain discharge is performed by the sustain discharge pulses 18a and 19a in 3a.

Meanwhile, the case of the Y3 and Y4 electrodes in which the sustain discharge is not performed in the sustain discharge period 3c of the subfield SF8 will be described.

First, the address period of subfield SF1a
In 2a, since the address pulse 14-3a corresponding to the scan pulse 17-3a applied to the Y3 electrode is applied to the address electrode A1, the address discharge is generated in each cell located at the intersection of the address electrode A1 and the Y electrode Y3. The sustain discharge is performed by the sustain discharge pulses 18a and 19a applied in the subsequent sustain discharge period 3a, and the sustain discharge is emitted.

In the Y4 electrode, the address pulse corresponding to the scan pulse 17-4a applied to the Y4 electrode is the address electrode A.
Since it is not applied to 1, the address discharge is not performed in each cell located at the intersection of the address electrode A1 and the Y electrode Y4, and even if the sustain discharge pulses 18a and 19a are applied in the following sustain discharge period 3a,
No sustain discharge is generated and no light is emitted.

Table 1 shows an example of the relationship between the input gradation level and the display gradation level in this embodiment.

[0035]

[Table 1]

First, since the sustain discharge of SF8c is not performed when the gradation level of the input signal is 0 to 127,
It is possible to control the emission of SF1a.

At a gradation level of 128 or higher, the sustain discharge of SF8c is always performed. Therefore, the sustain discharge of SF1a is also performed regardless of the presence or absence of the address discharge and emits light. Therefore, the input gradation level 128 becomes 129 at the display stage and the input gradation level 13
There are two equal display gradation levels such that 0 is 131 levels, and so on, and the actual total number of display gradations is 192.

The actual total number of display gradations is reduced to 3/4 from the combination of subfields. However, since the total write / erase period 1 can be reduced once in one field, the contrast is improved by about 14% when the number of subfields is eight. In addition, the combination of SF8c and SF1a immediately after that, which is set without having the entire write / erase period, and the subfields SF2 to SF7.
The temporal alignment up to is arbitrary for achieving contrast enhancement.

FIG. 8 shows another embodiment of the driving method for realizing the present invention. In this case, immediately after the subfield SF8c that is the MSF, the subfield SF2a that is one higher than the LSF that does not have the all-write / erase period 1 is set.

Table 2 shows an example of display gradation levels in the embodiment shown in FIG.

[0041]

[Table 2]

Therefore, although the actual total number of display gradations is 192, the contrast is improved by about 14% in the case of 8 subfields.

FIG. 9 shows another embodiment of the driving method for realizing the present invention. Here, immediately after the subfield SF7c, which is one order lower than the MSF, the entire write / erase period 1
This is a case where the subfield SF1b corresponding to the LSF having no is set.

Table 3 shows an example of display gradation levels in the embodiment shown in FIG.

[0045]

[Table 3]

Therefore, although the actual total number of display gradations is 192, the contrast is improved by about 14% in the case of 8 subfields.

FIG. 10 shows another embodiment of the driving method for realizing the present invention. Here, immediately after the subfield SF7c, which is one order lower than the MSF, the entire write / erase period is
Subfield that is one lower than the LSF that does not have 1
This is the case when SF2b is set.

Table 4 shows an example of display gradation levels in the embodiment shown in FIG.

[0049]

[Table 4]

Therefore, although the actual total number of display gradations is 192, the contrast is improved by about 14% in the case of 8 subfields.

FIG. 11 shows another embodiment of the driving method for realizing the present invention, in which there are a plurality of subfields having the same number of sustain discharges. Here, subfields having the same number of sustain discharges are set in the subfield MSF having the largest number of sustain discharges, and these are SF7, SF81, and SF82c. Further, the subfield LSF having the smallest number of sustain discharges is set as the subfield SF1a in which all write discharge and erase discharge are not performed. In addition, the ratio of the number of sustain discharges is SF1: SF2: SF3: SF4: SF5: SF6: SF7: SF81: SF82c = 1: 2:
It is supposed to be 4: 8: 16: 32: 64: 64: 64. In this example, immediately after SF82c, the subfield SF1a in which all write discharge and erase discharge are not performed is set.

Table 5 shows an example of display gradation levels in the embodiment shown in FIG.

[0053]

[Table 5]

Therefore, the actual total number of display gradations is 224
Gradation is obtained and the contrast is improved by about 12.5%.

As another embodiment, a subfield that is one subfield higher than MSF and LSF and that does not carry out full write discharge and erase discharge is set immediately after MSF. Combination, a subfield one level lower than MSF, and a subfield that is LSF and that does not perform full write discharge and erase discharge.
It is easily conceivable that there are a plurality of combinations of subfields, such as a combination of subfields that is set immediately after a subfield that is one level lower than MSF in the same field.

The present invention is not limited to eight subfields, but is not limited to the number of subfields forming one field.

Further, in the present invention, the sustain discharge frequency ratio of each subfield is not limited to that given by a binary code.

[0058]

According to the present invention, the number of all write / erase periods per field can be reduced, so that the number of all write discharges and erase discharges can be reduced and the contrast can be improved. You can

[Brief description of drawings]

FIG. 1 is a SF showing an embodiment of a driving method for realizing the present invention.
8 is a drive timing chart showing the configuration of each subfield in which SF1 that does not have a full write / erase period is set immediately after 8.

FIG. 2 is an exploded perspective view showing a part of the structure of an AC type plasma display panel.

FIG. 3 is an explanatory diagram showing a positional relationship of each electrode in an AC type plasma display panel.

FIG. 4 is a drive timing chart showing the configuration of each subfield, which is an example of a conventional drive method.

FIG. 5 is a drive timing chart showing the configuration of drive waveforms in one subfield.

FIG. 6 is a drive voltage waveform diagram of an example of a conventional drive method.

FIG. 7 is a drive voltage waveform diagram of an embodiment of the drive method of the present invention.

FIG. 8 is a drive timing chart showing the configuration of each subfield in which SF2 having no write / erase period is set immediately after SF8, which is an embodiment of the driving method of the present invention.

FIG. 9 is a drive timing chart showing the configuration of each subfield in which SF1 having no full write / erase discharge is set immediately after SF7, which is an embodiment of the drive method of the present invention.

FIG. 10 is an example of the driving method according to the present invention, in which SF2 having no full-program erase discharge is set immediately after SF7.
7 is a drive timing chart showing the configuration of each subfield.

FIG. 11 is a drive timing chart showing the configuration of each subfield in the case where there are three MSFs having the same number of sustain discharges, which is one embodiment of the drive method of the present invention.

[Explanation of symbols]

 1 ... All write / erase period, 2 ... Address period, 3 ... Sustain discharge period, 22 ... Field, SF1 to SF8, SF81 ... Subfield, SF8c ... SF8 set immediately before subfield, Y1 to Ym ... Each Y electrode .

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Sasaki 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi Ltd. Multimedia System Development Headquarters

Claims (5)

[Claims] 1. A front glass substrate provided with a common electrode whose one end is commonly connected and a first independent electrode group arranged in parallel to the common electrode, and a three-dimensional structure perpendicular to the electrode group arranged on the front glass substrate. Arranging a second independent electrode group intersecting, the back glass substrate in a position parallel to the front glass substrate, the discharge gas is sealed in the space between the front glass substrate and the back glass substrate. In a plasma display panel having a memory function consisting of 1 field in a driving method for performing all writing discharge and erasing discharge for equalizing the state of charged particles in all display elements for each of a plurality of subfields constituting one field At least one subfield of the plurality of subfields constituting the plasma display pattern is characterized by not performing full write discharge and erase discharge. How to drive the flannel. 2. The method for driving a plasma display panel according to claim 1, wherein the subfield in which all write discharges and erase discharges are not performed corresponds to the lowest subfield having the smallest number of sustain discharges. 3. The driving method for a plasma display panel according to claim 1, wherein the subfields in which all write discharges and erase discharges are not performed correspond to the subfields having the least number of sustain discharges and the ones from the least significant to the most significant. 4. The subfield according to claim 2 or claim 3, wherein the temporal position in the field of the lowest subfield having the smallest number of sustain discharges corresponds to the highest subfield having the largest number of sustain discharges. Immediately after the method of driving the display panel. 5. The time position in the field of the subfield corresponding to the lowest in the number of sustain discharges is one lower than the highest in the number of sustain discharges. A driving method of a plasma display panel immediately after a corresponding subfield.