KR100251154B1 - Ac plasma display apparatus and method for driving panel of the same - Google Patents

Abstract

PURPOSE: An alternating current plasma display panel and a driving method thereof are provided to reduce an address period for one frame driving time and increase a sustain period by performing an addressing operation twice with respect to one scan. CONSTITUTION: A three color electrode surface discharge PDP(110) includes 480 scan electrodes(Y1¯Y480) and sustain electrodes(X1¯X480), the first 1920 address electrodes(A1¯A1920), and the second 1920 address electrodes(A1'¯A1920'). A Y driver(120) supplies a drive pulse to the 480 scan electrodes(Y1¯Y480). An X driver(130) supplies the drive pulse to the 480 sustain electrodes(X1¯X480). The first address driver(140a) supplies the drive pulse to the first 1920 address electrodes(A1¯ A1920). The second address driver(140b) supplies the drive pulse to the second 1920 address electrodes(A1'¯A1920'). A controller(150) generates and outputs the driving pulse and a control signal according to a clock, horizontal synchronous, and vertical synchronous signals to the Y driver(120), the X driver(130), the first address driver(140a), and the second address driver(140b).

Description

AC plasma display device and panel driving method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an alternating current plasma display device and a method for driving the panel, and in particular, an alternating current plasma display device for displaying gray scale images on a three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge PDP). And a panel driving method thereof.

As the modern society is called the information society, the importance of display increases with the development and spread of information processing system, and its kinds are gradually diversified.

CRT (Cathode Ray Tube), which has been the most used as a display for a long time, has various problems such as large size, high operating voltage, and distortion of display, so it is suitable for the recent trend of aiming to enlarge and planarize the screen. In recent years, research and development of various flat panel displays having a matrix structure have been actively conducted.

Among the flat panel displays, PDP (Plasma Display Panel) is in the spotlight as the next generation large screen flat panel display. The PDP has a large screen and a small thickness, and has been applied to wall-mounted televisions, home theater displays, and various monitors.

In addition, according to the type of the PDP and the driving voltage is largely divided into AC (AC) PDP and DC (Direct Current) PDP, the AC PDP is driven by a sine wave AC voltage or a pulse voltage, DC PDP Is driven by a direct current voltage.

FIG. 1 includes a color three-electrode surface discharge PDP with a resolution of 640 × 480, which is one of the most commonly used AC PDPs, to display a moving image or a still image on the three-electrode surface discharge PDP. A simplified configuration of an alternating plasma display is shown.

In FIG. 1, reference numeral 10 denotes 480 scan electrodes Y ₁ to Y ₄₈₀ and 480 sustain electrodes X ₁ to X ₄₈₀ arranged alternately in parallel with each other, and the scan electrodes X ₁ to X. ₄₈₀ ) and a three-electrode surface discharge PDP having ₁₉₂₀ address electrodes A ₁ to A ₁₉₂₀ arranged to be orthogonal to each other with a predetermined space interposed therebetween with the sustain electrodes X ₁ to X ₄₈₀ .

In the above description, the 480 sustain electrodes X ₁ to X ₄₈₀ are connected to each other in parallel by one common sustain electrode X ′, and the 480 scan electrodes Y ₁ to Y ₄₈₀ are independent from each other. A cell is formed at each intersection of the scan electrodes Y ₁ to Y ₄₈₀ , the sustain electrodes X ₁ to X ₄₈₀ , and the 1920 address electrodes A ₁ to A ₁₉₂₀ , so that the three-electrode surface discharge PDP 10 screen It consists of 480x1920 matrix R (Red), G (Green), and B (Blue) cells.

The configuration of each cell of the three-electrode surface discharge PDP 10 will be described by taking the cells of the i-th row and the j-th column shown in FIG. 2 as an example.

First, the i-th sustain electrode Y _i and the i-th sustain electrode X _{i which} are parallel to each other are formed on one surface of the front substrate 11 which is the display surface of the image, and the scan electrode Y _i and the sustain electrode ( A dielectric layer 12 is formed on X _i ) to limit the discharge current during discharge and to facilitate the generation of wall charges, and from the sputtering occurring during discharge on the dielectric layer 12, the scan electrode Y _{i is} formed. A magnesium oxide (Mg0) protective film 13 is formed to protect the sustain electrode X _i and the dielectric layer 12.

Further, the j-th address electrode A _j is formed on the opposite surface to the front substrate 11 among the back substrates 14 positioned in parallel with the front substrate 11 at a predetermined distance therebetween, and the front substrate Phosphor 16 is coated between a portion of the first and second partitions 15a and 15b which prevents inter-cell mixing and secures a discharge space between the 11 and the rear substrate 14, and discharge gas is formed inside the discharge space. Injected.

The basic driving principle of each cell of the three-electrode surface discharge PDP 10 configured as described above is to generate an address discharge between the scan electrode Y1 and the address electrode A _j so that wall charges are generated therein, and then the scan electrode ( A sustain discharge is generated between Y _i ) and sustain electrode X _i to make the discharge gas into a plasma state to generate ultraviolet rays, and the ultraviolet rays excite the phosphor 16 to generate visible light.

In addition, the reference number 20 in Figure 1 are 480 scan electrodes (Y ₁ ~ Y ₄₈₀₎ and provided to the output terminal 480 is connected to a one-to-one basis for supplying a driving pulse to the scan electrodes (Y ₁ ~Y ₄₈₀₎ 30 represents a Y drive unit, and 30 has one output terminal connected in a one-to-one correspondence with the common sustain electrode X 'to drive pulses to the 480 sustain electrodes Y ₁ to Y ₄₈₀ through the common sustain electrode X'. represents an X driver for supplying, 40 is 1920 pieces of address electrodes (a ₁ ~A ₁₉₂₀₎ and by having an output terminal 1920 coupled to a one-to-one correspondence with the address electrode for supplying a drive pulse to the (a ₁ ~A ₁₉₂₀₎ 50 denotes an address driver, and digitizes an analog image signal IMAGE that is externally input to output a digital image signal, and the digital image signal and various external inputs-a clock CLK, a horizontal synchronization signal HS, and a vertical synchronization signal. Signal (VS)-depending on It generates a variety of driving pulses to the control signal represents a control unit for supply to the Y driver 20 and the X driver 30 and the address driver 40.

The Y driver 20 includes a driving IC (Integrated Circuit) for supplying driving pulses to the electrodes according to the control signal of the controller 50. In this case, when the driving IC having 60 output pins is used, the Y driving unit 20 requires 480 output terminals in total, and thus is composed of eight driving ICs.

On the other hand, the gray scale implementation of each cell of the three-electrode surface discharge PDP 10 configured as described above is implemented through the number of discharges per unit time because the intensity of the discharge is difficult to adjust, and each frame When the number of discharges of a cell is divided into 0 to 2 ^X -1 discharges, the brightness of each cell changes according to the number of discharges during one frame, resulting in a 2 ^X gradation image on the entire screen, that is, 0 to 2 ^X -1 levels for each cell. One level of image is displayed.

One of the gradation implementation methods based on the above concept is the ADS subfield method (Addressing and Display System Sub-field method), wherein the ADS subfield method has two states in which each cell is on and off. as a binary number X 2 ^X gray-scale bit system the number of discharges for one frame by using the based with implementing (that is, the sustain discharge period) that serves as a drive X divided into different sub-fields.

FIG. 3 shows a detailed configuration diagram of one frame when implementing 256 (2 ⁸ ) gray scale according to the prior art ADS subfield method, and FIG. 4 shows the first subfield SF1 shown in FIG. A timing diagram of driving voltage waveforms applied to each electrode is shown.

First, in order to implement 256 gray scales, one frame is divided into eight subfields SF1 to SF8 as shown in FIG. 3, and each subfield SF1 to SF8 has a full write period, a full erase period, and an address. The drive is divided into a period and a sustain period.

In the entire writing period of each of the subfields SF1 to SF8, as shown in FIG. 4, discharge starts to the common sustain electrode X 'with OV applied to the ₄₈₀ scan electrodes Y _{1 to} Y ₄₈₀ . By applying a writing pulse of a voltage Vw higher than the voltage, a writing discharge is generated between the entire sustain electrodes X ₁ to X ₄₈₀ and the scan electrodes Y ₁ to Y ₄₈₀ , that is, within the discharge space of the entire cell. As the writing discharge proceeds, -wall charges are generated on the entire sustain electrodes X ₁ to X ₄₈₀ , and + wall charges are generated on the entire scan electrodes Y ₁ to Y ₄₈₀ .

Thereafter, when the Vs voltage lower than the discharge start voltage is applied to all the scan electrodes Y ₁ to Y ₄₈₀ and OV is applied to the common sustain electrode X ', the voltage of the wall charge generated immediately before is added to the entire sustain electrode. s (X ₁ ~X ₄₈₀₎ and scanning electrodes (Y ₁ ~Y ₄₈₀₎ the entire sustain electrodes up and discharge between the (X ₁ ~X ₄₈₀₎ above + the wall charges of the entire scan electrodes (Y ₁ ~Y ₄₈₀ )-Wall charges are generated respectively.

In the entire erasing period of each of the subfields SF1 to SF8, an OV erase pulse is applied to all of the scan electrodes Y ₁ to Y ₄₈₀ while a Vs voltage is applied to the common sustain electrode X '. The erase discharge is generated in the discharge space of the entire cell, thereby neutralizing the unnecessary wall charges generated immediately before.

In the address periods of the subfields SF1 to SF8, addressing of the digital image signal corresponding to each cell is sequentially performed. That is, a scan pulse of OV is applied to an arbitrary scan electrode to scan, and a write voltage (image pulse) of Va voltage is applied only to an address electrode corresponding to a cell to be turned on among the cells constituted by the scan electrode. Is applied to cause address discharge between both electrodes, and wall charge is generated inside the cell. At this time, a voltage Vs is applied to and maintained at the common sustain electrode X '. When the above process is repeatedly performed 480 times for the ₄₈₀ scan electrodes Y _{1 to} Y ₄₈₀ , the entire 480 × 1920 cells are turned on or off.

In the sustain period of each of the subfields SF1 to SF8, the voltage Vs is applied to all the scan electrodes Y ₁ to Y ₄₈₀ , and the OV voltage is applied to the common sustain electrode X 'to address the previous address period. The wall charge is added only to the cell where the discharge has occurred, so that the sustain discharge is generated therein, and then the Vs voltage is applied to the common sustain electrode X 'and OV is applied to all the scan electrodes Y ₁ to Y ₄₈₀ . To resume sustain discharge. That is, an alternating sustain pulse is applied between all sustain electrodes X ₁ to X ₄₈₀ and all scan electrodes Y ₁ to Y ₄₈₀ so that the image is displayed only in the cells turned on in the immediately preceding address period.

The voltages Vw, Vf (discharge start voltage), Vs, and Va of the driving pulses applied to the electrodes are set to values satisfying Vw>Vf>Vs> Va and Vf >> Vw-Vs, and each subfield ( The write pulse applied to the address electrodes A _{1 to} A ₁₉₂₀ during the address periods of SF1 to SF8 is _one bit of an 8-bit digital image signal (lowest bit B ₁ to highest bit B ₈ ) corresponding to each cell. The value corresponds to the value, more specifically, B ₁ during the address period of the first subfield SF1, B ₂ during the address period of the second subfield SF2, ..., 8th subfield SF8. During the address period of B ₈ is applied respectively.

In addition, as shown in FIG. 3, the entire write period, the entire erase period, and the address period of each subfield SF1 to SF8 are allocated the same time for each subfield, while the sustain period has a different time for each subfield. Is assigned (usually SF1: SF2: SF4: SF5: SF6: SF7: SF8 = 1: 2: 4: 8: 16: 32: 64: 128).

As a result, when the first to eighth subfields SF1 to SF8 are sequentially configured through the above-described detailed process, 256 grayscale images of one frame are displayed on the three-electrode surface discharge PDP 10.

However, conventionally, since the electrodes of the three-electrode surface discharge PDP have only a single addressing structure for one scan, the number of scans corresponding to the number of scan electrodes must be performed to address the entire cell. In the same way, when addressing is performed, as the number of scan electrodes increases, that is, as the resolution of the screen increases, the ratio of the address period to the driving time of one frame increases, so that the sustain period, which has the greatest influence on the screen luminance, occupies As the ratio (hereinafter referred to as efficiency of driving time) is reduced, it is difficult to realize high resolution, virtually impossible to implement gradation of 256 or more, and the brightness of the 3-electrode surface discharge PDP screen is very low. There was a problem that the practical use is difficult compared to the (Display).

For example, in the case where 256 gray scale images are displayed on the 640 × 480 resolution color three-electrode surface discharge PDP according to the prior art ADS subfield method, the front writing period and the front erasing period in one frame (16.67 ms) 300 ms (front write period and full erase period in one subfield) × 8 (number of subfields for 256 gray scale implementation) = 2.4 ms, and address period is 3 ms (scan period) × 480 (number of scan electrodes) × 8 Since the number of subfields for 256 gray scale implementation is 11.52 ms, the sustain period in one frame is 16.67 ms-11.52 ms-2.4 ms = 2.75 ms, and the efficiency of the driving time is only about 17%.

In order to solve the above problems, the present invention separates each address electrode up and down, and simultaneously scans one of the scan electrodes intersected with the upper address electrodes and one of the scan electrodes intersected with the lower address electrodes. An AC plasma display device and a method for driving the panel which shorten the address period and increase the sustain period in one frame driving time by improving the luminance of a three-electrode surface discharge PDP screen by performing two addressings for one scan. The purpose is to provide.

1 is a block diagram showing a simplified configuration of an AC plasma display device according to the prior art.

FIG. 2 is a cross-sectional view of one cell of the three-electrode surface discharge plasma display panel shown in FIG. 1 except that the front substrate is rotated by 90 °.

3 is a detailed configuration diagram of one frame when implementing 256 gray scales according to the prior art ADS subfield method.

FIG. 4 is a timing diagram of driving voltage waveforms applied to each electrode during the first subfield SF1 shown in FIG.

5 is a block diagram showing a simplified configuration of an AC plasma display device according to an embodiment of the present invention.

6 is a detailed configuration diagram of one frame when implementing 256 gray scales according to a panel driving method according to an embodiment of the present invention.

FIG. 7 is a timing diagram of driving voltage waveforms applied to each electrode during the first subfield SF1 shown in FIG.

* Explanation of symbols for main parts of the drawings

110: three-electrode surface discharge plasma display panel

Y1 'to Y ₂₄₀ ': common scan electrode X ': common sustain electrode

A1 to A ₁₉₂₀ : first address electrode A ₁ ′ to A ₁₉₂₀ ': second address electrode

120: Y drive unit 130: X drive unit

140a: first address driver 140b: second address driver

150: control unit

In order to achieve the above object, the AC plasma display device according to the present invention is arranged so as to be orthogonal with N scan electrodes which are dividedly driven by blocks and a predetermined space therebetween to form a matrix cell together with each scan electrode. An alternating plasma display panel having first and second address electrodes of Mro separated up and down; A scan driver for repeating the process of selecting each of the scan electrodes one for each block and scanning two lines at the same time; Scanning of N / 2 scan electrodes by selectively applying a write pulse to the first address electrode or the second address electrodes in a block corresponding to the scan electrodes currently selected and scanned through the scan driver And addressing means for addressing the entire cell for a period of time.

In addition, the panel driving method of the AC plasma display device according to the present invention is arranged so as to orthogonally intersect with N scan electrodes that are dividedly driven by blocks and a predetermined space therebetween to form a matrix cell together with each scan electrode. A panel driving method of an AC plasma display device displaying an image on an AC plasma display panel having M first and second address electrodes separated therefrom, wherein the scan electrodes included in each block are selected one by one for each block. Repeating the line-by-line scanning process N / 2 times, and addressing the corresponding cells by selectively applying a write pulse to the first address electrode or the second address electrodes in the block corresponding to the electrodes currently selected to be scanned. It is characterized in that the entire cell is addressed during the scan time of the / 2 scan electrode.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

5 shows a simplified configuration of an AC plasma display device according to an embodiment of the present invention.

The reference number 110 in Figure 5 are arranged parallel to each other one by one to shift the upper and the lower first, 480 scan electrodes are separately driven by two blocks (Y ₁ ~Y ₄₈₀₎ and sustain electrodes (X ₁ ~X ₄₈₀₎ and the scan electrode 480 (Y ₁ ~Y ₄₈₀₎ 240 scan electrodes included in the first block of the (Y ₁ ~Y ₂₄₀₎ and the 1920 first address electrode (a array to be perpendicular across the predetermined space, _{1 to} A ₁₉₂₀ and ₁₉₂₀ scan electrodes Y _{241 to} Y ₄₈₀ included in the second block among the ₄₈₀ scan electrodes Y _{1 to} Y ₄₈₀ are arranged orthogonally with a predetermined space therebetween. A color three-electrode surface discharge PDP having a resolution of 640x480 including the second address electrodes A ₁ ′ to A ₁₉₂₀ ′ is shown.

In the above, the 480 sustain electrodes X _{1 to} X ₄₈₀ are connected to each other in parallel by one common sustain electrode X ′, and the 480 scan electrodes Y _{1 to} Y ₄₈₀ are the same in each block. Two scan electrodes (Y ₁ and Y ₂₄₁ , Y ₂ and Y ₂₄₂ , Y ₃ and Y ₂₄₃ ,..., Y ₂₄₀ and Y ₄₈₀ ) each have 240 common scan electrodes (Y ₁ 'to Y ₂₄₀ '). Each connected in parallel, 240 × 1920 cells in a matrix form are formed by 240 scan electrodes Y _{1 to} Y ₂₄₀ and 1920 first address electrodes A _{1 to} A ₁₉₂₀ included in the first block. And 240 × 1920 cells in matrix form are formed by 240 scan electrodes Y _{241 to} Y ₄₈₀ and 1920 second address electrodes A ₁ ′ to A ₁₉₂₀ ′ included in the second block. As in the prior art, it is composed of 480 x 1920 R, G and B cells.

The configuration and basic driving principle of each cell of the three-electrode surface discharge PDP 110 is the same as the configuration and driving principle of each cell described in the related art.

The reference number 120 in Figure 5 is through a common scan electrode 240 (Y ₁ '~Y _240') and a common scan electrode 240 and having an output terminal connected to the one-to-one (Y ₁ '~Y _240') A Y driving part for supplying driving pulses to the ₄₈₀ scan electrodes Y _{1 to} Y _{480 is} shown, and 130 has one output terminal connected in a one-to-one correspondence with the common sustain electrode X 'to provide a common sustain electrode X'. X drive unit for supplying a driving pulse to the ₄₈₀ sustain electrodes (X ₁ ~ X 480) through), 140a is 1920 output terminals to which 1920 first address electrodes (A _{1 ~} A ₁₉₂₀ ) are connected in a one-to-one correspondence And a first address driver to supply driving pulses to the first address electrodes A _{1 to} A ₁₉₂₀ , and 140b is connected in a one-to-one correspondence with ₁₉₂₀ second address electrodes A ₁ ′ to A ₁₉₂₀ ′. Second output electrodes A _{1 to} A ₁₉₂₀ ′ with 1920 output terminals A second address driving unit for supplying a driving pulse, 150 represents a digital image signal by digitizing the analog image signal (IMAGE) input from the outside, the digital image signal and various external input-clock (CLK), horizontal synchronization Various driving pulses and control signals according to the signal HS and the vertical synchronizing signal VS-to generate the Y driver 120, the X driver 130, the first address driver 140a, and the second address driver 140b. Is a control unit to be supplied.

As described above, the Y driver 120 is configured as a driver IC, and each output terminal corresponds to an output pin of the driver IC. Thus, when the driver IC having 60 output pins is used as in the prior art, the Y driver 120 is used. 120 is composed of four driving ICs corresponding to 1/2 of the prior art.

When the AC plasma display device according to the embodiment of the present invention configured as described above displays 256 grayscale images on the three-electrode surface discharge PDP 110 according to the panel driving method according to the embodiment of the present invention, As follows.

FIG. 6 is a detailed configuration diagram of one frame when implementing 256 gray scales according to the panel driving method according to an exemplary embodiment of the present invention, and FIG. 7 illustrates the first subfield SF1 shown in FIG. A timing diagram of driving voltage waveforms invisible to each electrode is shown.

First, in order to implement 256 gray scales, one frame is divided into eight subfields SF1 to SF8 as shown in FIG. 6, and each subfield SF1 to SF8 has a full write period, a full erase period, and an address. The drive is divided into a period and a sustain period.

In the front write period and the front erase period of each of the subfields SF to SF8, as described in the related art, the Y driver 120 uses the 240 common scan electrodes Y ₁ ′ to Y ₂₄₀ ′ as a whole scan electrode. In the state where OV is applied to the fields Y ₁ to Y ₄₈₀ , the X driver 130 applies a write pulse of a Vw voltage to all the storage electrodes X ₁ to X ₄₈₀ through the common storage electrode X '. After the wall charges are generated inside the entire cell, the Vs voltage is applied to the common sustain electrode X 'and the entire scan electrodes Y ₁ ˜ through ₂₄₀ common scan electrodes Y ₁ ′ to Y ₂₄₀ ′. Y ₄₈₀ ), an erase pulse of OV is applied so that the internal unnecessary wall charges of the entire cell are erased.

In the address periods of the subfields SF1 to SF8, the Y driver 120, the first address driver 140a, and the second address driver 140b sequentially perform digital image signals and addressing corresponding to each cell. . That is, the Y driver 120 simultaneously scans two scan electrodes connected to each other in parallel by the common scan electrode by applying a scan pulse of OV to an arbitrary common scan electrode, and the first address driver 140a and the second scan electrode. The address driver 140b applies a write voltage of Va voltage only to an address electrode corresponding to a cell to be turned on among cells constituted by two simultaneously scanned electrodes, thereby providing an address between both electrodes of a cell to which a scan pulse and a write pulse are simultaneously applied. The discharge is caused to occur and the wall charge is generated inside the turned on cell. When the above process is repeated 240 times sequentially for the 240 common scan electrodes Y ₁ ′ to Y ₂₄₀ ′, addressing of the entire 480 × 1920 cells is completed (determined as on or off of all cells).

That is, that are connected respectively by the Y driver 130 a 240 a common scan electrodes (Y ₁ '~Y _240') sequentially supplies the scan pulse to the common scan electrodes (Y ₁ '~Y _240') to the Two scan electrodes included in different blocks are simultaneously scanned, and according to a selective scan of the ₂₄₀ scan electrodes Y ₁ to Y 240 included in the first block, the first address driver 140a includes 1920 scan electrodes. applying an address pulse selectively to the first address electrode (a ₁ ~A ₁₉₂₀₎ and constituted by the second scan electrodes of the first block (Y ₁ ~Y ₂₄₀₎ and the first address electrodes (a ₁ ~A ₁₉₂₀₎ The second address driver 140b is configured to address (on / off) the 240 × 1920 cells in the upper portion and to simultaneously scan the 240 scan electrodes Y ₂₄₁ to Y ₄₈₀ included in the second block. 1920 of second address electrodes (a ₁ '~A _1920') applying an address pulse selectively to the scan before the second block S (Y ₂₄₁ ~Y ₄₈₀₎ and during a second address electrode to address the dog 240 × 1920 cells in the lower portion constituted by (A ₁ '~A _1920') of time corresponding to 1/2 of the prior art full 480 Addresses 1920 cells.

In the sustain period of each of the subfields SF1 to SF8, the Y driving unit 120 performs the entire scan electrodes Y ₁ to Y ₄₈₀ through ₂₄₀ common scan electrodes Y ₁ ′ to Y ₂₄₀ ′ as in the conventional art. The voltage is applied to the voltage Vs, and the X driver 130 applies the OV voltage to the entire sustain electrodes X ₁ to X ₄₈₀ through the common sustain electrode X 'so that the wall charge is applied only to the cells turned on in the immediately preceding address period. It is added to the sustain discharge and up therein, and thereafter, as opposed to the previous whole sustain electrodes (X ₁ ~X ₄₈₀₎ to the sustain voltage Vs is applied to the OV to the entire scan electrodes (Y ₁ ~Y ₄₈₀₎ again Allow discharge to occur. That is, an alternating sustain pulse is applied between the entire sustain electrodes X ₁ to X ₄₈₀ and the sustain electrodes Y ₁ to Y ₄₈₀ so that the image is displayed only in the cells turned on in the immediately preceding address period.

The write pulses applied to the first address electrodes A _{1 to} A ₁₉₂₀ and the second address electrodes A ₁ ′ to A ₁₉₂₀ ′ during the address period of each subfield SF1 to SF8 are different from those of the related art. Similarly, it corresponds to one bit value among 8-bit digital image signals (least significant bit B ₁ to most significant bit B ₈ ) corresponding to each cell. More specifically, B ₁ is applied during the address period of the first subfield SF1. , B ₂ is applied during the address period of the second subfield SF2, ..., B ₈ is applied during the address period of the eighth subfield SF8.

In addition, the sustain period of each of the subfields SF1 to SF8 is assigned to each subfield (SF1 to SF8) by allocating time in a ratio of 1: 2: 4: 8: 16: 30: 64: 128 for each subfield, as in the conventional art. By applying sustain pulses proportional to the length of the sustain period allocated to each of the < RTI ID = 0.0 >), 0 to 255 levels < / RTI > Allows for brightness (256 gradations) implementation.

Meanwhile, the address period of each subfield SF1 to SF8 is reduced to 1/2 of the prior art, and the period is added to the sustain period of each subfield SF1 to SF8 as shown in FIG. Increasing the number of sustain pulses applied to each subfield SF1 to SF8 increases the luminance of the three-electrode surface discharge PDP 110 more than in the prior art, and it is possible to realize 256 gray scales.

That is, when displaying 256 gray scale images on a three-electrode surface discharge PDP with 640x480 resolution as described above, an address period within one frame (16.67 ms) is 3 ms (scan period) x 240 (number of common scan electrodes) x Since 8 (number of subfields for 256 gray scale implementation) = 5.7 ms, assigning 5.7 ms, which is shorter than the prior art (11.52 ms), to the sustain period, the sustain period in one frame becomes 2.75 ms + 5.7 ms = 8.45 ms. In addition, since the efficiency of the driving time is about 51%, which is greatly increased than the prior art (17%), the brightness of the screen is increased by three times.

In addition, if the time required to scan the entire scan electrode is reduced significantly compared to the prior art as in an embodiment of the present invention it can be easily applied to high-speed driving, such as SVGA, XGA, EWS.

On the other hand, the present invention can achieve the same effect even if the sub-frame method instead of the ADS sub-field method described above.

As described above, the AC plasma display device and the panel driving method thereof according to the present invention perform two addressing for one scan to reduce the address period within one frame driving time and to increase the sustain period relatively, thereby greatly improving the brightness of the screen. In addition, it is easy to implement a high gradation of 256 or more gradations, there is an effect that can be easily applied to high-speed driving, such as SVGA, XGA, EWS.

Claims (2)

Alternatingly arranged N scan electrodes to be dividedly driven by blocks and orthogonal to each other with a predetermined space therebetween to form a matrix cell with each scan electrode, and at the same time, M first and second address electrodes separated up and down are formed. A plasma display panel; A scan driver for repeating the process of selecting each of the scan electrodes one for each block and scanning two lines at the same time; Scanning of N / 2 scan electrodes by selectively applying a write pulse to the first address electrode or the second address electrodes in a block corresponding to the scan electrodes currently selected and scanned through the scan driver And an addressing means for addressing the entire cell for a period of time. Alternatingly arranged N scan electrodes to be dividedly driven by blocks and orthogonal to each other with a predetermined space therebetween to form a matrix cell with each scan electrode, and at the same time, M first and second address electrodes separated up and down are formed. In the method of driving a panel of an AC plasma display device which displays an image on a plasma display panel, the process of selecting one scan electrode included in each block for each block and scanning two lines at the same time is repeated N / 2 times, Addressing the entire cell during the scan time of the N / 2 scan electrodes by selectively applying a write pulse to the first address electrode or the second address electrodes in the block corresponding to the currently selected scan electrodes and addressing the corresponding cells A panel driving method of an alternating current plasma display device.

Images