KR100251152B1 - Ac plasma display apparatus and method for driving panel of the same - Google Patents

Abstract

PURPOSE: An alternating current plasma display panel and a driving method thereof are provided to reduce a production cost by driving the first and second sustain electrodes formed on a three electrode surface discharge PDP by a plurality of electrodes. CONSTITUTION: A three electrode surface discharge plasma display panel(110) includes the first and second N sustain electrodes(Y1¯YN,X1¯XN) which are arranged one by one by turns. The first α common sustain electrodes(Yc1¯Yc60) connect the second β sustain electrodes which are connected to one another in parallel. The second β common sustain electrodes(Xc1¯Xc8) connect the second α sustain electrodes included in each block which are connected to one another in parallel. The first driver sequentially supplies the first driving pulse to the first sustain electrode through the first α common sustain electrodes(Yc1¯Yc60). The second driver sequentially supplies the second driving pulse in synchronism with the first driving pulse to the second sustain electrode through the second β common sustain electrodes(Xc1¯Xc8). An address driver(140) supplies the third driving pulse to address electrodes. A controller(150) produces and transmits the digital image signal, a corresponding driving pulse, and a control signal to the first, second, and address drivers.

Description

AC plasma display device and panel driving method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an alternating current plasma display device and a method for driving the panel, and more particularly, to an alternating current plasma display device for displaying an image on a three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge PDP) and a panel driving method thereof. It is about.

As the modern society is called the information society, the importance of display increases with the development and spread of information processing system, and its kinds are gradually diversified.

CRT (Cathode Ray Tube), which has been the most used display for a long time, has various problems such as large size, high operating voltage, and distortion of display. Recently, research and development of various flat displays having a matrix structure have been actively progressed since they are not suitable.

Among the flat panel displays, PDP (Plasma Display Panel) is in the spotlight as the next generation large screen flat panel display. The PDP has a large screen and a small thickness, and has been applied to wall-mounted televisions, home theater displays, workstation monitors, and the like.

FIG. 1 simplifies an AC plasma display device having a three-electrode surface discharge PDP, which is one of the most used PDPs, to display a moving image or still image on the three-electrode surface discharge PDP screen. Configuration is shown.

The reference numeral 10 is a shift in parallel to each other, one of the holding arrangement 480 to the first electrode (Y ₁ ~Y ₄₈₀₎ and 480 of second sustain electrodes (X ₁ ~X ₄₈₀₎ and the first holding electrode in the first Fig. s (Y ₁ ~Y ₄₈₀₎ and the second sustain electrodes (X ₁ ~X ₄₈₀₎ and the address of the array 1920 to be perpendicular across the predetermined space, the electrodes (a ₁ ~A ₁₉₂₀₎ having a 640 × 480 resolution, the The color three-electrode surface discharge PDP is shown.

In the above, a cell is formed at each intersection of the 480 first and second sustain electrodes Y _{1 to} Y ₄₈₀ , X _{1 to} X ₄₈₀ , and the 1920 address electrodes A _{1 to} A ₁₉₂₀ to form a three-electrode surface discharge PDP ( 10) The screen consists of 1920 × 480 R (Red), G (Green), and B (Blue) cells in a matrix form.

The configuration of each cell of the three-electrode surface discharge PDP 10 will be described by taking the cells of the i-th row and the j-th column shown in FIG. 2 as an example.

First, the i-th first storage electrode Yi and the i-th second storage electrode Xi parallel to each other are formed on one surface of the front substrate 11 which is the display surface of the image, and the first storage electrode Yi is A dielectric layer 12 is formed on the second sustain electrode Xi to limit the discharge current during discharge and to facilitate the generation of wall charges. The first and second sustain electrodes Xi are formed from sputtering occurring during discharge on the dielectric layer 12. A magnesium oxide (MgO) protective film 13 is formed to protect the sustain electrode Yi, the second sustain electrode Xi, and the dielectric layer 12.

Further, the j-th address electrode Aj is formed on the opposite surface to the front substrate 11 among the rear substrates 14 disposed in parallel with the front substrate 11 at a predetermined distance therebetween, and the front substrate ( The first and second barrier ribs 15a and 15b are arranged between the 11 and the back substrate 14 to prevent inter-cell mixing and to secure a discharge space. The first and second barrier ribs 15a and 15a are arranged on the address electrode Aj. Phosphor 16 is applied to a part of, 15b), and discharge gas is injected into the discharge space.

The basic driving principle of each cell of the three-electrode surface discharge PDP 10 configured as described above is to generate an address discharge between the first sustain electrode Yi and the address electrode Aj to generate wall charge therein, and then Sustain discharge is generated between the sustain electrode Yi and the second sustain electrode Xi to bring the discharge gas into a plasma state to generate ultraviolet rays, and the ultraviolet rays excite the phosphor 16 to generate visible light, that is, to display an image. do.

Figure 20 is a first reference number 480 first sustain electrode (Y ₁ ~Y ₄₈₀₎ and provided to the output terminal 480 is connected to the one-to-one correspondence with the first of the first sustain electrode (Y ₁ ~Y ₄₈₀₎ from the drive pulse 30 represents a Y driving unit for supplying a to the second sustain electrodes (X _{1 to} X ₄₈₀ ) having ₄₈₀ output terminals connected in one-to-one correspondence with 480 second sustain electrodes (X ₁ to X ₄₈₀ ). represents an X driver for supplying a driving pulse 40 is a drive pulse to the address electrodes (a ₁ ~A ₁₉₂₀₎ and having an output terminal 1920 connected to the 1920 address electrodes (a ₁ ~A ₁₉₂₀₎ and one-to-one 50 denotes an address driver for supplying, digitizes an externally input analog image signal IMAGE to output a digital image signal, the digital image signal and various external inputs-a clock CLK, a horizontal synchronization signal HS, Vertical sync signal (VS)-according to The control unit generates various driving pulses and control signals and supplies them to the Y driver 20, the X driver 30, and the address driver 40.

In the above, the Y driver 20 and the X driver 30 are each composed of a driving IC (Intergrated Circuit) for supplying driving pulses to the corresponding electrodes according to the control signal of the controller 50. In this case, when the driving IC having 60 output pins is used, the Y driving unit 20 and the X driving unit 30 each require 480 output terminals, and thus each includes eight driving ICs.

On the other hand, the gray scale implementation of each cell of the three-electrode surface discharge PDP 10 configured as described above is implemented through the number of discharges per unit time because the intensity of the discharge is difficult to adjust, and each frame When the number of discharges of a cell is divided into 0 to 2 ^X -1 discharges, the brightness of each cell changes according to the number of discharges during one frame, resulting in a 2 ^X gradation image on the entire screen, that is, 0 to 2 ^X -1 levels for each cell. One level of image is displayed.

One of the gradation implementation methods based on the above concept is the ADS subfield method (Addressing and Display System sub-field method), wherein the ADS subfield method has two types of cells: on and off of each cell. A frame is divided and driven into X subfields having different discharge counts (ie, discharge sustain periods) using a binary X bit system based on operating in a state and implementing ^2X gray scales.

3 is a detailed configuration diagram of one frame when implementing 256 (2 ⁸ ) grayscale according to the ADS subfield method according to the prior art.

First, in order to implement 256 gray scales, one frame is divided into eight subfields SF1 to SF8 as shown in FIG. 3, and each subfield SF1 to SF8 is divided into a reset period, an address period, and a sustain period. Divided driving.

In the reset period of each of the subfields SF1 to SF8, a voltage higher than the discharge start voltage is written between the ₄₈₀ first sustain electrodes Y _{1 to} Y ₄₈₀ and the 480 second sustain electrodes X _{1 to} X ₄₈₀ . A wall pulse is generated inside the entire cell by applying a writing pulse, and then discharge starts between the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ . An erase pulse having a voltage lower than the voltage and having the same polarity as the wall charge just generated is applied to erase the internal unnecessary wall charge of each cell.

In the address periods of the subfields SF1 to SF8, addressing of the digital image signal corresponding to each cell is sequentially performed. That is, the first and second sustain electrode pairs are scanned by simultaneously applying a first scan pulse and a second scan pulse to an arbitrary first and second sustain electrode pairs, respectively, and to the first and second sustain electrode pairs. A write pulse (image pulse, image pulse) is applied only to an address electrode corresponding to a cell to be turned on among 1920 cells configured to generate an address discharge in the cell to which the write pulse is applied. This process is repeated for ₄₈₀ first and second sustain electrode pairs (Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ ) in sequence 480 times to address all 480 × 1920 cells. , On or off.

The write pulse applied to the address electrodes A _{1 to} A ₁₉₂₀ during the address period of each subfield SF1 to SF8 is an 8-bit digital image signal (least significant bit B ₁ to most significant bit B) corresponding to each cell. ₈ ) corresponds to one bit value, more specifically, B ₁ during the address period of the first subfield SF1, B ₂ during the address period of the second subfield SF2,. During the address period of the eighth subfield SF8, B ₈ is applied.

In the sustain period of each of the subfields SF1 to SF8, the voltage between the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ is lower than the discharge start voltage and immediately before the discharge period. A sustain pulse having the same polarity as the wall charge generated in the address period is applied so that the cell turned on in the previous address period is displayed, and then the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X are displayed. A sustain pulse, which is alternately alternated between _{1 and} X ₄₈₀ ), is applied to maintain the display of the cells turned on in the address period.

The number of sustain pulses applied to the above during the sustain period of each subfield (SF1~SF8) the entire first sustain electrodes (Y ₁ ~Y ₄₈₀₎ and the second sustain electrodes (X ₁ ~X ₄₈₀₎ is usually SF1: SF2: SF3: SF4: SF5: SF6: SF7: SF8 = 1: 2: 4: 8: 16: 32: 64: 128 is set to enable 256 gray scale implementation.

In addition, the driving pulses are generated by the controller 50 and applied to the corresponding electrodes through the Y driver 20, the X driver 30, and the address driver 40, respectively, and the timing is also controlled by the controller 50. Controlled.

As a result, when the screens of the first to eighth subfields SF1 to SF8 are sequentially configured through the above-described detailed process, 256 grayscale images of one frame are displayed on the three-electrode surface discharge PDP 10.

On the other hand, the AC plasma display device according to the prior art independently drives a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP, so that the Y driver supplies a driving pulse to the first and second sustain electrodes. The X driver is composed of a large number of driver ICs.

However, in the AC system, expensive driving ICs with a breakdown voltage of 200 V or more are used. Therefore, as the number of driving ICs in the system configuration increases (high resolution, etc.), the manufacturing cost of the entire AC plasma display device increases, which is currently widely used. Compared with the price, it was difficult to be commercialized.

In order to solve the above problems, the present invention significantly reduces the manufacturing cost by using a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP in common and using a smaller number of drive ICs than the prior art. An object of the present invention is to provide an AC plasma display device and a method for driving the panel.

1 is a block diagram showing a simplified configuration of an AC plasma display device according to the prior art.

2 is a cross-sectional view of one cell of the three-electrode surface discharge plasma display panel shown in FIG. 1, except that the front substrate is rotated by 90 degrees.

3 is a detailed configuration diagram of one frame when implementing 256 gray scales according to the ADS subfield method of the prior art.

4 is a block diagram showing a simplified configuration of an AC plasma display device according to an embodiment of the present invention.

5 is a diagram showing an example of a driving voltage waveform capable of turning on an arbitrary cell according to the panel driving method according to an embodiment of the present invention.

6A, 6B, and 6C are diagrams showing examples of driving voltage waveforms in which an arbitrary cell cannot be turned on in accordance with the panel driving method according to one embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

110: three-electrode surface discharge plasma display panel

Y _{1 to} Y ₄₈₀ : First sustain electrode X _{1 to} X ₄₈₀ : Second sustain electrode

Y _{c1 to} Y _c60 : first common sustain electrode X _{c1 to} X _c8 : second common sustain electrode

120: Y drive unit 130: X drive unit

140: address driver 150: controller

In order to achieve the above object, in the AC plasma display device according to the present invention, N first sustain electrodes Y _{1 to} Y _N and second sustain electrodes X _{1 to} X _N are alternately arranged one by one. A three-electrode surface discharge plasma display panel in which the plurality of first and second sustain electrode pairs (X ₁ Y _{1 to} X _N Y _N ) are separately driven by? (? <? <N) blocks by? [Alpha] first common sustain electrodes connecting the [beta] first sustain electrodes having the same sequence number in parallel in each block; Β second common sustain electrodes connecting the second second sustain electrodes included in each block in parallel; A first driving part including α output terminals connected in one-to-one correspondence with the α first common sustain electrodes to sequentially supply a first driving pulse to the first sustain electrode through the α first common sustain electrodes; A second driving pulse having β output terminals connected in one-to-one correspondence with the β second common sustain electrodes and sequentially synchronized with the first driving pulse to the second sustain electrode through the β second common sustain electrodes; A second drive unit for supplying; M address terminals A _{1 to} A _M are arranged to be orthogonal to the first and second sustain electrodes to be orthogonal with a predetermined space therebetween, and M output terminals are connected to each other in a one-to-one correspondence. An address driver for supplying three drive pulses; Converts and outputs an analog image signal input from the outside into a digital image signal, generates a corresponding driving pulse and a control signal according to the digital image signal and various external inputs, and transmits it to the first and second drivers and the address driver, respectively. Characterized in that configured to include a control unit.

In addition, in the panel driving method of the AC plasma display device of the present invention, a plurality of first and second storage electrodes are alternately arranged one by one, and the plurality of first and second storage electrode pairs are divided into β blocks, each of α pairs. Β first sustain electrodes having the same order in each block are connected in parallel by α first common sustain electrodes, and α second sustain electrodes included in each block are β second common sustain electrodes. A method of driving a panel of an AC plasma display device having panels connected in parallel with each other, the method comprising: repeating supplying first scan pulses sequentially to the? First common sustain electrodes?? 2 second scan pulses synchronized with the first scan pulse are supplied to each common sustain electrode for each of the second common sustain electrodes, thereby providing the plurality of first and second sustain electrodes. By sequentially scanning the geukssang by one pairs of driving the first and second sustain electrodes into a plurality each common, and is characterized in that for driving the first and the entire scan line by the second common electrode is maintained as a separate block.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in more detail.

4 is a simplified block diagram of an AC plasma display device according to an embodiment of the present invention.

The reference numeral 110 is a shift in parallel to each other, one of the holding arrangement 480 to the first electrode (Y ₁ ~Y ₄₈₀₎ and second sustain electrodes (X ₁ ~X ₄₈₀₎ and the first and second holding at 4 degrees The entire screen is 1920 × 480 R in a matrix form by ₁₉₂₀ address electrodes A _{1 to} A ₁₉₂₀ arranged to be orthogonal to the electrodes Y ₁ to Y ₄₈₀ and X _{1 to} X ₄₈₀ with a predetermined space therebetween. A color three-electrode surface discharge PDP with a resolution of 640x480 consisting of, G, and B cells is shown.

The 480 first storage electrodes and the second storage electrode pairs (Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ ) are divided into eight blocks of 60 blocks, which are identical in each block, unlike the prior art. Eight first sustain electrodes having sequence numbers are connected in parallel by sixty first common sustain electrodes Y _{c1 to} Y _c60 , and sixty second sustain electrodes included in each block are eight second common. The storage electrodes X _{c1 to} X _c8 are connected in parallel with each other.

The first and second sustain electrodes connected in parallel by the first common sustain electrodes Y _c1 to Y _c60 and the second common sustain electrodes X _c1 to X _c8 , respectively, are specifically shown in Table 1 below. same.

In addition, each cell and configuration of the three-electrode surface discharge PDP 110 is the same as the configuration of each cell of the conventional three-electrode surface discharge PDP shown in FIG.

Figure 4 reference numeral 120 is a first common sustain electrodes 60 (Y _c1 ~Y _c60) and the first common sustain electrode provided with 60 output terminals connected to one-to-one (Y _c1 ~Y _c60) in the Y drive unit for supplying a driving pulse to the ₄₈₀ first sustain electrodes (Y ₁ ~ Y ₄₈₀ ) through the 130, eight outputs connected in one-to-one correspondence with eight second common sustain electrodes (X _c1 ~ X _c8 ) An X driving unit including a terminal to supply driving pulses to the ₄₈₀ second storage electrodes X _{1 to} X 480 through the second common storage electrodes X _c1 to X _c8 , and 140 denotes 1920 address electrodes. (a ₁ ~A ₁₉₂₀₎ and the address electrodes and having an output terminal 1920 coupled to a one-to-one correspondence indicates an address driver for supplying a drive pulse to the (a ₁ ~A _1920), 150 is an analog image input from an external Digitize signal IMAGE to output digital image signal In addition, various driving pulses and control signals are generated according to the digital image signal and various external inputs-a clock CLK, a horizontal synchronizing signal HS, and a vertical synchronizing signal VS. A control unit supplied to the 130 and the address driver 140 is shown.

In the above, the Y driver 120 and the X driver 130 are each composed of a driving IC as in the prior art, and each output terminal corresponds to the output pin of the driving IC, so that the driving IC has 60 output pins as in the prior art. When using the Y driver 120 and the X driver 130 are all composed of one drive IC corresponding to 1/8 of the prior art.

When the AC plasma display device according to the embodiment of the present invention configured as described above displays 256 grayscale images on the three-electrode surface discharge PDP 110 according to the panel driving method according to the embodiment of the present invention, As follows.

First, in order to implement 256 gray levels, one frame is divided and driven into eight subfields, and each subfield is divided and driven into each reset period and address sustain period.

In the reset period of each of the subfields, as described in the related art, the Y driving unit 120 and the X driving unit 130 include 60 first common sustain electrodes Y _{c1 to} Y _c60 and 8 second common sustain electrodes ( X _c1 through _c8 ~X) the entire first sustain electrodes (Y ₁ ~Y ₄₈₀₎ and the second sustain electrodes (X ₁ ~X ₄₈₀₎ by applying a pulse sseoneotgi between the inner wall charges generated in the all-cell After the sixty first common sustain electrodes Y _{c1 to} Y _c60 and eight second common sustain electrodes X _{c1 to} X _c8 , the entire first sustain electrodes Y ₁ to Y ₄₈₀ An erase pulse is applied between the second sustain electrodes X ₁ to X ₄₈₀ to erase the internal unnecessary wall charge of each cell.

In the address period of each subfield, the Y driver 120, the X driver 130, and the address driver 140 sequentially address the digital image signal corresponding to each cell.

That is, in the address period of each subfield, the Y driver 120 repeatedly applies the first scan pulse to the sixty first common sustain electrodes Y _{c1 to} Y _c60 eight times, and at the same time, X The driver 130 sequentially applies 60 second scan pulses to each of the second common sustain electrodes X _{c1 to} X _c8 for each of the second common sustain electrodes 480. The first and second storage electrode pairs Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ are sequentially scanned one by one.

For example, when the first scan pulse and the second scan pulse are simultaneously applied to the first common sustain electrode Y _c1 and the second common sustain electrode X _c1 , the first scan pulse and the second scan pulse are generated. Only the first and second storage electrode pairs Y ₁ X ₁ , which are both applied, are scanned, and the remaining first and second storage electrode pairs Y ₂ X _{2 to} Y ₄₈₀ X ₄₈₀ are not scanned.

That is, the first and second sustain electrodes 61, 121, 181, 241, 301, 361, and 421, to which only the first scan pulse is applied through the first first common sustain electrode Y _c1 , are applied. Pair (Y ₆₁ X ₆₁ , Y ₁₂₁ X ₁₂₁ , Y ₁₈₁ X ₁₈₁ , Y ₂₄₁ X ₂₄₁ , Y ₃₀₁ X ₃₀₁ , Y ₃₆₁ X ₃₆₁ , Y ₄₂₁ X ₄₂₁ ) or the first common sustain electrode (X _c1) No. 2 to 60 first and second sustain electrode pairs (Y ₂ X _{2 to} Y ₆₀ X ₆₀ ) to which only the second scan pulse is applied, or none of the first and second scan pulses are applied. The first and second sustain electrode pairs are not scanned.

In more detail, in the same principle as described above, the first scan pulse is sequentially applied to the first common sustain electrodes Y _{c1 to} Y _c60 , and the first common sustain electrode X _c1 is applied to the first common sustain electrode X _c1 . When 60 second scan pulses synchronized with the first scan pulse are continuously applied, the first and second sustain electrode pairs Y ₁ X _{1 to} Y ₆₀ X ₆₀ are sequentially scanned one by one. .

Thereafter, the first scan pulse is sequentially applied to the first to sixth first sustain electrodes Y _{c1 to} Y _c60 and synchronized with the first scan pulse to the second common sustain electrode X _c2 . When 60 sequentialized second scan pulses are applied successively, the first and second sustain electrode pairs Y ₆₁ X _{61 to} Y ₁₂₀ X ₁₂₀ Nos. _{61 to 120} are sequentially scanned one by one.

Repeating the above process with respect to the second common sustain electrodes X _{c3 to} X _c8 3 to 8 results in 480 first and second sustain electrode pairs Y ₁ X ₁ , Y ₂ X ₂ ,. , Y ₄₈₀ X ₄₈₀ ) are sequentially scanned one by one.

In addition, the address driver 140 receives a write pulse resulting from one bit value of an 8-bit digital image signal of 1920 cells constituted by the first and second sustain electrode pairs that are currently scanned as in the prior art. It is selectively applied to electrodes A ₁ -A ₁₉₂₀ to cause address discharge to occur inside the cell to which the write pulse is applied.

In the sustain period of each of the subfields, as in the prior art, the Y driving unit 120 and the X driving unit 130 have 60 first common sustain electrodes Y _{c1 to} Y _c60 and 8 second common sustain electrodes X _c1 to X _c8 is periodically supplied with alternating sustain pulses between the entire first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ , thereby turning on the cells turned on in the immediately preceding address period. Keep it marked.

5 shows an example of a driving voltage waveform capable of turning on an arbitrary cell, and FIGS. 6a, 6b, and 6c illustrate examples of driving voltage 퍄 types that cannot turn on any cell. have.

First, the Y driver 120 and the X driver 130 receive the first sustain pulse and the second sustain pulse from the controller 150, and the sixty first common sustain electrodes Y _{c1 to} Y _c60 and eight second second. The first sustain pulse is supplied to the ₄₈₀ first sustain electrodes Y _{1 to} Y 480 through the common sustain electrodes X _{c1 to} X _c8 , and the second sustain pulse is supplied to the second sustain electrodes X _{1 to} X ₄₈₀ , respectively. In addition, the address driver 140 applies a Va ′ voltage to the ₁₉₂₀ address electrodes A _{1 to} A ₁₉₂₀ .

The first sustain pulse is a three-step pulse in which the pulse voltage changes from the steps of V1 + Vh → V1 + Vm → V1 → V1 + Vm → V1 + Vh, and the second sustain pulse is synchronized with the first sustain pulse. The pulse voltage is a three-step pulse that changes from 0 → Vm → Vh → Vm → 0 (Vh = 2Vm).

In the above state, as shown in FIG. 5, the Y driver 120 and the X driver 130 maintain the first sustain pulse at V1 voltage and the second sustain pulse at Vh voltage as shown in FIG. 5 in the address period of each subfield. The first sustain pulse of OV to the first sustain pulse and the second scan pulse of voltage V1 to the second sustain pulse, respectively, during the first and second common sustain electrodes (e.g., Y _c1 and X _c1). ), A pair of first and second sustain electrodes Y ₁ X _{1 to which} the first scan pulse and the second scan pulse are simultaneously supplied are scanned, and at the same time, the address driver 140 performs the address electrodes ( _By selectively supplying an address pulse of Va (Va> Va '> 0) voltage to A _{1 to} A ₁₉₂₀ , the scanned first and second sustain electrode pairs Y ₁ X ₁ and the address pulse supplied with the address pulse The cell located at the intersection is turned on.

At this time, the cell located at the intersection of the address electrode supplied with the OV voltage and the scanned first and second sustain electrode pairs instead of the address pulse of Va voltage is turned off.

Meanwhile, as shown in FIG. 6A, when the first scan pulse is supplied through the first common sustain electrode Y _c1 but the second scan pulse is not supplied (for example, Y ₆₁ and X ₆₁ ). However, as shown in FIG. 6B, when the second scan pulse is supplied through the first common sustain electrode X _c1 but the first scan pulse is not supplied (for example, Y ₂ and X ₂ ). However, as shown in FIG. 6C, when neither the first scan pulse nor the second scan pulse is supplied (for example, Y ₆₂ and X ₆₂ ), the first and second sustain electrode pairs are not scanned. The cell is turned off regardless of whether an address pulse is applied to the voltage.

In addition, the present invention is not limited to the above-described embodiment, but may be applied in various embodiments without departing from the gist of the present invention.

As described above, the present invention drives a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP in common, so that the driving IC is provided in the system to supply driving pulses to the first and second sustain electrodes. Since the number of is greatly reduced than the prior art there is an effect that the manufacturing cost is greatly reduced.

Claims (2)

N first sustain electrodes Y _{1 to} Y _N and second sustain electrodes X _{1 to} X _N are alternately arranged one by one, and the plurality of first and second sustain electrode pairs X ₁ Y ₁ A three-electrode surface discharge plasma display panel in which ˜X _N Y _N ) is separately driven by? (? <? <N) blocks by? [Alpha] first common sustain electrodes connecting the [beta] first sustain electrodes having the same sequence number in parallel in each block; Β second common sustain electrodes connecting the second second sustain electrodes included in each block in parallel; A first driving part including α output terminals connected in one-to-one correspondence with the α first common sustain electrodes to sequentially supply a first driving pulse to the first sustain electrode through the α first common sustain electrodes; A second driving pulse having β output terminals connected in one-to-one correspondence with the β second common sustain electrodes and sequentially synchronized with the first driving pulse to the second sustain electrode through the β second common sustain electrodes; A second drive unit for supplying; M address terminals A _{1 to} A _M are arranged to be orthogonal to the first and second sustain electrodes to be orthogonal with a predetermined space therebetween, and M output terminals are connected to each other in a one-to-one correspondence. An address driver for supplying three drive pulses; Converts and outputs an analog image signal input from the outside into a digital image signal, generates a corresponding driving pulse and a control signal according to the digital image signal and various external inputs, and transmits it to the first and second drivers and the address driver, respectively. AC plasma display device comprising a control unit. A plurality of first and second storage electrodes are arranged in turn one by one, and the plurality of first and second storage electrode pairs are divided into β blocks each by α, and β first storages having the same order within each block. AC plasma display having a panel in which electrodes are connected in parallel by each of the first common sustain electrodes, and a second sustain electrode included in each block is connected in parallel by two second common sustain electrodes, respectively. A method of driving a panel of an apparatus, the method comprising: repeatedly supplying the first scan pulses to the? First common sustain electrodes sequentially? Times and synchronizing the first scan pulses to the? Second common sustain electrodes? 2 scan pulses are supplied for each of the second common sustain electrodes to sequentially scan the plurality of first and second sustain electrode pairs one by one to maintain the first and second sustains. Drive the electrode into a plurality each common panel and a driving method of the AC plasma display device, characterized in that for driving the first and the entire scan line by the second common electrode is maintained as a separate block.

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