JPH09298698A - Television display controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a television display controller for easily displaying the characters with different sizes to the display screen of a television on the same horizontal scanning line without increasing a character data number and a memory capacity. SOLUTION: A coordinate value from a timing generation circuit 11 to which horizontal and vertical synchronizing signals and system clocks are inputted is inputted to a display memory control circuit 12 and the read address of a display memory 13 is outputted. Also, a line number corresponding to the coordinate value is inputted to an intra display row line number generation circuit 14 and gathered with character size data from the display memory 13 and the address of a character font memory CG-ROM 15 is generated. The character size data from the display memory 13 are inputted to a read control circuit 17, data outputted from the CG-ROM 15 are supplied to a P/S conversion circuit 19 and the data are outputted at a timing corresponding to the character size.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television display control device for displaying equipment operation data, information and the like on a television display screen using characters and graphics.

[0002]

2. Description of the Related Art In a video display device such as a television receiver (TV), a selected channel number display, a volume display, setting items relating to functions of the video display device, and designated amounts relating to the setting items are displayed. It may be displayed, and the operability of the device is improved by such a display. In order to use the setting function based on such a display, it is necessary to display the setting item and the current specified value. To realize these requirements, a memory with a small storage capacity must be used. Information is displayed using the written limited character data.

With the recent improvements in the functions of video equipment such as TVs and VTRs, there has been a demand for easier-to-understand screen display. Therefore, by using LSI highly integrated technology, more character fonts can be created and incorporated. , Various displays are done.

[0004] For example, on a TV, when a channel change operation is performed, a channel number is displayed on the screen, when a plurality of video sources are displayed by dividing the screen, a channel display of each video source is displayed. Operation guides for changing station correspondence, current data display, setting of special functions built into the TV, and guide display to introduce the contents.

When performing these displays, the operation method is made easy to understand by changing the size and color of the characters. At least the size of the character displayed when changing the channel and the size of the character displayed when setting the position are different.

As means for realizing such two kinds of character display, firstly, a method of previously providing character font data of two kinds of sizes is selected with one size of character font data as a standard. To do so. In this case, when displaying a character larger than the standard size character, character font data is created such that two or more character fonts are arranged and one character is represented.

On the contrary, when displaying characters of a size smaller than the standard, one character font in which data of two or more characters are arranged is prepared. In this case, although the display position can be freely arranged on the screen, even the same character needs to be prepared as another data only because the size is different, which leads to expansion of the memory capacity. Therefore, as the number of characters desired to be displayed increases, the character size is fixed due to the limitation of the memory capacity.

In particular, when a large character is displayed with respect to the standard character size, it is necessary to display a large character with respect to the standard character, for example, a quadruple-width character which is twice the height and the width of the standard character. 4 storage areas will be used. Therefore, when it is desired to use a large amount of character data to be displayed, most of the characters have to be standard size characters.

Secondly, it is considered that one character font data is not clocked to be expressed by combining the character fonts, but one character font data is expanded or reduced by clock control. According to such a method, for example, display of a large channel number and display of a character with a small position setting can be realized using the same character font data as that of a large character. However, the multi-functionalization of TV image receiving devices has caused inconvenience in display.

For example, in a TV having a picture-in-picture function, a small window can be opened in the screen, and different images can be displayed small in this window. Considering displaying video information on a large screen and a small screen in a window when using such a function, for example, information is displayed in large characters on a large screen and on a small screen. It is desirable to display in small letters. In such a case, if each character is displayed on the same horizontal scanning line, it cannot be displayed correctly.

For example, in the case of displaying a picture-in-picture as shown in FIG.
When the channel number of the standard screen (if channel “3” is selected) is displayed on the main screen A and the “video” is displayed on the child screen B, the standard screen is displayed as shown in FIG. The lower side of the character "3" displayed on the screen A is erased.

In order to deal with such a problem, the display control circuit prohibits the display as an abnormal display. For this reason, the characters on the screens A and B are configured not to overlap even one horizontal line. If the overlapping designations are made, the lines to be displayed later are not displayed.

Therefore, as a measure against the problem that such a display is not possible, a method of expressing by combining two character data is taken. For example, an example is shown in (C) and (D) of FIG. That is,
In the case of the figure (C), several characters (video) smaller than the standard size are written in one character area, and in the case of the figure (D), a plurality of characters are written in reverse to the case of the figure (C). A large character is expressed by combining the characters.

In this way, in order to improve the operability of the TV, VTR, etc., which have been displayed by the conventional method, and to make various displays in accordance with the multi-functionalization, especially the same characters are different. When it is necessary to display in size, it is necessary to prepare in advance data corresponding to the character size of the scene to be displayed, which causes a need to increase the capacity of the storage means (ROM etc.) for storing character data. .

Here, for example, Japanese Patent Laid-Open No. 54-136233.
The publication discloses a display control device as shown in FIG. 17 as a "character display". This display control device includes a display memory 51. An address input from the control line AB1 is input to the display memory 51 via a multiplexer 52, and data to be displayed at the timing is displayed from the data bus ADB1.
Written at 51. The system controller writes magnification data designating the character size of the screen to be displayed through the data bus DB1 into the memory 531 in the horizontal direction and the memory 532 in the vertical direction.

In this way, when the system control device finishes setting the data, the control is transferred to the CRT controller 54. The clocks generated by the dot clock generator 551 and the character clock generator 552 are divided by the frequency dividers 561 and 562 according to the data in the memories 531 and 532 that store the magnification, and the CRT controller 54 To operate. This CRT controller 54
The character data to be displayed is read from the display memory 51, converted into the read address of the character generator 57 together with the above-mentioned frequency-divided clock, and output. The data of the bit string read from the character generator 57 is input to the parallel / serial converter 58, and data is output bit by bit in accordance with the divided dot clock.

FIG. 18A shows an example in which a standard size character is displayed, and FIG. 18B shows an example in which a quadruple-width character in which the length and the width are doubled is displayed. This means that the same data is read twice when the vertical direction is doubled, and the same data is held in the horizontal direction with a divided clock for a doubled period.

By the way, since the display memory, which is the second storage means for deciding where to display the characters or graphics to be displayed, affects the circuit scale, it generally has only a few lines. When characters are displayed on the entire screen, the data in the display memory is rewritten during the display period of one screen. When characters of different sizes are displayed, when the data is rewritten, the data for controlling the clock is also rewritten so that the character size can be changed line by line.

Further, a display control device for enlarging the size of a character in the vertical direction by using the same character data, for example, Jitsukai 6
There is a "vertical enlarged character display circuit" disclosed in Japanese Patent Laid-Open No. 3-57697. In FIG. 19, the display memory shown in FIG.
51 is divided into a V-RAM 61 for character code and an attribute V-RAM 62 for storing designation data of character size and color. The clock HRTC of one horizontal scanning period from the timing generation circuit 63 is divided by the division circuit 64, and the divided clock is used to operate the line counter 65 for the standard character size and the line counter 66 for vertical double display. , The character size flag written in the V-RAM 62 is used to switch the selector 67 to select the line of the character to be read from the character generator 68.

In the display circuit having such a structure, the character size written in the attribute V-RAM 62 is increased and
In the case of enlargement, it is necessary to specify the upper half or the lower half of the character graphic. Therefore, when the display of one line including the enlarged characters is finished, only the upper half or the lower half of the enlarged characters are displayed. Therefore, set the remaining half on the next line or the previous line, respectively. Need to do.

In this case, since the vertical enlargement processing is realized as shown in FIG. 20, in order to express a quadruple-width character in which the height and width are each doubled, it is necessary to use 2 instead of 4 standard characters. It is now possible to use character data for each piece.
That is, in order to represent a character with a large quadruple width, it is sufficient to prepare only the left half and right half character data for the enlarged character.

Finally, in the display control device disclosed in Japanese Patent Laid-Open No. 63-37383, it is possible to enlarge in the horizontal direction character by character. That is, when the enlarged character display is designated in the display memory, the reading timing of the parallel / serial converter at the final stage is controlled so that the enlarged display is performed in the horizontal direction. However, in such a method, the size in the vertical direction cannot be specified on a character-by-character basis. Therefore, in order to double the size in the vertical direction as well, data for large characters as well as character data for the upper half and lower half are required. .

As described above, in the past, in order to display characters of different sizes on the screen,
It is necessary to create the data of the combination characters to be displayed in advance and save it in the character font ROM, and when using these combination characters, which character code is which part of which character is also enlarged. It was necessary to set it while carefully checking whether it was necessary to specify it. Further, when the same character is vertically and horizontally expanded twice, since the data size of the same character is different, it is required to increase the capacity of the memory for storing the character font. Moreover, in the enlargement of characters by the method described so far, the points for expressing the characters are enlarged. Therefore, the larger the enlargement becomes, the more uneven the diagonal lines become, and the lower the character quality becomes. was there.

[0024]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and in particular, does not cause an increase in the number of character data and an increase in cost due to an increase in memory capacity. Based on the character data written in one line of display memory, horizontal and vertical enlargement processing can be performed, making it easy to display different size characters on the same horizontal scanning line for the television display screen. The present invention is intended to provide a television display control device capable of displaying on.

[0025]

In a television display control device according to the present invention, display character data of a character or a graphic represented by a collection of m × n dots on a television display screen is stored in a first storage means. The character code for storing and reading the display character data stored in the first storage means is stored in the rewritable second storage means. The horizontal position of the display screen and the second storage means are stored. One line of the character font stored in the first storage means indicated by the character code stored in is read. Data of one line of a specified character font is read out from the character fonts converted into address data and stored in the first storage means.
The read character font data is converted into serial data and is output according to horizontal scanning of the display screen. Here, the character code stored in the second storage means and the character size data corresponding to the character code are stored for each character, and when reading the character code, the character code and the character size data are read according to the horizontal position. Size data reading means, 1 of the read character size data
A character font reading means for reading out based on the number of lines in a line, converting it into a line number in the character font, and reading the character font data of the designated line from the first storage means. The generated character font data is provided with a font data read means for converting the read character font data into serial data and reading the serial data, and the read timing signal is adapted to generate a timing corresponding to each character size.

That is, in this television display control device, horizontal and vertical enlargement control for one character data is performed based on the reference character size. Therefore, the horizontal and vertical references are fixed when the screen data is created. Therefore, the vertical and horizontal positioning becomes easier as compared with the conventional display control circuit that attempts to express characters of different sizes on a line-by-line basis. Further, when expressing a large character, if the designated character data is the display start digit of the display memory, that is, if the character is double, it is sufficient to write it to the display memory corresponding to the left half position, It is not necessary to write data to each. Therefore, it is possible to reduce the designation from, for example, a microcomputer that executes control, and reduce the control load.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows the configuration thereof, in which horizontal (H) and vertical (V) synchronizing signals and a system clock (CLK) which is a reference for operating the display control are input to a timing generating circuit 11. The timing generation circuit 11 counts horizontal and vertical coordinate values indicating where on the screen the data is to be displayed in synchronization with the display scan of the television receiver.

When the timing generating circuit 11 outputs a predetermined coordinate value, this coordinate value is displayed.
It is input to 12 and converted into a read address of the display memory 13. Further, the timing generation circuit 11 generates a line number corresponding to the coordinate value. The line number or the coordinate value in the vertical direction is input to the line number generation circuit 14 in the line to be displayed. The line number generated by the line number generation circuit 14 is the line number in the line to be displayed, that is, the character font memory (hereinafter referred to as CG-RO).
The data stored in (M15) is specified in the horizontal sliced style.
When one character is represented by, for example, 12 points vertically and 10 points horizontally, 12 lines are required to display one character. The line number generation circuit 14 converts the input line number or the vertical coordinate value into the line number of the 12 lines.

The timing generation circuit 11, the display memory control circuit 12, and the line number generation circuit 14 described above correspond to the CRT controller 54 shown in FIG. Display memory 13
On the other hand, when the read address of the data is given from the display memory control circuit 12, the display memory 13 displays the character code, the character size, and the attribute data indicating the function such as the character color and blink from the storage area of the specified address. Is output.

FIG. 2 shows the structure in the display memory 13. In this display memory 13, the number of lines in the vertical direction and the number of characters that can be displayed in the horizontal direction are assigned, and the number of characters to be displayed in the horizontal and vertical directions is set. I have decided the position. Then, the character code that specifies the data to be displayed in the depth direction, the character size,
Attributes are recorded. When the read address is specified,
Reads the character code, character size, and attributes at once according to the vertical and horizontal positions.

Normally, the data stored in these display memories 13 is written by a microprocessor, which is not shown in the drawing. Further, the display memory control circuit 12 is also configured to operate even when writing data from the microprocessor, and the operation from the microprocessor is prohibited during the display operation on the screen. Therefore, data setting concentrates on the synchronization timing of the image scanning period.

However, even during the image scanning period, there is a period during which the data read operation from the display memory 13 is not performed. Therefore, the display data output from the microprocessor is free to be written by the microprocessor and has a buffer for transferring the data to the display memory 13 so that the display data can be written by the timing signal output from the timing generation circuit 11. By doing so, the write timing of the display data can be increased. Further, in the case of having the display memory 13 for several lines, the data is rewritten for the lines that are not displayed by separating the memories so that the lines can be individually read and written.

The character size is set for each character. In this respect, in the conventional case, the memories 531 and 532 for storing the magnifications in the horizontal and vertical directions shown in FIG. 17 are one set, but in this embodiment, they are set for each character. Therefore, an area to be written in the display memory 13 is prepared. As a matter of course, in this embodiment, if the size setting in character units is not necessary, the area of the display memory 13 can be reduced by using the data in line units.

Here, the character size data read from the display memory 13 is given to the line selection circuit 16 and the read control circuit 17. A counter for counting the number of lines required for displaying the maximum character is provided in the line-in-display-line generation circuit 14. Therefore, the line selection circuit
In the case of 16, the character line data line to be read from the CG-ROM 15 is determined by selecting a bit signal within a predetermined range corresponding to the character size from the counter value output in bit style from the counter. .

The signals output from the line number generating circuit 14 are shown in FIG. For example, in the case of a character font expressed in vertical 12 points, the line number of the character font is specified by four signal lines (16 expressions can be expressed because it is 2 to the 4th power). The line selection circuit 16 selects signal lines in the range of (a) to (d) of FIG. 4 according to the counter value and the character size as shown in (1) to (4) of FIG. There is. In this way, the selection of the character size is performed by multiplying by 2 to the nth power (n is an integer) in the vertical direction.

In FIG. 1, the line number selected by the line selection circuit 16 and the character code output from the display memory 13 are the address generation circuit (character ROM address generation circuit) 18 for reading the character font data from the CG-ROM 15. Entered in. The address generation circuit 18 generates an address to the CG-ROM 15 in accordance with the input signal from the line selection circuit 16, and this CG-ROM is generated.
The character font data stored in the ROM 15 is read.

The character font data read from the CG-ROM 15 is supplied to the parallel / serial (P / S) conversion circuit 19 and converted into serial data in accordance with the timing signal supplied from the read control circuit 17. To be done. Then, the output data from the parallel / serial conversion circuit 19 is displayed on the screen in accordance with the image scanning timing.

Generally, serial data is not directly output to a display device, but is converted into color data or color designation data. This color is specified in the display memory
The processing is performed for each character on a line-by-line basis or on a line-by-line basis. Each of "1" and "0" specifies a character color and a background color. RG corresponding to each color of red, green and blue
A wide variety of coloring is made possible by directly converting into B color data or converting into a color designation number and then converting into RGB color data by a color RAM (not shown).

The character font data stored in the CG-ROM 15 is configured as shown in FIG. 3, for example. That is, it is divided into character font blocks by the character code as shown in FIG. 7A, and the inside of each block has a data structure that is horizontally sliced like "a" of the character code "01". Has become.

When the character block in the CG-ROM 15 is designated by the character code read from the display memory 13, the display line is designated by the line selection circuit 16 and the vertical position of the read character is determined. For example, when the character code “01” is specified, the line selection circuit 16
When the line "7" is specified, the data shown in FIG. 7B is read from the character font block "A" in the CG-ROM.
It is read from 15. Therefore, if enlarged characters are specified, the same line is
In the case of four times the number of characters, the same line is read four times.

Next, the data read from the CG-ROM 15 is input to the parallel / serial conversion circuit 19, and the parallel / serial conversion circuit 19 is constructed as shown in FIG. The operation will be described with reference to the timing chart shown in FIG.

That is, with reference to the character display timing shown in FIG. 7, the character code and the character size data are read from the display memory 13 at a predetermined timing.
The character code read from the display memory 13 is converted into an address of the CG-ROM 15 by the address generation circuit 18. The character font data read from the CG-ROM 15 by this address is input from the upper left side of the parallel / serial conversion circuit 19 shown in FIG.

Parallel / serial conversion circuit 19 shown in FIG.
Is for inputting 10-bit data at a time and outputting the 10-bit data one bit at a time. The operation of the conversion circuit 19 will be described. As shown in FIG. 6, ten sets of the configuration shown in the circuit block 25 are connected.
The 1-bit output (P / S output) of this circuit is sent by sequentially sending data from the left block to the right block.

Now, 10-bit data input from the upper left side of the parallel-serial conversion circuit 19 is 10 pieces at the rising timing from "0" to "1" of the data latch timing signal shown in the timing chart of FIG. Are stored in the latch circuit 21 of. The output of the latch circuit 21 outputs the same data "1" or "0" until the stored data is rewritten by the data latch timing signal.

In the output operation, the parallel / serial conversion circuit 19 operates while the selector 22 is fixed at "1". For example, in FIG. 6, since the upper side of the selector 23 as well as the selector 23 is “0”, as shown in the timing chart of FIG. 7, lowercase letters of P / S output timing, standard characters, double characters, and quadruple characters Out of 1
One is designated by the character size data, and the selector 23 is controlled.

If the character size is doubled, the timing signal corresponding to the doubled character in the P / S timing signal is selected. While this timing signal is "high", the output data of the latch 24 is latched in the same latch 24 again at the rising timing of the display clock (CLK) from "low" to "high". When the P / S output timing signal of double character becomes "low",
The output data of the latch 24 is sent to the right latch. Therefore, the display data P / S
The data changes depending on the timing such as the double character of the output.

The timing signals shown in the lower part of FIG. 7 summarize such operations. When characters of different sizes are designated in one line by the character size selection signal, the stable period of data changes as indicated by the P / S output of display data. This P / S output is the display data P
This means that the lowercase letters in the / S output are switched and output from 4 times lower case.

The input timing signal to the parallel / serial conversion circuit 19 is generated at predetermined intervals like the character display timing signal, but is controlled by the character size data. Similarly, the output timing signal also depends on the character size, such as lower case, standard, double, triple P /
One of the S output timings is selected. With such a signal, the parallel / serial conversion circuit 19 is operated to perform horizontal enlargement control.

Next, the selector 22 shown in FIG. 6 is controlled by the P / S timing signal. While the P / S input timing signal is "0", the selector 22 switches the output signal of the selector 23 to the output of the latch circuit 21 and connects it to the input of the latch circuit 24. As shown in the timing chart of FIG. 7, the period in which the P / S input timing signal is "0" is only one cycle period of the display clock.

The latch circuit 24 stores the output data of the latch circuit 21 at the timing when the display clock (CLK) changes from "0" to "1" while the P / S input timing signal is "0".

Up to this point, the operation is such that 10-bit parallel data is input to this conversion circuit. By the way, the display clock (CLK) shown in FIG. 7 describes the periods of “1” and “0” with the same time length, but they are not necessarily the same. Therefore, when the circuit as shown in FIG. CLK
The design is performed based on only the rising edge that changes from "0" to "1" or the opposite falling edge. Here, an example of designing based on the rising edge is described.

In the figure, the P / S input timing signal and CL
The timing at which K changes from “0” to “1” is described as the same timing. However, since the timing signals shown in FIG. 7 are generated with reference to the rising edge of CLK,
In reality, it changes after CLK.

In the output operation of the parallel / serial conversion circuit 19, the selector 22 is fixed at "1" and operates while the output of the selector 23 is connected to the latch circuit 24. For example, in FIG. 6, the selector 22 and the selector
The upper side of 23 is "0", and the latch circuit 24 on the left side is connected for "1" only while the P / S output timing signal is "0".
When, the latch circuit 24 to which the output of the selector 23 is connected
The output of is input. As shown in the timing chart of FIG. 7, lowercase letters of P / S output timing, standard characters,
One of the double character and the quadruple character is designated by the character size data, and the selector 23 is controlled.

If the double character size is designated, the timing signal corresponding to the double character in the P / S timing signal is selected. While the timing signal is "high", the output data of the latch 24 is latched in the same latch 24 again at the rising timing of the display clock (CLK) from "low" to "high". Two
When the double character P / S output timing signal becomes "low", the output data of the latch 24 is sent to the right latch. Therefore, the display data P
The data changes depending on the timing such as double character of / S output.

The timing signals shown in the lower part of FIG. 7 summarize such operations. When characters of different sizes are designated in one line by the character size selection signal, the stable period of data changes as indicated by the P / S output of display data. This P / S output is the display data P
This means that the lowercase letters in the / S output are switched and output from 4 times lower case.

The input timing signal to the parallel / serial conversion circuit 19 is generated at predetermined intervals like the character display timing signal, but is controlled by the character size data. Similarly, the output timing signal also depends on the character size.
One of the S output timings is selected. With such a signal, the parallel / serial conversion circuit 19 is operated to perform horizontal enlargement control.

Since this embodiment has the above-described structure, the enlargement control can be operated separately in the vertical and horizontal directions. As a result,
It is possible not only to make the vertical direction and the horizontal direction the same magnification, but also to control only one of them to realize display of characters with different balances.

When the character size is changed in this way, it is necessary to determine the position of each character position, that is, the vertical position of the small character with respect to the large character. For example, as shown in FIG. 8A, a display in which the lines that are the starting points of the lines of each size character are aligned and large size characters are extended downward can be considered. However, as shown in (B) and (C) of the figure, the line that is the starting point of the line may be determined according to the respective character sizes. This point will be described with reference to FIGS. 4 and 5.

When the characters are enlarged and displayed, the waveform data output from the in-display-line number generating circuit 14 shown in FIG. 1 is as shown in FIG. 4, for example. Here, when a lowercase letter is designated, as shown in FIG. 5A, there are seven kinds of lowercase timing signals 1 to 7. Looking at the waveform of the counter output (Fig. 4) during the period when each signal is "high", the same waveform as the part surrounded by the dotted line in (a) in this figure appears at each timing. There is. Only the signal lines of the upper 2 bits are different.

Therefore, when the enlarged character of 4 times shown in FIG. 5D and the lower case shown in FIG. 5A are displayed side by side, the lower case shown in FIG. It is decided to display at a timing position of one of ~ 7. This designation may be made in units of lines or characters. The waveforms in FIGS. 4 and 5 mean the timing of the screen display in the vertical direction.

However, as is clear from FIGS. 4 and 5, there is a gap in the display position of the character. This is because the character font data that can be generally used in the display controller is 2 n in both the vertical and horizontal directions.
This is because it is not always squared. Unlike the display as in (B) and (C) of FIG. 8, since the positions of particularly small characters are different, the bottom lines of the characters are not aligned when the character size is different, and as shown in the (B) diagram. Cannot be displayed.

However, looking closely at the waveform data (waveform of FIG. 4) indicated by the output of the line number generating circuit 14 in the display line, as shown in FIGS. 9 and 10, the waveform data switching processing is performed on the line shown in FIG. It can be seen that it may be realized in the selection circuit 16. In these waveform data, if the waveform pattern is converted for each position where only the most significant bit signal is displayed, the vertical positions of small characters are arranged without gaps. To read the waveform data, it is necessary to change all the signal lines depending on the number of vertical dots of the character font. By doing so, the display as shown in FIGS. 8B and 8C is possible. is there.

The waveform patterns shown in FIGS. 4 and 6 and FIGS. 9 and 10 show the timing in the control circuit for the progressive scan type display device. On the other hand, the interlaced scanning will be described with reference to the timing chart shown in FIG. 11A shows the progressive scanning method and FIG. 11B shows the interlaced scanning method. HDp indicates the timing of the horizontal blanking period of the progressive scanning method, and HDi indicates the interlaced scanning method. It shows the timing of the blanking period of the, ODD / EV
EN is a signal for discriminating the interlaced scanning field. Here, in interlaced scanning, one frame is represented by two fields. Therefore, the lowercase letters represented by the data of one frame are different between the progressive scanning and the interlaced scanning (see the lowercase waveform in FIG. 9).

For standard size characters, character ROM
Since the data read from the same data are arranged in the vertical direction of two lines, the same waveform style is used for both the progressive scanning and the interlaced scanning. Even in this case, the display as shown in FIGS. 8B and 8C can be realized by replacing the data similar to that described by sequential scanning according to the configuration of the character font.

Here, when the display memory 13 shown in FIG. 1 has a capacity of several lines, when a character is vertically expanded, the expanded character and the character to be displayed on the next line overlap. However, it is conceivable that the display of characters may be interrupted halfway.

In general, the display memory used by the display control device used in a television or the like has a capacity of only a few lines. Therefore, when displaying characters with more lines than the display memory, interrupt control is performed while displaying one screen so that the required number of lines can be displayed while rewriting data. I have to. Also, in many display memories that have the number of lines, the space between lines is fixed. Regarding this, since the function to change the character size on a line-by-line basis has been added, it has become possible to change the line spacing.

In this way, the control circuit which does not overlap the characters is required in the one having the display memory 13 capable of displaying a large number of lines.
This point will be explained with reference to FIG. 1. When reading character data to be displayed from the display memory 13, the display memory 13 must be read many times during the period in which one character is displayed. For example, if two lines overlap,
Two rows of data will be read. And CG-
The character font is read from the ROM 15, but this reading is performed twice.

However, the parallel-serial conversion circuit 19 for inputting the data read from the CG-ROM 15
Only one data can be written. As a measure against this problem, if the number of parallel / serial conversion circuits 19 is increased, the size of the circuit becomes large, so that overlapping display is generally prohibited.

In the second embodiment, it is possible not to perform control that does not overlap in line units, but to prohibit in character units. The configuration of the embodiment for such control will be described with reference to FIG. This figure shows a case where the display memory 13 is composed of 4 lines.
The figure shows a display example of characters, and the figure (B) shows the order of the rows and digits from which the data in the display memory 13 is read. In this embodiment, the relationship between the enlarged character and the small character is represented by the case where the display start lines are aligned.

First, in the case of displaying characters on the first line, as shown in FIG.
It is assumed that the line number generating circuit 14 in the display row is composed of the line number generating means of the number of rows held by the display memory 13 and the selecting means thereof. When the second line is displayed, the character size data at the same digit position on the second line and the line before it is read. If the previous line has double the number of characters in the vertical direction, the display operation of the designated character size is performed using the character code of the first line instead of the second line.

At this time, by acquiring the line data from the display number generating means of each of the preceding lines, it is possible to display data connected to a part of the characters displayed in the first line. The third and fourth lines are displayed in the same manner.

If the display memory 13 has four or more rows, it is considered that there is a row before the first row in the example shown in FIG. Is also read, and if the enlarged character is specified, the character being displayed is displayed. In this figure,
3 times because it draws up to 4 times the size of small characters
Try to read before the line. Then, when the display of the enlarged characters is finished, the line which is about to be displayed is read again.

This method may be one in which the line spacing can be set freely. In this case, a circuit may be required to store data indicating how many lines are currently displayed for each display row. Focusing particularly on (B) of FIG. 12, since the column position as well as the line position can be fixed by the set value at the stage of designing the display screen of where and what size of character is to be displayed, character overlap and restrictions Predetermine,
It is possible to prevent the display of missing characters and the display of garbage.

FIG. 13 shows the configuration of the third embodiment. The same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. In this embodiment, the timing generation circuit 11
Then, in accordance with the display scanning of the television receiver, the horizontal and vertical coordinate values indicating where on the screen the data is to be displayed now are counted, and the character display timing signal and the limit signal indicating the displayable range on the screen are also counted. To occur.

The display memory control circuit 12 specifies a row and a column in the display memory 13 and controls reading of data. The data read from the display memory 13 is supplied to the character size control circuit 31, and the line number generation circuit in the display line is generated.
14 generates the display line number of each display line. Display memory
The character code is read out from 13 together with the character size data, and this character code is input to the address generation circuit 18,
CG-combined with the line number from the line selection circuit 16
Converted to the address of ROM15.

Character font data is read from the CG-ROM 15 in accordance with the input address, this data is converted into serial data by the parallel / serial conversion circuit 19, and this serial data is input to the smoothing processing circuit 32. It After the smoothing processing, the display range limiting circuit 33 controls so that the display is performed only in a predetermined range of the screen.

Here, in order to operate the smoothing processing circuit 32, the parallel / serial conversion circuit 19 uses the CG-R.
2 to 4 character font data read from OM15
A line, for example, a circuit configured as shown in FIG.
I have ~ 4. For this smoothing process,
For example, a "smoothing processing circuit" as disclosed in Japanese Utility Model Laid-Open No. 62-89054 is known.

When the character size data from the display memory 13 is input, the character size control circuit 31 generates a timing signal according to the setting of the character size. The character size control circuit 31 is configured as shown in FIG. 14, for example, and will be described with reference to the timing chart shown in FIG.

A character display timing signal is input to the character size control circuit 31, and the character display timing signal is composed of a timing pulse having a small character width as a reference as shown in FIG. Then, the character size counter 311 is operated at this timing.
The count value of the counter 311 is decoded by the decoding circuit 312, and the output signal for each character size from the decoding circuit 312 is selected by the selector 313 according to the character size selection signal output from the display memory 13. The rising pulse generation circuit 314 which inputs this selection signal generates a pulse at the rising portion.

Based on the output pulse from the rising pulse generation circuit 314 and the character display timing signal, JK
It controls the flip-flop 315. At this time, the JK flip-flop 315 is set by the character display timing signal and reset by the pulse output from the rising pulse generation circuit 314.

The JK flip-flop 315 outputs a character size control signal for controlling character enlargement.
One of the four types of control signals shown in FIG. 14 is selected as the control signal, and the inverted signal of "1" and "0" of the selected signal is the display memory read signal. Then, the logical sum of the display memory read signal and the character display timing signal is used as the display memory read reference, and the read control of the display memory 13 is performed according to this reference,
This eliminates the need to read the display memory 13 unnecessarily. On the contrary, the number of data to be written in the display memory 13 can be greatly reduced.

As the smoothing processing circuit 32, for example, the "smoothing processing circuit" disclosed in Japanese Utility Model Laid-Open No. 62-89054 can be used. This process can be used for double height and width characters. Similarly, for larger quadruple-width characters, smoothing processing for vertical and horizontal quadruple characters is required.

That is, it is conceivable to prepare smoothing processing circuits corresponding to different character sizes and select them according to the character size. Also, vertical and horizontal 2
A method may be used in which the same smoothing process is performed again after the double process is performed once. Further, various methods such as a method of performing the vertical and horizontal doubling processing and shaving and correcting a part of the data to be added can be appropriately adopted. For example, when such a smoothing process is performed, white points are added as shown in FIG. 8B, and it is possible to suppress unevenness that becomes conspicuous when enlarged.

Now, the character size data is freely written in the display memory 13. For this reason,
If the enlargement instruction is set for the character specified in the last digit or the lowest line, the character will be off the screen. Therefore, the timing generation circuit 11 shown in FIG.
Generates a display range signal indicating a period for displaying the character data, and the display range limiting circuit 33 limits the display output data to a displayable range only. By doing so, the control can be performed only by controlling the timing signal, and the circuit scale can be reduced.

Further, in the display control device configured to fix the line spacing, in order to prevent the characters from being cut off, the size in the vertical direction may be limited so that enlargement cannot be designated. Similarly, since the number of digits in the horizontal direction is limited by the small letter size, the horizontal enlargement of the character size at the right end may be fixed so that it cannot be set in advance.

The output signals of the display control device in the above-described embodiments are converted into color data and displayed on the television screen. In particular, with the spread of personal computers and the increase in memory capacity and cost, systems using a bitmap memory for display have appeared.

Even in a system having such a bitmap memory, the display control device as shown in the embodiment can be realized. If the bitmap memory can display up to 8 colors in RGB, R,
It has a memory capacity capable of expressing the same number of horizontal and vertical dots for each of G and B. That is, the display data output from the parallel / serial conversion circuit 19 shown in FIG. 1 or the display data output from the display range limiting circuit 33 shown in FIG. 13 is converted into color data.

Since these display data are 1-bit signals of "1" or "0", in the case of a system of three colors RGB, if "1", the display color represented by each 1-bit RGB is represented by "1". If it is "0", it is converted into a background color represented by 1 bit each of RGB. This information can be incorporated in a system that performs bitmap display by writing data in each R, G, B bit memory in accordance with the screen scanning position.

If the number of colors can be increased, the bit map memory stores color designation data instead of color data. For example, in the case of 16-color display, up to now, there were three surfaces of three colors of R, G, and B, but in the case of a bitmap memory, 4 of 0, 1, 2, and 3 of the color designation number, respectively. It is composed of planes, each plane is read out simultaneously at the time of display processing, and is converted into RGB data by a color designation memory.

With such a configuration, in the system using the bitmap memory, various figures and characters were drawn by software processing by the microprocessor. However, in such a processing method, in order to rewrite the data at high speed, it is required to increase the processing speed of the microprocessor, and the system is expensive only by the display control.

By using the system described in the embodiment in response to such a problem, the display used for setting and controlling the device can be realized at a low cost with a small circuit. further,
If a function to draw a figure by a microprocessor is added, it can be utilized for a system using a bitmap memory.

[0092]

As described above, according to the television display control device of the present invention, it is possible to display different character sizes based on one character data, and to display different character sizes with respect to vertically overlapping positions. Characters can be displayed.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram for explaining a display control device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a display memory according to the above embodiment.

FIG. 3 is a diagram showing an example of character fonts stored in a CG-ROM.

FIG. 4 is a diagram for explaining a counter output in a display row for explaining a timing signal that determines a display position.

FIG. 5 shows an example of a character display line selection signal,
(A) to (D) correspond to lowercase letters, standard, double and quadruple characters, respectively.

FIG. 6 is a circuit configuration diagram showing an example of a parallel / serial conversion circuit.

FIG. 7 is a diagram illustrating an operation timing of a parallel / serial conversion circuit.

8A to 8C are views for explaining display positions of characters of different sizes.

FIG. 9 is a diagram showing a timing signal for determining a display position,
The figure which shows the counter output in a display line.

10A to 10D are lowercase letters, standard letters, and 2 letters, respectively.
The figure which shows the line selection signal respectively corresponding to the character of 4 times and 4 times.

FIG. 11 shows a timing signal for determining a display position,
(A) shows a case of sequential scanning timing, and (B) shows a case of interlaced scanning timing.

FIG. 12 illustrates the relationship between the character size and the display line. (A) shows the relationship between the display memory line and the character size.
(B) shows the order of the readout rows of the display memory.

FIG. 13 is a circuit configuration diagram for explaining a different embodiment of the present invention.

FIG. 14 is a diagram showing an example of a character size control circuit of the above embodiment.

FIG. 15 is a diagram showing timing signals for explaining the operation of the character size control circuit.

16A to 16C are views for explaining the problems of the conventional example.

FIG. 17 is a circuit configuration diagram illustrating an example of a conventional display control device.

18 (A) and 18 (B) each show a display example of a lower case letter in the above conventional example, and FIG. 18 (B) shows an example of an enlarged character.

FIG. 19 is a circuit configuration diagram illustrating another example of a conventional display control circuit.

FIG. 20 is a diagram for explaining character enlargement in the conventional example.

[Explanation of symbols]

11 ... Timing generation circuit, 12 ... Display memory control circuit, 13
… Display memory, 14… Line number generation circuit in display line, 15…
CG-ROM, 16 ... Line selection circuit, 17 ... Read control circuit, 18 ... Address generation circuit, 19 ... Parallel / serial conversion circuit, 21 ... Latch circuit, 22, 23 ... Selector, 31 ... Character size control circuit, 32 ... Smoothing processing circuit, 33 ... Display range limiting circuit.

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[Procedure amendment]

[Submission date] July 15, 1996

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] FIG.

[Correction method] Change

[Correction contents]

16A to 16D are views for explaining the problems of the conventional example.

Claims (8)

[Claims] 1. A first storage means for storing display character data of characters or figures expressed by a collection of m × n points on a television display screen, and the first storage means for displaying on the screen. Second storage means storing a character code for reading out the stored display character data, and a character stored in the first storage means according to a horizontal position of the display screen to be displayed. The character code stored in the second storage means indicating the correspondence of the data is read out, converted into address data, and the character font of the one line designated from the character font of the character data stored in the first storage means is read. And a reading means for reading the data, and an output means for converting the character font data read by the reading means into serial data and outputting the serial data according to horizontal scanning of the display screen. The second storage means has a stored character code and character size data corresponding to each character for each character, and at the time of reading, reads the character size data together with the character code according to the horizontal position. And a character font of the line designated from the first storage means, which is read based on the number of lines in one line of the read character size data, is converted into a line number in the character font. It is provided with a character font reading means for reading data and parallel and serial converting means for converting the character font data read by the reading means into serial data and reading the read data. A television table characterized by generating timing according to Indicating control device. 2. The reading line of the character font data stored in the first storage means is determined by a counter, and the counter is up to the number of scanning lines necessary for displaying a character of maximum size. The counter is provided with a counting means and is provided with a stopping means for stopping when the maximum vertical character displayed in one line is displayed, and the character size read from the second storage means. The data controls the selection means for selecting the signal line in the range corresponding to the character size from the output signal of the counter, and generates the display restriction signal for selecting the display position among the line designation outputs of the small characters which are repeated. The television display control device according to claim 1, wherein 3. The second storage means has an area for at least two lines, detects an enlarged character in the previously displayed line, and displays the next line in the previous line. 2. The television display control device according to claim 1, further comprising means for determining whether or not the characters overlap each other, and the data display of the next line is prohibited in a state where the characters are determined to overlap. 4. The second storage means stores a character code to be displayed in a unit of a minimum display character, and a character of any size is displayed in a unit of the minimum display character size. The television display control device according to claim 1, wherein is set. 5. The character size control means for inputting the character size data read out from the second storage means, and further, during the period during which the character display is being performed in one horizontal scanning period, the second 2. The television display control device according to claim 1, further comprising a cancellation signal generating means for generating a signal for canceling the data read timing signal of the storage means. 6. A means for reading character font data of two or more lines adjacent to each other during a period for displaying one character based on a character font constituting display character data read from the first storage means, and these data. A means for adjusting the delay time of each is provided, and when the characters are enlarged and displayed, the data smaller than the original dot data is replenished from the arrangement of the dot data expressing the character graphic so that the diagonal line can be smoothly expressed. The television display control device according to claim 1. 7. A means for generating horizontal and vertical control signals indicating a range in which a character or the like is expressed on a display screen is provided, and character display data exceeding the range is prevented from being displayed beyond the display range. The television display control device according to claim 1. 8. The character display data read from the first storage means is converted into serial data and then output to a display device for modifying the character graphic, and output from the modifying means. 2. The television display control device according to claim 1, further comprising control means for storing the data in a bitmap memory, wherein the data not subjected to character modification is written in the bitmap memory in a parallel data state.