JPH09260849A - Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing method - Google Patents
Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing methodInfo
- Publication number
- JPH09260849A JPH09260849A JP6155396A JP6155396A JPH09260849A JP H09260849 A JPH09260849 A JP H09260849A JP 6155396 A JP6155396 A JP 6155396A JP 6155396 A JP6155396 A JP 6155396A JP H09260849 A JPH09260849 A JP H09260849A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- inner layer
- resin
- printed wiring
- board manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はビアホールを有する
内層用回路板の製造方法、及び、その内層用回路板を用
いた多層プリント配線板の製造方法に関し、具体的に
は、ビルドアップ方式で多層プリント配線板を作製する
に適した内層用回路板の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an inner layer circuit board having a via hole, and a method for manufacturing a multilayer printed wiring board using the inner layer circuit board. The present invention relates to a method for manufacturing an inner layer circuit board suitable for manufacturing a printed wiring board.
【０００２】[0002]
【従来の技術】電子機器、電気機器に用いられる多層プ
リント配線板は、基材に樹脂を含浸し半硬化したプリプ
レグを介し、回路基板、または、銅箔を重ね、加熱加圧
することにより製造する。近年、高密度化、小型化、薄
型化の要求に伴って、プリプレグに代わり、エポキシ樹
脂等の樹脂のみで絶縁樹脂層を形成するビルドアップ方
式が採用されている。このビルドアップ方式による樹脂
層の形成は、例えば、フローコータで樹脂を塗工する方
法、スクリーン印刷による方法、樹脂フィルムを重ねる
方法が挙げられる。2. Description of the Related Art A multilayer printed wiring board used in electronic equipment and electric equipment is manufactured by laminating a circuit board or a copper foil through a prepreg obtained by impregnating a base material with a resin and semi-curing the same, and heating and pressing. . In recent years, along with the demand for higher density, smaller size, and thinner thickness, a build-up method has been adopted in which an insulating resin layer is formed only with a resin such as an epoxy resin, instead of a prepreg. The formation of the resin layer by the build-up method includes, for example, a method of coating a resin with a flow coater, a method of screen printing, and a method of laminating resin films.
【０００３】[0003]
【発明が解決しようとする課題】上記ビルドアップ方式
で多層プリント配線板を製造する際、内層用回路板のス
ルーホール上に塗工等で樹脂を被覆すると、この樹脂が
たれやへこみを生じるので、スルーホール上に絶縁樹脂
層を形成するに困難をきたした。その対策として、スル
ーホールに樹脂を封入し、その後、絶縁樹脂層を形成す
る方法が採用されている。上記方法で絶縁樹脂層を形成
した多層プリント配線板は、プリプレグを用いないた
め、絶縁樹脂層の厚さを数１０μｍ程度の薄さに形成で
きるため、薄型化には適しているが、半田等の熱衝撃に
よりふくれを生じるおそれがある。そのため、耐熱性の
向上が求められている。なかでも、保管中に吸湿すると
半田の際に、内層用回路板のスルーホール（多層プリン
ト配線板ではビアホールと称する）内にふくれが生じ易
い。When a multilayer printed wiring board is manufactured by the build-up method described above, if resin is coated on the through holes of the circuit board for the inner layer by coating or the like, this resin causes sagging or dents. , It was difficult to form the insulating resin layer on the through hole. As a countermeasure, a method of encapsulating a resin in the through hole and then forming an insulating resin layer is adopted. The multilayer printed wiring board on which the insulating resin layer is formed by the above method does not use a prepreg, and thus the insulating resin layer can be formed to a thickness of about several tens of μm, which is suitable for thinning, but solder or the like. There is a risk of blistering due to thermal shock. Therefore, improvement in heat resistance is required. Above all, when moisture is absorbed during storage, swelling is likely to occur in through holes (called via holes in the multilayer printed wiring board) of the inner layer circuit board during soldering.
【０００４】本発明は上記事実に鑑みてなされたもの
で、その目的とするところは、吸湿耐熱性の良好な、ビ
ルドアップ方式に適した内層用回路板の製造方法、及
び、この内層用回路板を用いた多層プリント配線板の製
造方法を提供することにある。The present invention has been made in view of the above facts, and it is an object of the present invention to provide a method of manufacturing an inner layer circuit board having good heat resistance against moisture absorption and suitable for a build-up method, and the inner layer circuit. It is to provide a method for manufacturing a multilayer printed wiring board using a board.
【０００５】[0005]
【課題を解決するための手段】本発明の請求項１に係る
内層用回路板の製造方法は、銅張り積層板１にスルーホ
ール３を設け、このスルーホール３に導電路２を形成
し、上記導電路２に粗面化処理を施した後に、上記スル
ーホール３内に樹脂を封入し、穴埋め樹脂層４を形成
し、その後、銅張り積層板の表面に導体回路を形成する
ことを特徴とする。上記方法により、導電路２の内壁面
２ａと穴埋め樹脂層４との密着性が向上する。A method of manufacturing a circuit board for an inner layer according to claim 1 of the present invention is to provide a through hole 3 in a copper clad laminate 1 and to form a conductive path 2 in the through hole 3. After conducting the surface roughening treatment on the conductive path 2, a resin is filled in the through hole 3 to form a hole filling resin layer 4, and then a conductor circuit is formed on the surface of the copper clad laminate. And By the above method, the adhesion between the inner wall surface 2a of the conductive path 2 and the filling resin layer 4 is improved.
【０００６】本発明の請求項２に係る内層用回路板の製
造方法は、請求項１記載の内層用回路板の製造方法にお
いて、上記粗面化処理はソフトエッチングであることを
特徴とする。A method for manufacturing an inner layer circuit board according to a second aspect of the present invention is characterized in that in the method for manufacturing the inner layer circuit board according to the first aspect, the roughening treatment is soft etching.
【０００７】本発明の請求項３に係る多層プリント配線
板の製造方法は、請求項１又は請求項２記載の内層用回
路板を用い、この内層用回路板の導体回路５を被覆する
絶縁樹脂層７をビルドアップ方式で形成することを特徴
とする。A method for manufacturing a multilayer printed wiring board according to a third aspect of the present invention uses the inner layer circuit board according to the first or second aspect, and an insulating resin coating the conductor circuit 5 of the inner layer circuit board. The layer 7 is formed by a build-up method.
【０００８】[0008]
【発明の実施の形態】本発明を図面に基づいて説明す
る。図１（ａ）〜（ｃ）は本発明の一実施の形態をステ
ップ毎に示した要部の断面図であり、図２は本発明の一
実施の形態のステップを示した要部の断面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings. 1 (a) to 1 (c) are sectional views of an essential part showing an embodiment of the present invention step by step, and FIG. 2 is a sectional view of an essential part showing the step of an embodiment of the present invention. It is a figure.
【０００９】本発明の対象となる内層用回路板は、ビル
ドアップ方式で作製する多層プリント配線板に用いられ
る回路板であり、多層プリント配線板ではビアホールと
なるスルーホール３を有する。上記内層用回路板に使用
される銅張り積層板１は、基材に樹脂を含浸して得られ
るプリプレグの樹脂を硬化させた絶縁基板層６、及び、
絶縁基板層６の表面に配設された銅箔５ａからなる。上
記樹脂としてはエポキシ樹脂、ポリイミド樹脂、フッ素
樹脂、フェノール樹脂、ＰＰＯ樹脂等の単独、変性物、
混合物等が挙げられる。上記基材としては、特に限定し
ないが、ガラス繊維等の無機材料の方が耐熱性、耐湿性
に優れて好ましい。また、耐熱性に優れる有機繊維布基
材及びこれらの混合物を用いることもできる。The inner layer circuit board to which the present invention is applied is a circuit board used in a multilayer printed wiring board manufactured by a build-up method, and has a through hole 3 which is a via hole in the multilayer printed wiring board. The copper-clad laminate 1 used for the inner layer circuit board is an insulating substrate layer 6 obtained by curing a resin of a prepreg obtained by impregnating a base material with a resin, and
It is made of a copper foil 5a arranged on the surface of the insulating substrate layer 6. Examples of the above resin include epoxy resin, polyimide resin, fluororesin, phenol resin, PPO resin, etc., which are independent or modified products,
A mixture etc. are mentioned. The base material is not particularly limited, but an inorganic material such as glass fiber is preferable because it is superior in heat resistance and moisture resistance. Further, an organic fiber cloth base material having excellent heat resistance and a mixture thereof can also be used.
【００１０】本発明の内層用回路板の製造方法について
説明する。図１（ａ）に示す如く、上記銅張り積層板１
にスルーホール３が設けられ、このスルーホール３に銅
メッキ等を施し導電路２が形成される。本発明の特徴
は、上記銅張り積層板１の導電路２の内壁面２ａに粗面
化処理が施されることにある。上記粗面化処理により、
後工程で形成される穴埋め樹脂層４と導電路２との密着
性が向上し、吸湿後の耐熱性が良好となる。上記粗面化
の程度は０．５μｍ〜１０μｍ、好ましくは１μｍ〜５
μｍ程度である。上記粗面化処理としては、ソフトエッ
チングを施す方法、こぶメッキを施す方法、酸化処理を
施す方法が例示される。なかでも、ソフトエッチングに
よる方法は、処理時間が短時間でできることから簡便に
粗面化できるので好ましい。上記ソフトエッチング液と
して、具体的には、塩化第二銅ソフトエッチング液、塩
化第二鉄ソフトエッチング液、硫酸−過水ソフトエッチ
ング液、過硫酸ソーダソフトエッチング液、過硫酸アン
モンソフトエッチング液、アルカリエッチャント等が挙
げられる。上記酸化処理液として、具体的には、亜塩素
酸ナトリウム水溶液等が挙げられる。A method for manufacturing the inner layer circuit board of the present invention will be described. As shown in FIG. 1A, the copper-clad laminate 1
A through hole 3 is provided in the through hole 3 and the conductive path 2 is formed by plating the through hole 3 with copper or the like. A feature of the present invention is that the inner wall surface 2a of the conductive path 2 of the copper-clad laminate 1 is roughened. By the roughening treatment,
The adhesiveness between the hole-filling resin layer 4 formed in the subsequent step and the conductive path 2 is improved, and the heat resistance after moisture absorption is improved. The degree of roughening is 0.5 μm to 10 μm, preferably 1 μm to 5
It is about μm. Examples of the roughening treatment include a soft etching method, a bump plating method, and an oxidation treatment method. Among them, the method using soft etching is preferable because the treatment time can be shortened and the surface can be easily roughened. As the soft etching solution, specifically, cupric chloride soft etching solution, ferric chloride soft etching solution, sulfuric acid-perhydrogen soft etching solution, sodium persulfate soft etching solution, ammonium persulfate soft etching solution, alkali Examples include etchants. Specific examples of the oxidation treatment liquid include an aqueous solution of sodium chlorite.
【００１１】図１（ｂ）に示す如く、上記導電路２に粗
面化処理を施した後に、上記スルーホール３内に樹脂を
封入し穴埋め樹脂層４を形成する。樹脂の封入はスクリ
ーン印刷法等により行えばよい。封入した樹脂を硬化さ
せ穴埋め樹脂層４を形成し、研磨を行い表面を平滑にし
た後に、図１（ｃ）に示す如く、銅箔５ａにエッチング
を施し、導体回路５を形成し、内層用回路板を作製す
る。As shown in FIG. 1B, after the conductive path 2 is roughened, a resin is filled in the through hole 3 to form a hole filling resin layer 4. The resin may be enclosed by a screen printing method or the like. After hardening the encapsulated resin to form a hole-filling resin layer 4, polishing and smoothing the surface, the copper foil 5a is etched to form a conductor circuit 5 as shown in FIG. Make a circuit board.
【００１２】次に、上記内層用回路板を用いた多層プリ
ント配線板の製造方法を説明する。図２に示す如く、内
層用回路板の導体回路５にビルドアップ方式で樹脂を被
覆し、この樹脂を硬化させて絶縁樹脂層７を形成する。
上記ビルドアップ方式として、フローコータで樹脂を塗
工する方法、スクリーン印刷による方法、樹脂フィルム
を重ねる方法が挙げられる。上記樹脂としては、絶縁基
板層６を構成する樹脂が挙げられ、絶縁基板層６と同一
の樹脂でも異なる樹脂でもよいが、同一の樹脂の方が寸
法挙動が同じ点で好ましい。なかでも、エポキシ樹脂を
用いた場合に吸湿後の耐熱性低下を防止する効果が顕著
に表れる。Next, a method of manufacturing a multilayer printed wiring board using the above-mentioned inner layer circuit board will be described. As shown in FIG. 2, the conductor circuit 5 of the inner layer circuit board is coated with a resin by a build-up method, and the resin is cured to form the insulating resin layer 7.
Examples of the build-up method include a method of coating a resin with a flow coater, a method of screen printing, and a method of laminating resin films. Examples of the resin include the resin forming the insulating substrate layer 6, and may be the same resin as the insulating substrate layer 6 or different resins, but the same resin is preferable in terms of the same dimensional behavior. Among them, when an epoxy resin is used, the effect of preventing a decrease in heat resistance after moisture absorption is remarkably exhibited.
【００１３】上記多層プリント配線板は、必要に応じ
て、サブトクラティブ、アディティブ等を用いて絶縁樹
脂層７上に外層導体回路（図示せず）を形成する。な
お、上記内層用回路板は内層用の導体回路を有する回路
板である限り上記実施の形態に限定されない。上記内層
用回路板は、内層用回路板の上下両面に絶縁樹脂層７を
形成して使用する回路板でも、内層用回路板の片面のみ
に絶縁樹脂層７を形成し他の面は外層導体回路として使
用する回路板でもよい。In the above-mentioned multilayer printed wiring board, an outer conductor circuit (not shown) is formed on the insulating resin layer 7 by using subtocratic, additive, etc., if necessary. The inner layer circuit board is not limited to the above-mentioned embodiment as long as it is a circuit board having a conductor circuit for the inner layer. The circuit board for the inner layer may be a circuit board in which the insulating resin layers 7 are formed on the upper and lower surfaces of the circuit board for the inner layer. It may be a circuit board used as a circuit.
【００１４】上述の如く、ビルドアップ方式に適した内
層用回路板を得ることができ、上記内層用回路板を用い
るので、吸湿耐熱性が良好な多層プリント配線板を得る
ことができる。As described above, an inner layer circuit board suitable for the build-up method can be obtained, and since the inner layer circuit board is used, a multilayer printed wiring board having a good heat resistance against moisture absorption can be obtained.
【００１５】[0015]
【実施例】以下、本発明の実施例と比較例を挙げる。評
価用の多層プリント配線板を作製し、吸湿後の半田耐熱
性を測定した。銅張り積層板として、１８μｍ厚みの銅
箔を両面に配した厚さ０．８ｍｍのエポキシ樹脂ガラス
基材積層板（松下電工株式会社製：Ｒ−１７０５）を用
いた。この銅張り積層板に直径０．２５ｍｍのスルーホ
ールを４００穴作製した。上記スルーホールに硫酸銅メ
ッキ液を使用し、電流密度２Ａ／ｄｍ2 、１時間の条件
で無電解銅めっきを行い、厚さ２０μｍの導電路を形成
した。上記基板を、実施例及び比較例に用いた。EXAMPLES Examples of the present invention and comparative examples will be described below. A multilayer printed wiring board for evaluation was prepared and solder heat resistance after moisture absorption was measured. As the copper-clad laminate, a 0.8-mm-thick epoxy resin glass substrate laminate (R-1705, manufactured by Matsushita Electric Works, Ltd.) having 18 μm-thick copper foil on both sides was used. 400 through holes having a diameter of 0.25 mm were formed in this copper-clad laminate. A copper sulfate plating solution was used for the through holes, and electroless copper plating was performed under the conditions of a current density of 2 A / dm 2 and 1 hour to form a conductive path having a thickness of 20 μm. The substrate was used in Examples and Comparative Examples.
【００１６】（実施例１）上記スルーホールに導電路を
有した基板に粗面化処理を施した。粗面化処理は、塩化
第二銅ソフトエッチング液を使用しソフトエッチングを
行った。導電路の内壁面を拡大鏡で観察し、粗さを測定
したところ粗さは２μｍであった。その後、上記スルー
ホール内にスクリーン印刷法で、ＵＶ硬化と熱硬化の両
タイプが含有した樹脂（山栄化学株式会社製：ＰＨＰ９
００，ＤＣ−３）を封入し、露光量１〜１．５Ｊ／ｃｍ
2 でＵＶ硬化後、温度１５０℃、時間３０分に条件で熱
硬化させ、穴埋め樹脂層を形成した。回路板の表面を研
磨した後に、内層用回路板の片面に、フローコータでエ
ポキシ樹脂を塗工し、厚み５０μｍの絶縁樹脂層を形成
し、評価用の多層プリント配線板とした。この塗工した
樹脂は、内層用回路板と同一構成材料からなるビスフェ
ノールＡ型エポキシ樹脂を主成分とするものを使用し
た。なお、評価用のため、内層用回路板の導体回路は全
面銅箔の状態で行い、また、絶縁樹脂層上に外層導体回
路も作製しなかった。Example 1 A substrate having conductive paths in the through holes was subjected to a surface roughening treatment. The surface roughening treatment was performed by soft etching using a cupric chloride soft etching solution. When the inner wall surface of the conductive path was observed with a magnifying glass and the roughness was measured, the roughness was 2 μm. After that, a resin containing both UV-curing and thermosetting types (screen-made by Sanei Chemical Co., Ltd .: PHP9) was applied to the through holes by screen printing.
00, DC-3), and an exposure dose of 1-1.5 J / cm
After UV curing at 2, it was thermally cured under the conditions of a temperature of 150 ° C. and a time of 30 minutes to form a hole-filling resin layer. After polishing the surface of the circuit board, an epoxy resin was applied to one surface of the circuit board for inner layer with a flow coater to form an insulating resin layer having a thickness of 50 μm, to obtain a multilayer printed wiring board for evaluation. As the coated resin, a resin whose main component was a bisphenol A type epoxy resin made of the same constituent material as that of the inner layer circuit board was used. For the purpose of evaluation, the conductor circuit of the inner layer circuit board was entirely copper foil, and the outer layer conductor circuit was not formed on the insulating resin layer.
【００１７】（実施例２）上記スルーホールに導電路を
有した基板に粗面化処理を施した。粗面化処理は、硫酸
−過水ソフトエッチング液を使用しソフトエッチングを
行った。導電路の内壁面を拡大鏡で観察し、粗さを測定
したところ粗さは１μｍであった。その後は実施例１と
同様にして評価用の多層プリント配線板を作製した。(Example 2) A substrate having a conductive path in the through hole was subjected to a surface roughening treatment. For the roughening treatment, soft etching was performed using a sulfuric acid-hydrogen peroxide soft etching solution. When the inner wall surface of the conductive path was observed with a magnifying glass and the roughness was measured, the roughness was 1 μm. Thereafter, a multilayer printed wiring board for evaluation was prepared in the same manner as in Example 1.
【００１８】（実施例３）上記スルーホールに導電路を
有した基板に粗面化処理を施した。粗面化処理は、亜塩
素酸ナトリウム水溶液を使用し酸化処理を行った。導電
路の内壁面を拡大鏡で観察し、粗さを測定したところ粗
さは０．５μｍであった。その後は実施例１と同様にし
て評価用の多層プリント配線板を作製した。Example 3 A substrate having conductive paths in the through holes was subjected to a surface roughening treatment. The roughening treatment was performed by using an aqueous solution of sodium chlorite. When the inner wall surface of the conductive path was observed with a magnifying glass and the roughness was measured, the roughness was 0.5 μm. Thereafter, a multilayer printed wiring board for evaluation was prepared in the same manner as in Example 1.
【００１９】（比較例１）上記スルーホールに導電路を
有した基板に粗面化処理を施すことなく、上記スルーホ
ール内にスクリーン印刷法で、ＵＶ硬化と熱硬化の両タ
イプが含有した樹脂（山栄化学株式会社製：ＰＨＰ９０
０，ＤＣ−３）を封入し、露光量１〜１．５Ｊ／ｃｍ2
でＵＶ硬化後、温度１５０℃、時間３０分に条件で熱硬
化させ、穴埋め樹脂層を形成した。その後は実施例１と
同様にして評価用の多層プリント配線板を作製した。な
お、導電路の内壁面を拡大鏡で観察し、粗さを測定した
ところ粗さは０．２μｍであった。(Comparative Example 1) A resin containing both UV-curing and heat-curing type resin was screen-printed in the through-hole without roughening the substrate having the conductive path in the through-hole. (Sanei Chemical Co., Ltd .: PHP90
0, DC-3), and an exposure dose of 1-1.5 J / cm 2
After UV-curing, the resin was thermally cured under the conditions of a temperature of 150 ° C. and a time of 30 minutes to form a hole-filling resin layer. Thereafter, a multilayer printed wiring board for evaluation was prepared in the same manner as in Example 1. When the inner wall surface of the conductive path was observed with a magnifying glass and the roughness was measured, the roughness was 0.2 μm.
【００２０】（評価）得られた実施例１〜３、及び、比
較例１の多層プリント配線板を１２１℃、２時間の条件
でＰＣＴ（プレッシャクッカーテスト）処理により加湿
させた。その後、温度２６０℃の半田に２０秒間浸漬し
た。浸漬した後に、スルーホール４００穴を拡大鏡で観
察し、ふくれの発生の有無を判定した。結果は表１に示
す通り、実施例１〜３はふくれが０〜３個であったのに
対し、比較例１は２１８個ふくれが発生していた。本発
明の製造方法によって得られた多層プリント配線板は吸
湿耐熱性が良好なことが確認できた。(Evaluation) The obtained multilayer printed wiring boards of Examples 1 to 3 and Comparative Example 1 were humidified by a PCT (pressure cooker test) treatment at 121 ° C. for 2 hours. Then, it was immersed in solder at a temperature of 260 ° C. for 20 seconds. After the immersion, 400 through holes were observed with a magnifying glass to determine the presence or absence of blistering. As shown in Table 1, in Examples 1 to 3, the number of blisters was 0 to 3, whereas in Comparative Example 1, 218 blisters were generated. It was confirmed that the multilayer printed wiring board obtained by the manufacturing method of the present invention has good moisture absorption heat resistance.
【００２１】[0021]
【表１】 [Table 1]
【００２２】[0022]
【発明の効果】本発明の請求項１又は請求項２に係る内
層用回路板の製造方法によると、スルーホール内の導電
路に粗面化処理を施した後に、スルーホール内に樹脂を
封入するので、密着性が向上するため、吸湿耐熱性の良
好な、ビルドアップ方式に適した内層用回路板が得られ
る。According to the method of manufacturing a circuit board for an inner layer according to the first or second aspect of the present invention, resin is sealed in the through holes after the conductive paths in the through holes are roughened. Therefore, since the adhesion is improved, it is possible to obtain an inner layer circuit board having a good heat resistance against moisture absorption and suitable for a build-up method.
【００２３】本発明の請求項３に係る多層プリント配線
板の製造方法によると、上記内層用回路板を用いるの
で、吸湿耐熱性の良好な多層プリント配線板が得られ
る。According to the method for manufacturing a multilayer printed wiring board according to the third aspect of the present invention, since the circuit board for the inner layer is used, a multilayer printed wiring board having good heat resistance against moisture absorption can be obtained.
【図１】（ａ）〜（ｃ）は本発明の一実施の形態をステ
ップ毎に示した要部の断面図である。FIG. 1A to FIG. 1C are cross-sectional views of a main part showing an embodiment of the present invention step by step.
【図２】本発明の一実施の形態のステップを示した要部
の断面図である。FIG. 2 is a sectional view of an essential part showing steps of an embodiment of the present invention.
１ 銅張り積層板 ２ 導電路 ２ａ 内壁面 ３ スルーホール ４ 穴埋め樹脂層 ５ 導体回路 ５ａ 銅箔 ６ 絶縁基板層 ７ 絶縁樹脂層 1 Copper-clad laminate 2 Conductive path 2a Inner wall surface 3 Through hole 4 Filling resin layer 5 Conductor circuit 5a Copper foil 6 Insulating substrate layer 7 Insulating resin layer
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成８年４月２２日[Submission date] April 22, 1996
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】００１５[Correction target item name] 0015
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【００１５】[0015]
【実施例】以下、本発明の実施例と比較例を挙げる。評
価用の多層プリント配線板を作製し、吸湿後の半田耐熱
性を測定した。銅張り積層板として、１８μｍ厚みの銅
箔を両面に配した厚さ０．８ｍｍのエポキシ樹脂ガラス
基材積層板（松下電工株式会社製：Ｒ−１７０５）を用
いた。この銅張り積層板に直径０．２５ｍｍのスルーホ
ールを４００穴作製した。上記スルーホールに硫酸銅メ
ッキ液を使用し、電流密度２Ａ／ｄｍ2 、１時間の条件
でめっきを行い、厚さ２０μｍの導電路を形成した。上
記基板を、実施例及び比較例に用いた。EXAMPLES Examples of the present invention and comparative examples will be described below. A multilayer printed wiring board for evaluation was prepared and solder heat resistance after moisture absorption was measured. As the copper-clad laminate, a 0.8-mm-thick epoxy resin glass substrate laminate (R-1705, manufactured by Matsushita Electric Works, Ltd.) having 18 μm-thick copper foil on both sides was used. 400 through holes having a diameter of 0.25 mm were formed in this copper-clad laminate. A copper sulfate plating solution was used for the above-mentioned through holes, and plating was performed under the conditions of a current density of 2 A / dm 2 and 1 hour to form a conductive path having a thickness of 20 μm. The substrate was used in Examples and Comparative Examples.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉岡 愼悟 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 杉山 肇 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 高木 光司 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 池谷 晋一 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 伊藤 克彦 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 井原 清暁 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 小川 悟 大阪府門真市大字門真1048番地松下電工株 式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Shingo Yoshioka 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd. (72) Inventor Hajime Sugiyama 1048, Kadoma, Kadoma City, Osaka Matsushita Electric Works Co., Ltd. 72) Inventor Koji Takagi, 1048, Kadoma, Kadoma City, Osaka Prefecture, Matsushita Electric Works Co., Ltd. (72) Inventor, Shinichi Ikeya, 1048, Kadoma, Kadoma City, Matsushita Electric Works Co., Ltd. 1048 Kadoma, Kadoma City, Matsushita Electric Works Co., Ltd. (72) Inventor, Kiyoaki Ihara, 1048 Kadoma, Kadoma City, Osaka Prefecture Osaka, Ltd. (72), Satoru Ogawa, 1048 Kadoma, Kadoma City, Osaka Matsushita Denko stock company
Claims (3)
のスルーホールに導電路を形成し、上記導電路に粗面化
処理を施した後に、上記スルーホール内に樹脂を封入
し、穴埋め樹脂層を形成し、その後、銅張り積層板の表
面に導体回路を形成することを特徴とする内層用回路板
の製造方法。1. A through hole is provided in a copper-clad laminate, a conductive path is formed in the through hole, a roughening treatment is applied to the conductive path, and a resin is sealed in the through hole to fill a hole filling resin. A method for producing a circuit board for an inner layer, comprising forming a layer and then forming a conductor circuit on the surface of the copper-clad laminate.
ることを特徴とする請求項１記載の内層用回路板の製造
方法。2. The method for manufacturing an inner layer circuit board according to claim 1, wherein the roughening treatment is soft etching.
板を用い、この内層用回路板の導体回路を被覆する絶縁
樹脂層をビルドアップ方式で形成することを特徴とする
多層プリント配線板の製造方法。3. A multi-layer printed wiring using the inner layer circuit board according to claim 1 or 2, and forming an insulating resin layer covering a conductor circuit of the inner layer circuit board by a build-up method. Method of manufacturing a plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6155396A JPH09260849A (en) | 1996-03-19 | 1996-03-19 | Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6155396A JPH09260849A (en) | 1996-03-19 | 1996-03-19 | Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09260849A true JPH09260849A (en) | 1997-10-03 |
Family
ID=13174428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6155396A Pending JPH09260849A (en) | 1996-03-19 | 1996-03-19 | Inner layer circuit board manufacturing method and multilayered printed wiring board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09260849A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1030544A1 (en) * | 1997-10-14 | 2000-08-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US7178234B2 (en) | 1999-10-26 | 2007-02-20 | Ibiden Co., Ltd. | Method of manufacturing multi-layer printed circuit board |
| JP2009147387A (en) * | 2009-03-27 | 2009-07-02 | Ibiden Co Ltd | Multilayer printed wiring board and method for manufacturing multilayer printed wiring board |
| CN115052418A (en) * | 2022-08-15 | 2022-09-13 | 四川恩巨实业有限公司 | Buried hole structure of multilayer PCB and setting method thereof |
-
1996
- 1996-03-19 JP JP6155396A patent/JPH09260849A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1030544A1 (en) * | 1997-10-14 | 2000-08-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| EP1030544A4 (en) * | 1997-10-14 | 2006-03-08 | Ibiden Co Ltd | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| CN100418390C (en) * | 1997-10-14 | 2008-09-10 | 揖斐电株式会社 | Multilayer printed circuit board and its producing method,filling resin composition for through hole |
| USRE40947E1 (en) | 1997-10-14 | 2009-10-27 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
| US7178234B2 (en) | 1999-10-26 | 2007-02-20 | Ibiden Co., Ltd. | Method of manufacturing multi-layer printed circuit board |
| US7795542B2 (en) | 1999-10-26 | 2010-09-14 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| US7999194B2 (en) | 1999-10-26 | 2011-08-16 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| US8106310B2 (en) | 1999-10-26 | 2012-01-31 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| US8822839B2 (en) | 1999-10-26 | 2014-09-02 | Ibiden Co., Ltd. | Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board |
| JP2009147387A (en) * | 2009-03-27 | 2009-07-02 | Ibiden Co Ltd | Multilayer printed wiring board and method for manufacturing multilayer printed wiring board |
| CN115052418A (en) * | 2022-08-15 | 2022-09-13 | 四川恩巨实业有限公司 | Buried hole structure of multilayer PCB and setting method thereof |
| CN115052418B (en) * | 2022-08-15 | 2022-11-15 | 四川恩巨实业有限公司 | Buried hole structure of multilayer PCB and setting method thereof |
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