JPH0922959A - Semiconductor device and semiconductor device unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device unit by which a high-density mounting operation can be realized by pulling out an outer lead part so as to keep exposed on the side face of a resin package, and by using the side face which has the outer lead as a mounting face with the resin package mounted in an erect state. SOLUTION: A first terminal part 24b-1 at an outer lead part 24 to be used as an external connecting terminal is pulled out so as to keep exposed on the side face 27a of a package 27. Thereby, the side face 27a which has the first terminal part 24b-1 can be used as a mounting face when it is mounted on a mounting board. As a result, a so-called vertical mounting operation in which the resin package 27 is mounted in an erect state can be performed. Thereby, a mounting space which is required to mount a semiconductor device 20 on the mounting board can be reduced, and, consequently, a high-density operation can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a semiconductor device unit, and more particularly to a semiconductor device and a semiconductor device unit which are stacked to achieve high density mounting. As electronic devices have become smaller, faster, and more sophisticated in recent years, there are similar demands for semiconductor devices used therein. In addition to the demands on the semiconductor device itself, improvement in mounting efficiency when mounting the semiconductor device on a substrate is also desired.

Therefore, a surface mount type semiconductor device in which leads are connected on the surface of a substrate is currently in the mainstream, but a semiconductor device with further improved mounting efficiency is desired.

[0003]

17 is a perspective view of a conventional semiconductor device 10, and FIG. 18 is a sectional view taken along the line AA in FIG. This semiconductor device 1 is a semiconductor device previously proposed by the present applicant and is disclosed in Japanese Patent Laid-Open No. 63-15453 or Japanese Patent Laid-Open No. 63-15451.

A semiconductor device 1 shown in each drawing has a semiconductor element (semiconductor chip) 2, a resin package 3 for encapsulating the semiconductor chip 2, one end 4a of each of which is connected to the semiconductor chip 2 by a wire 5, and the other. Package 3 at the end
4, which is exposed at the bottom surface 3a of the
The semiconductor chip 2 includes a stage 7 and the like on which the semiconductor chip 2 is mounted. That is, in the semiconductor device 10, the other parts of the leads 4 except the external terminals 6 are sealed in the package 3.

In the semiconductor device 1 having the above-described structure, since the portion of the lead 4 which becomes the external terminal 6 is exposed at the bottom surface 3a of the resin package 3, the lead 4 is projected laterally from the package 3. The amount can be shortened, and thus the packaging density can be improved. In addition, bending of the projecting portion of the lead is not necessary, and a die for this bending is also unnecessary, and various effects such as reduction in manufacturing cost can be achieved.

However, in the above-mentioned conventional semiconductor device, as shown in FIG.
As shown in FIG. 8, the leads 4 are provided on the sides of the semiconductor chip 2.
Since the end portion 4a to which the wire is connected is located, the package 3 becomes large and the semiconductor device 1
There was a problem that it could not be sufficiently miniaturized. That is, it is desirable that the size of the semiconductor device is ideally reduced to approximately the same size as the size of the semiconductor chip. However, in the conventional semiconductor device 1 described above, the size of the package 3 is larger than the size of the package 3 with respect to the semiconductor chip 2. Will be more than doubled.

Therefore, the present applicant has previously proposed Japanese Patent Application No. 4-281951 "Semiconductor device and its manufacturing method" as a semiconductor device capable of solving the above-mentioned problems. FIG.
Shows a semiconductor device according to the above application. A semiconductor device 10 shown in the figure has a semiconductor chip 11, a resin package 17 for encapsulating the semiconductor chip 11, an inner end portion 14a of each of which is electrically connected to the semiconductor chip 11, and an outer end portion thereof. The external terminals 16 are formed by being exposed on the bottom surface 17a of the package 17, and the other parts except the external terminals 16 are provided with a plurality of leads 14 which are sealed in the package 17. And the plurality of leads 1
4 is characterized in that a part or all of the package 4 overlaps the semiconductor chip 11 in the package 17 in the height direction.

By configuring the semiconductor device 10 as described above, a part or all of the leads 14 are overlapped with the semiconductor chip 11 in the package 17 in the height direction. Compared with the semiconductor device 1 shown in FIG. 18, this overlapping portion (in the figure,
The size of the semiconductor device 10 can be reduced by the area indicated by the arrow L1). In FIG. 19, 12 is a stage, 13 is an electrode pad, and 15 is a wire.

[0009]

According to the semiconductor device 10 according to the above-mentioned application, since the planar area of the semiconductor device 10 can be reduced, the semiconductor device 10 is planarly mounted on the mounting board (two-dimensional). It is possible to achieve high-density mounting in the case of performing (mounting).

However, since the semiconductor device 10 described above is a so-called lateral type semiconductor device in which the surface having the largest area among the six outer peripheral surfaces of the resin package 3 is used as the mounting surface, the semiconductor device shown in FIGS. Semiconductor device 1 shown
However, although high-density mounting can be achieved, there is a problem in that a wide disposition space is required and high-density mounting is limited.

On the other hand, in recent years, in order to perform higher density mounting, semiconductor devices have been three-dimensionally stacked in the lateral direction or the vertical direction and mounted. However, the semiconductor device 10 according to the previous application has a problem in that it cannot be stacked and mounted in the horizontal and vertical directions, and high-density mounting (that is, three-dimensional mounting) cannot be performed. there were.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device and a semiconductor device unit capable of realizing higher density packaging.

[0013]

The above object can be attained by taking the following means. According to a first aspect of the present invention, in a semiconductor device including a semiconductor element, a lead electrically connected to the semiconductor element, and a resin package that seals the semiconductor element and the lead, an external connection terminal of the lead is provided. The outer lead portion is formed so as to be exposed to the side surface of the resin package, and the resin package is mounted in an upright state with the side surface on which the outer lead portion is formed as a mounting surface. It is what

According to a second aspect of the invention, in the semiconductor device according to the first aspect, the outer lead portion is exposed not only on the mounting surface but also on two surfaces which intersect the mounting surface and face each other. It is characterized by being configured.

According to a third aspect of the invention, in the semiconductor device according to any one of the first and second aspects,
It is characterized in that the back surface of the semiconductor element is exposed from the resin package.

According to a fourth aspect of the invention, in the semiconductor device according to any one of the first and second aspects,
The semiconductor device is characterized by being mounted on the stage.

According to a fifth aspect of the present invention, the semiconductor device according to any one of the second to fourth aspects has a structure in which a plurality of semiconductor devices are arranged in a row or in a row and a row in the row and column directions. In the installed state, the outer lead portions provided in the respective semiconductor devices are electrically connected to each other between the adjacent semiconductor devices.

Each of the above means operates as follows.
According to the first aspect of the present invention, the outer lead portion serving as the external connection terminal of the lead is pulled out so as to be exposed on the side surface of the resin package, and thus the side surface on which the outer lead portion is formed is used as the mounting surface. Can be used. Therefore, it is possible to perform so-called vertical mounting in which the resin package is mounted in an upright state, and it is possible to reduce the space required for mounting the semiconductor device on the mounting board, and thus to realize high-density mounting. it can.

According to the second aspect of the invention, in addition to the mounting surface, the outer lead portion is exposed on two surfaces which intersect the mounting surface and face each other, so that the semiconductor device is made of resin. Of the outer peripheral surfaces constituting the package, the mounting surface and the two surfaces 2 intersecting with the mounting surface make a total of three electrical connections possible. Therefore, various mounting modes of the semiconductor device on the mounting substrate can be selected, and the adjacent semiconductor devices can be electrically connected to each other by using the outer lead portions, so that a plurality of semiconductor devices can be stacked. Become.

According to the third aspect of the invention, since the back surface of the semiconductor element is exposed from the resin package, the heat dissipation efficiency of the semiconductor element can be improved and the size of the semiconductor device can be reduced. Further, according to the invention described in claim 4, since the semiconductor element is mounted on the stage, the semiconductor element can be reliably held during resin molding or the like.

Further, according to the invention of claim 5, a plurality of semiconductor devices according to any one of claims 2 to 4 are arranged in a row or in both rows and columns, and the rows are arranged. In such a state, the outer lead portions are electrically connected to each other between the adjacent semiconductor devices, so that a large number of semiconductor devices can be mounted in a small space, thereby improving the mounting density. Can be planned.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a semiconductor device 20 which is a first embodiment of the present invention. In the figure, reference numeral 21 denotes, for example, a semiconductor element (semiconductor chip) for a memory chip, and a plurality of electrode pads 22 are arranged in a line at the center position of the surface (since FIG. 1 is a side sectional view, Only one electrode pad 22 appears). The surface of the semiconductor chip 21 on which the electrode pad 22 is formed (hereinafter referred to as the surface 2
A cover film 23 is provided on the (1a). The cover film 23 is a resin tape having an insulating property, and is configured to be adhered to the surface 21a.

Further, in the figure, reference numeral 24 is a plurality of leads (only one is shown like the electrode pad 23), and the inner lead portion 24a formed inside thereof extends to the upper portion of the semiconductor chip 21, The electrode pads 22 formed on the semiconductor chip 21 are connected by wires 25. That is, the semiconductor device 20 according to the present embodiment has a so-called lead-on-chip (LOC) structure. By adopting this LOC structure, the semiconductor device 20 can be downsized. However, the electrical connection between the inner lead portion 24a and the electrode pad 22 is made by the wire 2
The connection is not limited to the connection using 5, and a configuration using flip chip bonding using bumps may be used.

Further, the lead 24 is integrally formed with the inner lead portion 24a to form an outer lead portion 24b. The outer lead portion 24b has a first terminal portion 24b-1 and a first terminal portion 24b-1 as will be described later. Second terminal portion 24b-2
Are formed. The leads 24 are fixed to the semiconductor chip 21 by bonding the inner lead portions 24a to the upper portion of the cover film 23.

Further, in the figure, reference numeral 27 is a resin package (shown in satin) made of epoxy resin or the like, inside of which the semiconductor chip 21, the leads 24 and the wires 25 are sealed and protected. The resin package 27 has a substantially rectangular parallelepiped shape, and has an area substantially equal to the area of the semiconductor chip 21 in plan view. Therefore, the semiconductor device 20 has a chip size package (CS
P) structure, and the semiconductor device 20 is downsized.

Outer leads 24b of the leads 24 are drawn out along the outer surface of the resin package 27. Specifically, of the six outer surfaces of the resin package 27, the surface 27b (hereinafter referred to as the surface 2) that faces the surface of the semiconductor chip 21 on which the electrode pads 22 are formed.
7b) and the second outer lead portion 24b
Terminal portion 24b-2 of the outer lead portion 24b is pulled out, and the first terminal portion 24b-1 of the outer lead portion 24b is pulled out so as to extend along the surface 27a (hereinafter referred to as the side surface 27a) facing the side surface of the semiconductor chip 21. There is.

The first terminal portion 24b-1 has a side surface 27a.
Is exposed from the resin package 27, and the second terminal portion 24b-2 is exposed from the resin package 27 on the surface 27b. Therefore, the first and second terminal portions 24b-1 and 24b-2 can be used as external connection terminals.

On the other hand, the formation of the inner lead portion 24a and the outer lead portion 24b having the above structure on the lead 24 can be realized by bending the lead 24 appropriately. Therefore, the lead 24 having the above configuration can be easily formed. Further, the lead 24 having the above-described structure has a structure in which the other parts are embedded in the resin package 27 except for the first and second terminal portions 24b-1 and 24b-2, so that the lead 24 is formed. Can be reliably protected, and the lead pitch between adjacent leads 24 can be kept constant. Therefore, a short circuit does not occur between the adjacent leads 24, and the reliability of the semiconductor device 20 can be improved.

Further, the semiconductor device 20 according to the present embodiment is
As shown in FIG. 1, the back surface 21 b of the semiconductor chip 21 is exposed from the back surface 27 c of the resin package 27. Thus, the back surface 21b of the semiconductor chip 21
By exposing the resin package 27 from the resin package 27, the heat generated in the semiconductor chip 21 can be efficiently radiated to the outside, and the shape of the resin package 27 can be reduced. Therefore, the heat dissipation efficiency of the semiconductor device 20 can be improved, and
It is possible to reduce the size of the semiconductor device 20.

Further, according to the above-described semiconductor device 20 of the present embodiment, the outer lead portion 2 serving as an external connection terminal.
By pulling out the fourth first terminal portion 24b-1 so as to be exposed on the side surface 27a of the resin package 27,
The side surface 27a on which the first terminal portion 24b-1 is formed can be used as a mounting surface when mounting on a mounting board (not shown). Therefore, it is possible to perform so-called vertical mounting in which the resin package 27 is mounted in an upright state. By enabling vertical mounting in this way, the mounting space required for mounting the semiconductor device 20 on the mounting substrate can be reduced, and thus high-density mounting can be realized.

Next, a method of manufacturing the semiconductor device 20 according to the first embodiment described above will be described with reference to FIGS. 2 to 6, the same components as those shown in FIG. 1 will be described with the same reference numerals. To manufacture the semiconductor device 20, first, the lead frame 30 is manufactured. In order to manufacture the lead frame 30, first, a flat plate-shaped base material made of a lead alloy material such as 42 alloy or copper alloy is prepared, and, for example, press punching (another processing method such as etching method is used). Also possible). As a result, the lead frame 30 having the leads 24, the tie bars 31, the cradle 32 and the like as shown in FIG. 2 is formed.

FIG. 2B is a BB line in FIG.
It is sectional drawing which follows a line. As shown in the figure, during the press punching process, the forming process (bending process) of the lead 24 is simultaneously performed. Thus, the lead 24 having the inner lead portion 24a and the outer lead portion 24b composed of the first and second terminal portions 24b-1 and 24b-2 can be punched and molded at the same time. The process can be simplified.

After the lead frame 30 is formed as described above, a process of attaching the lead frame 30 to the semiconductor chip 21 is subsequently performed. A cover film 23 is previously attached to the surface 21a of the semiconductor chip 21 except in the vicinity of the position where the electrode pad 22 is provided. Then, the inner lead portion 24a of the lead frame 30 is adhered to the upper portion of the cover film 23 using an insulating adhesive or the like, whereby the lead frame 30 and the semiconductor chip 21 are joined as shown in FIG. At this time, the adhesion position of the inner lead portion 24a is selected so as to be close to the formation position of the electrode pad 22.

When the lead frame 30 and the semiconductor chip 21 are bonded as described above, subsequently, as shown in FIG. 4, the wire 25 is arranged between the inner lead portion 24a and the electrode pad 22. The disposing process of the wire 25 can be performed easily and at high speed by using a wire bonding device.

When the wire bonding process is completed, the semiconductor chip 21 and the lead frame 30 are subsequently mounted in a molding die and the resin package 27 is formed. During this molding process, the first and second leads 24 are formed.
The terminal portions 24b-1 and 24b-2 of the above are directly contacted with the cavity of the molding die, so that the first and second terminal portions 24b-1 and 24b-2 are removed from the resin package 27.
The exposed structure can be easily realized. Similarly, the back surface 2 of the semiconductor chip 21 is subjected to the molding process.
By arranging 1b to directly contact the cavity of the molding die, the resin package 27 is removed from the back surface 21b.
The exposed structure can be easily realized.

When the resin package 27 is formed as described above, a deburring process for removing burrs generated in the resin package 27, the first and second terminal portions 24b-1 and 24b- of the lead 24 are subsequently performed. 2) Solder plating on 2 and unnecessary parts on lead frame 30 (tie bar 3
1, credor 32, etc.) is removed. Then, the semiconductor device 20 shown in FIG. 1 is manufactured by performing the series of processes described above.

In the example shown in FIGS. 1 to 5, the lead frame 30 is used as the lead 24, and the lead 24 is used.
An example in which the wire 25 is used for electrical connection between the semiconductor chip 21 and the semiconductor chip 21 is shown. However, the lead and the electrical connection structure are not limited to this. For example, as shown in FIG. 6, a tape lead 33 having wiring printed on a resin base film is used as the lead, and the tape lead 33 and The electrical connection with the semiconductor chip 21 may be performed using the bumps 34.

7 and 8 show a modification of the semiconductor device 20 according to the first embodiment. In each figure,
The same components as those of the semiconductor device 20 shown in FIG. Semiconductor device 4 shown in FIG.
0 is characterized in that the semiconductor chip 21 including the back surface 21b thereof is completely sealed in the resin package 27. The configuration of the semiconductor device 40 according to the present modification is such that the semiconductor chip 21 generates less heat and the semiconductor chip 21 has a smaller amount of heat generation.
It is very effective when applied to those who dislike contact with humidity and outside air.

The semiconductor device 40 shown in FIG. 8 is characterized in that the semiconductor chip 21 is sealed in the resin package 27 while being mounted on the stage 46. As shown in FIG. 4, when the semiconductor chip 21 and the lead frame 30 are simply bonded to the inner lead portion 24a and the cover film 23, the bonding force between the semiconductor chip 21 and the lead frame 30 is not so strong. Therefore, the semiconductor chip 21 may be detached from the lead frame 30 when it is mounted on a molding die in the resin molding process.

However, by providing the stage 46 on the lead frame 30 and mounting the semiconductor chip 21 on the stage 46, it is possible to reliably prevent the semiconductor chip 21 from coming off the lead frame 30. it can. The stage 46 may be formed integrally with the lead 24 on one lead frame 30.
In addition, the lead frame for the lead 24 (lead frame for lead) and the lead frame for the stage 46 (lead frame for stage) are separately configured, and the lead frame for lead and the lead frame for stage are joined by welding or the like to be integrated. Good.

Next, a second embodiment of the present invention will be described. FIG. 9 shows a semiconductor device 50 according to the second embodiment of the present invention.
Is shown. In FIG. 9, the components corresponding to those of the semiconductor device 20 according to the first embodiment shown in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

The semiconductor device 50 according to the present embodiment has a structure in which the outer lead portion 24b is extended to the side surface 27a of the resin package 27 in the semiconductor device 20 according to the first embodiment, while the outer lead portion 24b is further provided. Is extended to the back surface 27c of the resin package 27, and the third terminal portion 24b-3 is formed on the back surface 27c. That is, in addition to the side surface 27a (mounting surface) of the resin package 27, the outer lead portion 24b is also exposed on the front surface 27b and the rear surface 27c that intersect the side surface 27a and face each other.

In the semiconductor device 50 according to the second embodiment having the above structure, in addition to the first terminal portion 24b-1 being formed on the side surface 27a of the resin package 27, the surface 27b of the resin package 27 is formed. The second terminal portion 24b-2 and the third terminal portion 24b-3 on the back surface 27c of the resin package 27.
Are arranged. Therefore, the semiconductor device 5
It becomes possible to stack and use a plurality of 0s in the lateral direction.

FIG. 10 shows a semiconductor device unit 55 having a structure in which a plurality of semiconductor devices 50 according to the second embodiment shown in FIG. 9 are arranged in a row in the lateral direction. In the semiconductor device unit 55 shown in the figure, in order to electrically connect the adjacent semiconductor devices 50, the second terminal portion 24b-2 disposed on the surface 27b of the resin package 27 and the resin package 27 are provided. The configuration is performed by connecting the third terminal portion 24b-3 provided on the back surface 27c. The electrical connection between each semiconductor device 50 and the mounting substrate is made by the first terminal portion 24b-1 formed on the side surface 27a of the resin package 27.

Thus, the semiconductor device 5 according to the present embodiment.
No. 0 has a structure in which the first to third terminal portions 24b-1 to 24b-3 are exposed on the respective surfaces 27a to 27b of the resin package 27, so that a plurality of semiconductor devices 50 are stacked to form a semiconductor device unit 55. Therefore, the semiconductor devices 50 can be arranged closer to each other as compared with the semiconductor device 20 according to the first embodiment shown in FIG. 1, so that the mounting density can be further improved and the semiconductor device unit 55.
It is possible to reduce the size and improve the performance of electronic devices equipped with the.

11 and 12 show a modification of the semiconductor device 50 according to the second embodiment. In each figure, the same components as those of the semiconductor device 50 shown in FIG. 9 are designated by the same reference numerals and the description thereof will be omitted. The semiconductor device 60 shown in FIG. 11 is characterized in that the back surface 21b of the semiconductor chip 21 is exposed to the outside from the back surface 27c of the resin package 27. According to the semiconductor device 60 having the configuration according to the present modification, the heat dissipation efficiency of the semiconductor chip 21 can be improved and the resin package 27 can be downsized similarly to the semiconductor device 20 shown in FIG.

The semiconductor device 65 shown in FIG. 12 is characterized in that the semiconductor chip 21 is mounted on the stage 46 and sealed in the resin package 27. According to the semiconductor device 65 having the configuration according to the present modification, it is possible to reliably prevent the semiconductor chip 21 from being separated from the lead frame 30 (see FIGS. 2 to 4), like the semiconductor device 45 shown in FIG. Can be prevented.

Next, a third embodiment of the present invention will be described. FIG. 13 shows a semiconductor device 7 according to a third embodiment of the present invention.
0 is shown. In FIG. 13, the components corresponding to those of the semiconductor device 50 according to the second embodiment shown in FIG. 9 are designated by the same reference numerals, and the description thereof will be omitted.

In the semiconductor device 70 according to the present embodiment, the semiconductor device 50 according to the second embodiment has a structure in which the leads 24 are drawn out only to one side surface 27a of the resin package 27, whereas the semiconductor device 70 faces the side surface 27a. The other side 2
It is characterized in that the lead 71 is also drawn out to 7d. The lead 71 extending toward the side surface 27d is configured to have a shape that is vertically symmetrical with the lead 24 arranged below.

Specifically, the inner lead portion 71a of the lead 71 is electrically connected to the electrode pad 73 formed on the semiconductor chip 21 by the wire 72. The outer lead portion 72a of the lead 71 is configured to include first to third terminal portions 71b-1 to 71b-3, and the first terminal portion 71b-1 is provided on the side surface 27d of the resin package 27. The second terminal portion 71b-2 is exposed to the surface 27b of the resin package 27, and the third terminal portion 71b-2 is exposed.
The b-3 is exposed on the back surface 27c of the resin package 27.

The semiconductor device 70 configured as described above is
Although the semiconductor device 50 according to the embodiment can be electrically connected only at the lower position of the resin package 27,
Even at the upper position of the resin package 27, electrical connection can be made using the lead 71. For this reason,
Since the semiconductor device 70 has a degree of freedom in the electrical connection mode, the semiconductor device 50 according to the second embodiment can be stacked only in the lateral direction, and the semiconductor device 70 according to the present embodiment has the lateral direction. In addition to this, it is possible to stack vertically.

FIG. 14 shows a semiconductor device unit 75 having a structure in which a plurality of semiconductor devices 70 according to the third embodiment shown in FIG. 13 are arranged in a row in the horizontal direction and in the vertical direction. In the semiconductor device unit 75 shown in the figure, in order to electrically connect the semiconductor devices 70 adjacent in the lateral direction, the second terminal portion 24b-2 provided on the surface 27b of the resin package 27 is used.
And the third provided on the back surface 27c of the resin package 27.
The terminal portion 24b-3 is connected to the terminal portion 24b-3.

Further, the semiconductor devices 70 which are vertically adjacent to each other
In order to electrically connect the two, the first terminal portion 71b-1 provided on the side surface 27d of the resin package 27 of the semiconductor device 70 located at the lower part and the semiconductor device 7 located at the upper part are connected.
No. 1 on the side surface 27a of the resin package 27
The terminal portion 24b-1 is connected to the terminal portion 24b-1. Furthermore, the electrical connection between each semiconductor device 50 and the mounting substrate is made by the first terminal portion 24 formed on the side surface 27a of the resin package 27 of the semiconductor device 70 located at the bottom.
b-1.

As described above, the semiconductor device 7 according to the present embodiment.
0 is the first to third terminal portions 24 formed on the lead 24
b-1 to 24b-3 and the first to third terminal portions 71b-1 to 71b-3 formed on the lead 71 are attached to the resin package 27.
The semiconductor device unit 75 can be formed by stacking a plurality of semiconductor devices 70 in both the horizontal direction and the vertical direction by exposing the respective surfaces 27a to 27b. Therefore, as compared with the semiconductor device unit 55 shown in FIG. 10, each semiconductor device 70 can be mounted at a higher density, and the electronic device or the like in which the semiconductor device unit 75 is mounted can be further downsized.

15 and 16 show a modification of the semiconductor device 70 according to the third embodiment. In each figure, the same components as those of the semiconductor device 70 shown in FIG. 13 are designated by the same reference numerals and the description thereof will be omitted. The semiconductor device 80 shown in FIG. 15 is characterized in that the back surface 21b of the semiconductor chip 21 is exposed to the outside from the back surface 27c of the resin package 27. According to the semiconductor device 80 having the configuration according to the present modification, the heat dissipation efficiency of the semiconductor chip 21 can be improved and the resin package 27 can be downsized as in the semiconductor devices 20 and 60 shown in FIGS. You can

The semiconductor device 85 shown in FIG. 16 is characterized in that the semiconductor chip 21 is mounted in the stage 46 and sealed in the resin package 27. According to the semiconductor device 85 having the configuration according to the present modification, the semiconductor chip 21 is separated from the lead frame 30 (see FIGS. 2 to 4) like the semiconductor devices 45 and 65 shown in FIGS. 8 and 12. This can be reliably prevented.

[0057]

As described above, according to the present invention, the following various effects can be realized. According to the invention of claim 1, since the side surface on which the outer lead portion is formed can be used as a mounting surface, so-called vertical mounting in which the resin package is mounted in an upright state is possible, and the semiconductor is mounted on the mounting substrate. The space required for mounting the device can be reduced, and thus high-density mounting can be realized.

Further, according to the second aspect of the invention, the semiconductor device can be electrically connected on a total of three outer peripheral surfaces constituting the resin package, that is, the two surfaces 2 intersecting with the mounting surface. It is possible to select various mounting modes of the semiconductor device on the substrate, and it is also possible to stack a plurality of semiconductor devices because the adjacent semiconductor devices can be electrically connected using the outer lead portions. The density can be improved.

According to the third aspect of the present invention, the heat dissipation efficiency of the semiconductor element can be improved and the size of the semiconductor device can be reduced. Further, according to the invention described in claim 4, since the semiconductor element is mounted on the stage, the semiconductor element can be reliably held during resin molding or the like.

According to the fifth aspect of the invention, a large number of semiconductor devices can be mounted in a small space, and the mounting density can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 illustrates a method for manufacturing the semiconductor device according to the first embodiment, and is a diagram for explaining the method for manufacturing the lead frame.

FIG. 3 illustrates the method for manufacturing the semiconductor device according to the first exemplary embodiment, and is a diagram illustrating a process of bonding a lead frame to a semiconductor element.

FIG. 4 is a view showing the method of manufacturing the semiconductor device according to the first embodiment, and a diagram showing a step of electrically connecting the lead and the semiconductor element.

FIG. 5 illustrates the method for manufacturing the semiconductor device according to the first embodiment, and is a diagram illustrating a step of forming a resin package.

FIG. 6 illustrates a method for manufacturing a semiconductor device according to a first embodiment, and is a diagram illustrating an example in which a tape lead and a semiconductor element are connected using a bump.

FIG. 7 is a sectional view showing a modification of the semiconductor device according to the first embodiment of the present invention.

FIG. 8 is a sectional view showing a modification of the semiconductor device according to the first embodiment of the present invention.

FIG. 9 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 10 is a sectional view of a semiconductor device unit using a semiconductor device according to a second embodiment of the present invention.

FIG. 11 is a sectional view showing a modification of the semiconductor device according to the second embodiment of the present invention.

FIG. 12 is a sectional view showing a modification of the semiconductor device according to the second embodiment of the present invention.

FIG. 13 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 14 is a sectional view of a semiconductor device unit using a semiconductor device according to a third embodiment of the present invention.

FIG. 15 is a sectional view showing a modification of the semiconductor device according to the third embodiment of the present invention.

FIG. 16 is a sectional view showing a modification of the semiconductor device according to the third embodiment of the present invention.

FIG. 17 is a perspective view for explaining an example of a conventional semiconductor device.

FIG. 18 is a diagram for explaining an example of a conventional semiconductor device, which is a cross-sectional view taken along the line AA in FIG. 17.

FIG. 19 is a diagram for explaining an example of a conventional semiconductor device.

[Explanation of symbols]

20, 40, 45, 50, 60, 65, 70, 80, 8
5 semiconductor device 21 semiconductor chip 22,73 electrode pad 23 cover film 24,71 lead 24a, 71a inner lead part 24b, 71b outer lead part 24b-1, 71b-1 first terminal part 24b-2, 71b-2 2 terminal part 24b-3, 71b-3 third terminal part 25, 72 wire 27 resin package 27a, 27d side surface 27b front surface 27c rear surface 30 lead frame 33 lead tape 34 bump 46 stage 55, 75 semiconductor device unit

Claims (5)

[Claims] 1. A semiconductor device comprising a semiconductor element, a lead electrically connected to the semiconductor element, and a resin package for encapsulating the semiconductor element and the lead, wherein an outer member serving as an external connection terminal of the lead. The semiconductor is characterized in that the lead portion is drawn out so as to be exposed on the side surface of the resin package, and the resin package is mounted in an upright state with the side surface on which the outer lead portion is formed as a mounting surface. apparatus. 2. The semiconductor device according to claim 1, wherein the outer lead portion is exposed not only on the mounting surface but also on two surfaces that intersect with the mounting surface and face each other. apparatus. 3. The semiconductor device according to claim 1, wherein the back surface of the semiconductor element is exposed from the resin package. 4. The semiconductor device according to claim 1, wherein the semiconductor element is mounted on a stage. 5. A structure having a plurality of the semiconductor devices according to claim 2 arranged in a row in a horizontal direction or in both a horizontal direction and a vertical direction, and adjacent semiconductors in the lined state. A semiconductor device unit, wherein outer lead portions provided in each semiconductor device are electrically connected to each other between the devices.