JPH05109975A - Resin-sealed type semiconductor device - Google Patents

Resin-sealed type semiconductor device

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Publication number
JPH05109975A
JPH05109975A JP26452291A JP26452291A JPH05109975A JP H05109975 A JPH05109975 A JP H05109975A JP 26452291 A JP26452291 A JP 26452291A JP 26452291 A JP26452291 A JP 26452291A JP H05109975 A JPH05109975 A JP H05109975A
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JP
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Application
Patent type
Prior art keywords
resin
semiconductor device
semiconductor element
lead
sealed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26452291A
Other languages
Japanese (ja)
Inventor
Ryuji Kono
Asao Nishimura
Maya Obata
Akihiro Yaguchi
まや 小幡
竜治 河野
昭弘 矢口
朝雄 西村
Original Assignee
Hitachi Ltd
株式会社日立製作所
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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Abstract

PURPOSE: To simplify a process by joining a junction plate with a circuit forming surface of a first semiconductor element via an insulating member to be wire- bonded and by joining a non-circuit-forming surface of a second semiconductor element to the opposite side of the junction plate via an insulating member to be wire-bonded.
CONSTITUTION: While a semiconductor element 1a with a circuit forming surface facing upward is mounted, a lead frame comprising an assembly of a junction plate 2 having smaller size than the semiconductor element 1a and having insulating members 5 on both sides and a lead 3 is mounted and joined so that an electrode pad lap is exposed. Then, a wire 4 is used to electrically connect the semiconductor element 1a to the lead 3. Then, a semiconductor element 1b is mounted and joined from an upper part of the junction plate 2 with a circuit forming surface facing upward, and the wire 4 is used to electrically connect the semiconductor element 1b to the lead 3. The assembly is sealed by resin 15 and molded with an unnecessary part of the lead 3 cut off. Thus, a manufacture process can be simplified.
COPYRIGHT: (C)1993,JPO&Japio

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明は樹脂封止型半導体装置に係り、特に、内部に複数の半導体素子を内蔵した大容量メモリーパッケージに代表される樹脂封止型半導体装置に関する。 The present invention relates relates to a resin-sealed semiconductor device, particularly to a resin-encapsulated semiconductor device typified by a large-capacity memory package incorporating a plurality of semiconductor devices therein.

【0002】 [0002]

【従来の技術】メモリーパッケージなどの樹脂封止型半導体装置では、顧客の要求から年々記憶容量の増加が進み、これに伴って半導体素子ルールの微細化が進んでいる。 The resin-sealed semiconductor device, such as the Related Art Memory package, increased year by year storage capacity from the customer request proceeds, it is progressing miniaturization of semiconductor devices rules accordingly. 例えば64MDRAM(64Mbit Dynamic Random A For example 64MDRAM (64Mbit Dynamic Random A
ccess Memory)ではルールが0.3μm となり、微細化の限界に近づいたといわれている。 ccess Memory) the rule 0.3μm, and the is said to have approached the limit of miniaturization. 従って今後、これ以上の高密度パッケージを得るには装置内に複数の半導体素子を内蔵することが有効となる。 Therefore the future, it is effective to built a plurality of semiconductor elements in the device in order to obtain more high density packages. このための手段として、これまでに以下のものをはじめ多数提案され、公知となっている。 As a means for this, it has been proposed, including the following ever, has become known.

【0003】(1)特開平1−295454 号公報:大きさの異なる二枚の半導体素子を、大きい方を下にしてリードフレーム上に搭載し、ワイヤを用いてリードと半導体素子との電気接続を行う。 [0003] (1) JP-A-1-295454 discloses: a size different two semiconductor elements, mounted on a lead frame larger one in the bottom, electrical connections between the leads and the semiconductor element by wire I do.

【0004】(2)特開平2−2658 号公報:リードフレームの両面に半導体素子の非回路形成面を接合し、ワイヤを用いて両面より各々電気接続を行う。 [0004] (2) JP-A 2-2658 discloses: bonding the non-circuit forming surface of the semiconductor element on both sides of the lead frame, each making an electrical connection from both sides using a wire.

【0005】(3)日経マイクロデバイス1991年4 [0005] (3) Nikkei Microdevices 1991 4
月号p. Month No. p. 80:半導体素子の非回路形成面どうしを重ね合わせ、TAB(Tape Automated Bond−ing)を用いて電気接続を行う。 80: superposing a non-circuit forming surface each other of the semiconductor device, for electrical connection with the TAB (Tape Automated Bond-ing).

【0006】 [0006]

【発明が解決しようとする課題】上記(1)〜(3) The object of the invention is to be Solved by the above (1) to (3)
は、それぞれ以下のような問題点、すなわち、本発明が解決すべき課題があった。 Is the following problem, respectively, i.e., a problem to be solved by the present invention is.

【0007】(1)パッケージ外形寸法の制約の厳しいメモリーパッケージの場合、半導体素子の外形寸法の小型化は非常に重要な課題であり、したがって二枚の半導体素子の大きさを変えることは、必ずどちらかにむだなエリアが生じることになる。 [0007] (1) In the case of the package outer dimensions constraints severe memory package, size of the outer dimension of the semiconductor device is a very important issue, thus varying the size of two of the semiconductor element is always will be wasted area occurs in either. このことからメモリーパッケージでは、複数の同一半導体素子が内蔵できることが望ましい。 The memory packages from this, it is desirable that a plurality of same semiconductor device can be built.

【0008】(2)リードフレームの両面に半導体素子の非回路形成面を接合することで、その両面よりワイヤボンディングを行うことが必要となり、そのためリードフレームを裏返す工程が必要となる、また裏返すことで下側になった面のワイヤがつぶれるなどの不都合が生じる恐れがある。 [0008] (2) By joining the non-circuit forming surface of the semiconductor element on both sides of the lead frame, it is necessary to perform wire bonding from both sides, therefore step of reversing the lead frame is required, also be flipped in there is a possibility that inconvenience such as collapsing wires surface became lower occur. したがって、ワイヤボンディングはいずれの半導体素子に対しても同一の方向より行われることが望ましい。 Accordingly, wire bonding is preferably performed from the same direction for any semiconductor device.

【0009】(3)半導体素子とリードとの電気接続にTABを用いることは、製造コストの面でワイヤボンディングに比べて非常に不利であり、できるかぎり避ける必要がある。 [0009] (3) the use of TAB to the electrical connection between the semiconductor element and the lead is very disadvantageous in terms of manufacturing cost than wire bonding, it is necessary to avoid as much as possible.

【0010】 [0010]

【課題を解決するための手段】上記課題は、以下のような手段により達成される。 Above problems SUMMARY OF THE INVENTION is achieved by the following means.

【0011】(a)一枚目の半導体素子の回路形成面に絶縁部材を介して、リードフレーム中に構成された接合板を接合し、所定のワイヤボンディングを行い、同接合板の反対面に絶縁部材を介して二枚目の半導体素子の非回路形成面を接合し、再度所定のワイヤボンディングを行い、それらを樹脂で封止,成形して樹脂封止型半導体装置を得る。 [0011] (a) through an insulating member to the circuit forming surface of the first sheet of the semiconductor element, bonding a bonding plate configured in a lead frame, it performs a predetermined wire bonding, to the opposite face of the junction plate via an insulating member by joining non-circuit forming surface of the semiconductor device of the second sheet, again performs predetermined wire bonding, to obtain seal, molded to a resin-sealed semiconductor device them with resin.

【0012】(b)一枚目の半導体素子の回路形成面に、絶縁部材を介してリードの集合体の内端部を接合し、所定のワイヤボンディングを行い、同リードの反対面に絶縁部材を介して二枚目の半導体素子の非回路形成面を接合し、同半導体素子の回路形成面に絶縁部材を介してリードの集合体を接合し、再度所定のワイヤボンディングを行い、両者の対応するリードどうしを電気的に接続し、それらを樹脂で封止,成形して樹脂封止型半導体装置を得る。 [0012] (b) the circuit forming surface of the first sheet of the semiconductor element, joining the inner end portion of the lead assemblies via an insulating member, performs a predetermined wire bonding, an insulating member on the opposite face of the lead bonding the non-circuit forming surface of the semiconductor device of the second sheet via a bonding an assembly of lead through an insulating member to the circuit forming surface of the semiconductor device performs again a predetermined wire bonding, both compatible read each other to electrically connect them to obtain sealing with resin, molded to a resin sealed semiconductor device. あるいは、二枚の半導体素子は各々その回路形成面に絶縁部材を介してリードの集合体の内端部を接合し、各々所定のワイヤボンディングを行い、その状態の両者を重ね合わせ、対応するリードどうしを電気的に接続し、それらを樹脂で封止,成形して樹脂封止型半導体装置を得る。 Alternatively, two sheets are of the semiconductor element through the respective insulating member to the circuit forming surface joining the inner ends of the leads of the assembly, each performing a predetermined wire bonding, overlay both of the condition, the corresponding lead What was electrically connected to obtain seal, molded to a resin-sealed semiconductor device them with resin.

【0013】(c)(b)と同様の製造方法により、三枚以上の半導体素子を内蔵した樹脂封止型半導体装置を得る。 [0013] The same manufacturing method as (c) (b), to obtain a resin-sealed semiconductor device including three or more sheets of the semiconductor device.

【0014】 [0014]

【作用】本発明は、上記(a)〜(c)に対応してそれぞれ次のように作用する。 DETAILED DESCRIPTION OF THE INVENTION The present invention, in correspondence to the (a) ~ (c) operates as follows.

【0015】(a)接合板は、半導体素子の周縁部に設けられた電極パッドを覆わない格好とすることで、接合板を一枚目の半導体素子の回路形成面に接合した状態でもワイヤボンディングが行え、しかも接合板とその両面の絶縁部材を合わせた厚さはワイヤのループ高さよりも大きくなるので、二枚目の半導体素子をその上部に搭載してもワイヤに干渉することはない。 [0015] (a) bonding plate, by the dress does not cover the electrode pads provided on the peripheral portion of the semiconductor device, wire-bonding a bonding plate in a state of being bonded to the circuit forming surface of the first sheet of a semiconductor device is performed, yet the combined thickness of the bonding plate and both surfaces of the insulating member becomes larger than the loop height of the wire, it does not interfere with the wire even by mounting a semiconductor element of handsome thereon. 従って本発明によって、同一な二枚の半導体素子を、同一方向に内蔵した、大容量の樹脂封止型半導体装置が得られる。 Accordingly the present invention, the same two sheets of semiconductor devices, and built in the same direction, the resin-sealed semiconductor device of a large capacity is obtained.

【0016】(b)所定の形状をなしたリードの集合体と、一枚目の半導体素子の中央部長手方向に沿って設けられた電極パッド群は、同半導体素子の回路形成面上で電気接続されるが、同リードとその両面の絶縁部材を合わせた厚さはワイヤのループ高さよりも大きくなるので、(a)同様に二枚目の半導体素子をその上部に搭載してもワイヤに干渉することはない。 [0016] (b) a set of leads form a predetermined shape, the first sheet along the center the longitudinal direction of the electrode pad group provided in the semiconductor element, an electric on a circuit formation surface of the semiconductor element While connected, the total thickness of the lead and both surfaces of the insulating member is greater than the loop height of the wire, the wire is also equipped with a semiconductor device of second sheet thereon in the same manner (a) interference will not be. 従って本方法によっても(a)同様同一な二枚の半導体素子を、同一方向に内蔵した、大容量の樹脂封止型半導体装置が得られる。 Therefore, even by this method: (a) similar same two semiconductor elements were incorporated in the same direction, the resin-sealed semiconductor device of a large capacity is obtained.

【0017】(c)各々の半導体素子とそれに対応するリードは、(b)同様の作用によって、順次、積層されるので、本方法によって同一な複数枚の半導体素子を内蔵した、大容量の樹脂封止型半導体装置が得られる。 [0017] (c) each of the semiconductor element and the corresponding leading thereto, the same action (b), sequentially, since it is laminated with an integrated same plurality of semiconductor devices by this method, a large-capacity resin sealed semiconductor device is obtained.

【0018】 [0018]

【実施例】以下、本発明の実施例を、図を用いて説明する。 EXAMPLES Hereinafter, the embodiments of the present invention will be described with reference to FIG.

【0019】図1は本発明の第一実施例である樹脂封止型半導体装置の断面を示したものである。 [0019] FIG. 1 shows a section of the resin encapsulated semiconductor device which is a first embodiment of the present invention. 以下に製造方法を述べる。 The following describes the manufacturing method. まず回路形成面を上にした半導体素子1a First semiconductor device 1a in which the circuit forming surface on
が載置された状態で、電極パッド1apが露出するよう、半導体素子1aよりも寸法が小さく、かつ、両面に絶縁部材5を備えた接合板2と、リード3の集合体を備えたリードフレームを搭載,接合し、ワイヤ4で半導体素子1aとリード3との電気接続(ワイヤボンディング)を行う。 Lead frame but in mounted state, so that the electrode pads 1ap is exposed, reduced dimension than the semiconductor element 1a, and, where the joining plate 2 with an insulating member 5 on both sides, with a collection of lead 3 mounting, bonding, electrical connection between the semiconductor element 1a and the lead 3 (wire bonding) performed by wire 4. その後、接合板2の上部より半導体素子1 Thereafter, the semiconductor device 1 from the top of the joining plate 2
bを回路形成面を上にして搭載,接合し、リード3との電気接続を行う。 b mounted to the circuit forming surface above, bonded, make electrical connection with the lead 3. この状態となったものを樹脂6にて封止し、リード3の不要部分を切断し、成形する。 What resulted in this state sealed with resin 6, by cutting the unnecessary portions of the lead 3 is molded. なお、 It should be noted that,
ここで用いる絶縁部材5は、一般に両面に接着剤の塗布された厚さ100μm程度のフィルムが用いられるが、 Insulating member 5 used here is generally a film of about the applied thickness 100μm that the adhesive on both sides is used,
その他にエポキシ系の接着剤を用いてもよい。 Other may be used epoxy adhesive.

【0020】図2は同実施例に用いるリードフレームの一部を示したもので、鎖線A,B,Cはそれぞれ絶縁部材5,半導体素子1a(1b),樹脂6の輪郭を示している。 [0020] Figure 2 shows a part of a lead frame used in the embodiment, the chain line A, B, C respectively insulating member 5, the semiconductor device 1a (1b), shows the outline of the resin 6. 先の説明の通り電極パッド1apは鎖線B,Cの間に設けられる。 Previous passes the electrode pads 1ap description chain line B, is provided between the C. なお、この図のように接合板2の全面にわたって絶縁部材5を介在させることによって、絶縁部材5の接着層内部に気泡が発生するなど信頼性が低下する恐れがある場合には、絶縁部材を分割し、必要最小限の面積となるようにするとよい。 Incidentally, by interposing an insulating member 5 over the entire surface of the junction plate 2 as shown in this figure, when the voids inside the adhesive layer of the insulating member 5 is likely to lower reliability, etc. occur, the insulating member divided, it may be such that the required minimum area.

【0021】図3は本発明の第二実施例のリードフレームの一部を示したもので、前実施例の接合板2の代わりに電気的に無効なリードを設けたものである。 [0021] Figure 3 shows a part of a lead frame of a second embodiment of the present invention, is provided with a electrically invalid lead instead of junction plate 2 of the previous example.

【0022】メモリーパッケージなどの樹脂封止型半導体装置では、通常、プリント基板にはんだ付けする際、 [0022] In the resin-sealed semiconductor device such as memory package, usually, when soldered to the printed circuit board,
リフローという方式がとられることが多い。 Method that reflow is often taken. これは装置全体が230〜240℃程度の高温にさらされるもので、樹脂6に含まれる大気水分が許容値を超えたり、装置内部に絶縁フィルムなどの膨張しやすい部材が含まれていたり、部材間のはく離が生じたりするとすると、このとき樹脂6にクラックが生じる場合がある。 It should be understood that the entire device is exposed to a high temperature of about 230-240 ° C., or greater than atmospheric moisture tolerance contained in the resin 6, or contains expanded easily member such as an insulating film in the apparatus, member when stripping the or occur between, there is a case where cracks at this time resin 6.

【0023】本実施例により絶縁部材(フィルム)の面積を小さくできると同時に、半導体素子1a(1b) [0023] According to this embodiment at the same time can reduce the area of ​​the insulating member (film), a semiconductor device 1a (1b)
に、直接、樹脂6が付着する面積が増加して接着強度が向上するため、クラックを防止する効果がある。 To direct, the area where the resin 6 adheres to improved adhesive strength is increased, an effect of preventing cracking.

【0024】図4は本発明の第三実施例である樹脂封止型半導体装置の断面を示したものである。 [0024] FIG. 4 shows a section of the resin-encapsulated semiconductor device according to a third embodiment of the present invention. リード3の樹脂6中に内蔵された部分(内部リード)には段差を設けてあり、半導体素子1a,1bとはそれぞれ別の段差部でワイヤボンディングを行っている。 The built-in part (inner lead) in the resin 6 of the lead 3 is provided with a step, it is carried out wire-bonding the semiconductor element 1a, separate step portion and 1b. 第一実施例を用いた場合に、ワイヤ4が半導体素子のコーナ部と接触する恐れがある場合にはこのような手段をとるとよい。 In the case of using the first embodiment, it may take such means if there is a risk that the wire 4 is in contact with the corner portion of the semiconductor device. なお内部リードは必ずしも図示のように直角に曲げる必要はなく、効果が得られる程度の最小限の段差があればよい。 Incidentally internal leads is not necessarily bent at a right angle as shown, it is sufficient minimal step to the extent that the effect can be obtained. なお図中のバスバー3agは電源供給、もしくは接地用の共通リードである。 Note busbar 3ag in the figure are common lead of the power supply, or grounding.

【0025】図5は本発明の第四実施例である樹脂封止型半導体装置の断面を示したものである。 FIG. 5 shows a section of the resin-encapsulated semiconductor device according to a fourth embodiment of the present invention. 以下に製造方法を述べる。 The following describes the manufacturing method. まず回路形成面を上にした半導体装置1a First semiconductor device 1a in which the circuit forming surface on
が載置された状態で、電極パッド1apが露出するような形状をなし、かつ、両面に絶縁部材5を備えたリード3aの集合体を持つリードフレームを搭載,接合し、ワイヤ4で半導体素子1aとリード3aとの電気接続を行う。 State but placed, a shape such as electrode pads 1ap is exposed, and, equipped with a lead frame having a set of leads 3a with an insulating member 5 on both sides, bonded, the semiconductor element by wire 4 making electrical connections between 1a and the lead 3a. その後、リード3aの上部より回路形成面を上にした半導体素子1bと、リード3bの集合体を持つリードフレームを搭載,接合し、ワイヤ4にて半導体素子1b Then, mounting the semiconductor elements 1b having the above circuit formation surface than the top of the lead 3a, the lead frame having a set of leads 3b, joined, the semiconductor device 1b by wire 4
とリード3bとの電気接続を行う。 And making an electrical connection between the lead 3b. そしてリード3aと3bとを電気的に接合し、リード3bを切断,成形し、 The electrically bonding the leads 3a and 3b, cut the lead 3b, molded,
これらを樹脂6にて封止し、リード3aの不要部分を切断して成形する。 These sealed with resin 6 is molded by cutting unnecessary portions of the lead 3a. あるいは別の製造方法として、半導体素子1a,1bそれぞれについてあらかじめ電気接続を行い、後にその状態の両者を積層,接合しても良い。 Or as another method for manufacturing the semiconductor device 1a, previously subjected to electrical connections for each 1b, later laminated both of the condition, it may be joined. 図中のF部は、他に比べて樹脂封止工程での樹脂6の流路が小さいが、通常樹脂流動性については特に問題は生じない。 F portion in the figure, but the flow path of the resin 6 in the resin sealing step is smaller than the other, especially no problem for normal resin flow properties. しかし、例えばリード3のピッチが微細、あるいは形状が複雑な製品の場合には、場合によってこの部分に樹脂6が流入しなくなる可能性があるので、あらかじめこの部分をシリコーンゲルや未硬化の液状樹脂によって封止しておくなどの対策を施すとよい。 However, for example, when the pitch is fine lead 3, or the shape of the complex product, since in some cases there is a possibility that the resin 6 does not flow in this portion, in advance of this part of the silicone gel and the uncured liquid resin it may take measures such as keep sealed by.

【0026】図6は同実施例に用いるリードフレームの一部を示したもので、鎖線A,B,Cはそれぞれ絶縁部材5,半導体素子1a(1b),樹脂6の輪郭を示している。 [0026] Figure 6 shows a lead part of a frame in which are shown, a chain line A, B, C each insulating member 5, the semiconductor device 1a (1b), the contour of the resin 6 used in the embodiment. 電極パッドは半導体素子の中央部に長手方向に沿って設けられる。 Electrode pads are provided along the longitudinal direction in the center portion of the semiconductor device.

【0027】図7は同実施例の電気接続部分(図5のF [0027] Figure 7 is an electrical connection portion of the embodiment (F in FIG. 5
部)を拡大したものである。 Part) is an enlarged view of the. ワイヤ4のループ高さhr Loop height hr of the wire 4
は通常200ないし300μm程度で、一方、リード3 It is usually 200 not in the order of 300μm, on the other hand, lead 3
aとその両面の絶縁部材5の厚さの和Tl+Ts1+T a sum Tl + Ts1 + T of the thickness of both surfaces of the insulating member 5
s2は400μm程度となるため、上側に半導体素子1 Since s2 has to be about 400 [mu] m, the semiconductor device 1 on the upper side
bを積載してもワイヤ4が干渉することはない。 Never wire 4 is interference by stacking b. また、 Also,
この図のようにリード3aのワイヤ4が接触する部分を他に比べて薄くすれば、さらにその効果が向上する。 If thinner than a portion where the wire 4 leads 3a are in contact as shown in FIG other, to further improve the effect.

【0028】図8は本発明の第五実施例である樹脂封止型半導体装置の断面を示したものである。 [0028] FIG. 8 shows a cross section of the resin-encapsulated semiconductor device according to a fifth embodiment of the present invention. リード3a Lead 3a
は、半導体素子1aの外側においてその高さがリード3 , The height outside the semiconductor element 1a is read 3
bと同じくなるよう段差をもっており、両者はワイヤ4 b and has a likewise made as stepped, both wires 4
で電気的に接続されている。 In are electrically connected. 本発明では半導体素子や内部リードは絶縁部材5を介して強固に接合されるので、 Since semiconductor elements and inner leads in the present invention it is firmly bonded via the insulating member 5,
リードどうしは必ずしもろう材や溶接などで機械的に接合する必要はなく、このように電気的な導通さえはかられればよい。 Read each other need not necessarily be mechanically joined in such brazing material or welding, only to be this way even grave electrical conduction. またリード3aに設ける段差は、特にリード3bの高さに合わせる必要はなく、曲げ加工を施すことで電気接続位置の精度を損なわない程度でよい。 The step of providing the lead 3a is not particularly necessary to adjust the height of the lead 3b, it may be a degree not impairing the accuracy of the electrical connection position by applying bending.

【0029】図9は本発明の第六実施例である樹脂封止型半導体装置の断面を示したものである。 [0029] Figure 9 shows a section of the resin-encapsulated semiconductor device according to a sixth embodiment of the present invention. リード3aは半導体素子1aの上面に段差をもっている。 Lead 3a has a step on the upper surface of the semiconductor element 1a. こうすることで二枚の半導体素子の間隔、すなわち、半導体素子1 Spacing of two of the semiconductor device in this way, i.e., the semiconductor element 1
aとリード3aとの電気接続部の高さを高くすることができるので、半導体素子1aがワイヤ4に干渉するのを防ぐことができ、実施例のような内部リードの薄肉化を省略することができる。 It is possible to increase the height of the electrical connection between a lead 3a, the semiconductor device 1a can be prevented from interfering with the wire 4, to omit the thinning of the inner leads as in Example can.

【0030】図10は本発明の第七実施例である樹脂封止型半導体装置の断面を示したものである。 [0030] FIG. 10 shows a section of the resin-encapsulated semiconductor device according to a seventh embodiment of the present invention. 構造的には第五実施例と同様であるが、パッケージ中に四枚の半導体素子が内蔵されている。 Although structurally the same as the fifth embodiment, the four pieces of the semiconductor element is incorporated into the package. 本発明によれば基本的な製造工程の繰り返しでこのように多数の半導体素子を内蔵することができる。 According to the present invention may incorporate such a large number of semiconductor elements in the repetition of the basic manufacturing process. またこの図ではリードの両面に半導体素子を接合した例を示したが、この他に第一実施例のように接合板を用いる方法によっても、三枚以上の半導体素子の内蔵は可能である。 Although the example in which the semiconductor element is connected on both sides of the lead in this figure, by a method using a bonding plate as in the first embodiment In addition, built-in three pieces or more semiconductor elements are possible.

【0031】 [0031]

【発明の効果】本発明によれば、二枚、もしくは三枚以上の同一な半導体素子が、同一の方向に搭載、および電気接続できるので、大容量で工程簡略化に好適、かつはんだ付け実装時の高音環境中における信頼性に優れる樹脂封止型半導体装置が得られる。 According to the present invention, two, or three or more sheets of the same semiconductor device, mounted in the same direction, and so can be electrically connected, preferably process simplification by mass, and Soldering resin-sealed semiconductor device having excellent reliability in high sound environment when obtained.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本発明の第一実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device which is a first embodiment of the present invention; FIG.

【図2】図1のリードフレームの一部の平面図。 FIG. 2 is a plan view of a portion of the lead frame of Figure 1.

【図3】本発明の第二実施例のリードフレームの一部の平面図。 Part of a plan view of a lead frame of a second embodiment of the present invention; FIG.

【図4】本発明の第三実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device as a third embodiment of the present invention; FIG.

【図5】本発明の第四実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device which is a fourth embodiment of the present invention; FIG.

【図6】第四実施例のリードフレームの一部の平面図。 FIG. 6 is a plan view of a portion of the lead frame of the fourth embodiment.

【図7】第四実施例の樹脂封止型半導体装置の電気接続部の断面図。 7 is a cross-sectional view of the electrical connection portion of the resin-sealed semiconductor device of the fourth embodiment.

【図8】本発明の第五実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device which is a fifth embodiment of the present invention; FIG.

【図9】本発明の第六実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device which is a sixth embodiment of the present invention; FIG.

【図10】本発明の第七実施例である樹脂封止型半導体装置の断面図。 Sectional view of a resin sealed semiconductor device which is a seventh embodiment of the present invention; FIG.

【符号の説明】 DESCRIPTION OF SYMBOLS

1a,1b…半導体素子、1ap…電極パッド、2…接合板、3,3a,3b…リード、3ag…バスバー、4 1a, 1b ... semiconductor device, 1ap ... electrode pad, 2 ... joining plate, 3, 3a, 3b ... lead, 3ag ... bus bar 4
…ワイヤ、5…絶縁部材、6…樹脂。 ... wire, 5 ... insulation member, 6 ... resin.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小幡 まや 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 ────────────────────────────────────────────────── ─── of the front page continued (72) inventor Maya Obata Tsuchiura, Ibaraki Prefecture Kandatsu-cho, 502 address, Inc. Date falling Mfg mechanical Engineering Research Laboratory within the

Claims (20)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】二枚の半導体素子と、複数のリードと、半導体素子の接合板と、絶縁部材と、ワイヤを備え、それらを樹脂で封止,成形した樹脂封止型半導体装置において、一枚の半導体素子の回路形成面に絶縁部材を介して半導体素子の接合板を接合し、ワイヤを用いて所定の電気接続を行なった後、同接合板のその反対面に絶縁部材を介してもう一枚の半導体素子の非回路形成面を接合し、ワイヤを用いて所定の電気接続を行ない、それらを樹脂で封止,成形したことを特徴とする樹脂封止型半導体装置。 And 1. A two semiconductor elements, a plurality of leads, the bonding plate of the semiconductor element, and the insulating member comprises a wire, they sealing with resin, in molding the resin-sealed semiconductor device, one bonding the bonding plate of the semiconductor element on a circuit forming surface of sheets of semiconductor element via an insulating member, after a predetermined electrical connection by using a wire, the other via an insulating member on the opposite face of the junction plate bonding the non-circuit forming surface of a single semiconductor device, performs a predetermined electrical connection using wires, they seal with resin, molded resin-sealed semiconductor device, characterized in that the.
  2. 【請求項2】二枚の半導体素子と、複数のリードと、絶縁部材と、ワイヤを備え、それらを樹脂で封止,成形した樹脂封止型半導体装置において、各半導体素子の回路形成面に絶縁部材を介してリードの半導体素子の近傍の一部を接合し、ワイヤを用いて所定の電気接続を行い、 2. A two semiconductor elements, a plurality of leads, the insulating member comprises a wire, they sealing with resin, in molding the resin-sealed semiconductor device, the circuit forming surface of the semiconductor element via an insulating member is bonded to a portion in the vicinity of the semiconductor device leads, it performs predetermined electrical connection by wire,
    それらのうちいずれか一方について、リードを所定の部位より切断除去,成形し、他方のもののリードに、絶縁部材を介してその半導体素子の非回路形成面を接合し、 For either one of them, cut off the lead from a given site, molded, the lead of the other ones, by joining non-circuit forming surface of the semiconductor element via an insulating member,
    それら双方の対応しあうリードを電気的に接合した後、 After electrically joined them both corresponding each other leads,
    それらを樹脂で封止,成形したことを特徴とする樹脂封止型半導体装置。 Sealing them with resin, molded resin-sealed semiconductor device, characterized in that the.
  3. 【請求項3】複数の半導体素子と、複数のリードと、絶縁部材と、ワイヤを備え、それらを樹脂で封止,成形した樹脂封止型半導体装置において、各半導体素子の回路形成面に絶縁部材を介してリードの半導体素子近傍の一部を接合し、ワイヤを用いて所定の電気接続を行い、それらのうち一つを除いたものについて、リードを所定の部位より切断除去,成形し、残りの一つのもののリード上に絶縁部材を介して、順次、半導体素子の非回路形成面より積載,接合し、それら全ての対応しあうリードどうしを電気的に接合した後、それらを樹脂で封止,成形したことを特徴とする樹脂封止型半導体装置。 3. A plurality of semiconductor elements, a plurality of leads, the insulating member comprises a wire, they sealing with resin, in molding the resin-sealed semiconductor device, an insulating the circuit forming surface of the semiconductor element through the member joining the part of the semiconductor element near the lead, it performs predetermined electrical connection using wires, for excluding the one of them, cut off the lead from a given site, and molded, through the remaining one lead on an insulating member ones of sequentially stacked from the non-circuit forming surface of the semiconductor element, bonding, after electrically joining lead each other to each other all of which correspond, sealing them with resin stop, resin-encapsulated semiconductor device, characterized in that molded.
  4. 【請求項4】請求項1において、前記ワイヤによって他と電気接続される前記リードのうち、成形後に樹脂中に内蔵される部分に複数ヶ所曲げ加工が施されている樹脂封止型半導体装置。 4. The method of claim 1, wherein one of said leads being other electrically connected by wires, resin-encapsulated semiconductor device bend more places processing is given to the part to be built in the resin after molding.
  5. 【請求項5】請求項2において、前記絶縁部材を介していずれかの半導体素子と接合されるリードは、電気的に有効なリードである樹脂封止型半導体装置。 5. The method of claim 2, leads to be bonded to either the semiconductor element via the insulating member is a resin sealed semiconductor device which is electrically active leads.
  6. 【請求項6】請求項3において、前記絶縁部材を介していずれかの半導体素子と接合されるリードは、電気的に有効なリードである樹脂封止型半導体装置。 6. The method of claim 3, leads to be bonded to either the semiconductor element via the insulating member is a resin sealed semiconductor device which is electrically active leads.
  7. 【請求項7】請求項2において、前記絶縁部材を介していずれかの半導体素子と接合されるリードは、電気的に無効なリードである樹脂封止型半導体装置。 7. The method of claim 2, leads to be bonded to either the semiconductor element via the insulating member is a resin sealed semiconductor device is electrically disabled lead.
  8. 【請求項8】請求項3において、前記絶縁部材を介していずれかの半導体素子と接合されるリードは、電気的に無効なリードである樹脂封止型半導体装置。 8. The method of claim 3, leads to be bonded to either the semiconductor element via the insulating member is a resin sealed semiconductor device is electrically disabled lead.
  9. 【請求項9】請求項2において、前記リードのうち、前記ワイヤによって半導体素子と電気接続される部分が他に比べて薄い樹脂封止型半導体装置。 9. The method of claim 2, of the lead, the wire thin resin-sealed semiconductor device as compared semiconductor element and the part to be electrically connected to the other by.
  10. 【請求項10】請求項3において、前記リードのうち、 10. The method of claim 3, of the lead,
    前記ワイヤによって半導体素子と電気接続される部分が他に比べて薄い樹脂封止型半導体装置。 Semiconductor device and a portion to be electrically connected to a thin resin-sealed semiconductor device as compared with the other by the wire.
  11. 【請求項11】請求項1において、前記半導体素子の回路形成面とそれに接合される接合板との間に、封止に用いた樹脂が介在する部分をもつ樹脂封止型半導体装置。 11. The method of claim 1, wherein between the junction board circuit forming surface of the semiconductor element and is bonded thereto, the resin sealed semiconductor device having a portion in which the resin used for the sealing is interposed.
  12. 【請求項12】請求項2において、前記半導体素子の回路形成面とそれに接合されるリードとの間に、封止に用いた樹脂が介在する部分をもった樹脂封止型半導体装置。 12. The method of claim 2, wherein during the circuit formation surface of the semiconductor element and the leads are bonded thereto, the resin-sealed type semiconductor device resin having a portion interposed used for sealing.
  13. 【請求項13】請求項3において、前記半導体素子の回路形成面とそれに接合されるリードとの間に、封止に用いた樹脂が介在する部分を設けた樹脂封止型半導体装置。 13. The method of claim 3, wherein during the circuit formation surface of the semiconductor element and the leads are bonded thereto, the resin-sealed type semiconductor device resin is provided a portion intervening used for sealing.
  14. 【請求項14】請求項1において、前記二枚の半導体素子が少なくとも200μm以上離れている樹脂封止型半導体装置。 14. The method of Claim 1, wherein two of the semiconductor elements of at least 200μm or more away are resin-sealed semiconductor device.
  15. 【請求項15】請求項2において、前記二枚の半導体素子が少なくとも200μm以上離れている樹脂封止型半導体装置。 15. The method of Claim 2, wherein two of the semiconductor devices of at least 200μm or more away are resin-sealed semiconductor device.
  16. 【請求項16】請求項3において、前記ある半導体素子からそれに最寄りの半導体素子まで、少なくとも200 16. The method of claim 3, nearest the semiconductor device thereto from said certain semiconductor element, at least 200
    μm以上離れている樹脂封止型半導体装置。 μm or more away are resin-sealed semiconductor device.
  17. 【請求項17】請求項1において、内蔵する二枚の前記半導体素子が同一のものである樹脂封止型半導体装置。 17. The method of claim 1, a resin encapsulated semiconductor device two of the semiconductor elements incorporated are the same.
  18. 【請求項18】請求項2において、前記内蔵する二枚の半導体素子が同一のものである樹脂封止型半導体装置。 18. The method of claim 2, a resin encapsulated semiconductor device two sheets of semiconductor elements the built are the same.
  19. 【請求項19】請求項3において、前記内蔵するすべての半導体素子が同一のものである樹脂封止型半導体装置。 19. The method of claim 3, all of the semiconductor element is resin-sealed semiconductor device are identical to the internal.
  20. 【請求項20】請求項1において、前記一枚の半導体素子の平面積が、接合板のそれよりも大である樹脂封止型半導体装置。 20. The method of claim 1, plane area of ​​the single semiconductor device, a resin-encapsulated semiconductor device is greater than that of the junction plate.
JP26452291A 1991-10-14 1991-10-14 Resin-sealed type semiconductor device Pending JPH05109975A (en)

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