JPH0922892A - Manufacture of compound semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove sulfur adhering to the surface of a gate electrode after the gate electrode is formed by drying etching with SF6 gas. SOLUTION: A WSi film is deposited on a compound semiconductor substrate 1. Then a gate electrode 6a is formed by over-etching the WSi film with CF4 gas after the film is etched through a resist mask 7 with a reaction gas of SF6 . Since the sulfur which adheres to the surface of the electrode 6a during the etching with the SF6 gas is removed by the over-etching with the CF4 gas before the next heat-treating process, the thermal diffusion of the sulfur to the n-type layer of the substrate 1 is prevented and the Schottky barrier height can be stabilized at a high level. In addition, the threshold voltage of a compound semiconductor device can be stabilized and the yield of the device can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a compound semiconductor device, and more particularly to a technique effective for removing impurities adhering to the surface of a gate electrode during dry etching.

[0002]

2. Description of the Related Art Generally, for processing a gate electrode of a semiconductor device, a required pattern is formed by etching using a photolithography technique. High speed devices, especially G
In manufacturing a compound semiconductor device such as aAs, a dry etching technique is mainly used because it has good productivity, in-plane uniformity, and excellent anisotropy. Various reactive gases are used in dry etching, one of which is an SF type reactive gas containing sulfur sulfide, such as S.
Since F ₆ has a high etching rate, it is used when throughput is important.

Such an etching technique is described in "Ultra High Speed Compound Semiconductor Devices", pages 211 to 217, published by Baifukan.

[0004]

However, in such a dry etching process, SF type reactive gas SF _{6 is used.}
When the gate electrode is etched by using, the threshold voltage V _th of the formed transistor may decrease.

The present inventors have conducted extensive research on this problem, and during etching, the sulfur contained in the etching gas adheres to the surface of the gate electrode, and this sulfur is absorbed by GaAs.
Since it is an n-type dopant, since it is an n-type dopant, it is doped in the next heat treatment process at about 400 ° C. to form a high-concentration n-type layer around the gate electrode.
It has been found that the forward current increases and the Schottky barrier height between the gate electrode and the GaAs substrate partially lowers, which lowers the threshold voltage V _th .

Further, the present inventors have found that when etching progresses and the semiconductor substrate is partially exposed, sulfur contained in the etching gas reacts with Ga or As of the semiconductor substrate to cause Ga or As on the surface of the semiconductor substrate. It has been found that sulfides of As are formed, and of these sulfides, sulfides of As in particular are decomposed when heated in the subsequent processing steps, and the released As or S causes a leak current.

An object of the present invention is to solve such a problem and to provide a technique capable of stabilizing the threshold voltage V _th of a transistor.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0009]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

In other words, in order to achieve the above object, in the present invention, the sulfur or sulfide adhering to the surface by dry etching with SF type gas is treated with CF type gas before being heated in the subsequent processing steps. By performing dry etching, SF ₆ is regasified and removed.

[0011]

According to the above-mentioned means, after the surface of the GaAs semiconductor substrate or the gate electrode is dry-etched by the SF system, the CF system gas (for example, CF ₄ / O ₂ , CF ₄ etc.) is used.
By dry etching with, the released sulfur is hard to adhere to the surface of the GaAs semiconductor substrate or the gate electrode, and the adhered sulfur is also F _{4 of} CF ₄ gas.
It is considered that it reacts with radicals to become SF _{6 and is} gasified and re-evaporated. This makes it possible to prevent sulfur from adhering to the surface of the GaAs semiconductor substrate or the gate electrode.

Therefore, the formation of the n-type layer or the sulfide due to the adhesion of sulfur can be prevented, the Schottky barrier height can be kept high, and the device characteristics to be formed can be stabilized.

The structure of the present invention will be described below together with embodiments.

In all the drawings for explaining the embodiments, those having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

[0015]

1 to 4 are vertical sectional views showing a GaAs semiconductor device according to one embodiment of the present invention in each manufacturing process.

First, on a semi-insulating semiconductor substrate 1 made of GaAs, an insulating film 2 of SiO ₂ is formed as an ion implantation protection film.
Is formed, a photoresist is applied on the SiO ₂ insulating film 2, and the photoresist is patterned by photolithography to serve as a resist mask 3. Si + serving as an n-type carrier is ion-implanted with an energy of 50 keV.
Ion implantation is performed with an ion implantation amount of 5 × 10 ¹² / cm ² to form an n-type layer 4 serving as an active layer.
Ion implantation energy of 200 keV and ion implantation amount of 1.5 × 10 ¹² / cm ² are used to suppress carrier leakage from the active layer to the semiconductor substrate p.
The mold layer 5 is formed. This state is shown in FIG.

After removing the resist mask 3, 800 ° C.
At 20 ° C., the n-type layer 4 and the p-type layer 5 are annealed by heating for 20 minutes. Next, after removing the SiO ₂ insulating film 2 for ion implantation protection, for example, a WSi ₂ film 6 is deposited to a film thickness of 500 to 700 nm by a sputtering method. A photoresist is applied on the WSi ₂ film 6, and the photoresist is patterned by photolithography to form a resist mask 7
To form This state is shown in FIG.

The formed resist mask 7 is used to perform a dry etching process using an SF type reactive gas containing sulfur sulfide, for example, SF ₆ or SF ₆ / CHF ₃ to obtain a WSi ₂ film 6 to be processed. Is patterned to form the gate electrode 6a. This state is shown in FIG.

During this etching process, sulfur contained in the SF type reaction gas adheres to the surface of the gate electrode 6a, and since the adhered sulfur is an n-type dopant for the GaAs semiconductor substrate 1, the following 400 ° C. The high-concentration n-type layer is formed in the periphery of the gate electrode 6a by being doped in a heat treatment step of about 10 ° C. The forward-direction current is increased by the high-concentration n-type layer, and the gate electrode 6a and the GaAs semiconductor substrate 1 are partially formed. The Schottky barrier height during the period decreases, which causes the threshold voltage V _th to decrease.

Further, when the etching progresses and the semiconductor substrate 1 is partially exposed, sulfur contained in the reaction gas reacts with Ga or As of the semiconductor substrate 1 to cause Ga or As on the surface of the semiconductor substrate 1. Sulfides are formed, and among these sulfides, sulfides of As, in particular, are decomposed when heated in the subsequent processing steps, and the released As or S causes a leak current.

In order to avoid such a problem, in the present embodiment, after that, over-etching is performed by using a CF-based reaction gas containing carbon fluoride, for example, CF _4, as a reaction gas, so that the semiconductor substrate 1 or Gate electrode 6
a Sulfur adhering to the surface is regasified and removed.

The over-etching using CF ₄ as a reaction gas is performed in the same apparatus continuously from the etching process by the SF-based reaction gas by switching the reaction gas from the SF-based reaction gas to the CF-based gas. Be done.

Thereafter, an Au film, for example, is further formed by a sputtering method and patterned by photolithography to form a source electrode / drain electrode 8. Furthermore,
For example, an AuGe, W, Ni, Au film or the like is formed by a sputtering method and patterned by photolithography to form the first layer wiring 9. This state is shown in FIG.

Next, the semiconductor substrate 1 is etched so as to surround the element forming region to form isolation trenches for element isolation, and nitrogen N ₂ and trimethylaluminum (CH ₃ ) ₃ Al are added by a CVD apparatus. Using as a source gas, AlN insulating layers 9a and 9b are selectively grown only on the exposed portion of the semiconductor substrate 1. As a result, the insulating layer 10 that separates the conductors formed in the same layer such as the gate electrode 6a, the source / drain electrode 8 and the first layer wiring 9 from each other and fills the isolation groove.
Is formed, and the insulating layer 10 simultaneously planarizes the surface. This state is shown in FIG.

An interlayer insulating film 11 is formed on the entire surface that has been planarized, predetermined contact holes are formed in the interlayer insulating film 11, and an Au film, for example, is formed by a CVD method and patterned by photolithography. , Second
The layer wiring 12 is formed. This state is shown in FIG. The gate electrode 6a, the source / drain electrode 8 or the first layer wiring 9 and the second layer wiring 12 are electrically connected to each other through the contact holes.

Thereafter, the semiconductor device is further subjected to a treatment such as covering the final protective film or laminating an interlayer insulating film and a wiring layer to cover the final protective film.

As described above, the invention made by the present inventor is:
Although the present invention has been described in detail with reference to the embodiment, the present invention is not limited to the embodiment, and it is needless to say that various changes can be made without departing from the scope of the invention.

[0028]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

(1) According to the present invention, sulfur adhering to the surface by dry etching using SF type reaction gas can be removed before being heated in the subsequent processing steps.

(2) According to the present invention, due to the above effect (1), it is possible to prevent the thermal diffusion of sulfur into the n-type layer of the semiconductor substrate.

(3) According to the present invention, due to the above effect (1), it is possible to prevent a decrease in the Schottky barrier height.

(4) According to the present invention, the threshold voltage V _th of the transistor is stabilized by the effect (3).

(5) According to the present invention, the yield of the compound semiconductor device is improved due to the above effect (4).

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view showing a compound semiconductor according to an embodiment of the present invention in each manufacturing step.

FIG. 2 is a vertical cross-sectional view showing a compound semiconductor according to an embodiment of the present invention in each manufacturing step.

FIG. 3 is a vertical cross-sectional view showing a compound semiconductor according to one embodiment of the present invention in each manufacturing step.

FIG. 4 is a vertical cross-sectional view showing a compound semiconductor according to one embodiment of the present invention in each manufacturing step.

FIG. 5 is a vertical cross-sectional view showing a compound semiconductor according to one embodiment of the present invention in each manufacturing step.

FIG. 6 is a vertical cross-sectional view showing a compound semiconductor according to one embodiment of the present invention in each manufacturing step.

[Explanation of symbols]

1 ... Semiconductor substrate, 2 ... Insulating film, 3, 7 ... Resist mask, 4 ... N-type layer, 5 ... P-type layer, 6 ... WSi ₂ film, 6a ...
Gate electrode, 8 ... Source electrode / drain electrode, 9 ... First
Layer wiring, 10 ... Insulating layer, 11 ... Interlayer insulating film, 12 ... Second
Layer wiring.

Claims (4)

[Claims] 1. A method of manufacturing a compound semiconductor device, wherein etching is performed using an SF-based reaction gas, wherein a process target formed on the compound semiconductor is subjected to etching processing using an SF-based reaction gas. And a step of performing an etching process using a CF-based reaction gas after the step of performing an etching process using an SF-based reaction gas and before heating in subsequent processing. Method. 2. The etching process using the CF-based reaction gas is continuously performed from the etching process using the SF-based reaction gas by switching the reaction gas from the SF-based reaction gas to the CF-based gas. The method for manufacturing a compound semiconductor device according to claim 1, wherein the compound semiconductor device is manufactured. 3. The SF-based reaction gas is SF ₆ ,
The method for manufacturing a compound semiconductor device according to claim 1, wherein the CF-based reaction gas is CF ₄ . 4. The method of manufacturing a compound semiconductor device according to claim 1, wherein the compound semiconductor is a GaAs compound semiconductor.