JPH09181445A - Method for manufacturing printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To uniformly distribute a conductive pattern on a material by a method wherein dummy patterns with the same quality as a conductive layer and a plurality of layers are connected to each other via a conductive film in a portion between a contour processing line of a printed wiring board and a contour line of a material. SOLUTION: One-sided face copper clad stacked plates are employed on a one-sided face of a glass epoxy insulation board 11, a wire pattern 12 is formed by use of a specific mask. Dummy patterns 13, 15 of the same quality as a conductive layer are provided in a portion between a contour processing line 16 of a printed board wiring 18 and a contour line of a material and in a portion interposed by the printed wiring board 18. After sensitive insulative resin 14 is applied, resin in a portion being a via hole is removed by use of a specific mask. Thereafter, etching is performed, to form a wire pattern part 17 of a second layer and a dummy pattern 15. Connection is made by the dummy pattern 15 and a plating film. Accordingly, a conductive pattern can be uniformly distributed on a material.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a method for manufacturing a printed wiring board using a build-up method.

[0002]

2. Description of the Related Art A build-up method has been conventionally known as a method for forming a wiring layer of a printed wiring board. This method is a method in which a wiring layer and an insulating layer are sequentially and alternately formed on an insulating substrate serving as a supporting substrate. As a method of forming the wiring layer, there are methods such as plating, vapor deposition, and sputtering. Among them, the plating method is a widely used method because the manufacturing method is simple and inexpensive.
On the other hand, as a method for forming the insulating layer, a photosensitive insulating resin is applied, and then an insulating resin having no photosensitivity is applied by exposure or development, and the resin in the via hole is removed by a method such as laser processing. There is a method.

The build-up method is a method of manufacturing a printed wiring board by a lamination method, that is, an insulating substrate having a wiring layer processed in advance is collectively laminated with an adhesive, a hole is formed by drilling, and through-hole plating is performed. It is superior to the method as a method that solves the following problems. . When forming a fine pattern, since a thin copper foil is used, the cost increases. . Since the via hole is formed by drilling, there is a limit to the processing of a fine via hole, and the reliability in the case of forming multiple layers is poor. And without increasing costs,
Enables high-density wiring.

Further, in the manufacturing process of a printed wiring board, in order to manufacture a large number of printed wiring boards with high manufacturing efficiency, a method of imposing and manufacturing the printed wiring boards is adopted. That is, in order to improve the manufacturing efficiency, a manufacturing method of imposing a plurality of printed wiring boards on a continuous material (one material), manufacturing, and finally cutting is a method for manufacturing a printed wiring board. Is commonly done.

[0005]

In the case of such a method, there is a problem that peeling occurs between the layers during the manufacturing process. In particular, peeling was likely to occur between the insulating layers. There is also a problem that the printed wiring board warps. It is considered that the cause is that the resin shrinks in the drying process and the like, resulting in peeling between the insulating layers.
It is considered that, in the process of manufacturing the post-treatment liquid, the printed wiring board infiltrates from the end surface and further peels off. Regarding the conductive layer, it is considered that there is a place where a conductor such as a wiring pattern exists and a place where the conductor does not exist, and a portion where stress concentrates due to contraction of the resin.

The problem that the printed wiring board is warped is that the printed wiring board is also warped due to the contraction of the resin. And such a problem is
When a plurality of printed wiring boards are faced and manufactured on a continuous material (one material), stress is applied,
Will be noticeable.

The present invention is a manufacturing method in which a plurality of printed wiring boards are mounted on a continuous material (insulating substrate) by a build-up method, and peeling occurs between layers during the manufacturing process. It is an object of the present invention to provide a method for manufacturing a printed wiring board that is less likely to occur and has less warpage.

[0008]

In order to solve the above problems, in the invention according to claim 1, a plurality of conductive layers and insulating layers electrically insulating the conductive layers from each other are alternately formed on an insulating substrate. And form via holes that electrically connect the conductive layers to each other, and on a continuous material,
In a method for manufacturing a printed wiring board produced by imposing a plurality of printed wiring boards, in a portion between the contour processing line of the printed wiring board and the contour line of the material, the same material as the conductive layer, It is characterized in that dummy patterns are formed in a plurality of layers and the dummy patterns in each layer are connected to each other by a conductive film.

According to a second aspect of the invention, in the invention of the first aspect, a portion sandwiched between the printed wiring boards is
It is characterized in that dummy patterns are formed on a plurality of layers with the same material as the conductive layer, and the dummy patterns of each layer are connected to each other by a conductive film.

[0010]

According to the first aspect of the invention, dummy patterns are formed in a plurality of layers of the same material as the conductive layer in a portion between the contour processing line of the printed wiring board and the contour line of the material. Since the dummy patterns of each layer are connected to each other by the conductive film, the conductive pattern can be uniformly distributed on the material without increasing the number of steps, and the stress can be suppressed from occurring. Therefore, the stress concentration can be relaxed. . Also, the adhesion between the insulating layers becomes strong. In addition, even if a plating solution or other processing liquid soaks from the end surface of the printed wiring board during the manufacturing process of the printed wiring board, the adhesive force between the insulating layers is strong in the dummy pattern area, so that the printed wiring board becomes a product. It is possible to prevent the processing liquid from penetrating into the wiring board portion.

According to the second aspect of the invention, dummy patterns are formed in a plurality of layers of the same material as the conductive layer in a portion sandwiched by the printed wiring board, and the dummy patterns of each layer are connected to each other by a conductive film. Therefore, it is possible to further suppress the generation of stress and reduce the concentration of stress, and it is possible to strengthen the adhesive force between the insulating layers.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 (a)-
(D) is explanatory drawing of the cross section of the process order of one Example of this invention. 2 (a) and 2 (b) are top plan views of the same embodiment. FIG. 3 is a partially enlarged explanatory view of a top view of another embodiment.

First, as shown in FIG. 1A, the thickness is 1 m.
m glass-epoxy as an insulating substrate 11 and a single-sided copper-clad laminate having a copper foil with a thickness of 18 μm adhered on one side, a photosensitive resist (trade name; manufactured by PMER Tokyo Ohka Co., Ltd.)
Then, the wiring pattern portion 12 was formed by performing exposure, development and etching using a predetermined mask. The wiring pattern portion 12 is a portion where a wiring pattern is formed, and in the figure, a detailed illustration of the wiring pattern is omitted as a “wiring pattern portion”. FIG.
FIG. 1A is a top view of FIG. As shown in FIG. 2A, in this embodiment, 16 printed wiring boards are placed on one sheet of material and exposed using a predetermined mask.
Development and etching were performed at once.

In this wiring pattern forming step, a dummy pattern 13 having a width of 10 mm was provided in a portion between the outer shape processing line of the printed wiring board and the outer shape line of the material and a portion sandwiched by the printed wiring board. This is because by forming a dummy pattern on the above-mentioned predetermined mask,
Easily achieved. What is the outline processing line of the printed wiring board?
Since multiple printed wiring boards are impositioned and manufactured,
Ultimately, it is necessary to cut the printed wiring boards one by one, but this means a cutting line at the time of cutting. The portion sandwiched between the printed wiring boards is a portion between the printed wiring boards when a plurality of printed wiring boards are faced and manufactured.

According to the present invention, as described in claim 1, in a portion between the contour processing line of the printed wiring board and the contour line of the material, a plurality of layers of the same material as the conductive layer are formed. It is essential to form dummy patterns and connect the dummy patterns of each layer to each other with a conductive film. Forming dummy patterns in a plurality of layers of the same material as the conductive layer in the portion sandwiched between the printed wiring boards, and connecting the dummy patterns of each layer to each other with a conductive film further suppresses the occurrence of stress,
It is preferable because the concentration of stress can be relaxed and the adhesion between the insulating layers can be strengthened. The dummy pattern is formed so as not to overlap the outer shape processing line of the printed wiring board, but if it overlaps the outer shape processing line, the dummy pattern having conductivity is exposed on the end surface of the printed wiring board, and the printed wiring board is exposed. Depending on how the plate is used, it may cause short-circuiting of surrounding equipment and may cause burrs during external processing, which is not preferable. And
As shown in FIG. 1B, a photosensitive insulating resin (trade name: Provicoat 5000 manufactured by Nippon Paint Co., Ltd.) was applied by a screen printing method. Another specific example of the photosensitive insulating resin is DPR-130 (trade name; manufactured by Asahi Chemical Research Institute Co., Ltd.).

As the insulating layer material, epoxy-based, acrylic-based, or polyimide-based resin is preferably used, and a material having photosensitivity is advantageous from the viewpoint of manufacturing process. Further, even if it is not photosensitive, it may be manufactured by a processing means such as laser processing. Further, the coating method is not limited to screen printing, and may be a method such as curtain coating. After that, prebaking was performed at 90 ° C. for 30 minutes, exposure was performed with an exposure amount of 1500 mJ / cm ² using a mask having a desired pattern of via holes, and development processing was performed to remove the resin in the portions to be via holes. .
The diameter of the via hole was 120 μm. After washing with water, baking was performed at 130 ° C. for 60 minutes to cure the insulating layer 14 (FIG. 1C). At this time, as shown in FIG. 2B, the insulating resin was removed in a grid pattern on the dummy pattern. FIG. 2B is a top view of FIG. 1C. The reason why the insulating resin is removed is to connect the dummy patterns formed in each layer with a conductive film.

It should be noted that instead of removing the insulating resin in a grid pattern, as shown in FIG. 3, the resin in the via hole portion 21 is removed and plating is performed in a subsequent plating step to form a via hole. The shape may be good, and the shape of removing the insulating resin for connecting the dummy patterns of each layer to each other by the conductive film is not particularly limited. However, it is preferable to make the connection over a wide area in order to obtain a strong connection. Then, using a buff having a roughness of about 800 to 2400 in sequence, polishing is performed to smooth the unevenness of the insulating film caused by the unevenness of the existing portion and the nonexistent portion of the wiring pattern, and the surface is finely roughened. Turned into In this state, the insulating layer had a thickness of 40 μm. Furthermore, the surface of the resin is roughened with an aqueous potassium permanganate solution (potassium permanganate 70 g / l, sodium hydroxide 40 g / l), neutralized with hydrochloric acid, and then degreased to remove sodium persulfate. Was used for soft etching. Then, electroless copper plating (about 0.2 to 0.3 μm) and electrolytic copper plating (about 20 μm) were performed to form a copper layer. In this process, even in the groove-shaped insulating resin on the dummy pattern,
A copper layer was formed.

Next, a dry film having a thickness of 35 μm was attached, and exposure and development were performed using a mask having a desired wiring pattern. The resist is not limited to a dry film, and a liquid resist, an electrodeposition resist, or the like may be used. After that, etching was performed using ferric chloride to form the second layer wiring pattern portion 17 and the dummy pattern 15. Then, a dry film peeling step was performed. This state is the state shown in FIG. Here, the dummy pattern 15 was connected to the first layer dummy pattern by a plating film. In FIG. 1D, the plating film is formed on the end face of the insulating layer 14, but as described above, by forming a large number of via holes as shown in FIG. 3, the dummy pattern of the first layer is formed. And the dummy pattern of the second layer may be connected. In any case, when connecting the first layer dummy pattern and the second layer dummy pattern with the conductive film, both the insulating resin removing step and the plating step can be performed simultaneously with the wiring pattern forming step. In particular, it is possible to carry out without increasing the number of steps. Here again, the wiring pattern section 17 is the same as the wiring pattern section 1
Similar to 2, the detailed illustration is omitted as a “wiring pattern portion” in the drawing.

Here, when more wiring layers are required, a desired number of wiring layers can be formed by repeating the steps after the above-described insulating layer formation. Finally, a solder resist to be a protective layer was applied, provisionally dried, and then exposed and developed to form a protective layer having a desired shape. The material may be the same as that of the insulating layer.
In FIG. 1D, the outer shape processing line 16 is finally processed to form the printed wiring board 18.

[0020]

According to the present invention, the conductive pattern can be uniformly distributed on the material without increasing the number of steps, and the generation of stress can be suppressed. Therefore, the concentration of stress can be relaxed. Also, the adhesion between the insulating layers becomes strong. Further, it is possible to prevent the processing liquid from infiltrating into the printed wiring board portion as a product. Therefore, there is little warpage,
Further, it is possible to provide a method for manufacturing a printed wiring board, which can obtain a printed wiring board in which peeling between layers hardly occurs.

[0021]

[Brief description of the drawings]

FIG. 1 is a cross-sectional explanatory diagram according to an embodiment of the present invention.

FIG. 2 is a top view illustrating an embodiment of the present invention.

FIG. 3 is a partially enlarged explanatory view according to another embodiment of the present invention.

[Explanation of symbols]

 11 Insulating Substrate 12, 17 Wiring Pattern Section 13, 15 Dummy Pattern 14 Insulating Layer 16 External Processing Line 18 Printed Wiring Board 21 Via Hole Section

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Toshiaki Ishii 1-5-1 Taito, Taito-ku, Tokyo Toppan Printing Co., Ltd.

Claims (2)

[Claims] 1. A plurality of conductive layers and insulating layers that electrically insulate the conductive layers from each other are alternately formed on an insulating substrate, and via holes are formed to electrically connect the conductive layers to each other. In a method for manufacturing a printed wiring board, in which a plurality of printed wiring boards are surface-fabricated on a continuous material, in a portion between the contour processing line of the printed wiring board and the contour line of the material, A method for manufacturing a printed wiring board, comprising forming dummy patterns on a plurality of layers of the same material as that of the conductive layer and connecting the dummy patterns of the layers to each other by a conductive film. 2. A dummy pattern is formed in a plurality of layers of the same material as that of the conductive layer in a portion sandwiched by the printed wiring board, and the dummy patterns of each layer are connected to each other by a conductive film. Item 2. A method for manufacturing a printed wiring board according to Item 1.