JPH0917609A - Multilayered type chip thermistor - Google Patents

Multilayered type chip thermistor

Info

Publication number
JPH0917609A
JPH0917609A JP7162006A JP16200695A JPH0917609A JP H0917609 A JPH0917609 A JP H0917609A JP 7162006 A JP7162006 A JP 7162006A JP 16200695 A JP16200695 A JP 16200695A JP H0917609 A JPH0917609 A JP H0917609A
Authority
JP
Japan
Prior art keywords
thermistor
raw material
chip
resistant insulating
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7162006A
Other languages
Japanese (ja)
Other versions
JP3580904B2 (en
Inventor
Yasutaka Maeda
保隆 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP16200695A priority Critical patent/JP3580904B2/en
Publication of JPH0917609A publication Critical patent/JPH0917609A/en
Application granted granted Critical
Publication of JP3580904B2 publication Critical patent/JP3580904B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/008Thermistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)

Abstract

PURPOSE: To provide a small-sized multilayered type chip thermistor excellent in performance which has inner electrodes in an element, and a manufacturing method of it. CONSTITUTION: In this multilayered type chip thermistor, inner electrodes 12 are arranged in a thermistor element 11, and heat-resistant insulating films 14 are formed on the surfaces of the thermistor element 11. The following are employed; a process wherein thermistor material sheets and the inner electrodes 12 are alternately laminated and baked, a process wherein glass surfaces are formed on both of the surfaces of a baked object, a process wherein cutting into a strip shape is performed, a process wherein a glass film is formed on the surface of the thermistor element 11 of strip-shaped segment, a process wherein chips are formed by cutting the thermistor element, and a process wherein outer electrodes 13 are formed at both ends of the chip.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子機器、プリント回
路基板などに実装される積層型チップサーミスタ及びそ
の製造方法にかかり、特に素体内部に内部電極を有する
積層型チップサーミスタ及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated chip thermistor mounted on an electronic device, a printed circuit board or the like and a method for manufacturing the same, and more particularly to a laminated chip thermistor having internal electrodes inside a body and a method for manufacturing the same. Regarding

【0002】[0002]

【従来の技術】従来、サーミスタ素体内部に内部電極を
有する積層型チップサーミスタは、サーミスタ素体と内
部電極とを一体積層して乾燥させ、これを切断してチッ
プを作り、これを焼成、さらに焼成物の両端面に外部電
極を形成した後、再度焼成することによって製造されて
いた。特開平6ー53009 特開平6ー61014
2. Description of the Related Art Conventionally, a laminated chip thermistor having internal electrodes inside a thermistor element body is integrally laminated with a thermistor element body and dried, and then cut to make a chip, which is then baked. Further, after the external electrodes were formed on both end surfaces of the fired product, the electrodes were fired again, whereby the product was manufactured. JP-A-6-53009 JP-A-6-61014

【0003】[0003]

【発明が解決しようとする課題】しかし、この製造方法
によると未焼成のサーミスタ素体を切断してチップを製
造するため、焼成後の製品の抵抗値の変動が大きかっ
た。また、未焼成の段階でチップとして切断するため、
素体が柔らかく切断片の大きさおよび切断精度に限度が
あり、1.0mm×0.5mm以下の製品への対応が困
難であった。
However, according to this manufacturing method, since the unfired thermistor element body is cut to manufacture the chip, the resistance value of the fired product varies greatly. Also, because it is cut into chips in the unbaked stage,
Since the element body was soft and the size of the cut pieces and the cutting accuracy were limited, it was difficult to deal with products of 1.0 mm × 0.5 mm or less.

【0004】さらに、製品の寿命を延ばす目的で、サー
ミスタ素体の抗折強度を補うためにガラスなどを被覆し
て、サーミスタ素体を補強しようとしても、チップが細
かいためスパッタ法を取らざるをえず、その場合皮膜が
薄く実用には適しないものであった。
Further, for the purpose of extending the life of the product, even if the thermistor element body is reinforced by coating glass or the like in order to supplement the bending strength of the thermistor element body, the spattering method must be employed because the chip is fine. In that case, the coating was thin and not suitable for practical use.

【0005】[0005]

【課題を解決するための手段】そこで、上記製造方法の
問題点を解決すべく、種々検討した結果サーミスタ素体
を未焼成の段階で切断してチップとするのではなく、サ
ーミスタ素体を焼成後に切断しチップとすることによっ
て上記問題点を解決できることを見出した。
[Means for Solving the Problems] Therefore, in order to solve the problems of the above-mentioned manufacturing method, as a result of various investigations, the thermistor body is not cut into chips into chips, but the thermistor body is baked. It was found that the above problems can be solved by cutting into chips later.

【0006】すなわち本発明の要旨とするところは、請
求項1では、サーミスタ素体(11)の内部に 1ないし
10層の内部電極(12)を有し、かつサーミスタ素体の
両端面に外部電極(13)が形成され、サーミスタ素体
の外部電極を形成していない表面に耐熱性絶縁皮膜(1
4)を形成したことを特徴とする積層型チップサーミス
タであり。請求項2では、複数のサーミスタ原料シート
の積層により形成された原料シート層(15)と、該原
料シート層の上面に形成された内部電極パターン(2
1)とを、1ないし10回積層し、その上面に原料シー
ト層を積層して積層板(16)を作製する工程と、該積
層板の上下両面に耐熱性絶縁皮膜原料膜(17)を塗布
した後にこれを焼成する工程と、焼成物を短冊状に切断
する工程と、切断した短冊状片(18)のサーミスタ素
体面の長尺方向に耐熱性絶縁皮膜原料膜を塗布した後、
これを再度焼成する工程と、これを切断し、チップ(1
9)を作製する工程と、該チップの耐熱性絶縁皮膜が形
成されていないサーミスタ素体面に外部電極を形成する
工程とよりなることを特徴とする積層型チップサーミス
タの製造方法である。
That is, the gist of the present invention is that, in claim 1, 1 to 1 are contained inside the thermistor element body (11).
The thermistor element body has ten layers of internal electrodes (12), and external electrodes (13) are formed on both end surfaces of the thermistor element body.
4) A multilayer chip thermistor characterized by being formed. In the second aspect, a raw material sheet layer (15) formed by laminating a plurality of thermistor raw material sheets and an internal electrode pattern (2) formed on the upper surface of the raw material sheet layer.
1) and 1) are laminated 1 to 10 times, and a raw material sheet layer is laminated on the upper surface thereof to produce a laminate (16); and a heat-resistant insulating film raw material film (17) is formed on both upper and lower surfaces of the laminate. After applying, a step of firing this, a step of cutting the fired product into strips, and a step of applying the heat-resistant insulating film raw material film in the longitudinal direction of the thermistor body surface of the cut strips (18),
The step of firing this again and cutting it
And a step of forming external electrodes on the surface of the thermistor element body surface on which the heat resistant insulating film of the chip is not formed, and a method of manufacturing a laminated chip thermistor.

【0007】本発明において、内部電極の層を10層に
限定するのは、これを超えると間に挟まれるサーミスタ
素体が薄くなり、その結果製品の耐久性が低下するから
である。
In the present invention, the number of layers of the internal electrodes is limited to 10 layers, since the thermistor body sandwiched between them is thinned as a result of which the durability of the product is lowered.

【0008】尚、本発明はNTCサーミスタに適用さ
れ、サーミスタ素体はMn,Co,Cu,Feなどの酸
化物を基とするものである。
The present invention is applied to an NTC thermistor, and the thermistor body is based on an oxide such as Mn, Co, Cu or Fe.

【0009】内部電極としては銀,パラジウムを基とし
たものが主に用いられる。
As the internal electrodes, those based on silver or palladium are mainly used.

【0010】外部電極には銀を主体としたものが用いら
れ、外部電極の表面には、ハンダとの付着性あるいは耐
環境性の向上のために金属メッキ(20)が施される。
An external electrode mainly made of silver is used, and a metal plating (20) is applied to the surface of the external electrode in order to improve adhesion with solder or environmental resistance.

【0011】また、耐熱性無機質皮膜は、積層型チップ
サーミスタ自体の抗折強度を強化するとともに、測定環
境下における高温、腐食性ガスなどよりサーミスタ素体
を保護するために施すものであり、ガラスあるいは結晶
化ガラスなどが最適に用いられる。
The heat-resistant inorganic film is applied to strengthen the die strength of the multilayer chip thermistor itself and to protect the thermistor body from high temperature and corrosive gas under the measurement environment. Alternatively, crystallized glass or the like is optimally used.

【0012】[0012]

【作用】本発明では、サーミスタ素体を焼成した後に切
断するという製造方法のために、焼成後にサーミスタ片
の一部を採取し、その抵抗値を調べることができ、この
抵抗値を基にサーミスタチップの切断長さを調整するこ
とができるので、信頼度の高い製品を得ることができ
る。また、面積が大きく焼成の終了したサーミスタ素体
が製造工程の中間段階で得られるので、これに印刷法で
ガラス原料膜を施すことが可能であり、これを焼成する
ことによってサーミスタ素体の表面にガラスなどの被覆
を形成できるので、製品の坑折強度を向上できるととも
に、測定環境からサーミスタ素体を保護することができ
る。
In the present invention, since the thermistor element body is fired and then cut, a part of the thermistor piece can be sampled after firing and the resistance value thereof can be investigated. Based on this resistance value, the thermistor piece can be examined. Since the cutting length of the chip can be adjusted, a highly reliable product can be obtained. Further, since the thermistor element body having a large area and having been fired is obtained in the intermediate stage of the manufacturing process, it is possible to apply a glass raw material film to this by a printing method, and by firing this, the surface of the thermistor element body Since a coating such as glass can be formed on the surface of the thermistor, the folding strength of the product can be improved and the thermistor body can be protected from the measurement environment.

【0013】[0013]

【実施例】以下に、図1を参照して本発明の実施例につ
いて説明する。
An embodiment of the present invention will be described below with reference to FIG.

【0014】図1において、15は原料シートである。
原料シートはNTCサーミスタ原料シートを1ないし10
層積層して圧着することによって作製される。
In FIG. 1, reference numeral 15 is a raw material sheet.
The material sheets are NTC thermistor material sheets 1 to 10
It is produced by stacking layers and pressure bonding.

【0015】この原料シート(15)の上面に内部電極
パターン(21)を印刷法により形成し、乾燥する。乾
燥後、内部電極パターンの上面にさらに原料シートを圧
着させた後に、これを乾燥し、1100℃の温度で5時
間焼成し、積層板(16)を作製する。
An internal electrode pattern (21) is formed on the upper surface of the raw material sheet (15) by a printing method and dried. After drying, a raw material sheet is further pressure-bonded to the upper surface of the internal electrode pattern, which is then dried and fired at a temperature of 1100 ° C. for 5 hours to produce a laminated plate (16).

【0016】この工程のうち、内部電極パターンの上面
に原料シートを圧着した後に、この上面に内部電極パタ
ーンを形成し、さらに原料シートを置き、その上面に内
部電極パターンを形成する。この工程を繰返すことによ
り複数層の内部電極を持った積層板ができる。
In this step, after the raw material sheet is pressure-bonded to the upper surface of the internal electrode pattern, the internal electrode pattern is formed on the upper surface, the raw material sheet is further placed, and the internal electrode pattern is formed on the upper surface. By repeating this process, a laminated plate having a plurality of layers of internal electrodes can be obtained.

【0017】この積層板の両面に印刷法により耐熱性絶
縁皮膜原料としてガラス原料膜を形成し、850℃の温
度で10分間焼成して、ウエハー状(55mm×38m
m×0.45mm)の燒結体を得た。該燒結体を湿式切
断機を用いて短冊状に切断した。切断後短冊状片の耐熱
性絶縁皮膜を形成していない長尺方向の横断面に印刷法
によりガラス膜を形成し850℃の温度で10分間焼成
した。該焼成物を湿式切断機で切断してチップ(L1m
m×W0.5mm×T0.45mm)を作製した。
A glass material film is formed as a heat-resistant insulating film material on both sides of this laminated plate by a printing method, and is baked at a temperature of 850 ° C. for 10 minutes to form a wafer (55 mm × 38 m).
A sintered body of m × 0.45 mm) was obtained. The sintered body was cut into strips using a wet cutting machine. After cutting, a glass film was formed by a printing method on the cross section of the strip-shaped piece in the long-side direction on which the heat-resistant insulating film was not formed, and the glass film was baked at a temperature of 850 ° C. for 10 minutes. The fired product is cut by a wet cutting machine to obtain chips (L1m
m × W0.5 mm × T0.45 mm) was produced.

【0018】該チップのガラス層が形成されていない両
端面に銀を主体とした電極材を付着させ再度焼成し、外
部電極を形成させた。この外部電極の表面に電解メッキ
法によりNiメッキを形成し、積層型チップサーミスタ
を作製した。本実施例においては内部電極は、1層のみ
とした。
An electrode material composed mainly of silver was adhered to both end surfaces of the chip on which the glass layer was not formed and was fired again to form external electrodes. Ni plating was formed on the surface of this external electrode by electrolytic plating to produce a multilayer chip thermistor. In this example, the internal electrode was only one layer.

【0019】〈比較例〉原料シートの上面に内部電極パ
ターンを印刷法により形成し、乾燥する。乾燥後内部電
極の上面にさらに原料シートを圧着させた後、これを乾
燥し、ウエハー状物を作成、これを所定の長さに切断
し、チップ状物を作成する。これを1100℃の温度で
5時間焼成した。サーミスタ素体面に銀とパラジウムを
主体とした電極材を付着させ、乾燥後これを820℃の
温度で5分間焼成し、外部電極を形成させ、積層型チッ
プサーミスタを作製した。
Comparative Example An internal electrode pattern is formed on the upper surface of a raw material sheet by a printing method and dried. After drying, the raw material sheet is further pressure-bonded to the upper surface of the internal electrode, and then dried to form a wafer-shaped product, which is cut into a predetermined length to form a chip-shaped product. This was baked at a temperature of 1100 ° C. for 5 hours. An electrode material composed mainly of silver and palladium was attached to the surface of the thermistor body, dried, and then baked at a temperature of 820 ° C. for 5 minutes to form an external electrode, thereby producing a laminated chip thermistor.

【0020】本比較例で作製した積層型チップサーミス
タのサイズ及び内部電極の構造は実施例と同じである。
The size of the multilayer chip thermistor manufactured in this comparative example and the structure of the internal electrodes are the same as those in the example.

【0021】〈実験〉実施例と比較例により作製した積
層型チップサーミスタを用いて以下の実験を行った。 [実験1]実施例1と比較例1の方法で作製した積層型
チップサーミスタをそれぞれ100個を任意に採取し、
寸法の変動の差を調べた。結果は第1表のとおりであ
る。
<Experiment> The following experiment was conducted using the laminated chip thermistor produced in the examples and the comparative examples. [Experiment 1] 100 multilayer chip thermistors produced by the methods of Example 1 and Comparative Example 1 were arbitrarily sampled,
The difference in dimensional variation was investigated. The results are as shown in Table 1.

【0022】 第1表 実施例1 比較例1 平均(mm) 標準偏差 平均(mm) 標準偏差 L 1.002 0.002 0.990 0.015 W 0.501 0.002 0.512 0.023 T 0.450 0.001 0.441 0.050 実施例1の方が、変動が小さい。 [実験2]実施例1と比較例1の方法で作製した積層型
チップサーミスタをそれぞれ100個任意に採取し、5
0℃における抵抗値の変動を調べた。 第2表 実施例1 比較例1 平均(KΩ) 標準偏差 平均(KΩ) 標準偏差 2.994 0.012 2.853 0.260 実施例1の方が、変動が小さい。
Table 1 Example 1 Comparative Example 1 Average (mm) Standard Deviation Average (mm) Standard Deviation L 1.002 0.002 0.990 0.015 W 0.501 0.002 0.512 0.023 T 0.450 0.001 0.441 0.050 The variation in Example 1 is smaller. [Experiment 2] 100 multilayer chip thermistors produced by the methods of Example 1 and Comparative Example 1 were arbitrarily sampled and 5
The variation of the resistance value at 0 ° C was examined. Table 2 Example 1 Comparative Example 1 Average (KΩ) Standard Deviation Average (KΩ) Standard Deviation 2.994 0.012 2.853 0.260 Example 1 has less variation.

【0023】[0023]

【発明の効果】本発明によれば、小型で抵抗値の変動が
少なく、抗折強度が高く、かつ環境適応性に優れた積層
型チップサーミスタが得られる。
According to the present invention, it is possible to obtain a multilayer chip thermistor which is small in size, has a small fluctuation in resistance value, has a high bending strength, and is excellent in environmental adaptability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の断面図である。FIG. 1 is a sectional view of one embodiment of the present invention.

【図2】本発明の一実施例の断面図である。FIG. 2 is a cross-sectional view of one embodiment of the present invention.

【図3】本発明の一実施例の断面図である。FIG. 3 is a sectional view of one embodiment of the present invention.

【図4】本発明の積層型チップサーミスタの製造方法の
一実施例の工程図である。
FIG. 4 is a process drawing of an example of a method for manufacturing a multilayer chip thermistor of the present invention.

【符合の説明】 11 サーミスタ素体 12 内部電極 13 外部電極 14 耐熱性絶縁皮膜 15 原料シート層 16 積層板 17 耐熱性絶縁皮膜原料膜 18 短冊状片 19 チップ 20 金属メッキ 21 内部電極パターン[Explanation of References] 11 Thermistor body 12 Internal electrode 13 External electrode 14 Heat resistant insulating film 15 Raw material sheet layer 16 Laminated plate 17 Heat resistant insulating film raw material film 18 Strip-shaped piece 19 Chip 20 Metal plating 21 Internal electrode pattern

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 サーミスタ素体(11)の内部に 1ない
し10層の内部電極(12)が形成され、かつサーミスタ
素体の両端面に外部電極(13)が形成され、サーミス
タ素体の外部電極を形成していない表面に耐熱性絶縁皮
膜(14)を形成したことを特徴とする積層型チップサ
ーミスタ。
1. A thermistor element body (11) is formed with 1 to 10 layers of internal electrodes (12), and external electrodes (13) are formed on both end surfaces of the thermistor element body. A laminated chip thermistor characterized in that a heat-resistant insulating film (14) is formed on the surface without electrodes.
【請求項2】 複数のサーミスタ原料シートの積層によ
り形成された原料シート層(15)と、該原料シート層
の上面に形成された内部電極パターン(21)とを、1
ないし10回積層し、その上面に原料シート層を積層し
て積層板(16)を作製する工程と、該積層板の上下両
面に耐熱性絶縁皮膜原料膜(17)を塗布した後にこれ
を焼成する工程と、焼成物を短冊状に切断する工程と、
切断した短冊状片(18)のサーミスタ素体面の長尺方
向に耐熱性絶縁皮膜原料膜を塗布した後、これを再度焼
成する工程と、これを切断し、チップ(19)を作製す
る工程と、該チップの耐熱性絶縁皮膜が形成されていな
いサーミスタ素体面に外部電極を形成する工程とよりな
ることを特徴とする積層型チップサーミスタの製造方
法。
2. A raw material sheet layer (15) formed by laminating a plurality of thermistor raw material sheets, and an internal electrode pattern (21) formed on the upper surface of the raw material sheet layer.
Or 10 times, and a step of producing a laminate sheet (16) by laminating a raw material sheet layer on the upper surface thereof, and applying a heat resistant insulating coating raw material film (17) on the upper and lower surfaces of the laminate sheet, and then baking the same. And a step of cutting the fired product into strips,
A step of applying a heat-resistant insulating film raw material film in the longitudinal direction of the thermistor body surface of the cut strip-shaped piece (18), and then firing the same again; and a step of cutting this and manufacturing a chip (19). And a step of forming an external electrode on the surface of the thermistor body on which the heat-resistant insulating film of the chip is not formed, the method of manufacturing a multilayer chip thermistor.
JP16200695A 1995-06-28 1995-06-28 Manufacturing method of multilayer chip thermistor Expired - Lifetime JP3580904B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16200695A JP3580904B2 (en) 1995-06-28 1995-06-28 Manufacturing method of multilayer chip thermistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16200695A JP3580904B2 (en) 1995-06-28 1995-06-28 Manufacturing method of multilayer chip thermistor

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2001282451A Division JP3619881B2 (en) 2001-09-17 2001-09-17 Multilayer chip thermistor

Publications (2)

Publication Number Publication Date
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100296848B1 (en) * 1997-08-07 2001-08-07 무라타 야스타카 Chip thermistor and method of adjusting same
JP2006269993A (en) * 2005-03-25 2006-10-05 Tdk Corp Multilayer chip varistor and its production process

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03250603A (en) * 1989-12-28 1991-11-08 Mitsubishi Materials Corp Thermistor
JPH05283207A (en) * 1992-03-31 1993-10-29 Taiyo Yuden Co Ltd Chip-type thermistor and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03250603A (en) * 1989-12-28 1991-11-08 Mitsubishi Materials Corp Thermistor
JPH05283207A (en) * 1992-03-31 1993-10-29 Taiyo Yuden Co Ltd Chip-type thermistor and manufacture thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100296848B1 (en) * 1997-08-07 2001-08-07 무라타 야스타카 Chip thermistor and method of adjusting same
US6606783B1 (en) * 1997-08-07 2003-08-19 Murata Manufacturing Co., Ltd. Method of producing chip thermistors
JP2006269993A (en) * 2005-03-25 2006-10-05 Tdk Corp Multilayer chip varistor and its production process
JP4561430B2 (en) * 2005-03-25 2010-10-13 Tdk株式会社 Multilayer chip varistor

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