JPH05335174A - Laminated ceramic electronic component - Google Patents

Abstract

PURPOSE:To realize a laminated ceramic electronic component lessened in thickness and enhanced in performance. CONSTITUTION:A ceramic-metal laminate 4 composed of conductor electrodes 2a and 2b formed through a CVD method, an evaporation method, or a sputtering method and ceramic layers 3 laminated through a CVD method is provided onto an SrTiO3 substrate 1. In succession, outer electrodes 5a and 5b are formed on both the ends of the laminate 4 through dipping or the like, and thus a small laminated ceramic capacitor 6 is obtained.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to monolithic ceramic electronic components. More specifically, the present invention relates to a monolithic ceramic electronic component such as a monolithic ceramic capacitor, a monolithic varistor, a monolithic piezoelectric element, and a multi-layered ceramic substrate that are widely used in electronic components such as video tape recorders.

[0002]

2. Description of the Related Art A conventional method for manufacturing a monolithic ceramic capacitor will be described (not shown). First, an electrode paste (internal electrode) such as a silver paste is printed on a ceramic green sheet cut into a predetermined size larger than the element size, dried, and then the electrode green paste-printed ceramic green sheet. Stack multiple sheets and press them together. Then, this is cut into a size of one element and fired. After firing, an electrode paste is applied to the surface of the element so as to be electrically connected to the internal electrodes, and this is fired to form external electrodes at both ends of the element to manufacture a chip-shaped multilayer ceramic capacitor.

[0003]

In recent years, in the field of electronic parts, with the increase in density and integration of electronic circuits,
There is a demand for further miniaturization and higher performance of electronic components such as monolithic ceramic capacitors. Therefore, in order to miniaturize the monolithic ceramic capacitor without reducing the capacitance, it is desirable to make the thickness of the ceramic layer (dielectric layer) as thin as possible.

However, when trying to reduce the thickness of the ceramic layer in the conventional monolithic ceramic capacitor, there were various problems. First, in order to make the ceramic layer thin, it is necessary to reduce the particle size of the ceramic raw material powder, but there is a limit to the miniaturization of the particle size of the ceramic raw material powder. Further, when the ceramic layer is made thin, the thickness of the internal electrode also needs to be made thin, and therefore, the internal electrode is likely to be broken during the firing process. Furthermore, if the ceramic layer is made thin, problems such as a short circuit due to abnormal growth of the internal electrodes during firing and a decrease in withstand voltage due to holes generated in the ceramic layer occur. For this reason,
In the conventional monolithic ceramic capacitor, it is impossible to make the thickness of the ceramic layer thinner than several μm, and there is a limit to miniaturization and large capacity of the monolithic ceramic capacitor.

The present invention has been made in view of the drawbacks of the above conventional examples, and an object thereof is to reduce the thickness of a ceramic layer while realizing high performance of a laminated ceramic electronic component. ..

[0006]

The multilayer ceramic electronic component of the present invention is characterized in that a plurality of layers of conductor electrodes and a plurality of layers of ceramic layers formed by a CVD method are alternately laminated on the surface of a substrate. There is.

The ceramic layer may be a dielectric.

[0008]

In the present invention, since the ceramic layer is formed by the CVD method, a dense ceramic layer is formed, and since a heating step such as firing is not performed, the electrode of the conductor electrode is broken or short-circuited. It is possible to improve the performance as an electronic component without causing defects such as.

Further, since the ceramic layer is formed by the CVD method, the ceramic layer can be thinned to 1 μm or less, and an ultra-small monolithic ceramic electronic component can be obtained.

Further, since it is not necessary to remove the substrate used for forming the ceramic layer by the CVD method, the manufacturing process of the monolithic ceramic electronic component can be simplified. Furthermore, by leaving the substrate in the laminated ceramic electronic component,
The mechanical strength of the monolithic ceramic electronic component can be improved, and the reliability as an electronic component can be increased.

[0011]

1 (a), 1 (b) and 1 (c) show a method of manufacturing a monolithic ceramic capacitor according to an embodiment of the present invention. The substrate shown in FIG. 1A is a substrate 1 having a smooth surface, and for example, an SrTiO ₃ substrate or the like can be used. As shown in FIG. 1B, a ceramic layer 3 is formed on the substrate 1, a first-layer conductor electrode 2a is formed on the ceramic layer 3, and the ceramic layer 3 is formed on the ceramic layer 3 again. Then, the second-layer conductor electrode 2b is formed, the ceramic layer 3 is further formed, and the third-layer conductor electrode 2a is formed thereon. By repeating such steps, a plurality of conductor electrodes 2a and 2b and a plurality of ceramic layers 3 are alternately laminated on the surface of the substrate 1, and a plurality of conductor electrodes 2a and 2b and a plurality of ceramic layers are laminated. A ceramic-metal laminate 4 of 3 is formed. Here, each ceramic layer 3 is formed by a CVD method, each conductor electrode 2a, 2b is formed by a sputtering method, and the thickness of each ceramic layer 3 and each conductor electrode 2a, 2b is 1
It is less than or equal to μm. Further, the conductor electrodes 2a and 2b to be the internal electrodes are patterned using a mask, and the odd-numbered conductor electrodes 2a and the even-numbered conductor electrodes 2b are alternately arranged at opposite end portions. Have been pulled out to. After this,
External electrodes 5 on both ends by dipping, sputtering, etc.
When a and 5b are formed, the odd-numbered conductor electrode 2a is electrically connected to the one outer electrode 5a, and the even-numbered conductor electrode 2b is formed.
Is electrically connected to the other external electrode 5b, and a small monolithic ceramic capacitor 6 as shown in FIG. 1C is manufactured.

As a result, the monolithic ceramic capacitor 6 is formed on the substrate 1, the mechanical strength of the monolithic ceramic capacitor 6 can be improved by the substrate 1, and the reliability as an electronic component is improved.

Although the manufacturing process of only one element is described in FIG. 1, a multilayer ceramic capacitor can be efficiently manufactured by simultaneously manufacturing a plurality of elements.

Next, in order to more clearly describe the present invention, specific examples will be described below. Specific Example FIG. 2 shows the heat C used for manufacturing the monolithic ceramic capacitor 6.
FIG. 2 is a schematic configuration diagram of the VD device 7, where 8 is a chamber for CVD, 9 is a susceptor for setting the substrate 1 and 10
Is an O ₂ gas feed path, 11 is an Ar carrier gas feed path, 12 is a TIP [titanium isopropoxide] vessel, 13 is a Pb (C ₂ H ₅ ) ₄ vessel, and 14 is La.
(DPM) ₃ [DPM = C ₁₁ H ₁₉ O ₂ ] vessels, each vessel 12, 13, 14 of TIP, Pb (C ₂ H ₅ ) ₄ and La (DPM) ₃ is supplied with Ar carrier gas. It is arranged in parallel to the feed path 11.

As a substrate 1 for manufacturing the monolithic ceramic capacitor 6, S of 50 mm in length and width and 0.2 mm in thickness is formed.
This SrTiO ₃ substrate 1 is subjected to thermal CV using an rTiO ₃ substrate.
It was set on the susceptor 9 of the D device 7.

Then, with the susceptor 9 heated to 600 ° C., TIP, Pb (C ₂ H ₅ ) ₄ and La (DPM) _{3 are} added.
The valves 15, 16 of the vessels 12, 13, 14 of
Open 17 and vaporize TIP, Pb (C ₂ H ₅ ) ₄ and L
Each raw material gas of a (DPM) ₃ is placed on an Ar carrier gas and sent to the chamber 8. The raw material gas is sprayed together with the O ₂ gas onto the SrTiO ₃ substrate 1 to cause reaction, and the thickness is about 1 μm.
m PLT thin film 18 (ceramic layer 3) was formed (hereinafter referred to as PLT thin film forming step).

Next, a metal mask is set on the PLT thin film 18, and a Pt film 19 having a thickness of about 0.5 μm is formed on the PLT thin film 18 by a sputtering method through a window of the metal mask.
a (conductor electrode 2a) was formed (hereinafter referred to as a Pt film formation first step). The Pt film 19 thus formed
a is shown in FIG. FIG. 3 (b) is an enlarged view of the X part of FIG. 3 (a), and the shaded area indicates the area corresponding to one element, and the numbers written in FIG. 3 (b) indicate the parts. The dimension (unit: mm) is shown.

Then, the PLT thin film forming step is performed again to form P
The LT thin film 18 was formed with a thickness of about 1 μm.

Next, a metal mask is set on the uppermost PLT thin film 18, and the PLT thin film 18 is formed by the sputtering method.
On top of the Pt film 19b (conducting electrode 2
b) was formed (hereinafter referred to as the Pt film formation second step).
FIG. 4A shows the pattern of the Pt film 19b. Figure 4
4B is an enlarged view of the Y portion of FIG. 4A, where the shaded area indicates the area corresponding to one element, and the numbers written in FIG. 3B are the dimensions (unit: mm). ) Is shown.

As described above, the PLT thin film formation-Pt film formation first step-PLT thin film formation-Pt film formation second step is performed 30 times.
Repeat 0 times, and finally perform the PLT thin film formation step to perform S
A ceramic-metal laminate 4 was obtained on the rTiO ₃ substrate 1.

Thereafter, the ceramic-metal laminate 4 was cut element by element with a dicing saw along the broken line C (cutting margin Ct = 0.1 mm) in FIGS. 3B and 4B. Attach Ag paste by dipping to both ends of SrTiO ₃ substrate 1 cut into 1 element,
The external electrodes 5a and 5b were formed by baking at ° C.

Thus, the length is about 2 mm, the width is about 1.2 mm,
A multilayer ceramic capacitor 6 having a thickness of about 1.2 mm was obtained. The capacitance of the monolithic ceramic capacitor 6 was measured and found to be 4.7 μF.

Measurement of flexural strength Next, the flexural strength of the monolithic ceramic capacitor 6 was measured using a flexural strength measuring device 20 as shown in FIG. In FIG. 5, reference numeral 21 denotes a sample holder, the laminated ceramic capacitor 6 serving as a test body is held at both ends on the groove portion 22 of the sample holder 21, and the pressure pin 23 is provided at the center portion.
Is pressurized by. Then, the pressure of the pressurizing pin 23 is displayed by the tension gauge with a stapling needle 24. In this measurement, the interval L between the groove portions 22 of the sample holder 21 was set to 1.4 mm.

On the other hand, for comparison, the above PLT thin film formation-
A Pt film forming the 1-PLT thin film forming -Pt film forming the second steps are repeated in the same manner as in Example Ceramic - after obtaining the metal laminate to remove SrTiO ₃ substrate by dry etching, then each element Then, external electrodes were baked on both ends to prepare a laminated ceramic capacitor of a comparative example having no substrate. The dimensions of this monolithic ceramic capacitor are about 2 mm in length, about 1.2 mm in width, and about 0.9 in thickness.
It was mm. The bending strength of the multilayer ceramic capacitor of this comparative example was measured.

Table 1 shows the measurement results of the maximum load and the bending strength of Examples and Comparative Examples. The bending strength was calculated by the following formula. σ = (3PL) / (2ωt ² ), where P is the maximum load (kgf) and is the scale of the tension gauge when the test piece breaks. Also, L
Is the distance between the lower fulcrums (mm), ω is the width of the test piece (mm),
t is the thickness (mm) of the test piece.

[0026]

[Table 1]

According to Table 1, in the laminated ceramic capacitor of the example, the transverse strength is significantly higher than that of the comparative example, and the mechanical strength is improved.

[0028]

According to the present invention, a dense film can be obtained for both the ceramic layer and the conductor electrode, and since it is not exposed to high temperature, even if the ceramic layer or the conductor electrode is thinned to 1 μm or less, the ceramic It is possible to obtain an ultra-compact (ultra-thin) monolithic ceramic electronic component that is not likely to cause defects in layers and conductor electrodes.

By leaving the substrate in the monolithic ceramic electronic component, the mechanical strength of the monolithic ceramic electronic component can be improved and the reliability of the electronic component can be increased. Further, since it is not necessary to remove the substrate used for forming the ceramic layer by the CVD method, there is an advantage that the manufacturing process of the monolithic ceramic electronic component can be simplified.

[Brief description of drawings]

1A, 1B and 1C are cross-sectional views showing a method for manufacturing a monolithic ceramic capacitor according to an embodiment of the present invention.

FIG. 2 is a thermal CVD used in a specific embodiment of the present invention.
It is a schematic block diagram which shows an apparatus.

FIG. 3A is a plan view showing a Pt film (conductor electrode) formed on a substrate, and FIG. 3B is an enlarged view of an X portion of FIG.

4A is a plan view showing another Pt film (conductor electrode) formed on a substrate, and FIG. 4B is an enlarged view of a Y portion of FIG. 4A.

FIG. 5 is a schematic diagram showing a measuring device for measuring the bending strength of a monolithic ceramic capacitor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2a, 2b Conductor electrode 3 Ceramic layer 5a, 5b External electrode 7 Thermal CVD apparatus

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location H01L 41/09

Claims (2)

[Claims] 1. A multilayer ceramic electronic component comprising a plurality of conductor electrodes and a plurality of ceramic layers formed by a CVD method, which are alternately laminated on a surface of a substrate. 2. The monolithic ceramic electronic component according to claim 1, wherein the ceramic layer is a dielectric.