JPH0915628A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: To prevent the step cutting arising in the part where one electrode of a holding capacitance element climbs over the other electrode and to embody the holding capacitance element of a small capacity necessary for high precision. CONSTITUTION: A scanning signal line GL is partly provided with a projecting part and a pixel electrode ITO 1 is partly superposed on this projecting part via a dielectric film, by which the holding capacitor element Cadd having the projecting part as one electrode and part of the pixel electrode ITO 1 as the other electrode is constituted. The part where the other electrode climbs over the one electrode is provided with an auxiliary electrode SE and both ends of this auxiliary electrode SE are connected to the other electrode and the pixel electrode ITO 1. An intervening films is disposed at the intermediate part of the auxiliary electrode SE and between the other electrode and the pixel electrode ITO 1.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
Active using FT) as a switching element
The present invention relates to a matrix type liquid crystal display device.

[0002]

2. Description of the Related Art For example, an active matrix type liquid crystal display device is provided with a non-linear element (switching element) corresponding to each of a plurality of pixel electrodes arranged in a matrix. Since the liquid crystal in each pixel is theoretically always driven (duty ratio 1.0), the active method has better contrast than the so-called simple matrix method that employs the time-division driving method. Then it is becoming an indispensable technology. A typical switching element is a thin film transistor (TFT).

The liquid crystal display device is made of, for example, glass or the like with a predetermined gap so that the surfaces on which the display pixel electrodes made of a transparent conductive film and the alignment film are laminated are opposed to each other.
A plurality of transparent insulating substrates are superposed on each other, and both substrates are bonded together by a frame-shaped sealing material provided in the vicinity of the peripheral portion between the both substrates. A liquid crystal display panel (liquid crystal display element), in which a liquid crystal is enclosed and sealed inside a sealing material, and a polarizing plate is provided on both outsides of the substrates, and a liquid crystal display panel is arranged below the liquid crystal display panel, and light is emitted to the liquid crystal display panel. A backlight to be supplied, and a liquid crystal driving circuit board arranged outside the outer peripheral portion of the liquid crystal display panel,
A frame-shaped body that is a molded product that holds each of these members, and a metal frame that houses each of these members and has a liquid crystal display window opened are configured.

Of the two transparent insulating substrates constituting the liquid crystal display panel, two adjacent scanning signal lines (extending in the left-right direction and extending in the vertical direction, respectively) are provided on the surface of the first substrate. They are arranged in parallel and are also referred to as gate signal lines or horizontal signal lines. They also function as gate electrodes of thin film transistors as switching elements) and two adjacent video signal lines (extend in the vertical direction and extend in the horizontal direction). These are arranged in parallel with each other. Also referred to as drain signal lines, data signal lines or vertical signal lines (also serving as drain electrodes of thin film transistors), transparent pixel electrodes and thin film transistors as switching elements are provided in each pixel. It is formed for each. It should be noted that the term “crossing” does not mean that it actually touches and intersects, but that it intersects when viewed from the direction perpendicular to the substrate, and an insulating film is interposed between the two.

[0005]

The holding (additional) capacitance element formed for each pixel shortens the life of the liquid crystal and causes so-called burn-in which causes a previous image to remain when the liquid crystal display screen is switched. It has the role of reducing the DC component applied to the device, increasing the discharge time, and storing the image information for a long time after the thin film transistor is turned off. In the storage capacitor, a part of the pixel electrode is superposed on the scanning signal line via a dielectric film, and in the superposed part, a part of the scanning signal line is used as one electrode Is the other pixel electrode. However, conventionally, there is a problem that the other electrode of a part of the pixel electrode is easily crossed over at the other electrode.

Further, recently, as the definition of the liquid crystal display panel has been improved, the size of one pixel has been reduced, and the area devoted to the formation of the storage capacitor element has been reduced. For this reason,
A storage capacitor element having a small area, that is, a storage capacitor element having a small capacity is required. Further, since the load per pixel must be made as small as possible so that the pixel electrode becomes the set potential during the selection period of one pixel, it is necessary to reduce the capacitance of the storage capacitor, which is one of the loads. .

It is an object of the present invention to prevent a step disconnection that occurs at a portion where one electrode of a storage capacitor element crosses over the other electrode and to realize a storage capacitor element having a small capacity necessary for high definition. An object is to provide a liquid crystal display device that can solve the problems.

[0008]

In order to achieve the above object, the present invention provides a scanning signal line extending in the horizontal direction and a plurality of scanning signal lines arranged in parallel in the vertical direction and extending in the vertical direction. A plurality of video signal lines that are present and are arranged in parallel in the horizontal direction, and two video signal lines that are adjacent to each other and that are adjacent to each other. A first insulating substrate provided with a first pixel electrode and a thin film transistor and a second insulating substrate provided with a second pixel electrode facing the first pixel electrode are overlapped with a predetermined gap. A liquid crystal display device having a liquid crystal display panel formed by sealing a liquid crystal between the both substrates, wherein a convex portion is provided on a part of the scanning signal line, and a portion of the first pixel electrode is provided on the convex portion. On top of each other with a dielectric film in between, Characterized in that a part of the first pixel electrode and a holding capacitive element to the other electrode.

An auxiliary electrode is provided in a portion where the other electrode crosses over the one electrode, and both ends of the auxiliary electrode are connected to the other electrode and the first pixel electrode, respectively, and the auxiliary electrode is connected. It is characterized in that an intervening film is provided between an intermediate portion of the electrodes and the other electrode and the first pixel electrode.

The auxiliary electrode is formed at the same time as the source and drain electrodes of the thin film transistor.

Further, the intervening film is formed simultaneously with at least one of the gate insulating film and the channel forming semiconductor film of the thin film transistor.

Further, the other electrode is composed of a convex portion provided on a part of the first pixel electrode.

Further, the dielectric film is composed of a single layer of an anodic oxide film for the scanning signal lines.

[0014]

According to the present invention, a part of the first pixel electrode is superposed on a convex part provided on a part of the scanning signal line via a dielectric film, and the convex part is formed on one electrode of the storage capacitor element. , By using a part of the first pixel electrode as the other electrode, without increasing the riding width of the other electrode on the one electrode,
The area where the two electrodes overlap, that is, the area of the storage capacitor can be reduced. Therefore, disconnection of the other electrode can be prevented, and a small-capacity storage capacitor element can be realized.

The superiority of the present invention will be described in comparison with the prior art with reference to FIGS.

(A) is an example in which the scanning signal line GL according to the present invention is convex, and (B) is an example in which the scanning signal line GL according to the present invention is convex and the pixel electrode ITO1 is also convex.
(C) is an example in which the conventional pixel electrode ITO1 has a convex shape,
(D) shows an example in which the conventional scanning signal line GL has a concave shape and the pixel electrode ITO1 has a convex shape. In the drawings (A) to (D), the left side is a plan view showing the shapes of the scanning signal line GL and the pixel electrode ITO1. The diagonal line rising to the right shows the scanning signal line GL, the diagonal line falling to the right shows the pixel electrode ITO1, and the grid-like line shows the storage capacitor element Cadd. The right side is the pixel electrode ITO
No. 1 riding on the scanning signal line GL (shown by the total of), the connection portion of the auxiliary electrode with the pixel electrode ITO1 (shown by a fine grid-like line), and the area of the storage capacitor element Cadd (in the left side diagram). It is a figure which shows the area of the part shown with a grid-like line.

Here, the other electrode is the pixel electrode ITO.
In order to prevent disconnection in step 1, the necessary riding width is 30 μm. In addition, when the riding width is extended, the step break occurs only at both ends of the riding portion, and the other portions can be reliably climbed up, and the disconnection can be prevented. Further, in the present invention, the auxiliary electrode is provided in order to electrically connect the portion where the pixel electrode ITO1 does not ride and the portion where the pixel electrode ITO1 does not run even if a step break occurs in the pixel electrode ITO1 at the riding part. The dimension required for connecting the auxiliary electrode to the pixel electrode ITO1 is 10 μm × 10 μm.

In (A) to (D), as is apparent from the figure, the riding width of the pixel electrode ITO1 is all 30 μm.
m, the dimensions of the connection portion of the auxiliary electrode with the pixel electrode ITO1 are all 10 μm × 10 μm, but the storage capacitor Cad
Regarding the area of d, (A) is 100 μm ² , (B) is 150 μm ² , (C) is 300 μm ² , and (D) is 250 μm.
m ² . That is, in the conventional holding capacitive element, when the riding width is increased, the area of the holding capacitive element is increased, and conversely, when the riding width is decreased, a step break occurs in the riding portion,
The other electrode was broken. Therefore, a small-capacity storage capacitor element could not be realized without disconnection. On the other hand, according to the present invention, the area of the storage capacitor can be reduced by forming an area on the convex portion of the scanning signal line that can contact the other electrode of the auxiliary electrode, and the other electrode can be disconnected. It can be seen that the above can be prevented and a small capacity storage capacitor can be realized.

[0019]

The objects and features of the present invention will become apparent from the following description with reference to the drawings.

<< Active Matrix Liquid Crystal Display Device >> An embodiment in which the present invention is applied to an active matrix color liquid crystal display device will be described below.
In the drawings described below, components having the same function are designated by the same reference numeral, and repeated description thereof will be omitted.

<< Overall Structure of Liquid Crystal Display Module >> FIG.
[Fig. 3] is an exploded perspective view showing each component of the liquid crystal display module MDL.

SHD is a shield case (also called a metal frame) made of a metal plate, WD is a display window, INS1
To 3 are insulating sheets, PCB1 to 3 are circuit boards (PCB1
Is a drain side circuit board, PCB2 is a gate side circuit board,
PCB3 is an interface circuit board), JN is a joiner for electrically connecting the circuit boards PCB1 to PCB3, T
CP1 and TCP2 are tape carrier packages, PNL
Is a liquid crystal display panel, GC is a rubber cushion, ILS is a light shielding spacer, PRS is a prism sheet, SPS is a diffusion sheet, GLB is a light guide plate, RFS is a reflection sheet, and MCA is a lower case (mold case) formed by integral molding. , LP is a fluorescent tube, LPC is a lamp cable, and GB is a rubber bush that supports the fluorescent tube LP. The respective members are stacked in an up-down arrangement as shown in the figure to assemble the liquid crystal display module MDL.

The liquid crystal display module MDL has two kinds of housing / holding members, a lower case MCA and a shield case SHD. Insulation sheets INS1-3, circuit board PCB1
By combining the metal shield case SHD containing and fixing the liquid crystal display panel PNL with the lower case MCA containing the backlight BL including the fluorescent tube LP, the light guide plate GLB, the prism sheet PRS, and the like, The liquid crystal display module MDL is assembled.

[Embodiment 1] << Outline of Matrix Part >> FIG. 1 is a plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device of an embodiment 1 to which the present invention is applied. 2 is a sectional view taken along the line 2-2 in FIG. 1 (a sectional view showing adjacent video signal lines and transparent pixel electrodes), and FIG. 3 is a sectional view taken along the line 3-3 in FIG. 1 (a thin film transistor for one pixel). FIG. 4 is a cross-sectional view (cross-sectional view of the storage capacitor element portion) taken along section line 4-4 of FIG.

As shown in FIG. 1, each pixel has two adjacent scanning signal lines (gate lines or horizontal signal lines) GL.
And an adjacent two video signal lines (data line, drain line or vertical signal line) DL in an intersecting region (region surrounded by four signal lines). Each pixel includes a thin film transistor TFT, a transparent pixel electrode ITO1 and a storage capacitor element (additional capacitor element) Cadd. The scanning signal line GL is bifurcated near the intersection with the video signal line DL. This is because when one of the bifurcated lines in this portion is short-circuited with the video signal line DL, this is cut with a laser and the other one (not cut) line does not become a line defect and is normal. This is to make it work.

As shown in FIG. 3, a thin film transistor TFT and a transparent pixel electrode ITO1 are formed on the side of the first transparent glass substrate SUB1 based on the liquid crystal layer LC, and the second
On the transparent glass substrate SUB2 side of the color filter FI
L, a black matrix pattern BM for shading is formed. Silicon oxide films SIO formed by dipping or the like on both surfaces of the transparent glass substrates SUB1 and SUB2
Is provided.

On the inner (liquid crystal LC side) surface of the second transparent glass substrate SUB2, a light shielding film BM and a color filter F are provided.
IL, protective film PSV2, common transparent pixel electrode ITO2 (C
OM) and the upper alignment film ORI2 are sequentially stacked. POL1 and POL2 are polarizing plates formed on the outer surfaces of the transparent glass substrates SUB1 and SUB2, respectively.

<< Thin Film Transistor TFT >> Next, referring to FIG.
4, the configuration on the first transparent glass substrate SUB1 side will be described in detail. When a positive bias is applied to the scanning signal line GL, the channel resistance between the source and the drain decreases, and when the bias is zero, the channel resistance increases.

Each pixel has one thin film transistor TFT
Is provided. The thin film transistor TFT is formed on the scanning signal line GL, as shown in FIG. The thin film transistor TFT has a gate electrode (scanning signal line GL),
The anodic oxide film AOF of the scanning signal line GL and the insulating film GI of silicon nitride are covered, and the AOF and GI form a gate insulating film. I-type (intrinsic, intrin
sic, i-type semiconductor layer AS made of amorphous silicon (Si which is not doped with conductivity determining impurities) (Si), a pair of source electrode SD1 and drain electrode SD2. It should be understood that the source and drain are originally determined by the bias polarity between them, and the polarity is inverted during operation in the circuit of this liquid crystal display device, so it should be understood that the source and drain are switched during operation. However, in the following description, one is fixed and the other is fixed as a drain for convenience.

<< Gate Electrode (Scanning Signal Line GL) >> In this example, the scanning signal line GL is formed of a single-layer first conductive film g1. An aluminum (Al) film formed by sputtering, for example, is used as the first conductive film g1, and an anodic oxide film AOF of Al is provided thereon in a self-aligned manner.

<< Insulating Film GI >> The insulating film GI is used as a gate insulating film for applying an electric field from the scanning signal line GL to the semiconductor layer AS in the thin film transistor TFT together with the anodized film AOF. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected,
With a thickness of 1200 to 2700Å (in this example, 2000Å
Degree) is formed. In this example, the insulating film GI is formed in the thin film transistor TFT section, the storage capacitor element Cadd section, the source electrode SD1, the drain electrode SD2 section, and the video signal line DL section near the scanning signal line GL.
The storage capacitor element Cadd has an independent island shape.
The drain electrode SD2 and the video signal line DL are patterned to have a shape along a part thereof. On the other hand, the scanning signal line G
The insulating film GI is not entirely covered on L and is patterned and removed similarly to the semiconductor layer AS described below. The scanning signal line GL not covered with the insulating film GI is covered with the anodized film AOF.

<< i-type semiconductor layer AS >> i-type semiconductor layer AS
Is a thin film transistor TFT section, a storage capacitor element Cadd section, a source electrode SD1 and a drain electrode S in this example.
The storage capacitor element Cadd portion is formed in the D2 portion, has an independent island shape, and is patterned in a shape along a part of the drain electrode SD2 and the video signal line DL.
On the other hand, the scanning signal line GL is not entirely covered with the semiconductor layer AS, and the video signal line DL and the source electrode SD1 which are adjacent to the storage capacitor element Cadd are patterned and removed similarly to the insulating film GI described above. The semiconductor layer AS is
Amorphous silicon is formed with a thickness of 200 to 2200Å (in this example, about 2000Å). The layer d0 is a phosphorus (P) -doped N ⁺ -type amorphous silicon semiconductor layer for ohmic contact, where the i-type semiconductor layer AS is present on the lower side and the conductive layer d2 (d3) is present on the upper side. Only left.

The i-type semiconductor layer AS is located at the intersection of the scanning signal line GL and the video signal line DL, the scanning signal line GL and the source electrode S.
D1, drain electrode SD2 and storage capacitor element Cadd
Anodized film AO for insulation isolation at the intersection of
F and the insulating film GI are reduced together with line defects caused by a short circuit. In addition, the transparent conductive film ITO1 (d
1) Extend over the N ⁺ type amorphous silicon d0, this i
The type semiconductor layer AS and the insulating film GI are formed, but as a result, the source electrode SD1 is connected to the transparent conductive film ITO1 (d1) without disconnection as described later. Further, even when the source electrode SD1 and the drain electrode SD2 are not properly patterned and these electrodes are left on the scanning signal line GL only in the portion of the anodic oxide film AOF, even if the anodic oxide film AOF single layer has a predetermined withstand voltage. There is a short circuit can be prevented.

On the other hand, in this embodiment, the intersection of the scanning signal line GL and the video signal line DL and the thin film transistor TF.
The semiconductor layer AS and the insulating film GI below the video signal line DL in the T portion extend on the transparent pixel electrode ITO1, and the video signal line D
It serves to insulate and separate L from the transparent pixel electrode ITO1. Therefore, the video signal line DL and the transparent pixel electrode ITO
Even if the distance 1 is narrowed to form a bright liquid crystal display device with a high aperture ratio, the video signal line DL and the transparent pixel electrode ITO1
A point defect due to a short circuit with (d1) can be prevented.

Since the semiconductor layer AS and the insulating film GI are processed using the same photoresist pattern, the semiconductor layer A
The photo-process can be reduced as compared with the method in which S and the insulating film GI are processed by different photoresist patterns. Also,
The short circuit is less likely to be established than when the short circuit is prevented between the video signal line DL and the transparent pixel electrode ITO1 (d1) only by the insulating film GI. This is because the transparent conductive film ITO1 (d1) is formed by dividing the photo-etching process of the semiconductor layer AS and the insulating film GI.
The i-type semiconductor layer AS extending above the video signal line DL from below
This is because, if not provided, the selection ratio of the insulating film GI in the semiconductor layer AS etching is not sufficient, and the breakdown voltage of the insulating film GI is reduced.

<< Transparent Pixel Electrode ITO1 >> Transparent Pixel Electrode I
TO1 constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITO1 is connected to the source electrode SD1 of the thin film transistor TFT. This transparent pixel electrode ITO1
Is composed of a first conductive film d1, and the first conductive film d1 is a transparent conductive film (In
dium-Tin-Oxide ITO (Nesa film), 1000
It is formed to a thickness of up to 2000Å (about 1400Å in this example).

<< Source electrode SD1, Drain electrode SD
2 >> Each of the source electrode SD1 and the drain electrode SD2 is composed of a second conductive film d2 in contact with the N ⁺ type semiconductor layer d0 and a third conductive film d3 formed thereon.

The second conductive film d2 is a chromium (Cr) film formed by sputtering and is formed to a thickness of 500 to 1000 Å (in this example, about 600 Å). Cr film was good adhesion between the N ⁺ -type semiconductor layer d0, is used in the 3 Al of the conductive film d3 is prevented from diffusing into the N ⁺ -type semiconductor layer d0 (so-called barrier layer) purposes. As the second conductive film d2, in addition to the Cr film, a high melting point metal (Mo, Ti, T
a, W) film, refractory metal silicide (MoSi ₂ , Ti)
A Si ₂ , TaSi ₂ , WSi ₂ ) film may be used.

The third conductive film d3 is formed by sputtering Al to a thickness of 3000 to 5000 Å (in this example, 4000 Å
Degree) is formed. The Al film has less stress than the Cr film and can be formed to have a thick film thickness, which reduces the resistance values of the source electrode SD1, the drain electrode SD2 and the video signal line DL, and is caused by the scanning signal line GL. It has the function of ensuring that you can climb over steps (improve step coverage).

The source electrode SD1 and the drain electrode SD2 are laminated films of the second conductive film d2 and the third conductive film d3, but in the case of a relatively small liquid crystal display device, they are made of a refractory metal such as a Cr film. Only a certain second conductive film may be used. In that case, it is necessary to increase the film thickness to about 1800Å.

After patterning the second conductive film d2 and the third conductive film d3 with the same mask pattern, the N ⁺ type semiconductor layer is formed by using the same mask or by using the second conductive film d2 and the third conductive film d3 as a mask. d0 is removed. That is, i
The N ⁺ semiconductor layer d0 remaining on the type semiconductor layer AS is the second
The portions other than the conductive film d2 and the third conductive film d3 are removed by self-alignment. At this time, since the N ⁺ type semiconductor layer d0 is etched so that the entire thickness thereof is removed, the i-type semiconductor layer AS is also slightly etched on its surface portion, but the extent thereof is controlled by the etching time. Good.

<Video Signal Line (Data Line) DL> The video signal line DL is composed of the second conductive film d2 and the third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2, or the second conductive film d2. It is composed of only the conductive film d2.

<< Protective Film PSV1 >> Thin Film Transistor TF
A protective film PSV1 is provided on the T and the transparent pixel electrode ITO1. The protective film PSV1 is formed mainly for protecting the thin film transistor TFT from moisture and the like,
Use one with high transparency and good moisture resistance. The protective film PSV1 is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD device, and has a thickness of 1 μm.
It is formed with a film thickness of about. The protective film is generally plasma C
It is formed by a vacuum device such as VD, which improves the throughput when formed by coating an organic material such as an epoxy resin.

<< Light-shielding film BM >> Second transparent glass substrate SU
A light shielding film BM is provided on the B2 side so that external light or backlight light does not enter the i-type semiconductor layer AS. The closed polygonal outline of the light-shielding film BM shown in FIG.
The inside thereof shows an opening in which the light shielding film BM is not formed. The light-shielding film BM is formed of, for example, an aluminum film or a chromium film having a high light-shielding property against light, and in this embodiment, the chromium film is formed by sputtering to a thickness of about 1300 Å.

Therefore, i of the thin film transistor TFT
In the type semiconductor layer AS, at least a so-called channel region between the source electrode SD1 and the drain electrode SD2 is sandwiched by the upper and lower light-shielding films BM and the large scanning signal lines GL, and external natural light or backlight light does not hit. The light-shielding film BM is formed in a lattice shape around each pixel (so-called black matrix), and the effective display area of one pixel is partitioned by this lattice. Therefore,
The contour of each pixel is made clear by the light shielding film BM, and the contrast is improved. That is, the light blocking film BM has two functions of blocking the i-type semiconductor layer AS and serving as a black matrix.

The light-shielding film BM is also formed in a frame shape in the peripheral portion of the liquid crystal display panel, and its pattern is formed continuously with the pattern of the matrix portion shown in FIG. The light-shielding film BM in the peripheral portion has a seal portion S
It is extended to the outside of L to prevent leaked light such as reflected light due to a mounting machine such as a personal computer from entering the matrix portion. On the other hand, the light-shielding film BM is held inside about 0.3 to 1 mm from the edge of the substrate SUB2, and is formed so as to avoid the cut region of the substrate SUB2.

<< Color Filter FIL >> The color filter FIL (see FIGS. 2 and 3) has red, green, and
The stripes are formed by repeating blue. The color filter FIL is formed to be large so as to cover all of the transparent pixel electrode ITO1, and the light shielding film BM is formed inside the peripheral portion of the transparent pixel electrode ITO1 so as to overlap with the edge portions of the color filter FIL and the transparent pixel electrode ITO1. There is.

The color filter FIL can be formed as follows. First, the dyeing base material such as acrylic resin is removed from the surface of the second transparent glass substrate SUB2. After this,
The dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, a green filter G and a blue filter B are sequentially formed by performing a similar process.

<< Protective Film PSV2 >> The protective film PSV2 is provided to prevent the dye of the color filter FIL from leaking to the liquid crystal LC. The protective film PSV2 is formed of, for example, a transparent resin material such as an acrylic resin or an epoxy resin.

<< Common Transparent Pixel Electrode ITO2 >> The common transparent electrode ITO2 (see FIGS. 2 and 3) is a transparent pixel electrode ITO provided for each pixel on the first transparent glass substrate SUB1 side.
1. The optical state of the liquid crystal LC faces each pixel electrode IT.
It changes in response to a potential difference (electric field) between O1 and the common transparent pixel electrode ITO2. The common transparent pixel electrode ITO2 is configured to apply a common voltage Vcom.
In this embodiment, the common voltage Vcom is set to an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the video signal line DL, but the integrated circuit used in the video signal drive circuit is set. When it is desired to reduce the power supply voltage of the circuit to about half, an AC voltage may be applied.

<< Structure of Storage Capacitance Element Cadd >> The transparent pixel electrode ITO1 is formed so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TFT. By this superposition, as is apparent from FIG. 4, the convex portion provided on a part of the adjacent scanning signal line GL is used as one electrode (lower electrode) PL1, and the convex portion provided on a part of the transparent pixel electrode ITO1. A storage capacitor element Cadd whose portion is one electrode (upper electrode) PL2 is formed. The dielectric film of the storage capacitor Cadd is composed of an oxide film of the scanning signal line GL which is one electrode of the storage capacitor, that is, a single layer of an anodic oxide film AOF used as a gate insulating film of the thin film transistor TFT. There is.

In the present embodiment, the other electrode P
An auxiliary electrode SE (d2, d3) is provided at a portion of L2 that goes over one electrode PL1 of the convex portion of the scanning signal line GL, and overlaps with a portion (PL2) of the transparent pixel electrode ITO1 that overlaps with the scanning signal line GL. Since the transparent pixel electrode ITO1 is electrically connected to the non-exposed portion, even if the transparent pixel electrode ITO1 is disconnected at the portion overcoming the scanning signal line GL, the other electrode PL
2 is not electrically disconnected from the transparent pixel electrode ITO1.

Therefore, in this embodiment, in the liquid crystal display device using the transparent electrode (ITO) as the other electrode PL2 formed on the liquid crystal LC side of the storage capacitor element Cadd, the step of the transparent electrode formed in the step portion Since disconnection of the storage capacitor electrode PL2 due to poor coverage can be reliably prevented, point defects due to disconnection of the storage capacitor element can be prevented.

In this way, both ends of the auxiliary electrode SE are connected to the other electrode PL2 and the pixel electrode ITO1, and the middle part of the auxiliary electrode SE and the other electrode PL2 and the pixel electrode I.
The intervening film provided between the insulating film GI and the TO1 is composed of the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type semiconductor layer d0. When the intervening film is not provided, the auxiliary electrode SE (d
2. Since d2) is formed along the portion where the transparent pixel electrode ITO1 does not ride and the portion where the transparent pixel electrode ITO1 rides, if the transparent pixel electrode ITO1 is broken at the riding portion, the transparent pixel electrode ITO1 is also broken.

In this embodiment, a part of the pixel electrode ITO1 is covered with a dielectric film AO on the convex part provided in a part of the scanning signal line GL.
The convex portions are overlapped with each other through F and the storage capacitor element Cadd
By using one electrode PL1 and a part of the pixel electrode ITO1 as the other electrode PL2, as described with reference to FIGS. 5A to 5D, the other electrode on the one electrode PL1 The area where the two electrodes overlap, that is, the area of the storage capacitor element Cadd can be reduced without reducing the riding width of PL1. Therefore, the disconnection of the other electrode PL2 can be prevented, and the storage capacitor element Cadd having a small capacitance can be prevented.
Can be realized. For example, when trying to obtain a storage capacity of 100 fF, the riding width was about 24 μm in the conventional structure (structure of FIG. 5D), but in this embodiment, it is about 4 μm.
It was 3 μm. By changing the vertical and horizontal dimensions of the convex portion of the scanning signal line GL, the riding width of the other electrode PL2 on the scanning signal line GL can be flexibly controlled.

Further, the anodic oxide film is formed at the intersection of the gate electrode (scanning signal line GL) and the drain electrode SD2, the intersection of the scanning signal line GL and the video signal line DL, and the intersection of the scanning signal line GL and the source electrode SD1. The AOF, the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type semiconductor layer d0 are stacked. As a result, the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type semiconductor layer d0 that are continuously formed by the plasma CVD method are formed without being removed by etching, so that short-circuit defects (point defect mode) are reduced. To be done.

For example, when the dielectric film of the storage capacitor is composed of the i-type semiconductor layer AS, the N ⁺ type amorphous silicon layer d0, the anodic oxide film AOF and the insulating film GI, such a storage capacitor has Since the dielectric film is formed of these multilayer films, the dielectric strength between one electrode PL1 and the other electrode PL2 is good, and the multilayer film can be etched at one time, so that the process is simplified. There are merits. However, in the dielectric film, the i-type semiconductor layers AS and N
^Since there is a semiconductor layer such as ⁺ type amorphous silicon d0, the storage capacitor becomes a MIS (metal, insulating film, semiconductor) capacitor, and the capacitance value is different when a positive voltage is applied and when a negative voltage is applied. It turned out that there is a demerit of having asymmetric characteristics.

In the active matrix type liquid crystal display device, the storage capacitor element is the corresponding transparent pixel electrode ITO1.
The display data (electric charge) written in is retained until it is written next.

Further, in the liquid crystal display device, in order to prevent the life of the liquid crystal LC from being shortened due to the direct current electric field applied to the liquid crystal LC, positive voltage and negative voltage are alternately applied to the liquid crystal display electrode, that is, the transparent pixel electrode ITO1. The liquid crystal is driven by alternating current.

Therefore, since the positive voltage and the negative voltage of the alternating voltage are applied to the storage capacitor Cadd as the liquid crystal is driven by alternating current, the display data (charges) held in the storage capacitor Cadd is in the positive voltage application period. A different phenomenon occurs depending on the negative voltage application period. In the liquid crystal display device, the phenomenon in which the held display data differs depending on the positive and negative voltages is a phenomenon in which a direct current electric field is applied to the liquid crystal LC, and appears as a problem that the life of the liquid crystal LC cannot be improved.

However, in the technique for simultaneously processing the insulating film GI and the i-type semiconductor film AS to simplify the process, in order to use the insulating film GI for the dielectric film of the storage capacitor Cadd, the i-type film is inevitably used. The semiconductor layer AS has also been in a situation where it has to enter the dielectric film.

In this embodiment, the above problems can be solved. That is, as shown in FIG. 4, the problem is that the dielectric film of the storage capacitor is provided with one electrode P of the storage capacitor.
This is solved by using the L1 self-oxidized film, that is, the anodized film AOF.

In the storage capacitor element shown in FIG. 4, by forming the anodized film AOF on the surface of one electrode,
Since the transparent pixel electrode ITO1 overlaps the one electrode PL1 to form the other electrode PL2 of the storage capacitor element, the i-type semiconductor layer AS formed after forming the transparent pixel electrode ITO1 is the storage capacitor element Cadd. It does not become a dielectric film. Therefore, by using such a storage capacitor element Cadd, the life of the liquid crystal display device using the simplified process can be significantly improved.

As shown in FIG. 1, the storage capacitor element is formed such that the other electrode PL2 extends from the transparent pixel electrode ITO1 and overlaps with the scanning signal line GL. By forming the storage capacitor Cadd in the portion where the transparent pixel electrode ITO1 and the scanning signal line GL overlap with each other in this way, a space for the storage capacitor becomes unnecessary, the aperture ratio of the liquid crystal pixel is improved, and the display is improved. The screen can be brightened.

<< Function of Storage Capacitance Element Cadd >> The storage capacity element Cadd functions to reduce the influence of the gate potential change ΔVg on the midpoint potential (pixel electrode potential) Vlc when the thin film transistor TFT switches. This situation is represented by the following equation.

ΔVlc = {Cgs / (Cgs + Cadd + Cpix)} × ΔVg where Cgs is the gate electrode G of the thin film transistor TFT
Parasitic capacitance formed between T and source electrode SD1, C
pix is a capacitance formed between the transparent pixel electrode ITO1 (PIX) and the common transparent pixel electrode ITO2 (COM), ΔV
lc represents a change amount of the pixel electrode potential due to ΔVg. This variation ΔVlc causes a direct current component applied to the liquid crystal LC, but the value can be reduced as the holding capacitance Cadd is increased. Further, as described above, the storage capacitor element Cadd also has the function of lengthening the discharge time, and stores the image information for a long time after the thin film transistor TFT is turned off. The reduction of the direct current component applied to the liquid crystal LC is
, And the so-called burn-in in which the previous image remains when the liquid crystal display screen is switched can be reduced.

As described above, since the gate electrode GT is made large enough to completely cover the i-type semiconductor layer AS, the overlap area with the source electrode SD1 and the drain electrode SD2 is increased, and the parasitic capacitance Cgs is increased accordingly. The reverse effect is that the midpoint potential Vlc is easily affected by the gate (scanning) signal Vg. However, this disadvantage can be eliminated by providing the storage capacitor Cadd.

The holding capacitance of the holding capacitance element Cadd is 4 to 8 times (4.C
pix <Cadd <8 · Cpix), 8 to 3 for parasitic capacitance Cgs
Set to a value about twice (8 · Cgs <Cadd <32 · Cgs).

The scanning signal line GL (Y ₀ ) at the first stage, which is used only as the storage capacitor electrode line, is the common transparent pixel electrode ITO2.
Set to the same potential as (Vcom). For example, the first stage scanning signal line is short-circuited to the common electrode COM through the terminal GT0, the lead wire INT, the terminal DT0 and the external wiring. Alternatively, the storage capacitor electrode line Y ₀ in the first stage is connected to the scanning signal line Yend in the final stage and is connected to a DC potential point (AC ground point) other than Vcom, or an extra scanning pulse Y ₀ from the vertical scanning circuit V.
You may connect to receive.

<< Increase in pixel aperture ratio >> A gate electrode GL and a gate insulating film G are sequentially formed on a transparent glass substrate SUB1.
I, a channel forming i-type semiconductor layer AS, and an active matrix type liquid crystal display panel PNL having a thin film transistor TFT having an inverted stagger structure in which source / drain electrodes SD1 and SD2 are formed, as shown in FIGS. Between the video signal line DL and the transparent glass substrate SUB1, the same material is used at the same time as the i-type semiconductor layer AS for forming a channel, which is wider than the conventional video signal line DL and is made of amorphous silicon of the thin film transistor TFT. The formed semiconductor layer AS and the insulating film GI formed of the same material as the gate insulating film GI of the thin film transistor TFT do not exist along the video signal line DL. Therefore, since the interval between the video signal line DL and the transparent pixel electrode ITO1 can be narrowed, the width of the transparent pixel electrode ITO1 (width in the left-right direction in the drawing) can be widened. That is, the second
The width of the opening of the light shielding film (black matrix) BM provided on the transparent glass substrate SUB2 side can be widened.
Therefore, the aperture ratio of the pixel can be increased without increasing the parasitic capacitance. As a result, a bright display can be obtained and the power consumption of the backlight can be reduced.

<< Manufacturing Method >> Next, a manufacturing method of the first transparent glass substrate SUB1 side of the liquid crystal display device of Example 1 will be described with reference to FIGS. In the figure, the central character is an abbreviation for the process name, the left side is the pixel portion shown in FIG. 3, and the right side is the storage capacitor element Cad shown in FIG.
The flow of processing seen from the cross-sectional shape near d is shown. Except for steps B and D, steps A to G are classified according to each photo (photo) process, and each cross-sectional view of each process shows the stage after processing after photo processing and removal of photoresist. ing. In the present description, the photographic processing means a series of operations from application of photoresist to selective exposure using a mask to development thereof, and repeated description is omitted. Description will be given below according to the divided steps.

Step A, FIG. 6 After the silicon oxide films SIO are provided on both surfaces of the first transparent glass substrate SUB1 made of 7059 glass (trade name) by dipping, baking is performed at 500 ° C. for 60 minutes. Although this SIO film is formed in order to alleviate the surface irregularities of the glass substrate SUB1, this step can be omitted if the irregularities are small. Al-Ta, A with a film thickness of 2800Å
The second conductive film g2 made of l-Ti-Ta, Al-Pd, or the like.
Are provided by sputtering. After the photo-treatment, the first conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid and glacial acetic acid to form a gate electrode (GL) of the thin film transistor TFT.
And one electrode PL1 of the storage capacitor element Cadd is formed.

Step B, FIG. 6 After directly drawing the resist (after forming the above-described anodizing pattern AO), 3% tartaric acid was added to the pH of 6.25 ± by an ammonia.
The solution adjusted to 0.05 is 1: 1 with ethylene glycol solution.
The substrate SUB1 is dipped in an anodizing solution composed of the solution diluted to 9 to adjust the formation current density to 0.5 mA / cm ² (constant current formation). Next, anodic oxidation is performed until the formation voltage 125 V necessary for obtaining a predetermined Al ₂ O ₃ film thickness is reached. After that, it is desirable to hold this state for several tens of minutes (constant voltage formation). This is important for obtaining a uniform Al ₂ O ₃ film. Thereby, the conductive film g1
Is anodized to have a film thickness of 18 in a self-aligned manner on the scanning signal line (gate line) GL and one electrode PL1 (g1) of the storage capacitor Cadd and on the side surface of each electrode.
The anodic oxide film AOF of 00Å is formed, and a part of the gate insulating film of the thin film transistor TFT and the storage capacitor element Ca are formed.
It becomes a dielectric film of dd.

Step C, FIG. 6 A conductive film d1 made of an ITO film having a film thickness of 1400Å is provided by sputtering. After the photo-treatment, the conductive film d1 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etching solution, whereby the uppermost layers of the gate terminal GTM and the drain terminal DTM, the transparent pixel electrode ITO1 and the other electrode of the storage capacitor element Cadd. PL2 (d1) is formed.

Step D, FIG. 7 Ammonia gas, silane gas and nitrogen gas are introduced into the plasma CVD apparatus to provide a 2000 Å-thickness nitrided Si film, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to reduce the film thickness. After the 2000 Å i-type amorphous Si film is formed, hydrogen gas and phosphine gas are introduced into the plasma CVD apparatus to form an N ⁺ -type amorphous Si film having a film thickness of 300 Å. This film formation is continuously performed by changing the reaction chamber in the same CVD apparatus.

Step E, FIG. 7 After photo processing, SF ₆ and CC are used as dry etching gas.
Using N ₄ , the N ⁺ type amorphous Si film and the i type amorphous Si film are etched. Subsequently, etching the nitride Si film using SF _6. Of course, the N ⁺ -type amorphous Si film, the i-type amorphous Si film and the Si nitride film may be continuously etched with SF ₆ gas.

In this example, at this point in time, as shown in FIG. 1, the N ⁺ type amorphous Si film, the i type amorphous Si film and the portion of the portion where the video signal line is provided and adjacent to the pixel electrode are formed. The Si nitride film is removed.

Thus, the characteristic feature of the manufacturing process of this example is that the three-layered CVD film is continuously etched with the gas containing SF ₆ as a main component. That is, the etching rate for SF ₆ gas is N ⁺ type amorphous Si film, i type amorphous Si
The film and the Si nitride film are larger in this order. Therefore, when the N ⁺ -type amorphous Si film is completely etched and the i-type amorphous Si film starts to be etched, the upper N ⁺ -type amorphous Si film is side-etched, resulting in the i-type amorphous Si film. The film is processed into a taper of about 70 degrees. When the i-type amorphous Si film is completely etched and the Si-nitride film starts to be etched, the upper N ⁺ -type amorphous Si film and the i-type amorphous Si film are side-etched in this order. The i-type amorphous Si film is tapered by about 50 degrees and the silicon nitride film is tapered by 20 degrees. Even if the source electrode SD1 is formed on the taper shape, the probability of disconnection is significantly reduced. In addition, as shown in FIG. 1, the video signal line DL has an N ⁺ -type amorphous Si film (d0),
Even in the portion which crosses over the pattern of the i-type amorphous Si film (AS) and the Si nitride film (GI), the taper prevents the video signal line from being broken and improves the manufacturing yield.
The N ⁺ -type amorphous Si film has a taper angle close to 90 degrees, but since the thickness is as thin as 300 Å, the probability of disconnection at this step is very small. Therefore, strictly speaking, the plane patterns of the N ⁺ -type amorphous Si film, the i-type amorphous Si film, and the Si nitride film are not the same pattern, but the cross-section has a forward tapered shape, so that the N ⁺ -type amorphous Si film, The i-type amorphous Si film and the Si nitride film have a large pattern in this order. At the same time, the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type amorphous Si layer d0 are formed on the other electrode PL2 of the storage capacitor Cadd and at the portion overcoming the one electrode PL1. An island pattern IL is provided.

Step F, FIG. 8 A second conductive film d2 made of Cr and having a film thickness of 600 Å is provided by sputtering.
A third conductive film d3 made of Pd, Al-Si, Al-Ta, Al-Ti-Ta or the like is provided by sputtering.
After the photo-treatment, the third conductive film d3 is etched with the same liquid as the process A, and the second conductive film d2 is etched with a second cerium ammonium nitrate solution to form the video signal line DL, the source electrode SD1 and the drain electrode SD2. To do. At the same time, on the other electrode PL2 of the storage capacitor Cadd,
In addition, Al and C are provided in a portion that passes over one electrode PL1.
An auxiliary electrode SE made of r is provided. In addition, the auxiliary electrode SE
And the electrode PL2, the insulating film GI, the i-type semiconductor layer AS
Since the island-shaped pattern IL made of and the N ⁺ -type amorphous Si layer d0 is provided, when the electrode PL2 is disconnected at the portion where the electrode PL2 crosses over the electrode PL1, the probability of short-circuiting between the electrode PL1 and the auxiliary electrode SE is high. descend. Further, since the anodic oxide film AO is not etched by the etching solution at the portion where the electrode PL2 is broken, the withstand voltage is improved.

Here, in this example, as shown in step E, N ⁺
Since the i-type amorphous Si film, the i-type amorphous Si film, and the Si nitride film are forward tapered, the liquid crystal display device having a large tolerance of the resistance of the video signal line DL is formed by only the second conductive film d2. It is also possible to do so. Further, since the island-shaped pattern IL overriding the auxiliary electrode SE is also formed by etching the N ⁺ -type amorphous Si layer d0, the i-type amorphous Si layer AS, and the nitrided Si film GI in this order, the cross section is tapered. Therefore, the auxiliary electrode SE will not be broken due to defective step coverage, and point defects can be prevented.

Next, SF ₆ and
By introducing CCl ₄ and etching the N ⁺ type amorphous Si film, the N ⁺ type semiconductor layer d between the source and the drain is formed.
0 is selectively removed.

Step G, FIG. 8 Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a Si nitride film having a thickness of 1 μm. After the photo-treatment, the protective film PSV1 is formed by etching using SF ₆ as a dry etching gas. As the protective film, not only an SiN film formed by CVD but also an organic material can be used.

The planar relationship between the auxiliary electrode SE and the island-shaped pattern IL described above is, as shown in FIG. 1, in the portion where the transparent electrode ITO1 crosses the scanning signal line GL (PL1), the auxiliary electrode SE. Are formed in the region of the island-shaped pattern IL, and the width of the auxiliary electrode SE is smaller than that of the island-shaped pattern IL.

This is to maintain the alignment margin between the auxiliary electrode SE and the island pattern IL.

Therefore, according to the first embodiment shown in FIG. 1, the auxiliary electrode SE and the scanning signal line GL are surely insulated from each other, so that the reduction of the manufacturing yield of the liquid crystal display device due to the short circuit of the storage capacitor element Cadd is prevented. can do.

[Embodiments 2 to 6] FIGS. 10 to 14 respectively show active capacitors of Embodiments 2 to 6 to which the present invention is applied, each having a storage capacitor element pattern different from that of Embodiment 1 of FIG.
FIG. 3 is a plan view showing one pixel and its periphery of a liquid crystal display panel of a matrix type color liquid crystal display device.

Also in these Examples 2 to 6, FIG.
As shown in FIG. 14, a part of the pixel electrode ITO1 is superposed on a convex part provided on a part of the scanning signal line GL via the dielectric film AOF, and the convex part is provided on one side of the storage capacitor element Cadd. Electrode PL1 and a part of the pixel electrode ITO1 are used as the other electrode PL2. Therefore, as described with reference to FIGS.
It is possible to reduce the area where the two electrodes overlap, that is, the area of the storage capacitor element Cadd, without reducing the riding width of the. Therefore, it is possible to prevent disconnection of the other electrode PL2 and to realize the storage capacitor element Cadd having a small capacity.

Incidentally, the second embodiment shown in FIGS.
4 and the sixth embodiment shown in FIG. 14, the scanning signal line GL is used.
Although the pixel electrode ITO1 has a convex shape and the pixel electrode ITO1 also has a convex shape, in the fifth embodiment shown in FIG.
Only L was convex. In order to increase the aperture ratio of the pixel, the examples 2 to 4 and the example 6 are preferable.

Although the present invention has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention. . For example, the storage capacitor element Cadd
10, the pattern of the scanning signal line GL, the pixel electrode ITO1, the auxiliary electrode SE, and the intervening film (GI, AS) between the auxiliary electrode SE and the pixel electrode ITO1 is shown in FIGS.
Needless to say, the present invention is not limited to those shown in FIGS.

[0090]

As described above, according to the present invention,
It is possible to prevent the disconnection that occurs when the other electrode crosses over one electrode of the storage capacitor element, and to solve the two problems of realizing a storage capacitor element with a small capacity necessary for high definition, and improve the manufacturing yield. it can.

[Brief description of the drawings]

FIG. 1 is a main part plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device of a first embodiment to which the present invention is applied.

2 is a cross-sectional view showing a video signal line (data line) DL and a transparent pixel electrode ITO1 which are adjacent to each other taken along the line 2-2 in FIG.

FIG. 3 is a cross-sectional view showing a thin film transistor TFT of one pixel and its periphery taken along the line 3-3 in FIG.

FIG. 4 is a retention capacitance element Ca taken along section line 4-4 of FIG.
It is sectional drawing of a dd section.

5A to 5C are views for explaining the superiority of the present invention in comparison with the conventional one.

FIG. 6 is a transparent glass substrate S of Example 1 to which the present invention is applied.
It is a flow chart of a sectional view of a pixel part and a storage capacity element part showing a manufacturing process of processes A to C on the UB1 side.

FIG. 7 is a transparent glass substrate S of Example 1 to which the present invention is applied.
It is a flow chart of a sectional view of a pixel portion and a storage capacity element portion showing a manufacturing process of steps D to E on the UB1 side.

FIG. 8 is a transparent glass substrate S of Example 1 to which the present invention is applied.
7 is a flowchart of a cross-sectional view of a pixel portion and a storage capacitor element portion, showing manufacturing steps of steps FG on the UB1 side.

FIG. 9 is an exploded perspective view of a liquid crystal display module MDL.

FIG. 10 is a main-portion plan view showing one pixel and its periphery of a liquid crystal display panel of a color liquid crystal display device of an active matrix system according to a second embodiment of the present invention.

FIG. 11 is a main-portion plan view showing one pixel and its periphery of a liquid crystal display panel of a color liquid crystal display device of an active matrix system of Example 3 to which the present invention is applied.

FIG. 12 is a main part plan view showing one pixel and its periphery of a liquid crystal display panel of a color liquid crystal display device of an active matrix type according to a fourth embodiment of the present invention.

FIG. 13 is a main part plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device of Example 5 to which the present invention is applied.

FIG. 14 is a main-portion plan view showing one pixel and its periphery of a liquid crystal display panel of a color liquid crystal display device of an active matrix system of Example 6 to which the present invention is applied.

[Explanation of symbols]

SUB1, SUB2 ... Transparent glass substrate, GL ... Scan signal line (gate line), DL ... Video signal line (data line), ITO1 ... Transparent pixel electrode, Cadd ... Retention capacitor element, PL1 ... One electrode of retention capacitor element, PL2 ... the other electrode of the storage capacitor, AOF ... the dielectric film of the storage capacitor (anodized film of the scanning signal line), SE ... auxiliary electrode, GI
... Insulating film, AS ... i-type semiconductor layer, d0 ... N ⁺ type semiconductor layer, SD1, SD2 ... Source electrode or drain electrode,
TFT ... Thin film transistor, g1, d1, d2, d3 ...
Conductive film, PNL ... Liquid crystal display panel.

Front page continuation (72) Inventor Kimitsutoshi Ogi 3300 Hayano, Mobara-shi, Chiba Hitachi, Ltd. Electronic Devices Division (72) Inventor Junichi Owada 3300 Hayano, Mobara-shi, Chiba Hitachi Ltd. Electronic Devices Division ( 72) Inventor Kazuhiro Ogawa 3300, Hayano, Mobara-shi, Chiba Electronic device division, Hitachi, Ltd. (72) Inventor Tsutomu Sato 3300, Hayano, Mobara-shi, Chiba Electronic device division, Hitachi, Ltd.

Claims (8)

[Claims] 1. A scanning signal line extending in the horizontal direction and arranged in parallel in the vertical direction, and a video signal extending in the vertical direction and arranged in parallel in the horizontal direction. A line, and a first insulating substrate provided with a first pixel electrode and a thin film transistor, which are respectively arranged in intersecting regions of the two adjacent scanning signal lines and the two adjacent video signal lines, A liquid crystal display panel is formed by stacking a second insulating substrate provided with a second pixel electrode facing the first pixel electrode with a predetermined gap therebetween, and sealing a liquid crystal between the two substrates. In the liquid crystal display device having the above, a convex portion is provided on a part of the scanning signal line, a part of the first pixel electrode is overlapped on the convex portion via a dielectric film, and the convex portion is formed on one electrode. , A storage capacitor having a part of the first pixel electrode as the other electrode The liquid crystal display device, characterized in that form have. 2. The liquid crystal display device according to claim 1, wherein an auxiliary electrode is provided in a portion where the other electrode gets over the one electrode. 3. An auxiliary electrode is provided at a portion where the other electrode rides over the one electrode, and both ends of the auxiliary electrode are
It is characterized in that an intervening film is provided between the other electrode and the first pixel electrode, and between the intermediate portion of the auxiliary electrode and the other electrode and the first pixel electrode. The liquid crystal display device according to claim 1. 4. The liquid crystal display device according to claim 2, wherein the auxiliary electrode is formed simultaneously with the source and drain electrodes of the thin film transistor. 5. The liquid crystal display device according to claim 3, wherein the intervening film is formed simultaneously with at least one of a gate insulating film and a channel forming semiconductor film of the thin film transistor. 6. The liquid crystal display device according to claim 1, wherein the other electrode is composed of a convex portion provided on a part of the first pixel electrode. 7. The liquid crystal display device according to claim 1, wherein the dielectric film is an oxide film of the scanning signal line. 8. The liquid crystal display device according to claim 1, wherein the dielectric film is a single layer of an anodic oxide film for the scanning signal lines.