JPH08234231A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: To increase the pixel opening rate and to improve the display quality by interposing a semiconductor film and an insulating film formed by the same stage as the stage for forming semiconductor film and gate insulating film for forming channels of TFTs between video signal line and insulated substrate. CONSTITUTION: On the transparent glass substrate, a thin-film transistor(TFT) having an inverted stagger structure in which gate electrode GL, the gate insulating film GI, the (i) type semiconductor layer AS for forming channel and source and drain electrodes SD1, SD2 are successively formed, is provided. The semiconductor layer which is formed out of the same material simultaneously with the (i) type semiconductor layer AS for forming channel broader than the video signal line DL and the insulating film formed out of the same material simultaneously with the gate insulating film GI of the TFT does not exists along the video signal line DL between the video signal line DL and the transparent glass substrate. Then, the spacing between the video signal line DL and the transparent pixel electrode ITO 1 is made narrow and, therefore, the width of the transparent pixel electrode ITO 1 is widened.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a thin film transistor (T
Active using FT) as a switching element
The present invention relates to a matrix type liquid crystal display device.

[0002]

2. Description of the Related Art For example, an active matrix type liquid crystal display device is provided with a non-linear element (switching element) corresponding to each of a plurality of pixel electrodes arranged in a matrix. Since the liquid crystal in each pixel is theoretically always driven (duty ratio 1.0), the active system has better contrast than the so-called simple matrix system, which employs the time-division driving system, and especially the color liquid crystal display device. Then it is becoming an indispensable technology. A typical example of the switching element is a thin film transistor (TFT).

In a liquid crystal display device, for example, two transparent glass substrates are overlapped with a predetermined gap so that the surfaces on which the display pixel electrodes made of a transparent conductive film and the alignment film are laminated face each other. A frame-shaped sealing material near the peripheral edge between both substrates is used to attach both substrates, and liquid crystal is sealed and sealed inside the sealing material between both substrates from the liquid crystal sealing port provided in part of the sealing material. And a liquid crystal display panel (liquid crystal display element) provided with polarizing plates on the outside of both substrates,
A backlight arranged below the liquid crystal display panel to supply light to the liquid crystal display panel, a liquid crystal drive circuit board arranged outside the outer periphery of the liquid crystal display panel, and a molded product holding each of these members. And a metal frame in which each of these members is housed and a liquid crystal display window is opened, and the like.

Of the two transparent glass substrates constituting the liquid crystal display panel, the transparent pixel electrode formed on the surface of the first transparent glass substrate has two adjacent scanning signal lines (extending in the horizontal direction). A plurality of them are arranged in parallel in the vertical direction. Also referred to as gate signal lines or horizontal signal lines. They also serve as gate electrodes of thin film transistors as switching elements) and two adjacent video signal lines (in the vertical direction). A plurality of thin film transistors that extend and are arranged in parallel to each other in the left-right direction. Also called drain signal lines, data signal lines, or vertical signal lines. It is formed for each pixel corresponding to each pixel. It should be noted that the term “crossing” does not mean that it actually touches and intersects, but that it intersects when viewed from the direction perpendicular to the substrate, and an insulating film is interposed between the two.

[0005]

FIG. 9 (a) is a diagram of Japanese Patent Laid-Open No.
FIG. 9B is a plan view of a main part showing one pixel and its periphery of a conventional active matrix type liquid crystal display panel disclosed in JP-A-2-285464, and FIG. Are aa 'and bb' in FIG. 9 (a).
It is sectional drawing in a cutting line. The reference numerals in FIGS. 9 and 10 correspond to the embodiments of the present invention described later for comparison with the present invention.

In the conventional liquid crystal display panel, in order to simplify the manufacturing process, as shown in FIG. 10, a thin film transistor TFT is provided between the video signal line DL and the lower transparent glass substrate SUB1 along the video signal line DL. A semiconductor film A formed of the same material at the same time as the channel forming amorphous semiconductor film AS
S and an insulating film GI formed of the same material at the same time as the gate insulating film GI of the thin film transistor TFT are connected to the video signal line D.
The width was wider than the width L.

In the conventional liquid crystal display panel, as shown in FIG. 10, the semiconductor layer AS / insulating film GI below the video signal line DL is used.
And the adjacent transparent pixel electrode ITO1 are overlapped,
The parasitic capacitance between the video signal line DL and the transparent pixel electrode ITO1 increases, and the driving load increases. As a result,
Display characteristics deteriorate. Further, the amorphous semiconductor film AS functions as a conductive film, the parasitic capacitance increases, and the same problem occurs. Therefore, in order to prevent this, the semiconductor layer AS /
Since the insulating film GI and the transparent pixel electrode ITO1 are not overlapped with each other, it is necessary to take a mask alignment margin and take a large gap between them, so that the aperture ratio of the pixel (that is, the area of the opening portion / one pixel). The total area) decreases, and as a result, the light transmittance decreases and the display becomes dark.

An object of the present invention is to provide a liquid crystal display device capable of increasing the aperture ratio of pixels and improving display quality without increasing the parasitic capacitance between the video signal line and the transparent pixel electrode. To provide.

[0009]

In order to achieve the above object, the present invention provides a scanning signal line extending in the horizontal direction and a plurality of scanning signal lines arranged in parallel in the vertical direction and extending in the vertical direction. A plurality of video signal lines that are present and are arranged in parallel in the horizontal direction, and two video signal lines that are adjacent to each other and that are adjacent to each other. A first insulating substrate provided with a first pixel electrode and a thin film transistor and a second insulating substrate provided with a second pixel electrode facing the first pixel electrode are overlapped with a predetermined gap. A liquid crystal display device having a liquid crystal display panel formed by sealing a liquid crystal between the two substrates, the same film as the channel forming semiconductor film of the thin film transistor being formed between the video signal line and the first insulating substrate. Depending on the process (ie A semiconductor film) is formed of the same material, and wherein the absence of an insulating film formed of the same material by the same forming step and the gate insulating film of the thin film transistor. It should be noted that the intersection of the scanning signal line and the video signal line does not mean that the scanning signal line and the video signal line intersect with each other, but that the scanning signal line and the video signal line intersect when viewed in the direction perpendicular to the substrate surface. .

Further, the semiconductor film is an amorphous silicon film.

Further, at the intersection of the scanning signal line and the video signal line, both the semiconductor film and the insulating film,
Alternatively, one of them is formed between the scanning signal line and the video signal line.

Further, the insulating film, or the semiconductor film and the insulating film are formed in the storage capacitor element portion.

Further, an oxide film of one electrode of the storage capacitor is used as a dielectric film of the storage capacitor.

Further, in the liquid crystal display device using the oxide film of the one electrode as a dielectric film of the storage capacitor, the portion where the other electrode crosses the one electrode on the other electrode of the storage capacitor. It is characterized in that an auxiliary electrode is provided on the.

Further, the thin film transistor has an inverted staggered structure in which a gate electrode, the gate insulating film, the channel forming semiconductor film, and source / drain electrodes are sequentially formed on the first insulating substrate. Is characterized by.

[0016]

In the liquid crystal display device of the present invention, under the video signal line,
That is, between the video signal line and the first insulating substrate,
There is no semiconductor film or insulating film wider than the conventional video signal line. Therefore, the distance between the video signal line and the first pixel electrode can be narrowed, and the width of the first pixel electrode can be widened. That is, the width of the opening of the light shielding film (black matrix) provided on the side of the second insulating substrate can be increased. Therefore, the aperture ratio of the pixel can be increased without increasing the parasitic capacitance. As a result, a bright display can be obtained and the power consumption of the backlight can be reduced.

[0017]

The objects and features of the present invention will become apparent from the following description with reference to the drawings.

<< Active Matrix Liquid Crystal Display Device >> An embodiment in which the present invention is applied to an active matrix color liquid crystal display device will be described below. In the drawings described below, components having the same function are designated by the same reference numeral, and repeated description thereof will be omitted.

<< Overall Structure of Liquid Crystal Display Module >> FIG.
[Fig. 3] is an exploded perspective view showing each component of the liquid crystal display module MDL.

SHD is a shield case (also called a metal frame) made of a metal plate, WD is a display window, and INS1.
3 to 3 are insulating sheets, PCBs 1 to 3 are circuit boards (PCB1
Is the drain side circuit board, PCB2 is the gate side circuit board,
PCB3 is an interface circuit board), JN is a joiner that electrically connects the circuit boards PCB1 to PCB3, T
CP1, TCP2 are tape carrier packages, PNL
Is a liquid crystal display panel, GC is a rubber cushion, ILS is a light-shielding spacer, PRS is a prism sheet, SPS is a diffusion sheet, GLB is a light guide plate, RFS is a reflection sheet, and MCA is a lower case (molded case) formed by integral molding. , LP is a fluorescent tube, LPC is a lamp cable, and GB is a rubber bush that supports the fluorescent tube LP, and the liquid crystal display module MDL is assembled by stacking the members in a vertical arrangement relationship as shown in the figure.

The module MDL includes a lower case MCA,
The shield case SHD has two types of storage / holding members. Insulation sheets INS1-3, circuit boards PCB1-3,
By combining the metal shield case SHD, which houses and fixes the liquid crystal display panel PNL, and the lower case MCA, which houses the backlight BL composed of the fluorescent tube LP, the light guide plate GLB, the prism sheet PRS, etc., the module MDL is assembled. Can be assembled.

[Embodiment 1] << Outline of Matrix Section >> FIG. 1 is a plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device to which the present invention is applied, and FIG. 1 is a view showing a cross section taken along the line 2-2 in FIG. 1 (a cross sectional view showing adjacent video signal lines and transparent pixel electrodes), and FIG.
3 is a view showing a cross section taken along a cutting line 3 (a cross-sectional view showing a thin film transistor of one pixel and its periphery), and FIG. 4 is a view showing a cross section taken along the cutting line 4-4 of FIG.
Is.

As shown in FIG. 1, each pixel has two adjacent scanning signal lines (gate lines or horizontal signal lines) GL.
And an adjacent two video signal lines (data line, drain line or vertical signal line) DL in an intersecting region (region surrounded by four signal lines). Each pixel includes a thin film transistor TFT, a transparent pixel electrode ITO1 and a storage capacitor element (additional capacitor element) Cadd. The scanning signal line GL is bifurcated near the intersection with the video signal line DL. This is because when one of the two lines of this part is short-circuited with the video signal line DL, this is cut with a laser, and the other one (not cut) line does not become a line defect and is normal. This is to make it work.

As shown in FIG. 3, a thin film transistor TFT and a transparent pixel electrode ITO1 are formed on the side of the first transparent glass substrate SUB1 based on the liquid crystal layer LC, and the second
On the transparent glass substrate SUB2 side of the color filter FI
L, a black matrix pattern BM for shading is formed. Silicon oxide films SIO formed by dipping or the like on both surfaces of the transparent glass substrates SUB1 and SUB2
Is provided.

On the inner (liquid crystal LC side) surface of the second transparent glass substrate SUB2, a light shielding film BM and a color filter F are provided.
IL, protective film PSV2, common transparent pixel electrode ITO2 (C
OM) and the upper alignment film ORI2 are sequentially stacked. POL1 and POL2 are polarizing plates formed on the outer surfaces of the transparent glass substrates SUB1 and SUB2, respectively.

<< Thin Film Transistor TFT >> Next, referring to FIG.
3, the configuration on the first transparent glass substrate SUB1 side will be described in detail. When a positive bias is applied to the scanning signal line GL, the channel resistance between the source and the drain decreases, and when the bias is zero, the channel resistance increases.

One thin film transistor TFT for each pixel
Is provided. The thin film transistor TFT is formed on the scanning signal line GL, as shown in FIG. The thin film transistor TFT has a gate electrode (scanning signal line GL),
The anodic oxide film AOF of the scanning signal line GL and the insulating film GI of silicon nitride are coated, and the AOF and GI form a gate insulating film. I-type (intrinsic, intrin
sic, i-type semiconductor layer AS made of amorphous silicon (Si which is not doped with conductivity determining impurities) (Si), a pair of source electrode SD1 and drain electrode SD2. It should be understood that the source and drain are originally determined by the bias polarity between them, and the polarity is inverted during operation in the circuit of this liquid crystal display device, so it should be understood that the source and drain are switched during operation. However, in the following description, for convenience, one is fixed as the source and the other is fixed as the drain.

<< Gate Electrode (Scanning Signal Line GL) >> In this example, the scanning signal line GL is formed of the single-layer first conductive film g1. An aluminum (Al) film formed by sputtering, for example, is used as the first conductive film g1, and an anodic oxide film AOF of Al is provided thereon in a self-aligned manner.

<< Insulating Film GI >> The insulating film GI is used as a gate insulating film for applying an electric field from the scanning signal line GL to the semiconductor layer AS in the thin film transistor TFT together with the anodized film AOF. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected,
With a thickness of 1200 to 2700Å (200 in this embodiment)
0 Å) formed. In this example, the insulating film GI is formed on the thin film transistor TFT portion, the storage capacitor Cadd, the source electrode SD1, the drain electrode SD2 portion, and the video signal line DL portion, and only the storage capacitor Cadd portion has an independent island shape. , The drain electrode SD2 and a part of the video signal line DL are patterned. This is one of the features of the present invention. On the other hand, the scanning signal line GL is not entirely covered with the insulating film GI, and the video signal line DL and the source electrode SD1 adjacent to the storage capacitor Cadd are patterned and removed similarly to the semiconductor layer AS shown below. . The scanning signal line GL not covered with the insulating film GI is covered with the anodized film AOF.

<< i-type semiconductor layer AS >> i-type semiconductor layer AS
Is a thin film transistor TFT portion and a storage capacitor C in this example.
add, and source electrode SD1 and drain electrode SD2
The storage capacitor Cadd portion is formed in a portion, and has an independent island shape, and is patterned in a shape along a part of the drain electrode SD2 and the video signal line DL.
On the other hand, the scanning signal line GL is not entirely covered with the semiconductor layer AS, and the video signal line DL is adjacent to the storage capacitor Cadd.
The source electrode SD1 is patterned and removed similarly to the insulating film GI described above. The semiconductor layer AS is made of amorphous silicon and has a thickness of 200 to 2200Å (about 2000Å in this embodiment). The layer d0 is a phosphorus (P) -doped N ⁺ -type amorphous silicon semiconductor layer for ohmic contact, where the i-type semiconductor layer AS is present on the lower side and the conductive layer d2 (d3) is present on the upper side. Only left.

The i-type semiconductor layer AS is an anodic oxide film AOF for insulation separation at the intersection of the scanning signal line GL and the video signal line DL, and the intersection of GL and the source electrode SD1, the drain electrode SD2 and the storage capacitor Cadd. , Insulating film GI
At the same time, line defects due to short circuits are reduced. Further, the N ⁺ type amorphous silicon d0 and the i type semiconductor layer A are extended from below the source electrode SD1 onto the transparent conductive film ITO1 (d1).
S and the insulating film GI are formed, which is one of the features of the present invention. As a result, the transparent conductive film ITO1 (d) can be formed without disconnection of the source electrode SD1 as described later.
1) is connected. Further, even if the source electrode SD1 and the drain electrode SD2 are not properly patterned and these electrodes remain on the scanning signal line GL only in the portion of the anodic oxide film AOF, even if the anodic oxide film AOF single film has a predetermined withstand voltage. There is a short circuit can be prevented. This is also one of the features of the present invention.

On the other hand, in this embodiment, the intersection of the scanning signal line GL and the video signal line DL and the thin film transistor TF.
The semiconductor layer AS and the insulating film GI below the video signal line DL in the T portion extend on the transparent pixel electrode ITO1, and the video signal line D
It serves to insulate and separate L from the transparent pixel electrode ITO1. This is also one of the features of the present invention. Therefore, even if the distance between the video signal line DL and the transparent pixel electrode ITO1 is narrowed to form a bright liquid crystal display device with a high aperture ratio, a point defect due to a short circuit between the video signal line DL and the transparent pixel electrode ITO1 (d1). Can be prevented.

Since the semiconductor layer AS and the insulating film GI are processed by using the same photoresist pattern, the number of photo processes can be reduced as compared with the method of processing the semiconductor layer AS and the insulating film GI by different photoresist patterns. Further, the short circuit is less likely to be established than when the video signal line DL and the transparent pixel electrode ITO1 (d1) are prevented from being short circuited only by the insulating film GI. This is because the transparent conductive film ITO1 (d) is separated by dividing the photo-etching process of the semiconductor layer AS and the insulating film GI.
1) When the i-type semiconductor layer AS extending from the lower part of the video signal line DL is not provided above, the withstand voltage of the insulating film GI is lowered because the selection ratio of the insulating film GI in the semiconductor layer AS etching is not sufficient. .

<< Transparent Pixel Electrode ITO1 >> Transparent Pixel Electrode I
TO1 constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITO1 is connected to the source electrode SD1 of the thin film transistor TFT. This transparent pixel electrode ITO1
Is composed of a first conductive film d1, and the first conductive film d1 is a transparent conductive film (In
dium-Tin-Oxide ITO: Nesa film), 1000
The thickness is about 2000 Å (in this embodiment, about 1400 Å).

<< Source Electrode SD1, Drain Electrode SD
2 >> Each of the source electrode SD1 and the drain electrode SD2 is composed of a second conductive film d2 in contact with the N ⁺ type semiconductor layer d0 and a third conductive film d3 formed thereon.

The second conductive film d2 is a chromium (Cr) film formed by sputtering and is formed to a thickness of 500 to 1000 Å (in this embodiment, about 600 Å). Cr film is N
Adhesion to the ⁺ type semiconductor layer d0 is improved, and the third conductive film d
3 Al is used for the purpose of preventing diffusion of Al into the N ⁺ type semiconductor layer d0 (so-called barrier layer). As the second conductive film d2, in addition to the Cr film, refractory metals (Mo, Ti,
Ta, W) film, refractory metal silicide (MoSi ₂ , T)
_{iSi 2, TaSi 2, WSi 2} ) film may be used.

The third conductive film d3 is formed by sputtering Al to a thickness of 3000 to 5000Å (400 in this embodiment).
0 Å) formed. The Al film has less stress than the Cr film and can be formed to have a large film thickness, and the source electrode SD1, the drain electrode SD2 and the video signal line DL can be formed.
To reduce the resistance value of (1) and ensure that the step difference caused by the scanning signal line GL is overcome (improve the step coverage).
It has a function.

The source electrode SD1 and the drain electrode SD2 are laminated films of the second conductive film d2 and the third conductive film d3. In the case of a relatively small liquid crystal display device, they are refractory metals such as Cr film. Only the second conductive film may be used.
In that case, it is necessary to increase the film thickness to about 1800Å.

After patterning the second conductive film d2 and the third conductive film d3 with the same mask pattern, the N ⁺ type semiconductor layer is formed by using the same mask or by using the second conductive film d2 and the third conductive film d3 as a mask. d0 is removed. That is, i
The N ⁺ semiconductor layer d0 remaining on the type semiconductor layer AS is the second
The portions other than the conductive film d2 and the third conductive film d3 are removed by self-alignment. At this time, since the N ⁺ type semiconductor layer d0 is etched so that the entire thickness thereof is removed, the i-type semiconductor layer AS is also slightly etched on its surface portion, but the extent thereof is controlled by the etching time. Good.

<Video signal line (data line) DL> The video signal line DL is composed of a second conductive film d2 and a third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2, or the second conductive film d2. It is composed of only the conductive film d2.

<< Protective Film PSV1 >> Thin Film Transistor TF
A protective film PSV1 is provided on the T and the transparent pixel electrode ITO1. The protective film PSV1 is formed mainly for protecting the thin film transistor TFT from moisture and the like,
Use one with high transparency and good moisture resistance. The protective film PSV1 is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and has a thickness of 1 μm.
It is formed with a film thickness of about. The protective film is generally plasma C
It is formed by a vacuum device such as VD, which improves the throughput when formed by coating an organic material such as an epoxy resin.

<< Light-shielding film BM >> Second transparent glass substrate SU
A light shielding film BM is provided on the B2 side so that external light or backlight light does not enter the i-type semiconductor layer AS. The closed polygonal outline of the light-shielding film BM shown in FIG.
The inside thereof shows an opening in which the light shielding film BM is not formed. The light-shielding film BM is formed of, for example, an aluminum film or a chromium film having a high light-shielding property against light, and in this embodiment, the chromium film is formed by sputtering to a thickness of about 1300 Å.

Therefore, i of the thin film transistor TFT
At least the so-called channel region between the source electrode SD1 and the drain electrode SD2 in the type semiconductor layer AS is sandwiched by the upper and lower light-shielding films BM and the large scanning signal lines GL so that external natural light or backlight light does not hit. The light-shielding film BM is formed in a lattice shape around each pixel (so-called black matrix), and the effective display area of one pixel is partitioned by this lattice. Therefore, the contour of each pixel is made clear by the light shielding film BM, and the contrast is improved. That is, the light blocking film BM has two functions of blocking the i-type semiconductor layer AS and serving as a black matrix.

Since the edge portion of the transparent pixel electrode ITO1 on the base side in the rubbing direction (the lower right portion in FIG. 1) is also shielded by the light shielding film BM, even if a domain occurs in the above portion, the domain cannot be seen. The characteristics do not deteriorate.

The light-shielding film BM is also formed in a frame shape in the peripheral portion of the liquid crystal display panel, and its pattern is formed continuously with the pattern of the matrix portion shown in FIG. The light-shielding film BM in the peripheral portion has a seal portion S
It is extended to the outside of L to prevent leaked light such as reflected light due to a mounting machine such as a personal computer from entering the matrix portion. On the other hand, the light-shielding film BM is held inside about 0.3 to 1 mm from the edge of the substrate SUB2, and is formed so as to avoid the cut region of the substrate SUB2.

<< Color Filter FIL >> The color filter FIL (see FIGS. 2 and 3) has red, green, and
The stripes are formed by repeating blue. The color filter FIL is formed to be large so as to cover all of the transparent pixel electrode ITO1, and the light shielding film BM is formed inside the peripheral portion of the transparent pixel electrode ITO1 so as to overlap with the edge portions of the color filter FIL and the transparent pixel electrode ITO1. There is.

The color filter FIL can be formed as follows. First, the dyeing base material such as acrylic resin is removed from the surface of the second transparent glass substrate SUB2. After this,
The dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, the green filter G and the blue filter B are sequentially formed by performing the same process.

<< Protective Film PSV2 >> The protective film PSV2 is provided to prevent the dye of the color filter FIL from leaking to the liquid crystal LC. The protective film PSV2 is formed of a transparent resin material such as acrylic resin or epoxy resin.

<< Common Transparent Pixel Electrode ITO2 >> The common transparent electrode ITO2 (see FIGS. 2 and 3) is a transparent pixel electrode ITO provided for each pixel on the first transparent glass substrate SUB1 side.
1. The optical state of the liquid crystal LC faces each pixel electrode IT.
It changes in response to a potential difference (electric field) between O1 and the common transparent pixel electrode ITO2. A common voltage Vcom is applied to the common transparent pixel electrode ITO2.
In this embodiment, the common voltage Vcom is set to an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the video signal line DL, but the integrated circuit used in the video signal drive circuit is set. When it is desired to reduce the power supply voltage of the circuit to about half, an AC voltage may be applied.

<< Structure of Storage Capacitance Element Cadd >> The transparent pixel electrode ITO1 is formed so as to overlap the adjacent scanning signal line GL in the short portion on the side opposite to the short portion connected to the thin film transistor TFT. As is clear from FIG. 4, this superposition is performed by using one of the laminated electrodes of the second conductive film d2 and the third conductive film d3 which are the materials of the source electrode SD1 and the drain electrode SD2 connected to the transparent pixel electrode ITO1. The electrode PL2 is used, and the adjacent scanning signal line GL is connected to the other electrode P.
A storage capacitor element Cadd to be L1 is formed. The dielectric film of the storage capacitor Cadd is a thin film transistor TF.
An anodized film AOF used as a gate insulating film of T,
Insulating film GI, i type semiconductor layer AS and N ⁺ type semiconductor layer d
It consists of zero. This is one of the major characteristics of this embodiment. That is, the intersection of the gate electrode (scanning signal line GL) and the drain electrode SD2, the scanning signal line G
The anodic oxide film AOF, the insulating film GI, and the i-type semiconductor layers AS and N are provided between the electrodes in the vertical direction at the intersection of L and the video signal line DL, the intersection of the scanning signal line GL and the source electrode, and the intersection of the Cadd. ^{The +} type semiconductor layer d0 is stacked. As a result, the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type semiconductor layer d0, which are continuously formed by the plasma CVD method, are formed between the electrodes of the storage capacitor without being removed by etching. Short circuit defects (point defect mode) are reduced.

<< Increase in Aperture Ratio of Pixel >> A gate electrode GL and a gate insulating film G are sequentially formed on the transparent glass substrate SUB1.
I, a channel forming i-type semiconductor layer AS, and an active matrix type liquid crystal display panel PNL having a thin film transistor TFT having an inverted stagger structure in which source / drain electrodes SD1 and SD2 are formed, as shown in FIGS. Between the video signal line DL and the transparent glass substrate SUB1 is wider than the conventional video signal line DL (see FIGS. 9 and 10) and is an i-type semiconductor for forming a channel made of amorphous silicon of the thin film transistor TFT. The semiconductor layer AS formed of the same material at the same time as the layer AS and the insulating film GI formed of the same material at the same time as the gate insulating film GI of the thin film transistor TFT do not exist along the video signal line DL. Therefore, the video signal line DL and the transparent pixel electrode ITO
Since the distance between the transparent pixel electrode ITO1 and the transparent pixel electrode ITO1 can be narrowed, the width of the transparent pixel electrode ITO1 (width in the left-right direction in the drawing) can be increased. That is, the width of the opening of the light shielding film (black matrix) BM provided on the second transparent glass substrate SUB2 side can be widened. Therefore, the aperture ratio of the pixel can be increased without increasing the parasitic capacitance. As a result, a bright display can be obtained and the power consumption of the backlight can be reduced.

<< Manufacturing Method >> Next, a manufacturing method of the above-mentioned liquid crystal display device on the first transparent glass substrate SUB1 side will be described with reference to FIGS. In the figure,
The letters in the center are abbreviations of process names. The left side shows the pixel portion shown in FIG. 3, and the right side shows the flow of processing seen in the cross-sectional shape near the gate terminal. Except for Processes B and D, Processes A to G are divided according to each photo (photo) process, and all the cross-sectional views of each process show the stage after the photo-process is finished and the photoresist is removed. There is. In the present description, the photographic (photo) processing means a series of operations from application of photoresist to selective exposure using a mask to development thereof, and repeated description will be omitted. Description will be given below according to the divided steps.

Step A, FIG. 6 After the silicon oxide films SIO are provided on both surfaces of the first transparent glass substrate SUB1 made of 7059 glass (trade name) by dip processing, baking is performed at 500 ° C. for 60 minutes. Although this SIO film is formed in order to alleviate the surface irregularities of the glass substrate SUB1, this step can be omitted if the irregularities are small. Al-Ta, A with a film thickness of 2800Å
The second conductive film g2 made of l-Ti-Ta, Al-Pd, or the like.
Are provided by sputtering. After the photo-treatment, the first conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid and glacial acetic acid.

Step B, FIG. 6 After directly drawing the resist (after forming the above-described anodic oxidation pattern AO), PH of 6.25 ± 3% tartaric acid was applied by an ammonia.
The solution adjusted to 0.05 is 1: 1 with ethylene glycol solution.
The substrate SUB1 is dipped in an anodizing solution composed of the solution diluted to 9 to adjust the formation current density to 0.5 mA / cm ² (constant current formation). Next, anodic oxidation is performed until the formation voltage 125 V required to obtain a predetermined Al ₂ O ₃ film thickness is reached. After that, it is desirable to hold this state for several tens of minutes (constant voltage formation). This is important for obtaining a uniform Al ₂ O ₃ film. Thereby, the conductive film g1
Is anodized, and an anodic oxide film AOF having a film thickness of 1800Å is formed on the scanning signal line (gate line) GL and on the side surface in a self-aligned manner and becomes a part of the gate insulating film of the thin film transistor TFT.

Step C, FIG. 6 A conductive film d1 made of an ITO film having a film thickness of 1400Å is provided by sputtering. After the photo-treatment, the conductive film d1 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etching solution to form the uppermost layers of the gate terminal GTM and the drain terminal DTM and the transparent pixel electrode ITO1.

Step D, FIG. 7 Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to provide a 2000-Å-thickness Si nitride film, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to reduce the film thickness. After the 2000 Å i-type amorphous Si film is formed, hydrogen gas and phosphine gas are introduced into the plasma CVD apparatus to form an N ⁺ -type amorphous Si film having a film thickness of 300 Å. This film formation is continuously performed by changing the reaction chamber in the same CVD apparatus.

Step E, FIG. 7 After photo processing, SF ₆ and CC are used as dry etching gas.
Using N ₄ , the N ⁺ type amorphous Si film and the i type amorphous Si film are etched. Subsequently, etching the nitride Si film using SF _6. Of course, the N ⁺ -type amorphous Si film, the i-type amorphous Si film and the Si nitride film may be continuously etched with SF ₆ gas.

In this embodiment, at this point, as shown in FIG. 1, the N ⁺ type amorphous Si film and the i type amorphous Si film in the portion adjacent to the pixel electrode in the portion where the video signal line is provided. And the Si nitride film is removed.

A feature of the manufacturing process of this embodiment is that the three-layered CVD film is thus continuously etched with a gas containing SF ₆ as a main component. That is, the etching rate for SF ₆ gas is N ⁺ type amorphous Si film, i type amorphous S film.
The i film and the Si nitride film are larger in this order. Therefore, when the N ⁺ -type amorphous Si film is completely etched and the i-type amorphous Si film starts to be etched, the upper N ⁺ -type amorphous Si film is side-etched, resulting in the i-type amorphous Si film. The film is processed into a taper of about 70 degrees. When the i-type amorphous Si film is completely etched and the Si-nitride film starts to be etched, the upper N ⁺ -type amorphous Si film and the i-type amorphous Si film are side-etched in this order. The i-type amorphous Si film is tapered by about 50 degrees and the silicon nitride film is tapered by 20 degrees. Even if the source electrode SD1 is formed on the taper shape, the probability of disconnection is significantly reduced. In addition, as shown in FIG. 1, the video signal line has an N ⁺ -type amorphous Si film (d0), i
Even in the portion which crosses over the pattern of the amorphous Si film (AS) and the Si nitride film (GI), the taper prevents the video signal line from being broken and improves the manufacturing yield. N
^{The +} -type amorphous Si film has a taper angle close to 90 degrees, but since the thickness is as thin as 300Å, the probability of disconnection at this step is very small. Therefore, strictly speaking, the plane patterns of the N ⁺ -type amorphous Si film, the i-type amorphous Si film, and the Si nitride film are not the same pattern, but the cross-section has a forward tapered shape, so that the N ⁺ -type amorphous Si film, The i-type amorphous Si film and the Si nitride film have a large pattern in this order.

Step F, FIG. 8 A second conductive film d2 made of Cr having a film thickness of 600 Å is provided by sputtering, and further Al- having a film thickness of 4000 Å is formed.
A third conductive film d3 made of Pd, Al-Si, Al-Ta, Al-Ti-Ta or the like is provided by sputtering.
After the photo-treatment, the third conductive film d3 is etched with the same liquid as the process A, and the second conductive film d2 is etched with a second cerium ammonium nitrate solution to form the video signal line DL, the source electrode SD1 and the drain electrode SD2. To do.

In this example, since the N ⁺ type amorphous Si film, the i type amorphous Si film, and the Si nitride film are forward tapered as shown in step E, the video signal line DL In a liquid crystal display device having a large tolerance of resistance, it is possible to form the second conductive film d2 only.

Next, SF ₆ and
By introducing CCl ₄ and etching the N ⁺ type amorphous Si film, the N ⁺ type semiconductor layer d between the source and the drain is formed.
0 is selectively removed.

Step G, FIG. 8 Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a Si nitride film having a thickness of 1 μm. After the photo-treatment, the protective film PSV1 is formed by etching using SF ₆ as a dry etching gas. As the protective film, not only an SiN film formed by CVD but also an organic material can be used.

[Embodiment 2] Next, as a modification of the present invention, an example in which an oxide film of one electrode of the storage capacitor is used as the dielectric film of the storage capacitor will be described below.

FIG. 11 is a main part plan view showing one pixel and its periphery of the liquid crystal display panel of the active matrix type color liquid crystal display device of the second embodiment to which the present invention is applied.

FIG. 12 is a sectional view of the storage capacitor element Cadd section taken along the line 5-5 in FIG.

The reference numerals in FIGS. 11 and 12 correspond to those in FIGS. 1 and 2 of the first embodiment.

In the description of each part, the same parts as those in the first embodiment will be omitted here to avoid duplication. Therefore, only the parts different from the first embodiment will be described below.

As shown in FIG. 4, the storage capacitor of Example 1 has a dielectric film composed of an i-type semiconductor layer AS, an N ⁺ -type amorphous silicon layer d0, an anodic oxide film AOF, and an insulating film GI. There is. Therefore, in the storage capacitor element of Example 1, since the dielectric film is formed of those multilayer films, the dielectric strength of one electrode PL1 and the other electrode PL2 is good.
Although there is an advantage that the process can be simplified because the multilayer film can be etched at one time, the dielectric film has a semiconductor layer such as the i-type semiconductor layer AS and the N ⁺ -type amorphous silicon d0, so that the holding It has been discovered that the capacitive element is a MIS (metal, insulating film, semiconductor) capacitance, and has a demerit having an asymmetrical characteristic that the capacitance value is different when a positive voltage is applied and when a negative voltage is applied.

In the active matrix type liquid crystal display device, the storage capacitor element is the corresponding transparent pixel electrode ITO1.
The display data (electric charge) written in is retained until it is written next.

Further, in the liquid crystal display device, in order to prevent the life of the liquid crystal LC from being shortened due to the direct current electric field applied to the liquid crystal LC, positive voltage and negative voltage are alternately applied to the liquid crystal display electrode, that is, the transparent pixel electrode ITO1. The liquid crystal is driven by alternating current.

Therefore, since the positive voltage and the negative voltage of the alternating voltage are applied to the storage capacitor Cadd as the liquid crystal is driven by alternating current, the display data (charges) stored in the storage capacitor Cadd is in the positive voltage application period. A different phenomenon occurs depending on the negative voltage application period. In the liquid crystal display device, the phenomenon in which the held display data differs depending on the positive and negative voltages is a phenomenon in which a direct current electric field is applied to the liquid crystal LC, and appears as a problem that the life of the liquid crystal LC cannot be improved.

However, in the technique of simultaneously processing the insulating film GI and the i-type semiconductor film AS to simplify the process, in order to use the insulating film GI for the dielectric film of the storage capacitor Cadd, the i-type film is inevitably used. The semiconductor layer AS has also been in a situation where it has to enter the dielectric film.

The second embodiment is intended to solve the above-mentioned problem of the first embodiment. The problem is that the dielectric film of the storage capacitor Cadd is provided with one electrode PL1 of the storage capacitor as shown in FIG. This is solved by using a self-oxidized film, that is, an anodized film AOF.

In the storage capacitor element shown in the figure, by forming the anodic oxide film AOF on the surface of one electrode, the transparent pixel electrode ITO1 overlaps one electrode PL1 so that the other electrode PL2 of the storage capacitor element is formed. I is formed after the transparent pixel electrode ITO1 is formed.
The type semiconductor layer AS does not serve as a dielectric film of the storage capacitor Cadd. Therefore, by using the storage capacitor element Cadd of the second embodiment shown in FIG. 12, the life of the liquid crystal display device using the simplified process can be significantly improved.

FIG. 11 shows a planar pattern of the storage capacitor element Cadd shown in FIG.

In the storage capacitor element shown in FIG. 11, the other electrode PL2 extends from the transparent pixel electrode ITO1 and the scanning signal line GL.
It is formed in the form of overlapping. By forming the storage capacitor element in the portion where the transparent pixel electrode ITO1 and the scanning signal line GL overlap with each other in this manner, a space for the storage capacitor element becomes unnecessary, and the aperture ratio of the liquid crystal pixel is improved.
The display screen can be brightened.

In the second embodiment shown in FIG. 11,
The auxiliary electrode SE (d3) is provided in a portion where the other electrode PL2 goes over the scanning signal line GL which becomes the one electrode PL1, and does not overlap with a portion (PL2) where the transparent pixel electrode ITO1 overlaps with the scanning signal line GL. Since the transparent pixel electrode ITO1 is electrically connected to the portion, even if the transparent pixel electrode ITO1 crosses over the scanning signal line GL, the other electrode (PL2) is not electrically disconnected from the liquid crystal electrode.

Therefore, in the second embodiment shown in FIG.
In a liquid crystal display device in which a transparent electrode (ITO) is used as an electrode (PL2) formed on the liquid crystal LC side of the storage capacitor element Cadd, the storage capacitor electrode ( Since the disconnection of PL2) can be reliably prevented, the point defect due to the disconnection of the storage capacitor can be prevented.

<< Manufacturing Method >> Next, a manufacturing method for the first transparent glass substrate SUB1 side of the liquid crystal display device according to the second embodiment will be described with reference to FIGS. In the figure, the central character is an abbreviation of the process name, the left side shows the pixel portion shown in FIG. 3, and the right side shows the processing flow as seen in the cross-sectional shape near the storage capacitor element Cadd. Except for Processes B and D, Processes A to G are divided according to each photo (photo) process, and all the cross-sectional views of each process show the stage after the photo-process is finished and the photoresist is removed. There is. In the present description, the photographic (photo) processing means a series of operations from application of photoresist to selective exposure using a mask to development thereof, and repeated description will be omitted. Description will be given below according to the divided steps.

Step A, FIG. 13 After the silicon oxide films SIO are provided on both surfaces of the first transparent glass substrate SUB1 made of 7059 glass (trade name) by dip processing, baking is performed at 500 ° C. for 60 minutes. Although this SIO film is formed in order to alleviate the surface irregularities of the glass substrate SUB1, this step can be omitted if the irregularities are small. Al-Ta, A with a film thickness of 2800Å
The second conductive film g2 made of l-Ti-Ta, Al-Pd, or the like.
Are provided by sputtering. After the photo-treatment, the first conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid and glacial acetic acid to form a gate electrode (GL) of the thin film transistor TFT.
And one electrode PL1 of the storage capacitor element Cadd is formed.

Step B, FIG. 13 After direct drawing of the resist (after formation of the above-described anodizing pattern AO), 3% tartaric acid was added to the pH of 6.25 ± by an ammonia.
The solution adjusted to 0.05 is 1: 1 with ethylene glycol solution.
The substrate SUB1 is dipped in an anodizing solution composed of the solution diluted to 9 to adjust the formation current density to 0.5 mA / cm ² (constant current formation). Next, anodic oxidation is performed until the formation voltage 125 V required to obtain a predetermined Al ₂ O ₃ film thickness is reached. After that, it is desirable to hold this state for several tens of minutes (constant voltage formation). This is important for obtaining a uniform Al ₂ O ₃ film. Thereby, the conductive film g1
Is anodized to have a film thickness of 18 in a self-aligned manner on the scanning signal line (gate line) GL and one electrode PL1 (g1) of the storage capacitor Cadd and on the side surface of each electrode.
The anodic oxide film AOF of 00Å is formed, and a part of the gate insulating film of the thin film transistor TFT and the storage capacitor element Ca are formed.
It becomes a dielectric film of dd.

Step C, FIG. 13 A conductive film d1 made of an ITO film having a film thickness of 1400Å is provided by sputtering. After the photo-treatment, the conductive film d1 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etching solution, whereby the uppermost layers of the gate terminal GTM and the drain terminal DTM, the transparent pixel electrode ITO1 and the other electrode of the storage capacitor element Cadd. PL2 (d1) is formed.

Step D, FIG. 14 Ammonia gas, silane gas and nitrogen gas are introduced into the plasma CVD apparatus to provide a 2000 Å-thickness Si nitride film, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to reduce the film thickness. After the 2000 Å i-type amorphous Si film is formed, hydrogen gas and phosphine gas are introduced into the plasma CVD apparatus to form an N ⁺ -type amorphous Si film having a film thickness of 300 Å. This film formation is continuously performed by changing the reaction chamber in the same CVD apparatus.

Step E, FIG. 14 After photo processing, SF ₆ and CC are used as dry etching gas.
Using N ₄ , the N ⁺ type amorphous Si film and the i type amorphous Si film are etched. Subsequently, etching the nitride Si film using SF _6. Of course, the N ⁺ -type amorphous Si film, the i-type amorphous Si film and the Si nitride film may be continuously etched with SF ₆ gas.

In this embodiment, at this point, as shown in FIG. 11, the N ⁺ type amorphous Si film and the i type amorphous Si film in the portion where the video signal line is provided and adjacent to the pixel electrode are provided. And the Si nitride film is removed.

Thus, the characteristic feature of the manufacturing process of this embodiment is that the three CVD films are continuously etched with the gas containing SF ₆ as a main component. That is, the etching rate for SF ₆ gas is N ⁺ type amorphous Si film, i type amorphous S film.
The i film and the Si nitride film are larger in this order. Therefore, when the N ⁺ -type amorphous Si film is completely etched and the i-type amorphous Si film starts to be etched, the upper N ⁺ -type amorphous Si film is side-etched, resulting in the i-type amorphous Si film. The film is processed into a taper of about 70 degrees. When the i-type amorphous Si film is completely etched and the Si-nitride film starts to be etched, the upper N ⁺ -type amorphous Si film and the i-type amorphous Si film are side-etched in this order. The i-type amorphous Si film is tapered by about 50 degrees and the silicon nitride film is tapered by 20 degrees. Even if the source electrode SD1 is formed on the taper shape, the probability of disconnection is significantly reduced. In addition, as shown in FIG. 11, the video signal line has an N ⁺ -type amorphous Si film (d0),
Even in the portion which crosses over the pattern of the i-type amorphous Si film (AS) and the Si nitride film (GI), the taper prevents the video signal line from being broken and improves the manufacturing yield.
The N ⁺ -type amorphous Si film has a taper angle close to 90 degrees, but since the thickness is as thin as 300 Å, the probability of disconnection at this step is very small. Therefore, strictly speaking, the plane patterns of the N ⁺ -type amorphous Si film, the i-type amorphous Si film, and the Si nitride film are not the same pattern, but the cross-section has a forward tapered shape, so that the N ⁺ -type amorphous Si film, The i-type amorphous Si film and the Si nitride film have a large pattern in this order. At the same time, the insulating film GI, the i-type semiconductor layer AS, and the N ⁺ -type amorphous Si layer d0 are formed on the other electrode PL2 of the storage capacitor Cadd and at the portion overcoming the one electrode PL1. An island pattern IL is provided.

Step F, FIG. 15 A second conductive film d2 made of Cr having a film thickness of 600 Å is provided by sputtering, and Al-Pd, Al-Si, Al- having a film thickness of 4000 Å.
A third conductive film d3 made of Ta, Al-Ti-Ta, or the like is provided by sputtering. After photo processing, the third conductive film d
3 is etched with the same liquid as the process A, and the second conductive film d2
Is etched with a ceric ammonium nitrate solution,
Video signal line DL, source electrode SD1, drain electrode SD
Form 2 At the same time, the storage capacitor Cad
An auxiliary electrode SE made of Al and Cr is provided on the other electrode PL2 of d and at a portion overcoming the one electrode PL1. Further, since the island-shaped pattern IL including the insulating film GI, the i-type semiconductor layer AS and the N ⁺ -type amorphous Si layer d0 is provided between the auxiliary electrode SE and the electrode PL2, the electrode P is formed.
When L2 crosses over the electrode PL1 and the electrode PL2 is broken, the probability of short-circuiting between the electrode PL1 and the auxiliary electrode SE decreases. Further, since the anodic oxide film AO is not etched by the etching solution at the portion where the electrode PL2 is broken, the withstand voltage is improved.

Here, in this embodiment, since the N ⁺ type amorphous Si film, the i type amorphous Si film, and the Si nitride film are forward tapered as shown in step E, the video signal line DL In a liquid crystal display device having a large tolerance of resistance, it is possible to form the second conductive film d2 only. In addition, the island-shaped pattern IL overriding the auxiliary electrode SE also has an N ⁺ -type amorphous Si layer d0, i.
Since the type amorphous Si layer AS and the Si nitride film GI are formed in this order by etching, the cross section becomes a taper shape, the auxiliary electrode SE does not break due to poor step coverage, and point defects can be prevented. it can.

Next, SF ₆ was added to the dry etching device.
By introducing CCl ₄ and etching the N ⁺ type amorphous Si film, the N ⁺ type semiconductor layer d between the source and the drain is formed.
0 is selectively removed.

Step G, FIG. 15 Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to form a Si nitride film having a thickness of 1 μm. After the photo-treatment, the protective film PSV1 is formed by etching using SF ₆ as a dry etching gas. As the protective film, not only an SiN film formed by CVD but also an organic material can be used.

The planar relationship between the auxiliary electrode SE and the island-shaped pattern IL described above is, as shown in FIG. 11, the portion where the transparent electrode ITO1 crosses the scanning signal line GL (PL1) and the auxiliary electrode SE. Are formed in the region of the island-shaped pattern IL, and the width of the auxiliary electrode SE is smaller than that of the island-shaped pattern IL.

This is to maintain the alignment margin of the auxiliary electrode SE and the island pattern IL.

Therefore, according to the second embodiment shown in FIG. 11, the auxiliary electrode SE and the scanning signal line GL are surely insulated from each other, so that the reduction in the yield of the liquid crystal display device due to the short circuit of the storage capacitor element Cadd is prevented. be able to.

Although the present invention has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. . For example, i made of amorphous Si
It goes without saying that the patterns of the type semiconductor layer AS and the insulating film GI thereunder are not limited to those shown in FIG.

[0096]

As described above, according to the present invention,
The aperture ratio of the pixel can be increased without increasing the parasitic capacitance, the display quality can be improved, and the power consumption of the backlight can be reduced.

[Brief description of drawings]

FIG. 1 is a main part plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device of a first embodiment to which the present invention is applied.

FIG. 2 is a cross-sectional view showing a video signal line (data line) DL and a transparent pixel electrode ITO1 which are adjacent to each other along the line 1-1 in FIG. 2 according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a thin film transistor TFT of one pixel and its periphery taken along the line 3-3 in FIG.

FIG. 4 is a retention capacitance element Ca taken along section line 4-4 of FIG.
It is sectional drawing of a dd section.

FIG. 5 is an exploded perspective view of a liquid crystal display module MDL.

FIG. 6 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of steps A to C on the transparent glass substrate SUB1 side.

FIG. 7 is a flowchart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of processes D to E on the transparent glass substrate SUB1 side.

FIG. 8 is a flow chart of a cross-sectional view of a pixel portion and a gate terminal portion showing a manufacturing process of steps F to G on the transparent glass substrate SUB1 side.

9A is a plan view of a main part showing one pixel and its periphery of a liquid crystal display panel of a conventional active matrix type color liquid crystal display device, and FIG. 9B is a plan view showing a conventional storage capacitor element. is there.

10A is a sectional view taken along the line aa 'in FIG. 9A, and FIG. 10B is a sectional view taken along the line bb' in FIG. 9A.

FIG. 11 is a main-portion plan view showing one pixel and its periphery of a liquid crystal display panel of an active matrix type color liquid crystal display device of Example 2 to which the present invention is applied.

12 is a cross-sectional view of the storage capacitor element Cadd portion taken along the line 4-4 in FIG.

FIG. 13 is a flow chart of a cross-sectional view of a pixel portion and a storage capacitor element portion, showing a manufacturing process of processes A to C on the transparent glass substrate SUB1 side of Example 2 to which the present invention is applied.

FIG. 14 is a flowchart of a cross-sectional view of a pixel section and a storage capacitor element section showing a manufacturing process of steps D to E on the transparent glass substrate SUB1 side of Example 2 to which the present invention is applied.

FIG. 15 is a flowchart of a cross-sectional view of a pixel portion and a storage capacitor element portion, showing manufacturing steps of steps F to G on the transparent glass substrate SUB1 side of Example 2 to which the present invention is applied.

[Explanation of symbols]

SUB1, SUB2 ... Transparent glass substrate, GL ... Scan signal line (gate line), DL ... Video signal line (data line), GI ... Insulating film, AS ... i-type semiconductor layer, SD1, S
D2 ... Source electrode or drain electrode, BM ... Light-shielding film (black matrix), LC ... Liquid crystal, TFT ... Thin film transistor, ITO1 ... Transparent pixel electrode, g1, d1, d
2, d3 ... Conductive film, PNL ... Liquid crystal display panel, BL ... Backlight.

Claims (7)

[Claims] 1. A scanning signal line extending in the horizontal direction and arranged in parallel in the vertical direction, and a video signal extending in the vertical direction and arranged in parallel in the horizontal direction. A line, and a first insulating substrate provided with a first pixel electrode and a thin film transistor, which are respectively arranged in intersecting regions of the two adjacent scanning signal lines and the two adjacent video signal lines, A liquid crystal display panel is formed by stacking a second insulating substrate provided with a second pixel electrode facing the first pixel electrode with a predetermined gap therebetween, and sealing a liquid crystal between the two substrates. In the liquid crystal display device having the semiconductor film formed between the video signal line and the first insulating substrate by the same forming process as that of the channel forming semiconductor film of the thin film transistor, and the gate insulating film of the thin film transistor. With a membrane The liquid crystal display device characterized by the absence of an insulating film formed of the same material according to one formation process. 2. The liquid crystal display device according to claim 1, wherein the semiconductor film is an amorphous silicon film. 3. The semiconductor film and / or the insulating film are formed between the scanning signal line and the video signal line at an intersection of the scanning signal line and the video signal line. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is provided. 4. The liquid crystal display device according to claim 1, wherein the insulating film, or the semiconductor film and the insulating film are formed in a storage capacitor element portion. 5. A holding capacitor element is formed on the first pixel electrode, and a dielectric film of the holding capacitor element is formed of an oxide film of one electrode of the holding capacitor element. The described liquid crystal display device. 6. An auxiliary electrode, which is formed at the same time as the source and drain electrodes of the thin film transistor, is provided on the other electrode of the storage capacitor element at a portion where the other electrode crosses over the one electrode. The liquid crystal display device according to claim 5, which is characterized in that: 7. The reverse stagger structure in which the thin film transistor has a gate electrode, the gate insulating film, the semiconductor film for channel formation, and source / drain electrodes formed in sequence on the first insulating substrate. The liquid crystal display device according to claim 1.