JPH09148670A - Semiconductor laser and its manufacture - Google Patents

Semiconductor laser and its manufacture

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Publication number
JPH09148670A
JPH09148670A JP30875595A JP30875595A JPH09148670A JP H09148670 A JPH09148670 A JP H09148670A JP 30875595 A JP30875595 A JP 30875595A JP 30875595 A JP30875595 A JP 30875595A JP H09148670 A JPH09148670 A JP H09148670A
Authority
JP
Japan
Prior art keywords
layer
inp
semiconductor laser
active layer
face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30875595A
Other languages
Japanese (ja)
Inventor
Satohiko Oka
聡彦 岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP30875595A priority Critical patent/JPH09148670A/en
Publication of JPH09148670A publication Critical patent/JPH09148670A/en
Withdrawn legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To make mesa etching process unnecessary, and prevent the decrease of uniformity of element characteristics, by arranging an active layer in a trench constitute by both side surfaces of a current blocking layer whose crystal face index is (111) B face and a semiconductor substrate surface. SOLUTION: On a P-InP substrate 1 of crystal face index (001), an SiO2 stripe(ST) 19 is formed parallel with the light output direction <100>. By using the ST 19 as a mask, an N-InP block layer 2 and a P-InP block layer 3 are grown. By adjusting film formation conditions, a (111) B face turns to a slant on account of the dependence of growth speed on the face orientation. After the ST 19 is eliminated and a clad layer 4, an active later 5 and a buried layer 6 are grown in order, growing is once interrupted. An active layer 6a is automatically formed in a trench surrounded by the (111) B slant face and the P-InP substrate 1. Growing is again started, and a buried layer 6b and a cap layer 7 are grown. Further an SiO2 film, an N electrode and a P electrode are formed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、低しきい値でか
つ、製造工程における工程数の短縮と良好な安定性が図
られ、その結果低コスト化が容易な半導体レーザに関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser which has a low threshold value, can reduce the number of steps in a manufacturing process, and has good stability, and as a result, can easily reduce the cost.

【0002】[0002]

【従来の技術】埋込ヘテロ(BH;Buried Heterostruc
ture)型半導体レーザは、狭い活性層(1〜2μm)と
電流ブロック層による電流狭窄により、低しきい値化に
適した構造を有している。BH型レーザの一例として、
ジャーナル オブ アプライドフィジクス 51巻 4
539頁 1980年(J.Appl.Phys.,51,4539
(1980))がある。この例では、活性層をエッチング
して得られるメサを液層エピタキシ成長(LPE;Liqu
id Phase Epitaxy)法により埋め込み、良好な電流ブロ
ック層を形成している。
2. Description of the Related Art Buried Heterostruc
(ture) type semiconductor laser has a structure suitable for lowering the threshold value due to the current confinement by the narrow active layer (1 to 2 μm) and the current blocking layer. As an example of the BH type laser,
Journal of Applied Physics Volume 51 4
P. 539 1980 (J. Appl. Phys., 51, 4539
(1980)). In this example, a mesa obtained by etching the active layer is formed by liquid layer epitaxy growth (LPE; Liqu).
It is embedded by the id phase epitaxy method to form a good current block layer.

【0003】また、近年、LPE法に比べ成長層の大面
積化や高均一化に優れた有機金属気相成長(MOCV
D;Metalorganic Chemical Vapor Deposition)技術の
進歩により、エピタキシャル成長を全てMOCVD法に
より行ったBH型レーザが開発され、アイ イー イー
イー フォトニクス テクノロジー レターズ 4巻
ナンバー9 1992年 954頁(IEEE Photonics T
echnology Letters, Vol.4,No.9 1992
p.954)に、その報告が記載されている。
In recent years, metal-organic vapor phase epitaxy (MOCV) is superior to the LPE method in that the growth layer has a large area and is highly uniform.
D; Due to the progress of Metalorganic Chemical Vapor Deposition) technology, a BH type laser in which all epitaxial growth is carried out by the MOCVD method was developed.
echnology Letters, Vol.4, No.9 1992
p. 954), the report is described.

【0004】このBH型レーザの断面構造を図4に示
す。本構造は3回のMOCVD法による成長により作製
されるが、作製方法の概略は以下のようになる。初め、
p−InP基板1上にInGaAsP活性層5及び、n
−InPクラッド層14を成長する。次に、SiO2
マスクとしてウェットエッチングを行い、メサストライ
プを形成し、活性層幅を1.5 μmに制御する。このメ
サエッチングの後、2回目の成長を行い、p−InP側
壁層20,n−InPブロック層2、及び、p−InP
ブロック層3をメサストライプの両側に選択成長する。
そして、SiO2を除去してから、3回目の成長として、
n−InP埋込層6、及び、n−InGaAsPキャッ
プ層7を成長する。その後、n電極及び、p電極が形成
される。
The cross-sectional structure of this BH type laser is shown in FIG. This structure is manufactured by growth by the MOCVD method three times, and the manufacturing method is outlined below. beginning,
On the p-InP substrate 1, an InGaAsP active layer 5 and n
-InP clad layer 14 is grown. Next, wet etching is performed using SiO 2 as a mask to form a mesa stripe, and the active layer width is controlled to 1.5 μm. After the mesa etching, the second growth is performed to form the p-InP sidewall layer 20, the n-InP block layer 2, and the p-InP.
The block layer 3 is selectively grown on both sides of the mesa stripe.
Then, after removing SiO 2 , as the third growth,
The n-InP buried layer 6 and the n-InGaAsP cap layer 7 are grown. After that, an n electrode and ap electrode are formed.

【0005】以上の手順により、良好な電流狭窄構造を
比較的広い面積に作製することができる。しかし、従来
のBH型レーザは、メサエッチング工程が必須であり、
このため、ウェハ面内における素子特性の均一性の低下
の要因となっている。なぜならば、均一な素子特性を得
るには、ウェハ全面にわたって幅や深さなどのメサ寸法
を精密に制御する必要があるが、エッチング速度の縦横
比のばらつきや面内分布が大きいことにより、埋込成長
を行った際の電流ブロック層の形状や配置が変化し、し
きい電流等の素子特性に大きな影響を与えるからであ
る。
By the above procedure, a good current confinement structure can be manufactured in a relatively large area. However, the conventional BH type laser requires a mesa etching step,
For this reason, it is a factor of lowering the uniformity of device characteristics within the wafer surface. This is because it is necessary to precisely control the mesa size such as width and depth over the entire surface of the wafer in order to obtain uniform device characteristics. This is because the shape and arrangement of the current blocking layer during the groWth growth change, and this greatly affects the device characteristics such as the threshold current.

【0006】[0006]

【発明が解決しようとする課題】本発明の目的は、従来
のBH型レーザに比べ、製造方法が簡易であり、活性層
や電流ブロック層の寸法,形状や配置の制御性を向上さ
せることにより歩留りを改善し、低価格のBH型あるい
は、これに類する半導体レーザを提供することにある。
An object of the present invention is to simplify the manufacturing method as compared with the conventional BH type laser and to improve the controllability of the size, shape and arrangement of the active layer and the current block layer. An object of the present invention is to provide a low-cost BH type semiconductor laser or the like having improved yield and low cost.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に本発明では、面指数が(001)面である半導体基板上
に、活性層及び、電流ブロック層を有する半導体レーザ
で、面指数が(111)B面である電流ブロック層の両側
面と半導体基板面で構成される溝の内部に、活性層が配
置される構造を半導体レーザのストライプ構造として用
いる。
In order to solve the above problems, according to the present invention, a semiconductor laser having an active layer and a current blocking layer on a semiconductor substrate having a (001) plane has a plane index of A structure in which an active layer is arranged inside a groove formed by both side surfaces of a current blocking layer, which is a (111) B surface, and a semiconductor substrate surface is used as a stripe structure of a semiconductor laser.

【0008】本構造の(111)B面は、(001)面
半導体基板上に<110>方向のシリコン酸化膜または
シリコン窒化膜のストライプを形成し、このストライプ
を選択成長マスクとして、10から100Torrの減圧M
OCVD法により、成長温度600から700℃で電流
ブロック層のエピタキシャル成長を行ったときにストラ
イプの両側に形成される。
In the (111) B plane of this structure, a stripe of a silicon oxide film or a silicon nitride film in the <110> direction is formed on a (001) plane semiconductor substrate, and this stripe is used as a selective growth mask to form 10 to 100 Torr. Decompression M
It is formed on both sides of the stripe when the current block layer is epitaxially grown at a growth temperature of 600 to 700 ° C. by the OCVD method.

【0009】活性層の形成は、ストライプを除去した
後、再び、上記条件で減圧MOCVD法により行う。こ
のとき、(111)B面にはエピタキシャル成長せず、
(001)面上にのみ成長する特性を利用することによ
り、溝内に活性層を形成することが可能である。以上の
エピタキシャル成長では成長速度の面方位依存性を利用
している。素子表面の平坦化は、成長速度の面方位依存
性がない常圧MOCVD法により溝部を埋め込むことに
より行う。以上の手段を用いることにより、上記構造の
半導体レーザを作製することができる。
The active layer is formed by removing the stripes and then again using the low pressure MOCVD method under the above conditions. At this time, epitaxial growth does not occur on the (111) B plane,
By utilizing the property of growing only on the (001) plane, it is possible to form an active layer in the groove. The above epitaxial growth utilizes the plane orientation dependence of the growth rate. The flattening of the device surface is performed by embedding the groove portion by the atmospheric pressure MOCVD method which does not depend on the plane orientation of the growth rate. The semiconductor laser having the above structure can be manufactured by using the above means.

【0010】本発明は、エッチング工程を含むことな
く、MOCVD法によるエピタキシャル成長のみで、半
導体レーザのストライプ構造を形成できる。これにより
製造方法が簡略化でき、かつ活性層や電流ブロック層の
寸法制御,形状や配置の最適化が容易になる。これらに
より低しきい値,高効率の半導体レーザをウェハ面内で
均一性良く作製でき、歩留りが改善される。
According to the present invention, the stripe structure of the semiconductor laser can be formed only by the epitaxial growth by the MOCVD method without including the etching step. This simplifies the manufacturing method, and facilitates the dimensional control of the active layer and the current blocking layer and the optimization of the shape and arrangement. As a result, a low-threshold, high-efficiency semiconductor laser can be manufactured with good uniformity within the wafer surface, and the yield is improved.

【0011】[0011]

【発明の実施の形態】以下、図1ないし図3を用いて、
本発明の実施例を説明する。図1は、本発明の一実施例
の半導体レーザ素子の光出射方向に垂直な断面図を示
し、図3にその作製手順を示す。
BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, referring to FIG. 1 to FIG.
An embodiment of the present invention will be described. FIG. 1 shows a cross-sectional view perpendicular to the light emitting direction of a semiconductor laser device according to one embodiment of the present invention, and FIG. 3 shows its manufacturing procedure.

【0012】まず初めに、図3(a)に示すように、面
指数(001)のp−InP基板1上に、光出射方向<
110>に平行に幅0.3 μmのSiO2 ストライプ1
9を形成する。このSiO2 のパターニングは、CVD
法により形成されたSiO2膜上に、ホトリソグラフィ
技術によりレジストマスクパターンを形成後、ドライエ
ッチング法を用いて行う。
First, as shown in FIG. 3A, on the p-InP substrate 1 having a surface index (001), the light emitting direction <
Width 0.3 in parallel to the 110> μm of SiO 2 stripe 1
9 is formed. This SiO 2 patterning is performed by CVD
A resist mask pattern is formed on the SiO 2 film formed by the photolithography method by the photolithography technique, and then the dry etching method is used.

【0013】レジストを除去後、SiO2 ストライプ1
9をマスクとし、減圧MOCVD法によりn−InPブ
ロック層2(厚さ0.6μm)及び、p−InPブロック
層3(厚さ1.5μm)を順に選択成長する。この時の
成長条件は、キャリアガスH2のチャンバ内圧力を40T
orr,基板温度を600℃としている。この場合、成長
速度の面方位依存性により、(111)B面上にはエピ
タキシャル成長せず、図3(b)に示すような(11
1)B面を斜面とする形状が得られる。
After removing the resist, the SiO 2 stripe 1
Using 9 as a mask, the n-InP block layer 2 (thickness 0.6 μm) and the p-InP block layer 3 (thickness 1.5 μm) are sequentially grown selectively by the low pressure MOCVD method. The growth condition at this time is that the carrier gas H 2 pressure in the chamber is 40 T.
The orr and substrate temperature are 600 ° C. In this case, due to the plane orientation dependence of the growth rate, epitaxial growth does not occur on the (111) B plane, and (11) as shown in FIG.
1) A shape in which the B surface is a slope is obtained.

【0014】次に、SiO2 ストライプ19をバッファ
フッ酸により除去してから、再び減圧MOCVD法によ
りp−InPクラッド層4(厚さ0.8μm),InGaA
sP活性層5及び、n−InP埋込層6a(厚さ0.2μ
m)を順次成長し、一旦、エピタキシャル成長を中断す
る。この時の成長条件も、チャンバ内圧力を40Torr,
基板温度を600℃としている。従って、(111)B
斜面上にはエピタキシャル成長しないので、この斜面及
びp−InP基板1で囲まれた溝の内部に幅1.4 μm
の活性層が自動的に形成される。
Next, the SiO 2 stripes 19 are removed by buffer hydrofluoric acid, and then the p-InP cladding layer 4 (thickness 0.8 μm) and InGaA are formed again by the low pressure MOCVD method.
The sP active layer 5 and the n-InP buried layer 6a (having a thickness of 0.2 μm)
m) is sequentially grown, and the epitaxial growth is temporarily stopped. At this time, the growth condition is that the chamber pressure is 40 Torr,
The substrate temperature is 600 ° C. Therefore, (111) B
Since epitaxial growth does not occur on the slope, a width of 1.4 μm is formed inside the slope and the groove surrounded by the p-InP substrate 1.
The active layer is automatically formed.

【0015】次に、チャンバ内にキャリアガスを導入
し、内圧を1気圧にした後、エピタキシャル成長を再開
し、n−InP埋込層6b(厚さ2.0μm)及びn−I
nGaAsPキャップ層7(厚さ0.3μm)を順次成長する。
この場合、エピタキシャル成長速度の面方位依存性はな
くなり、溝内における成長速度が増すため、溝の内部を
埋め込むことができ、表面を平坦化できる(図3
(c))。
Next, after introducing a carrier gas into the chamber and setting the internal pressure to 1 atm, the epitaxial growth is restarted and the n-InP burying layer 6b (thickness 2.0 μm) and n-I are formed.
An nGaAsP cap layer 7 (thickness: 0.3 μm) is sequentially grown.
In this case, the dependence of the epitaxial growth rate on the plane orientation disappears, and the growth rate in the groove increases, so that the inside of the groove can be embedded and the surface can be flattened (FIG. 3).
(C)).

【0016】この後、図1に示すように、CVD法によ
りSiO2 膜8を素子表面に形成し、活性層5の真上の
部分をウェットエッチングして、幅10μm程度の窓を
あける。そして、表面側に真空蒸着によりn電極9を形
成し、裏面側に、基板を厚さ100μmに研摩した後、
真空蒸着及び、400℃以上の加熱によりp電極10を
形成する。
Thereafter, as shown in FIG. 1, a SiO 2 film 8 is formed on the surface of the element by the CVD method, and the portion directly above the active layer 5 is wet-etched to open a window having a width of about 10 μm. Then, the n-electrode 9 is formed on the front surface side by vacuum vapor deposition, and the substrate is polished to a thickness of 100 μm on the back surface side.
The p-electrode 10 is formed by vacuum vapor deposition and heating at 400 ° C. or higher.

【0017】本発明の半導体レーザは、上述したとおり
エッチングより制御性が良いMOCVD法によるエピタキシ
ャル成長だけでストライプ構造を作製するため、InGaAs
P活性層5とn−InPブロック層2の間隔を0.2μm
に近接させることが容易に、再現性良くできる。また、
本製造法では、活性層に多重量子井戸構造を導入するこ
とも容易である。従って、低しきい値でかつ高効率の半
導体レーザを歩留り良く製造することが可能である。
尚、本実施例では、p型InP基板を用いているが、図
2に示すn型InP基板を用いた構造も同様の作製方法
により実現できる。また、本発明では、InGaAsP
/InP系を用いているが、GaAlAs/GaAs系な
ど他の材料系でも可能である。
In the semiconductor laser of the present invention, as described above, since the stripe structure is formed only by the epitaxial growth by the MOCVD method, which has better controllability than etching, InGaAs is used.
The spacing between the P active layer 5 and the n-InP block layer 2 is 0.2 μm.
Can be easily brought close to and can be reproduced with good reproducibility. Also,
In this manufacturing method, it is easy to introduce a multiple quantum well structure into the active layer. Therefore, it is possible to manufacture a semiconductor laser having a low threshold value and high efficiency with a high yield.
Although the p-type InP substrate is used in this embodiment, the structure using the n-type InP substrate shown in FIG. 2 can be realized by the same manufacturing method. In addition, in the present invention, InGaAsP
Although the / InP system is used, other material systems such as GaAlAs / GaAs system are also possible.

【0018】[0018]

【発明の効果】本発明は、エッチングを用いずに、エピ
タキシャル成長により活性層や電流ブロック層の寸法,
形状や配置の制御を行うので、従来の埋込ヘテロ構造半
導体レーザに比べ、これらの制御性が良く、ウェハ面内
における分布も小さい。従って、低リーク電流で、特性
の均一な素子構造を安定に作製できるので、歩留りが向
上し、低価格の半導体レーザを提供することが可能にな
る。
INDUSTRIAL APPLICABILITY According to the present invention, the dimensions of the active layer and the current blocking layer can be obtained by epitaxial growth without using etching.
Since the shape and arrangement are controlled, these controllability is better and the distribution in the wafer plane is smaller than that of the conventional buried heterostructure semiconductor laser. Therefore, it is possible to stably manufacture an element structure having a uniform characteristic with a low leak current, and thus it is possible to provide a low-cost semiconductor laser with improved yield.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の半導体レーザ素子の断面
図。
FIG. 1 is a sectional view of a semiconductor laser device according to an embodiment of the present invention.

【図2】本発明の他の実施例の半導体レーザ素子の断面
図。
FIG. 2 is a sectional view of a semiconductor laser device according to another embodiment of the present invention.

【図3】本発明の一実施例の製造工程を説明する断面
図。
FIG. 3 is a cross-sectional view illustrating the manufacturing process of the embodiment of the present invention.

【図4】従来例の半導体レーザ素子の断面図。FIG. 4 is a sectional view of a conventional semiconductor laser device.

【符号の説明】[Explanation of symbols]

1…p−InP基板、2…n−InPブロック層、3…
p−InPブロック層、4…p−InPクラッド層、5
…InGaAsP活性層、6,6a,6b…n−InP
埋込層、7…n−InGaAsPキャップ層、8…Si
2 膜、9…n電極、10…p電極。
1 ... p-InP substrate, 2 ... n-InP block layer, 3 ...
p-InP block layer, 4 ... p-InP clad layer, 5
... InGaAsP active layer, 6, 6a, 6b ... n-InP
Buried layer, 7 ... n-InGaAsP cap layer, 8 ... Si
O 2 film, 9 ... n electrode, 10 ... p electrode.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】面指数が(001)面である半導体基板上
に、活性層及び、電流ブロック層を有する半導体レーザ
において、面指数が(111)B面である前記電流ブロ
ック層の両側面と前記半導体基板面で構成される溝の内
部に、前記活性層が配置されてなることを特徴とする半
導体レーザ。
1. A semiconductor laser having an active layer and a current block layer on a semiconductor substrate having a plane index of (001) and both side surfaces of the current block layer having a plane index of (111) B. A semiconductor laser, wherein the active layer is arranged inside a groove formed on the surface of the semiconductor substrate.
【請求項2】請求項1において、前記半導体基板上に<
110>方向のストライプを形成し、前記ストライプを
選択成長マスクとしてエピタキシャル成長を行い、前記
ストライプの両側に前記電流ブロック層を形成し、次
に、前記ストライプを除去後、前記電流ブロック層を形
成した際に同時に形成される(111)B面を両側面と
する前記溝内に、前記活性層をエピタキシャル成長によ
り形成し、さらに埋込成長により素子表面を平坦化する
半導体レーザの製造方法。
2. The semiconductor substrate according to claim 1, wherein
When a stripe in the 110> direction is formed, epitaxial growth is performed using the stripe as a selective growth mask, the current block layer is formed on both sides of the stripe, and then the current block layer is formed after removing the stripe. A method of manufacturing a semiconductor laser, wherein the active layer is formed by epitaxial growth in the trench having the (111) B planes on both sides as the both sides formed at the same time, and the device surface is flattened by buried growth.
【請求項3】前記活性層及び前記電流ブロック層のエピ
タキシャル成長は、減圧MOCVD法により行い、その
後の素子平坦化埋込成長は、常圧MOCVD法によるエ
ピタキシャル成長によって行われる請求項2に記載の半
導体レーザの製造方法。
3. The semiconductor laser according to claim 2, wherein epitaxial growth of the active layer and the current block layer is performed by a low pressure MOCVD method, and subsequent element flattening buried growth is performed by epitaxial growth by a normal pressure MOCVD method. Manufacturing method.
JP30875595A 1995-11-28 1995-11-28 Semiconductor laser and its manufacture Withdrawn JPH09148670A (en)

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JP30875595A JPH09148670A (en) 1995-11-28 1995-11-28 Semiconductor laser and its manufacture

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JPH09148670A true JPH09148670A (en) 1997-06-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109326952A (en) * 2017-07-31 2019-02-12 山东华光光电子股份有限公司 A kind of semiconductor laser preparation method of high current density, high coefficient of heat transfer
CN115377794A (en) * 2022-09-02 2022-11-22 武汉敏芯半导体股份有限公司 BH laser and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109326952A (en) * 2017-07-31 2019-02-12 山东华光光电子股份有限公司 A kind of semiconductor laser preparation method of high current density, high coefficient of heat transfer
CN115377794A (en) * 2022-09-02 2022-11-22 武汉敏芯半导体股份有限公司 BH laser and manufacturing method thereof

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