JPH07176830A - Manufacture of semiconductor light-emitting element - Google Patents

Abstract

PURPOSE:To keep an active layer consisting of a mixed crystal in a high- performance quality by a method wherein second and first conductivity type semiconductor layers are grown in order on a first conductivity type semiconductor substrate and after two parallel striped dielectric films are formed on the first conductivity type semiconductor layer, a region, which is used as a current route, is etched away and a buffer layer is formed thick. CONSTITUTION:A P-type InP current blocking layer 10 and an N-type InP current blocking layer 11 are formed on an N-type InP substrate 1 and thereafter, an SiO2 selection mask is formed. Two striped SiO2 films 12 are formed using a resist film as a mask and after the peeling of the resist film, the layers 11 and 10 are etched using the films 12 as masks up to reach the substrate 1. An N-type InP buffer layer 2, an active region layer 13 and a P-type InP clad layer 4 are selectively grown so as to control a growth thickness of a region pinched by the two parallel films 12. As the layer 2 can be grown fully thick, a high-performance quality can be kept also in the layer 13 consisting of an aluminium-containing mixed crystal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser device used as a light source for an optical communication system, having high output, high efficiency, low threshold value and good mode controllability.
(Organic Metal Pyrolysis Vapor Deposition Method) The present invention relates to a method for manufacturing a selective growth embedded type light emitting device capable of growing by growth.

[0002]

2. Description of the Related Art _Two selective masks such as SiO ₂ are formed in stripes on a semiconductor substrate, and a multi-layered growth layer including an active layer for radiative recombination is grown on the semiconductor substrate sandwiched by the selective masks. The method of doing is proposed. An example thereof is shown in FIG. In this example, a mixed crystal layer containing phosphorus, for example, InGaAsP is used as the active layer.

As shown in FIG. 3, in this semiconductor laser, an active layer 3 is grown on an n-type InP substrate 1 via an n-type InP buffer layer 2, and a p-type InP layer 4 is formed on the active layer 3. Grow. However, when the SiO ₂ film is removed and the mesa stripe including the active layer is embedded and grown thereafter, the MOVPE growth grows over the entire surface, and therefore the current block layer cannot be selectively grown except the active region.

Therefore, p-type I is selectively formed only in the vicinity of the active layer.
A method of growing the nP clad layer 5 was adopted, and for this reason, it was necessary to form a mask for the second selective growth. In addition, since there is a large step in the formation of the electrode 9, there are many leak paths, and the electrolytic process is complicated because the leak paths are blocked.

Further, in the selective growth of the mixed crystal layer containing aluminum (Al) in the active layer, the quality of the active layer 3 is n-type I.
Since it depends largely on the thickness of the nP buffer layer 2, it is necessary to grow a sufficiently thick buffer layer 2. However, in that case, the step becomes larger in the electrode formation than the element of the system containing phosphorus. was there.

From the above, when the active layer of the mixed crystal layer containing aluminum is grown by the selective growth using the dielectric selective mask, and further, when the semiconductor laser having the current confining structure is manufactured, the active layer is activated. It has been expected to develop a light emitting device having an embedded structure that allows current confinement while maintaining the quality of layers, has a small step even in electrode formation, and has a small leak path.

[0007]

As described above, conventionally, two stripe-shaped dielectric films parallel to each other are formed on the n-type InP substrate 1 as a selective mask to form an n-type InP substrate.
Since the P buffer layer 2, the active layer 3, and the p-type InP layer 4 are formed in order, the p-type InP clad layer 4 covers the active layer 3. Therefore, it is necessary to perform the second photolithography and RIE in order to narrow the width of the two mutually parallel stripe-shaped dielectric films formed previously, and the p-type InP cladding layer 5 is formed due to the current constriction. It is necessary to narrow the growing region, which causes a problem that the device structure cannot be flattened.

The present invention has been made in view of the above-mentioned prior art, and even when the active layer of the mixed crystal layer containing aluminum is grown in the selective growth, the current confinement is performed while maintaining the quality of the active layer. Is possible, the step is small,
It is an object of the present invention to provide a method for manufacturing a semiconductor light emitting device having a buried structure in which electrodes with few leak paths can be easily formed.

[0009]

The structure of the present invention for attaining such an object is as follows. First, a second conductivity type semiconductor layer and a first conductivity type semiconductor layer are provided on a first conductivity type semiconductor substrate as a current confinement semiconductor layer. The semiconductor layers are grown in order, then two mutually parallel stripe-shaped dielectric films are formed on the surface of the first conductivity type semiconductor layer, and the dielectric films are used as an etching mask to remove at least the two dielectric films. The first conductivity type semiconductor layer and the second conductivity type semiconductor layer in the region sandwiched between the two dielectric films are removed, and then the two dielectric films are sandwiched between the two dielectric films using the dielectric film as a selective growth mask. In this region, a semiconductor multilayer film including an active layer for radiative recombination is grown by metalorganic pyrolysis vapor phase epitaxy, and then the two parallel dielectric films used as a mask for selective growth are removed. ,
Further, a second conductivity type semiconductor layer having a bandgap larger than that of the active layer is grown on the entire surface of the substrate to improve light confinement and planarize the device.

Further, in forming the second conductivity type electrode, in order to efficiently inject current into the active layer, and in order to further improve high frequency characteristics, except for the upper region of the active layer, S is added.
An io ₂ film can be formed and an electrode layer can be formed on the entire surface.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the embodiments shown in the drawings. In the following embodiments, instead of the bandgap energy, the bandgap wavelength proportional to the reciprocal of the bandgap energy will be described. The present invention is not limited to the following embodiments, and for example, a diffraction grating can be formed for the purpose of obtaining a DFB (distributed feedback type) laser in an optical guide layer in an active region after selective growth. is there.

[Embodiment 1] A first embodiment of the present invention is shown in FIG.
It shows in (a) (b) (c) (d). In this embodiment, InGaAs / InA using an n-type InP substrate with an emission wavelength of 1.5 μm band is used.
The present invention relates to an MQW laser using an As material. The light emitting device of this example is manufactured according to the following procedure.

First, as shown in FIG. 1A, MOVP
With the E crystal growth device, the growth temperature is set as the first growth.
At 630 ° C., a p-type InP current blocking layer (0.4 μm thick, carrier concentration: n-type InP (100) plane oriented substrate 1) was formed.
1 × 10 ¹⁸ cm ⁻³ ) 10, n-type InP current blocking layer (0.4
μm thickness, carrier concentration: 1 × 10 ¹⁸ cm ⁻³ ) 11 is grown.

Next, plasma CVD or magnetro
Using a sputtering device_xNitride film or SiO₂Membrane, etc.
Forming a selective mask of the above. After that, in Figure 1 (b)
As shown, photolithography technology and RIE (rear
Active ion etching) equipment to remove the resist film.
Use as a mask, C ₂F₆<110> reverse due to gas
Striped SiO along the mesa direction₂Two-piece membrane 12
To achieve. SiO₂The width of the membrane 12 is 8 μm, and the interval is 2 μm
Is.

Subsequently, after the resist film is peeled off, this SiO ₂ film 12 is used as a mask, and bromine-based RIE is performed.
Depending on the device, until the n-type InP substrate 1 is reached,
P current blocking layer 11, p-type InP current blocking layer 10
Was etched. This selective etching can be performed without side etching even by wet etching using a methanol / bromine solution.

Thereafter, as shown in FIG. 1C, as a second growth, an n-type InP buffer layer (0.9 μm thick, carrier concentration: 1 × 10 ¹⁸ c) was formed at a growth temperature of 680 ° C.
m ^-3 ) 2, active region layer 13, p-type InP clad layer (0.3
μm thickness, carrier concentration: 5 × 10 ¹⁷ cm ⁻³ ) 4 is selectively grown so as to control the growth thickness of the region sandwiched between the _two parallel SiO ₂ films 12.

The active region layer 13 is made of undoped InAlA.
A 6 pair MQW active layer of InGaAs / InAlAs starting with s (thickness of InGaAs well layer ~ 90Å, thickness of InAlAs barrier layer ~ 20Å) was sandwiched by InGaAsP guide layers (thickness ~ 400Å) of 1.3 µm composition. SCH structure (total thickness ~ 0.15
μm). Further, as shown in FIG. 1D, the SiO ₂ film 12 used as a mask for selective growth was removed by etching with hydrofluoric acid, and then a third MOVPE growth was performed to grow the p-type InP at a growth temperature of 630 ° C. Buried layer (0.3
μm thickness, carrier ^{concentration: 1 × 10 1 8 cm -3} ) 5, p -type In
The GaAs electrode layer 6 was grown. By this third growth, the crystal surface is flattened.

The MOVPE growth conditions are reduced pressure (72 torr).
r), Group III raw material is TMI (trimethylindium),
TEG (triethylgallium), TMA (trimethylaluminum), group V raw material is 100% fosnon, 10% arsine, dopant is n-type SiH ₄ (silane), p-type is T
EZ (triethylzinc) was used.

After that, a dielectric film such as a SiN _x nitride film or a SiO ₂ film is formed on the entire surface by using a plasma CVD or a magnetron sputtering device, and then the resist film is used as a mask by a photolithography technique and an RIE device. Then, the dielectric film 7 above the active region was etched in a stripe shape with a width of 5 μm along the <110> reverse mesa direction with C ₂ F ₆ gas. Then, C on the upper surface of the wafer
r-Au and Au-Zn were vapor-deposited to form a p-type ohmic electrode 9. On the substrate side, after polishing the entire thickness to about 80 μm, Au—Ge—Ni was vapor-deposited to form the n-type ohmic electrode 8 on the entire surface.

Subsequently, the resonator length 36 is obtained by cleaving the wafer.
It was decomposed into pellets of 0 μm and element width of 400 μm. As for the structure of each layer of the light emitting device thus obtained, as shown in FIG. 1D, each growth layer has a lattice matching with InP. The pellets were mounted on a silicon heat sink with the substrate side down by Au-Sn solder and wired by Au wires.

When the light output characteristics were measured, the oscillation threshold in continuous operation at room temperature was 15 mA, and the differential quantum efficiency was about one side.
It was possible to obtain a maximum optical output of 200 mA at 20% and a drive current of 200 mA. The oscillation wavelength was 1.55 μm.

As described above, in this embodiment, the two stripe-shaped SiO ₂ films 12 parallel to each other are used as a selective growth mask, and the active region layer 13 is selected in the elongated region sandwiched by the SiO ₂ films 12. It grows. In particular, Si
Before forming the O ₂ film 12, the p-type InP current blocking layer 10 and the n-type InP current blocking layer 11 for current confinement are formed on the n-type InP substrate 1, and the SiO ₂ film 12 is formed. Photolithography and RIE are advantageous in that they only need to be performed once.

Further, unlike the conventional structure, the SiO ₂ film 12 is used as an etching mask as shown in FIG. 1 (b) and as a selective growth mask as shown in FIG. 1 (c).
There is an advantage in having a flat structure as shown in (d).

[Embodiment 2] A second embodiment of the present invention is shown in FIG.
Shown in. In this example, wet etching was performed in the step shown in FIG. That is, by the non-stirring etching using a wet etching solution having a concentration of 2% bromine in methanol,
In the region (the region where the active region is to be grown) sandwiched by the _two SiO ₂ film masks, the n-type InP current blocking layer 11 and the p-type InP are formed until the n-type InP substrate 1 is reached.
The current blocking layer 10 was etched. In other areas,
Selective etching was performed with the p-type InP current blocking layer 10 left. The characteristics of the light emitting device thus obtained were similar to those of Example 1.

Further, in the above embodiment, the element having MQW in the active layer of InGaAs / InAlAs system in the wavelength band of 1.5 μm was described, but the present invention is not limited to this, and other wavelength regions or wavelength selections are possible. Good DFB and D
It can also be applied to a BR (distributed feedback reflection type) laser. Furthermore, the present invention provides a wavelength of 0.83 for a GaAs / GaAlAs system.
The present invention can also be applied to a light emitting device using a semiconductor material of μm band and / or other materials.

[0026]

As described above in detail with reference to the embodiments, the second-conductivity-type semiconductor layer and the first-conductivity-type semiconductor layer are sequentially grown on the first-conductivity-type semiconductor substrate, and the second-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer are grown thereon. The parallel striped dielectric film of the book is formed, and the region serving as a current path is removed by etching. Therefore, the damaged layer when the dielectric mask is formed is removed. Further, since the buffer layer can be grown sufficiently thick in this region, the semiconductor multilayer film including the stripe-shaped active layer grown by selective growth can maintain high-performance quality even in a mixed crystal active layer containing aluminum. . Further, after removing the two parallel dielectric films used as the selective growth mask, a second conductivity type semiconductor layer having a bandgap larger than that of the active layer is grown over the entire surface, so that light confinement is improved. In addition, the element is flattened.
Therefore, in addition to high-performance device characteristics, since the surface is flat and the step is small, it is easy to form electrodes, and it is possible to realize a light-emitting device having an embedded structure with few leak paths.

[Brief description of drawings]

FIG. 1 relates to a first embodiment of the present invention, and FIG.
A sectional view in the step of forming the current confinement layer after the MOVPE growth of the second time, the same figure (b) is a sectional view after the formation of the dielectric mask for selective growth and the selective etching, and the same figure (c) is the second MOVPE selection. A cross-sectional view after the growth, and FIG. 6D is a cross-sectional view of the element after the third MOVPE embedded growth and the electrode process.

FIG. 2 is a sectional view according to a second embodiment of the present invention.

FIG. 3 is a schematic view of a conventional element.

[Explanation of symbols]

1 n-type InP substrate 2 n-type InP buffer layer 3 non-doped InGaAs / InAlAsP MQW active layer 4 p-type InP clad layer 5 p-type InP buried layer 6 p-type InGaAs electrode layer 7 dielectric film (SiO ₂ film) 8 n-type ohmic Electrode 9 p-type ohmic electrode 10 p-type InP current blocking layer 11 n-type InP current blocking layer 12 SiO ₂ film 13 non-doped SCH structure active region layer

Claims (1)

[Claims] 1. A step of sequentially laminating a second conductivity type semiconductor layer and a first conductivity type semiconductor layer on a first conductivity type semiconductor substrate,
Two stripe-shaped dielectric films parallel to each other are formed on the surface of the first conductivity type semiconductor layer, and the dielectric film is used as an etching mask in at least the region sandwiched between the two dielectric films. A step of removing the one-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer; and using the dielectric film as a selective growth mask, a semiconductor film including an active layer in a region sandwiched between the two dielectric films is formed of an organic metal. A step of growing by a pyrolysis vapor deposition method and a step of removing the two parallel dielectric films and growing a second conductivity type semiconductor layer having a band gap larger than that of the active layer on the entire surface of the substrate. A method for manufacturing a semiconductor light emitting device, comprising: