JP3143105B2 - Method for manufacturing semiconductor laser device - Google Patents

Method for manufacturing semiconductor laser device

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Publication number
JP3143105B2
JP3143105B2 JP01206778A JP20677889A JP3143105B2 JP 3143105 B2 JP3143105 B2 JP 3143105B2 JP 01206778 A JP01206778 A JP 01206778A JP 20677889 A JP20677889 A JP 20677889A JP 3143105 B2 JP3143105 B2 JP 3143105B2
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JP
Japan
Prior art keywords
type
layer
based compound
material layer
semiconductor
Prior art date
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JP01206778A
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Japanese (ja)
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JPH0371685A (en
Inventor
俊明 田中
重量 皆川
俊 梶村
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Hitachi Ltd
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Hitachi Ltd
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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体レーザ素子に係り、特に光ディスクメ
モリ用の短波長レーザ光源として好適なAlGaInP半導体
レーザ素子に関する。
Description: TECHNICAL FIELD The present invention relates to a semiconductor laser device, and more particularly to an AlGaInP semiconductor laser device suitable as a short wavelength laser light source for an optical disk memory.

〔従来の技術〕[Conventional technology]

従来、横モード制御構造を有するAlGaInP半導体レー
ザについては、エレクトロニクス・レタース23(1987
年)第938頁から第939頁(Electron.Lett.23(1987)pp
938−939)において論じられている。
Conventionally, an AlGaInP semiconductor laser having a transverse mode control structure has been disclosed in Electronics Letters 23 (1987).
Years) 938 to 939 (Electron. Lett. 23 (1987) pp.
938-939).

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上記従来技術は、p型AlGaInP光導波層中のキャリア
濃度が最大でも2〜3×1017cm-3と低く、素子抵抗が約
10Ωと高いため、レーザ発振最高温度及び信頼性を十分
得ることができないという問題があった。
In the above prior art, the carrier concentration in the p-type AlGaInP optical waveguide layer is as low as 2 to 3 × 10 17 cm -3 at the maximum, and the device resistance is about
Since it is as high as 10Ω, there is a problem that the laser oscillation maximum temperature and the reliability cannot be sufficiently obtained.

本発明の目的はp型AlGaInP混晶の有効キャリア濃度
を高くでき、素子抵抗を低減できる素子構造及びその製
造方法を提供することにある。また、レーザ発振最高温
度及び信頼性を向上させることにある。
An object of the present invention is to provide an element structure capable of increasing the effective carrier concentration of a p-type AlGaInP mixed crystal and reducing the element resistance, and a method of manufacturing the same. Another object is to improve the laser oscillation maximum temperature and reliability.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的は、n型不純物を水素化合物の形で含むn型
混晶をp型AlGaInP混晶上に積層させることにより達成
できる。
The above object can be achieved by laminating an n-type mixed crystal containing an n-type impurity in the form of a hydrogen compound on a p-type AlGaInP mixed crystal.

また、p型AlGaInP混晶キャリア濃度をさらに向上さ
せるためには、アニール効果が有効である。すなわち、
上記の目的とする多層をエピタキシャル成長した後、続
いて同じ成長炉において温度範囲200〜900℃、特に700
〜900℃範囲で時間10〜60分の範囲でアニールを行なう
と良い。
In order to further improve the p-type AlGaInP mixed crystal carrier concentration, an annealing effect is effective. That is,
After epitaxially growing the above-mentioned multilayer, the temperature range is then 200 to 900 ° C., especially 700
Annealing may be performed at a temperature in the range of up to 900 ° C. for a time in the range of 10 to 60 minutes.

また、次の方法によっても本願発明の実施を行うこと
が出来る。即ち、それは、半導体基板上に、バンドギャ
ップの小さい半導体発光活性層を、下層に設けたバンド
ギャップの大きいp型クラッド層と上側に設けたバンド
ギャップの大きいn型半導体層なるn型クラッド層とで
はさみこむか、或は上記半導体活性層を下層に設けたn
型クラッド層と上側に設けたp型クラッド層とではさみ
込みさらに該上側のp型クラッド層の上側にn型半導体
層を積層したダブルヘテロ構造を有し、上記n型半導体
層にドーピングされる不純物を水素化合物の形で導入
し、気相成長法によりエピタキシャル成長させて上記ダ
ブルヘテロ構造を設けることによって半導体レーザ素子
を製造することである。
Further, the present invention can be implemented by the following method. That is, on a semiconductor substrate, a semiconductor light-emitting active layer having a small band gap is formed by a p-type cladding layer having a large band gap provided below and an n-type cladding layer being an n-type semiconductor layer having a large band gap provided above. Or n in which the semiconductor active layer is provided as a lower layer.
Having a double hetero structure in which an n-type semiconductor layer is stacked above the upper p-type cladding layer and sandwiched between the n-type semiconductor layer and the p-type cladding layer provided on the upper side. An object is to manufacture a semiconductor laser device by introducing an impurity in the form of a hydrogen compound and epitaxially growing it by a vapor phase growth method to provide the double heterostructure.

〔作用〕[Action]

n型不純物が水素化合物としてドーピングされるn型
混晶をp型AlGaInP混晶の上部に成長することにより、
該n型混晶中に分解され吸蔵されている水素分子がp型
AlGaInP混晶中へ拡散していく。この水素分子の拡散に
より、p型AlGaInP混晶中において格子間サイトに位置
していたp型不純物Znの拡散が促進され、格子サイトに
置換してイオン化し、活性化率が向上する。この効果を
有効に得るためには、n型混晶中にドーピングする水素
化合物n型不純物量はできるだけ多いことが望ましい。
By growing an n-type mixed crystal doped with an n-type impurity as a hydrogen compound on the p-type AlGaInP mixed crystal,
Hydrogen molecules decomposed and occluded in the n-type mixed crystal are p-type
It diffuses into AlGaInP mixed crystals. This diffusion of hydrogen molecules promotes the diffusion of the p-type impurity Zn located at the interstitial site in the p-type AlGaInP mixed crystal, and replaces the lattice site with ionization to improve the activation rate. In order to effectively obtain this effect, it is desirable that the amount of the hydrogen compound n-type impurity doped in the n-type mixed crystal is as large as possible.

また、p型AlGaInP混晶の上部にn型混晶を成長した
後、さらにアニールすることがキャリア濃度を向上する
のに有効である。これは温度範囲200〜900℃、特に600
〜900℃の範囲でp型不純物の拡散距離が大きくなり格
子間サイトに位置していた不純物が格子サイトに置換し
てイオン化することによると考えられる。
Further, annealing after growing an n-type mixed crystal on the p-type AlGaInP mixed crystal is effective for improving the carrier concentration. This is the temperature range 200-900 ° C, especially 600
It is considered that the diffusion distance of the p-type impurity is increased in the range of -900 ° C, and the impurity located at the interstitial site is replaced with the lattice site and ionized.

なお、n型混晶はp型AlGaInP混晶に直接積層されて
いる必要はなく、n型混晶中の水素分子が透過できる厚
さの膜が介在していても良い。
The n-type mixed crystal does not need to be directly laminated on the p-type AlGaInP mixed crystal, and a film having a thickness capable of transmitting hydrogen molecules in the n-type mixed crystal may be interposed.

以上の作用により、従来p型AlGaInPに対して最大2
〜3×1017cm-3のキャリア濃度しか得られなかったのに
対して、約3倍の6〜9×1017cm-3のキャリア濃度が得
られることがわかった。
By the above-described operation, the conventional p-type AlGaInP has a maximum
Relative to 3 × 10 17 to cm only carrier concentration of -3 obtained did not, it was found that the carrier concentration of about 3 times the 6 to 9 × 10 17 cm -3 is obtained.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図により説明する。第
3図は本実施例の作製工程を示す概略図である。第3図
(a)において、まずp−GaAs基板1上にp−GaAsバッ
ファ層2(d=0.5〜1.0μm,nA=1×1018cm-3,p−Ga
0.51In0.49P層3(d=0.1〜0.2μm,nA=1×1018c
m-3)、p−(AlxGa1-x0.51In0.49Pクラッド層4
(d=0.6〜0.9μm,nA=2〜3×1017cm-3)、p−Ga
0.51In0.49P薄膜層5(d=0.002〜0.006μm,nA=8×
1017〜1×1018cm-3),n−AlαGa1−αAs(0α
1)或はn−(AlxGa1-x0.51In0.49P(0<x1)
キャップ層14(d=0.5〜1μm,nD=1×1018〜5×10
18cm-3)を順次有機売金属気相成長(MOCVD)、分子線
エピタキシー(MBE)或はガスソース分子線エピタキシ
ー(MOMBE)法により成長温度650〜700℃においてエピ
タキシャル成長する。このとき、n型不純物はSeであり
セレン化水素(H2Se)の水素化合物として導入し、p型
不純物はZnでありジメチル会えん(DMZ;dimethyl zin
c)の有機金属化合物の形で導入している。続いて同じ
成長炉において、温度700〜900℃の範囲で10〜30分間ア
ニールを行う。このときの雰囲気は、キャップ層14の材
料がn−AlαGa1−αAsの時はヒ素雰囲気を用い、n−
(AlxGa1-x0.51In0.49Pの時はリン雰囲気を用いる。
次に、第3図(b)において、成長炉よりエピタキシャ
ル成長したウエハを取り出し、硫酸系、リン酸系或はハ
ロゲン酸系溶液によりn−AlαGa1−αAs或はn−(Al
xGa1-x0.51In0.49P層から成るキャップ層14をエッチ
ング除去する。次に、第3図(c)において、SiO2絶縁
膜15(d=0.2〜0.3μm)を形成しリソグラフィーによ
りレジスト膜16をパターニングする。さらに、第3図
(d)において弗酸系溶液によりSiO2絶縁膜15をエッチ
ングしこれをマスクとしてハロゲン酸系溶液により層3,
4,5をエッチング除去し、順メサ状のリッジストライプ
を形成する。次にレジスト16を除いた後、SiO2絶縁膜マ
スク15を残したまま、n−GaAs光吸収兼電流狭窄層6
(d=0.6〜1.2μm,nD=2〜4×1018cm-3)を選択成長
し、リッジ段差を平坦に埋め込む。(第3図(e))そ
の後、SiO2絶縁膜マスク15を除去し、p−(AlxGa1-x
0.51In0.49Pクラッド層7(d=0.2〜0.5μm,nA=2〜
3×1017cm-3)、アンドープ(AlxGa1-x0.51In0.49
活性層8(d=0.03〜0.08μm,y=0)n−(AlxG
a1-x0.51In0.49Pクラッド層9(d=0.8〜1.0μm,nD
=7〜9×1017cm-3)n−Ga0.51In0.49P層10(d=0.
1〜0.2μm,nD=1〜2×1018cm-3)n−GaAsキャップ層
11(d=1.0〜3.0μm,nD=4〜6×1018cm-3)を順次エ
ピタキシャル成長し、続いて同じ成長炉において温度70
0〜90℃の範囲で10〜30分アニールを行う(第3図
(5))。次に、第3図(g)において、n電極12及び
p電極13を蒸着し、劈開スクライブすることにより第1
図の素子を切り出す。
Hereinafter, an embodiment of the present invention will be described with reference to FIG. FIG. 3 is a schematic view showing a manufacturing process of this embodiment. In FIG. 3A, first, a p-GaAs buffer layer 2 (d = 0.5 to 1.0 μm, n A = 1 × 10 18 cm −3 , p-Ga) is formed on a p-GaAs substrate 1.
0.51 In 0.49 P layer 3 (d = 0.1 to 0.2 μm, n A = 1 × 10 18 c
m -3 ), p- (Al x Ga 1 -x ) 0.51 In 0.49 P cladding layer 4
(D = 0.6 to 0.9 μm, n A = 2 to 3 × 10 17 cm −3 ), p-Ga
0.51 In 0.49 P thin film layer 5 (d = 0.002-0.006 μm, n A = 8 ×
10 17 -1 × 10 18 cm -3 ), n-Al α Ga 1-α As (0α
1) or n- (Al x Ga 1-x ) 0.51 In 0.49 P (0 <x1)
Cap layer 14 (d = 0.5 to 1 μm, n D = 1 × 10 18 to 5 × 10
18 cm -3 ) is grown epitaxially at a growth temperature of 650 to 700 ° C. by organic metal vapor deposition (MOCVD), molecular beam epitaxy (MBE) or gas source molecular beam epitaxy (MOMBE). At this time, the n-type impurity is Se, which is introduced as a hydrogen compound of hydrogen selenide (H 2 Se), and the p-type impurity is Zn, which is dimethyl zine (DMZ).
c) introduced in the form of an organometallic compound. Subsequently, annealing is performed in the same growth furnace at a temperature of 700 to 900 ° C. for 10 to 30 minutes. Atmosphere at this time, is using arsenic atmosphere when the material of the cap layer 14 of n-Al α Ga 1-α As, n-
In the case of (Al x Ga 1-x ) 0.51 In 0.49 P, a phosphorus atmosphere is used.
Next, the in FIG. 3 (b), the wafer is taken out of the epitaxial growth than the growth reactor, sulfuric acid, n-Al with phosphoric acid or a halogen acid solution α Ga 1-α As or n-(Al
x Ga 1-x ) 0.51 In 0.49 The cap layer 14 composed of the P layer is removed by etching. Next, in FIG. 3C, an SiO 2 insulating film 15 (d = 0.2 to 0.3 μm) is formed, and the resist film 16 is patterned by lithography. Further, in FIG. 3 (d), the SiO 2 insulating film 15 is etched with a hydrofluoric acid solution, and the layer 3
4 and 5 are removed by etching to form a regular mesa-shaped ridge stripe. Next, after the resist 16 is removed, the n-GaAs light absorption and current confinement layer 6 is left while the SiO 2 insulating film mask 15 is left.
(D = 0.6 to 1.2 μm, n D = 2 to 4 × 10 18 cm −3 ) is selectively grown, and the ridge step is buried flat. (FIG. 3E) Thereafter, the SiO 2 insulating film mask 15 is removed, and p- (Al x Ga 1 -x )
0.51 In 0.49 P clad layer 7 (d = 0.2 to 0.5 μm, n A = 2
3 × 10 17 cm -3 ), undoped (Al x Ga 1-x ) 0.51 In 0.49 P
Active layer 8 (d = 0.03 to 0.08 μm, y = 0) n− (Al x G
a 1-x ) 0.51 In 0.49 P cladding layer 9 (d = 0.8 to 1.0 μm, n D
= 7 to 9 × 10 17 cm −3 ) n-Ga 0.51 In 0.49 P layer 10 (d = 0.
1 to 0.2 μm, n D = 1 to 2 × 10 18 cm -3 ) n-GaAs cap layer
11 (d = 1.0 to 3.0 μm, n D = 4 to 6 × 10 18 cm −3 ) are successively epitaxially grown, and subsequently, at a temperature of 70 in the same growth furnace.
Annealing is performed in the range of 0 to 90 ° C. for 10 to 30 minutes (FIG. 3 (5)). Next, in FIG. 3 (g), an n-electrode 12 and a p-electrode 13 are deposited and cleaved by scribing to form a first electrode.
Cut out the element shown in the figure.

本実施例において、従来ではp−(AlxGa1-x0.51In
0.49Pクラッド層4及び7のキャリア濃度を最大2〜3
×1017cm-3でしかなかったのに対し、このキャリア濃度
を最大6〜9×1018cm-3に高めることが可能であった。
このため、p(AlxGa1-x0.51In0.49Pクラッド層の抵
抗率を低減できるので素子抵抗を従来の8〜10Ωであっ
たのを4〜5Ωに小さくすることができた。本素子の閾
値電流は20〜50mAであり、レーザ発振最高温度を100〜1
20℃に向上させることができた。また、素子の信頼性に
関しては、素子の両端面に非対称コーティングを施した
場合、温度50℃における20mWの定光出力動作を1000時間
以上続けても顕著な劣化は見られなかった。
In this embodiment, conventionally, p- (Al x Ga 1-x ) 0.51 In
0.49 Maximum carrier concentration of P cladding layers 4 and 7 is 2-3
While the carrier concentration was only × 10 17 cm −3 , the carrier concentration could be increased to a maximum of 6 to 9 × 10 18 cm −3 .
As a result, the resistivity of the p (Al x Ga 1 -x ) 0.51 In 0.49 P cladding layer can be reduced, so that the device resistance can be reduced from 8 to 10 Ω to 4 to 5 Ω. The threshold current of this device is 20 to 50 mA, and the maximum laser oscillation temperature is 100 to 1
The temperature could be increased to 20 ° C. Regarding the reliability of the device, when an asymmetric coating was applied to both end surfaces of the device, no remarkable deterioration was observed even when the constant light output operation of 20 mW at a temperature of 50 ° C. was continued for 1000 hours or more.

実施例2 本発明の他の実施例を第2図を用いて説明する。本実
施例では逆メサ状のリッジストライプを形成する以外
は、実施例1と全く同様の方法により作製する。本素子
では実施例1の素子と同様の効果が得られた。さらに、
光出力1〜10mWの範囲において非点隔差は2〜4μmで
あった。
Embodiment 2 Another embodiment of the present invention will be described with reference to FIG. In this embodiment, the semiconductor device is manufactured in exactly the same manner as in the first embodiment except that an inverted mesa-shaped ridge stripe is formed. In this device, the same effect as that of the device of Example 1 was obtained. further,
The astigmatic difference was 2 to 4 μm in the range of light output of 1 to 10 mW.

〔発明の効果〕〔The invention's effect〕

本発明によれば、p型AlGaInP混晶のキャリア濃度が
6〜9×1017cm-3と従来の3倍近く向上できるので低抵
抗率のp型AlGaInP混晶を得ることができ、素子抵抗を
4〜5Ωに小さくできる効果がある。このため、素子の
レーザ発振最高温度を100〜120℃に向上させることがで
き、素子の信頼性においては素子の両端面に非対称コー
ティングを施した場合、温度50℃で20mWの定光出力動作
で1000時間以上経過しても顕著な劣化は見られなかっ
た。
According to the present invention, since the carrier concentration of the p-type AlGaInP mixed crystal can be improved to about 3 to 9 × 10 17 cm −3, which is almost three times that of the conventional one, a p-type AlGaInP mixed crystal with low resistivity can be obtained, and the Can be reduced to 4 to 5Ω. For this reason, the maximum laser oscillation temperature of the device can be improved to 100 to 120 ° C. In terms of device reliability, when asymmetrical coating is applied to both end surfaces of the device, 1000 m at a constant light output operation of 20 mW at a temperature of 50 ° C. No remarkable deterioration was observed even after the lapse of time.

なお、素子構造は上記実施例に限らないことはいうま
でもない。また、素子の導電型を逆にしても良い。さら
には、一例としてAlGaInP混晶系の半導体レーザについ
て説明したが、主にPを含むInGaAsP,AlGaInP系につい
ても同様のことが言える。
It goes without saying that the element structure is not limited to the above embodiment. Further, the conductivity type of the element may be reversed. Furthermore, although an AlGaInP mixed crystal semiconductor laser has been described as an example, the same can be said for an InGaAsP or AlGaInP mainly containing P.

【図面の簡単な説明】[Brief description of the drawings]

第1図及び第2図は、各々本発明の実施例1及び実施例
2の縦断面図、第3図は本発明の素子作製の一例を示す
プロセス工程図である。 1……P−GaAs基板、2……P−GaAsバッファ層、3…
…p−Ga0.51In0.49P層、4……p−(AlxGa1-x0.51
In0.49Pクラッド層、5……p−Ga0.51In0.49P薄膜
層、6……n−GaAs光吸収兼電流狭窄層、7……p−
(AlxGa1-x0.51In0.49Pクラッド層、8……(AlxGa
1-x0.51In0.49P活性層、9……n−(AlxGa1-x
0.51In0.49Pクラッド層、10……n−Ga0.51In0.49
層、11……n−GaAsキャップ層、12……n電極、13……
p電極、14……n−AlαGa1−αAsキャップ層或はn−
(AlxGa1-x0.51In0.49Pキャップ層、15……SiO2絶縁
膜、16……レジスト。
1 and 2 are longitudinal sectional views of Examples 1 and 2 of the present invention, respectively, and FIG. 3 is a process chart showing an example of device fabrication of the present invention. 1 ... P-GaAs substrate, 2 ... P-GaAs buffer layer, 3 ...
... p-Ga 0.51 In 0.49 P layer, 4 ... p- (Al x Ga 1-x ) 0.51
In 0.49 P cladding layer, 5 ... p-Ga 0.51 In 0.49 P thin film layer, 6 ... n-GaAs light absorption and current confinement layer, 7 ... p-
(Al x Ga 1-x) 0.51 In 0.49 P cladding layer, 8 ...... (Al x Ga
1-x ) 0.51 In 0.49 P active layer, 9 ... n- (Al x Ga 1-x )
0.51 In 0.49 P cladding layer, 10 n-Ga 0.51 In 0.49 P
Layer, 11 n-GaAs cap layer, 12 n-electrode, 13
p-electrode, 14 ... n-Al α Ga 1-α As cap layer or n-
(Al x Ga 1-x ) 0.51 In 0.49 P cap layer, 15: SiO 2 insulating film, 16: resist.

フロントページの続き (56)参考文献 特開 平2−262388(JP,A) 特開 平1−286482(JP,A) IEEE J.Quantum El ectronics Vol.QE−23 No.6(1987)p.704−711 Appl.Phys.Lett.Vo l.53 No.9(1988)p.758−760 (58)調査した分野(Int.Cl.7,DB名) H01S 5/00 - 5/50 Continuation of front page (56) References JP-A-2-262388 (JP, A) JP-A-1-286482 (JP, A) IEEE J.I. Quantum Electronics Vol. QE-23 No. 6 (1987) p. 704-711 Appl. Phys. Lett. Vol. 53 No. 9 (1988) p. 758-760 (58) Field surveyed (Int. Cl. 7 , DB name) H01S 5/00-5/50

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】高キャリア濃度を要する部位に供するp型
AlGaInP系化合物半導体材料層またはp型InGaAsP系化合
物半導体材料層に、n型不純物が水素化合物の形で導入
されたn型半導体層を所望に積層する工程、これらの諸
層をアニールすることによって、前記p型AlGaInP系化
合物半導体材料層またはp型InGaAsP系化合物半導体材
料層に所望のキャリア濃度を有せしめる工程を有するこ
とを特徴とする半導体レーザ素子の製造方法。
Claims: 1. A p-type for a site requiring a high carrier concentration
A step of laminating an n-type semiconductor layer in which an n-type impurity is introduced in the form of a hydride on the AlGaInP-based compound semiconductor material layer or the p-type InGaAsP-based compound semiconductor material layer, by annealing these layers, A method for manufacturing a semiconductor laser device, comprising a step of giving a desired carrier concentration to the p-type AlGaInP-based compound semiconductor material layer or the p-type InGaAsP-based compound semiconductor material layer.
【請求項2】高キャリア濃度を要する部位に供するp型
AlGaInP系化合物半導体材料層またはp型InGaAsP系化合
物半導体材料層に、n型不純物が水素化合物の形で導入
されたn型半導体層を所望に積層する工程、これらの諸
層を摂氏200度より摂氏900度の温度範囲でアニールする
ことによって、前記p型AlGaInP系化合物半導体材料層
またはp型InGaAsP系化合物半導体材料層に6×1017cm
-3以上のキャリア濃度を有せしめる工程を有することを
特徴とする半導体レーザ素子の製造方法。
2. A p-type for a site requiring a high carrier concentration.
A step of desirably laminating an n-type semiconductor layer in which n-type impurities are introduced in the form of a hydride on an AlGaInP-based compound semiconductor material layer or a p-type InGaAsP-based compound semiconductor material layer. Annealing in a temperature range of 900 ° C. causes the p-type AlGaInP-based compound semiconductor material layer or the p-type InGaAsP-based compound semiconductor material layer to have a thickness of 6 × 10 17 cm.
A method for manufacturing a semiconductor laser device, comprising a step of giving a carrier concentration of -3 or more.
【請求項3】半導体基板上部にバンドギャップの小さい
半導体活性層を、下層に設けたバンドギャップの大きい
p型クラッド層と上側に設けたバンドギャップの大きい
n型半導体層なるn型クラッド層とで挟んだダブルヘテ
ロ構造か、或は上記半導体活性層を下層に設けたn型ク
ラッド層と上側に設けたp型クラッド層とではさみ込み
さらに該上側のp型クラッド層の上側にn型半導体層を
積層したダブルヘテロ構造を有し、かつ、高キャリア濃
度を要するp型クラッド層にp型AlGaInP系化合物半導
体材料層またはp型InGaAsP系化合物半導体材料層を含
み、かつ前記p型AlGaInP系化合物半導体材料層または
p型InGaAsP系化合物半導体材料層に、水素分子が透過
できる厚さの膜を介在させ、もしくは直接、積層される
前記n型半導体層にn型不純物を水素化合物の形で導入
し、かつ、前記諸層を気相成長法によりエピタキシャル
成長させて前記ダブルヘテロ構造を形成する工程を有
し、前記p型AlGaInP系化合物半導体材料層またはp型I
nGaAsP系化合物半導体材料層に所望のキャリア濃度を有
せしめることを特徴とする半導体レーザ素子の製造方
法。
3. A semiconductor active layer having a small band gap is provided above a semiconductor substrate, and a p-type cladding layer having a large band gap provided below and an n-type cladding layer provided as an n-type semiconductor layer having a large band gap provided above. A double hetero structure sandwiched between them, or an n-type cladding layer in which the above-mentioned semiconductor active layer is provided in a lower layer and a p-type cladding layer provided in an upper side, and an n-type semiconductor layer is provided above the upper p-type cladding layer Having a double heterostructure, and including a p-type AlGaInP-based compound semiconductor material layer or a p-type InGaAsP-based compound semiconductor material layer in a p-type clad layer requiring a high carrier concentration, and the p-type AlGaInP-based compound semiconductor An n-type impurity is interposed in the material layer or the p-type InGaAsP-based compound semiconductor material layer by interposing a film having a thickness through which hydrogen molecules can pass, or directly into the n-type semiconductor layer to be laminated. Introducing the compound in the form of a hydrogen compound, and epitaxially growing the layers by vapor phase epitaxy to form the double heterostructure, wherein the p-type AlGaInP-based compound semiconductor material layer or p-type I
A method for manufacturing a semiconductor laser device, wherein a desired carrier concentration is provided in an nGaAsP-based compound semiconductor material layer.
【請求項4】特許請求の範囲第3項に記載の半導体レー
ザ素子の製造方法において、前記半導体基板はp型半導
体基板であり、前記p型クラッド層の所望部分がリッジ
状ストライプ構造中に存し、当該p型クラッド層は3×
1017cm-3を越えるキャリア濃度を有せしめることを特徴
とする半導体レーザ素子の製造方法。
4. A method for manufacturing a semiconductor laser device according to claim 3, wherein said semiconductor substrate is a p-type semiconductor substrate, and a desired portion of said p-type cladding layer exists in a ridge-shaped stripe structure. And the p-type cladding layer is 3 ×
A method for manufacturing a semiconductor laser device, characterized in that the carrier concentration exceeds 10 17 cm -3 .
【請求項5】特許請求の範囲第4項に記載の半導体レー
ザ素子の製造方法において、前記n型半導体層がn型
(AlxGa1-x0.51In0.49P(0<x≦1)層或はn型Al
αGa1−αAs(0≦α≦1)層であることを特徴とする
半導体レーザ素子の製造方法。
5. The method for manufacturing a semiconductor laser device according to claim 4, wherein said n-type semiconductor layer is n-type (Al x Ga 1 -x ) 0.51 In 0.49 P (0 <x ≦ 1). Layer or n-type Al
A method for manufacturing a semiconductor laser device, comprising an α Ga 1−α As (0 ≦ α ≦ 1) layer.
【請求項6】半導体基板上に、第1のp型クラッド層と
してp型AlGaInP系化合物半導体材料層またはp型InGaA
sP系化合物半導体材料層、および前記p型AlGaInP系化
合物半導体材料層またはp型InGaAsP系化合物半導体材
料層上に水素分子の透過が可能な厚さのp型半導体層を
形成する工程、n型不純物が水素化合物の形で導入され
たn型半導体層を形成する工程、準備された半導体積層
体をアニールする工程、前記n型不純物が水素化合物の
形で導入されたn型半導体層を除去する工程、前記p型
AlGaInP系化合物半導体材料層またはp型InGaAsP系化合
物半導体材料層、および水素分子の透過が可能な厚さの
前記p型半導体層を含む半導体積層体をリッジ状ストラ
イプに加工する工程、前記リッジ状ストライプの両側部
を当該リッジ状ストライプを構成する半導体積層体とは
別異の半導体材料でリッジ段差を埋め込む工程、半導体
活性層を形成する工程、第2のn型クラッド層を形成す
る工程、を有することを特徴とする半導体レーザ素子の
製造方法。
6. A p-type AlGaInP-based compound semiconductor material layer or a p-type InGaA as a first p-type cladding layer on a semiconductor substrate.
forming a p-type semiconductor layer having a thickness capable of transmitting hydrogen molecules on the sP-based compound semiconductor material layer and the p-type AlGaInP-based compound semiconductor material layer or the p-type InGaAsP-based compound semiconductor material layer; Forming an n-type semiconductor layer introduced in the form of a hydride, annealing the prepared semiconductor laminate, and removing the n-type semiconductor layer in which the n-type impurity has been introduced in the form of a hydride , The p-type
Processing a semiconductor laminate including the AlGaInP-based compound semiconductor material layer or the p-type InGaAsP-based compound semiconductor material layer and the p-type semiconductor layer having a thickness capable of transmitting hydrogen molecules into a ridge-shaped stripe; Embedding the ridge step with a semiconductor material different from the semiconductor laminate constituting the ridge-shaped stripe, forming a semiconductor active layer, and forming a second n-type cladding layer A method for manufacturing a semiconductor laser device, comprising:
JP01206778A 1989-08-11 1989-08-11 Method for manufacturing semiconductor laser device Expired - Fee Related JP3143105B2 (en)

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07240562A (en) * 1994-02-28 1995-09-12 Nec Corp Semiconductor laser and its manufacture

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Appl.Phys.Lett.Vol.53 No.9(1988)p.758−760
IEEE J.Quantum Electronics Vol.QE−23 No.6(1987)p.704−711

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