JPH0194690A - Manufacture of buried type semiconductor laser device - Google Patents
Manufacture of buried type semiconductor laser deviceInfo
- Publication number
- JPH0194690A JPH0194690A JP25219587A JP25219587A JPH0194690A JP H0194690 A JPH0194690 A JP H0194690A JP 25219587 A JP25219587 A JP 25219587A JP 25219587 A JP25219587 A JP 25219587A JP H0194690 A JPH0194690 A JP H0194690A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- type inp
- semiconductor laser
- buried
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 abstract description 17
- 230000000903 blocking effect Effects 0.000 abstract description 8
- 238000001312 dry etching Methods 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000010884 ion-beam technique Methods 0.000 abstract description 3
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 238000002407 reforming Methods 0.000 abstract 1
- 238000005253 cladding Methods 0.000 description 8
- 239000013078 crystal Substances 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004943 liquid phase epitaxy Methods 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000002109 crystal growth method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、埋め込み型半導体レーザ素子の製造方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a buried semiconductor laser device.
埋め込み型半導体レーザ素子に必要なダブルヘテロ接合
の結晶成長方法としては、液相成長(LPE)法、気相
成長(VPE)法および分子線成長(MBE)法がある
。これらの方法のなかで、有機金属気相成長(MOCV
D)法は量産性に優れ、膜厚および組成の制御性に優れ
ているため注目されている結晶成長法である。このMO
CVD法を用いた埋め込み型半導体レーザ素子の製造工
程は、例えば第2図(a)〜(C)に示すように、n型
■nP基板(1)上にn型1nPクラッド層(2)を形
成し、該クラッド層の上にノンドープGarnAsP活
性層(3)を形成し、該活性層上にP型InPクラッド
層(4)層を形成する1次に前記p型1nPクラッド層
上に340g膜(5)を形成した後、ウェットエツチン
グ法によりメサエッチングを行いストライプ領域以外を
除去し、その部分に再度P型1nP電流阻止層(6)と
n型!nP電流阻止層(7)を形成し、最後にp型Ga
1nAsPコンタクト層(8)を形成する。この構造で
は、活性層(3)は活性層よりも屈折率の小さなI n
P’層(6)、(7)により埋め込まれているため、
横モードの制御が可能であり、電流の閉じ込めはInP
層(6)、(7)のpn接合の逆バイアス特性を利用し
て実現しており、低閾値電流が可能になっている。Methods for growing double heterojunction crystals necessary for buried semiconductor laser devices include liquid phase epitaxy (LPE), vapor phase epitaxy (VPE), and molecular beam epitaxy (MBE). Among these methods, metal organic chemical vapor deposition (MOCV)
Method D) is a crystal growth method that is attracting attention because it has excellent mass productivity and excellent controllability of film thickness and composition. This M.O.
In the manufacturing process of a buried semiconductor laser device using the CVD method, for example, as shown in FIGS. 2(a) to (C), an n-type 1nP cladding layer (2) is formed on an n-type ■nP substrate (1). A non-doped GarnAsP active layer (3) is formed on the cladding layer, and a P-type InP cladding layer (4) is formed on the active layer. After forming (5), mesa etching is performed using a wet etching method to remove areas other than the stripe area, and a P-type 1nP current blocking layer (6) is added to that area again. An nP current blocking layer (7) is formed, and finally a p-type Ga
A 1nAsP contact layer (8) is formed. In this structure, the active layer (3) has a smaller refractive index than the active layer.
Because it is embedded by P' layers (6) and (7),
Transverse mode control is possible, and current confinement is InP
This is achieved by utilizing the reverse bias characteristics of the pn junctions of layers (6) and (7), making it possible to achieve a low threshold current.
〔従来技術の問題点]
しかしながら、ウェットエツチング法によりメサエッチ
ングを行っているため、次のような問題点がある。即ち
、活性層の巾を再現性よく制御することが困難であるこ
と、選択エツチングを行う際に特定の結晶面にエツチン
グが進むため、メサ側面に凹凸を生じ活性層付近の結晶
性の悪化を招くこと、更に、SiOオ膜と半導体層との
密着性が悪い場合、サイドエツチングが生じ、埋め込み
層を成長する際に空間部が形成されるなどの問題を生ず
る6本発明は以上のような点にかんがみてなされたもの
で、その目的とするところは、狭い活性層中を再現性よ
く実現し、良好な埋め込み層を有する埋め込み型半導体
レーザ素子の製造方法を提供することにある。[Problems with the Prior Art] However, since mesa etching is performed using a wet etching method, there are the following problems. Specifically, it is difficult to control the width of the active layer with good reproducibility, and when selective etching is performed, etching progresses to specific crystal planes, which causes unevenness on the mesa side surface and deteriorates the crystallinity near the active layer. In addition, if the adhesion between the SiO2 film and the semiconductor layer is poor, side etching may occur, resulting in problems such as the formation of voids when growing the buried layer. The purpose of this invention is to provide a method for manufacturing a buried semiconductor laser device that realizes a narrow active layer with good reproducibility and has a good buried layer.
〔問題点を解決するための手段とその作用〕上記目的を
達成するために本発明によれば、活性層を含むダブルヘ
テロ接合部をメサ形状にし、該ダブルヘテロ接合部を前
記活性層よりも屈折率の小さな半導体の埋め込み層で埋
め込む埋め込み型半導体レーザ素子の製造方法において
、前記メサ形状をドライエツチングにより略垂直形成す
ることを特徴とする埋め込み型半導体レーザ素子の製造
方法が提供される。[Means for Solving the Problems and Their Effects] In order to achieve the above object, according to the present invention, the double heterojunction including the active layer is formed into a mesa shape, and the double heterojunction is made larger than the active layer. There is provided a method of manufacturing a buried semiconductor laser device in which the semiconductor laser device is buried with a buried layer of a semiconductor having a small refractive index, wherein the mesa shape is formed substantially vertically by dry etching.
ドライエツチングでは、活性層の巾を精度よく制御する
ことが可能である。ウェットエツチングでは、エツチン
グが等方的であれば、深さと同じ寸法だけレジスト膜の
下側にもエツチングが進むサイドエツチングが生じ、ま
た薬品による材料や結晶面の選択性も高い。しかしなが
ら、ドライエツチングを用いると、選択性がなくなり、
InPおよびGa1nAsPについて等速エツチングが
可能となり、ヘテロ界面において段差のない垂直側壁が
得られる。Dry etching allows precise control of the width of the active layer. In wet etching, if the etching is isotropic, side etching occurs in which etching progresses below the resist film by the same dimension as the depth, and the selectivity of materials and crystal planes by chemicals is also high. However, when dry etching is used, selectivity is lost and
Uniform etching is possible for InP and Ga1nAsP, and vertical sidewalls without steps can be obtained at the hetero interface.
以下図面に示した実施例に基づいて本発明を説明する。 The present invention will be described below based on embodiments shown in the drawings.
第1図(a)〜(e)は、本発明にかかる製造方法によ
る埋め込み型半導体レーザ素子の要部断面を工程順に示
した図である。FIGS. 1(a) to 1(e) are diagrams illustrating cross-sections of essential parts of an embedded semiconductor laser device manufactured by the manufacturing method according to the present invention in the order of steps.
次に、この製造方法を図面に従い工程順に説明すると、
(1)n型1nP基板(11)上に、第1図のMOCV
D法による結晶成長により、n型1nPクラッド層Q2
1、波長1.3層mの発光に相当する組成のGajnA
sP活性層側、P型1nPクラッド層(+41を連続成
長させる。(第1図(a))
(2)ホトリソグラフィおよびCF、ガスによる反応性
イオンエツチング(RI B)により、巾1.5μ程度
の2層をレジスト(ホトレジスト側、StO□膜0!0
)パターンを形成する。(第1図(b))(3) CI
!、!ガスを用いた反応性イオンビームエツチング(R
IBE)により、2層レジストをマスクとして、n型1
nPクラツドI’IQ21までエツチングする。このと
き、ウェハをその垂線とイオンビームとの成す角が21
°となる様に傾斜させて設置し、ウェハを回転させなが
らエツチングをすることにより、略垂直なエツチング面
を得ることができる。(第1図(C))
(4)エツチングを終えたウェハをアッシングすること
により、最上層のホトレジストマスク側を剥離する。Next, this manufacturing method will be explained step by step according to the drawings. (1) On the n-type 1nP substrate (11), the MOCV of FIG.
By crystal growth using the D method, an n-type 1nP cladding layer Q2 is formed.
1. GajnA with a composition corresponding to light emission with a wavelength of 1.3 layers m
On the sP active layer side, a P-type 1nP cladding layer (+41) is continuously grown (Fig. 1 (a)). 2 layers of resist (photoresist side, StO□ film 0!0
) form a pattern. (Figure 1(b)) (3) CI
! ,! Reactive ion beam etching (R
IBE), using the two-layer resist as a mask, the n-type 1
Etch up to nP cladding I'IQ21. At this time, the angle between the perpendicular to the wafer and the ion beam is 21
By installing the wafer at an angle such that the wafer is tilted and etching the wafer while rotating it, a substantially vertical etching surface can be obtained. (FIG. 1(C)) (4) By ashing the etched wafer, the uppermost layer of the photoresist mask is removed.
(5)ウェハを洗浄した後、Sin、マスク09を選択
成長用のマスクとして、減圧MOCVD法(76Tor
r )により、p型InP電流阻止層(16)、 n型
InP電流阻止層0ηを成長させる。このとき、StO
□のメサストライプ上には結晶成長がおこらない、(第
1図(d))
(6) S i Oz膜を剥離した後、第3回目の結晶
成長により、p型1nPクラッドN04、p型GaIn
AsPコンタクト層09)を成長させる。第3回目の結
晶成長を終えると、ウェハ表面はほぼ平坦になる。(第
1図(e))
(7)電極を形成した後、チップに切断する。(5) After cleaning the wafer, use the low-pressure MOCVD method (76 Torr) using Sin mask 09 as a mask for selective growth.
r), a p-type InP current blocking layer (16) and an n-type InP current blocking layer 0η are grown. At this time, StO
No crystal growth occurs on the mesa stripe of □ (Fig. 1(d)). (6) After peeling off the SiOz film, the third crystal growth causes p-type 1nP clad N04, p-type GaIn
Grow an AsP contact layer 09). After the third crystal growth, the wafer surface becomes almost flat. (FIG. 1(e)) (7) After forming the electrodes, cut into chips.
なお、本発明による埋め込み型半導体レーザ素子の製造
方法体上記実施例に限定されることなく、RIBE法の
かわりにRIEI法によりメサエッチングを行ってもよ
く、エツチングガスとしてC27ガスのかわりに、C2
:ガスにAr等のガスを添加したものを用いてもよく、
またエッチングマスクとしてホトレジスト/SiO□の
組み合せのかわりにTiO,/SiO,の組み合せを用
いてもよい、活性層の発光波長についても1.3−に限
定することなく、1.1〜1.6I1gAの所望の″発
光波長を選択することができる。Note that the method for manufacturing an embedded semiconductor laser device according to the present invention is not limited to the above embodiments, but mesa etching may be performed by the RIEI method instead of the RIBE method, and C2 gas is used instead of C27 gas as the etching gas.
: A gas added with a gas such as Ar may be used,
Furthermore, instead of the photoresist/SiO□ combination, a combination of TiO, /SiO may be used as an etching mask.The emission wavelength of the active layer is not limited to 1.3-, but is 1.1 to 1.6 The desired “emission wavelength” can be selected.
以上説明したように本発明によれば、メサ形状をドライ
エツチングにより形成しているため、活性層中を精度よ
く制御することができ、また、サイドエツチングを避け
ることができ、従って、良好な埋め込み層を得ることが
できるという優れた効果かあ、る。As explained above, according to the present invention, since the mesa shape is formed by dry etching, it is possible to precisely control the inside of the active layer, and side etching can be avoided, resulting in good embedding. It's an excellent effect of being able to obtain layers.
第1図(a)〜(e)はそれぞれ本発明にかかる製造法
による埋め込み型半導体レーザ素子の要部を工程順に示
した断面図であり、第2図(a)〜(C)はそれぞれ従
来の製造法による埋め込み型半導体レーザ素子の要部を
工程順に示した断面図である。
1.11・=n型1nP基板、 2.12・n型InP
クラッド層、 3.13・・・Ga I nAs P活
性層、4.14・P型InPクラッド層、 5 、15
− S iO□膜、 6.16−p型1nP電流阻止層
、 7゜17−n型1nP電流阻止層、 8.19・p
型GaInAsPコンタクト層、 18・・・ホトレジ
スト。FIGS. 1(a) to (e) are cross-sectional views showing the main parts of a buried semiconductor laser device according to the manufacturing method according to the present invention in the order of steps, and FIGS. 2(a) to (C) are respectively sectional views of the conventional FIG. 3 is a cross-sectional view showing the main parts of a buried semiconductor laser device according to the manufacturing method of FIG. 1.11・=n-type 1nP substrate, 2.12・n-type InP
cladding layer, 3.13...GaInAsP active layer, 4.14.P-type InP cladding layer, 5, 15
- SiO□ film, 6.16-p-type 1nP current blocking layer, 7゜17-n-type 1nP current blocking layer, 8.19・p
type GaInAsP contact layer, 18... photoresist.
Claims (1)
ダブルヘテロ接合部を前記活性層よりも屈折率の小さな
半導体の埋め込み層で埋め込む埋め込み型半導体レーザ
素子の製造方法において、前記メサ形状をドライエッチ
ングにより略垂直メサに形成することを特徴とする埋め
込み型半導体レーザ素子の製造方法。A method for manufacturing a buried semiconductor laser device in which a double heterojunction including an active layer is formed into a mesa shape and the double heterojunction is buried with a buried layer of a semiconductor having a refractive index smaller than that of the active layer, wherein the mesa shape is dry etched. 1. A method of manufacturing a buried semiconductor laser device, characterized in that the semiconductor laser device is formed into a substantially vertical mesa.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25219587A JPH0194690A (en) | 1987-10-06 | 1987-10-06 | Manufacture of buried type semiconductor laser device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25219587A JPH0194690A (en) | 1987-10-06 | 1987-10-06 | Manufacture of buried type semiconductor laser device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0194690A true JPH0194690A (en) | 1989-04-13 |
Family
ID=17233826
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25219587A Pending JPH0194690A (en) | 1987-10-06 | 1987-10-06 | Manufacture of buried type semiconductor laser device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0194690A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2673330A1 (en) * | 1991-02-26 | 1992-08-28 | France Telecom | METHOD OF MAKING A BURIED RIBBON SEMICONDUCTOR LASER USING DRY ETCHING TO FORM THE RIBBON, AND LASER OBTAINED BY THIS PROCESS |
JPH0846282A (en) * | 1994-07-28 | 1996-02-16 | Nec Corp | Manufacture of semiconductor laser device |
JP2004363287A (en) * | 2003-06-04 | 2004-12-24 | Furukawa Electric Co Ltd:The | Manufacturing method for semiconductor device |
JP2010151318A (en) * | 2010-02-22 | 2010-07-08 | Toa Kokyu Pipe Fitting & Valve Mfg Co Ltd | Pipe joint |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54154984A (en) * | 1978-05-12 | 1979-12-06 | Nec Corp | Semiconductor laser device and its manufacture |
JPS58143596A (en) * | 1982-02-22 | 1983-08-26 | Toshiba Corp | Manufacture of compound semiconductor device |
JPS61288481A (en) * | 1985-06-17 | 1986-12-18 | Fujitsu Ltd | Manufacture of semiconductor light emitting device |
-
1987
- 1987-10-06 JP JP25219587A patent/JPH0194690A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54154984A (en) * | 1978-05-12 | 1979-12-06 | Nec Corp | Semiconductor laser device and its manufacture |
JPS58143596A (en) * | 1982-02-22 | 1983-08-26 | Toshiba Corp | Manufacture of compound semiconductor device |
JPS61288481A (en) * | 1985-06-17 | 1986-12-18 | Fujitsu Ltd | Manufacture of semiconductor light emitting device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2673330A1 (en) * | 1991-02-26 | 1992-08-28 | France Telecom | METHOD OF MAKING A BURIED RIBBON SEMICONDUCTOR LASER USING DRY ETCHING TO FORM THE RIBBON, AND LASER OBTAINED BY THIS PROCESS |
US5304283A (en) * | 1991-02-26 | 1994-04-19 | France Telecom Etablissment Autonome De Droit Public | Process for producing a buried stripe semiconductor laser using dry etching for forming said stripe and laser obtained by this process |
JPH0846282A (en) * | 1994-07-28 | 1996-02-16 | Nec Corp | Manufacture of semiconductor laser device |
JP2004363287A (en) * | 2003-06-04 | 2004-12-24 | Furukawa Electric Co Ltd:The | Manufacturing method for semiconductor device |
JP2010151318A (en) * | 2010-02-22 | 2010-07-08 | Toa Kokyu Pipe Fitting & Valve Mfg Co Ltd | Pipe joint |
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