JPH09116161A - Thin film semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film semiconductor device which can be manufactured by one ion-doping process and in which an off-leak current is suppressed and the decrease of an ON-current is suppressed. SOLUTION: A polycrystalline silicon thin film 20 and a gate insulating film 40 are formed on a glass substrate 10 and a tantalum gate electrode 51 and anode tantalum oxide films 52 and 53 are formed on them. An aluminum gate electrode 72 which is wider than the tantalum gate electrode 51 is formed on the electrode 51 and the films 52 and 53. The surface of the aluminum gate electrode 72 is covered with anode aluminum oxide films 81, 82 and 83. Phosphorus ions are introduced from the above by an ion doping method to form an n<+> -type drain region 23 and an n<-> -type drain region 22 in the polycrystalline silicon thin film 20. An off-leak current can be suppressed by the n<+> -type drain region 23 of an offset gate structure and the decrease of an ON-current is suppressed by the n<-> -type drain region 22. The decrease of the ON-current is also suppressed by an electrical n<-> -type region 26 induced under the protruding part of the gate electrode 72.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device and a manufacturing method thereof, and more particularly to a thin film transistor using a polycrystalline silicon thin film and a manufacturing method thereof.

[0002]

2. _Description of the _Related Art A conventional thin film transistor using a polycrystalline silicon thin film has a problem that an off leak current flows even if the gate voltage V _gs is turned off. Japanese Unexamined Patent Publication (Kokai) No. 5-166837 proposes a polycrystalline silicon thin film transistor that suppresses the off-leakage current and suppresses the decrease in the on-current, and a manufacturing method thereof.

FIG. 6 is a sectional view for explaining this conventional thin film transistor and its manufacturing method.

First, a polycrystalline silicon thin film 120, a gate insulating film 130 made of SiO ₂ , and a tantalum film 140 are sequentially laminated on a substrate 110.

Next, using the tantalum film 140 as a mask,
Phosphorus ions are added to the polycrystalline silicon thin film 120 by the ion implantation method, and the n ⁻ drain region 1 is self-aligned.
22 and n ⁻ source region 123 are formed.

Next, the surface of the tantalum film 140 is oxidized by the anodic oxidation method to form the tantalum gate electrode 141 and the tantalum oxide film 150, and then the tantalum oxide film 150.
Is used as a mask, and phosphorus ions are further added to the polycrystalline silicon thin film 120 by an ion implantation method or a high energy ion doping method to form n ⁺ drain regions 124 and n.
⁺ Source region 128 is formed.

Finally, the implanted phosphorus ions are activated to form the thin film transistor 200.

In this conventional thin film transistor 200,
Tantalum gate electrode 141 and gate n ⁺ drain region 1
Since there is an offset ΔL with respect to 24, the off-leakage current can be suppressed when the gate voltage V _gs is negatively biased. Then, the tantalum gate electrode 141 and the gate n
⁺ N ^- drain region 125 between the drain region 124
Therefore, the tantalum gate electrode 14 is formed as described above.
Even if the offset ΔL is provided between 1 and the gate n ⁺ drain region 124, the decrease in the on-current can be suppressed to a low level.

[0009]

However, in order to manufacture the conventional thin film transistor 200, ion implantation or ion doping has to be performed twice, which is a problem in that the process is complicated. Further, there is a problem that the offset region ΔL ₂ 129 formed between the n ⁻ source / drain regions 127 and 125 and the channel immediately below the gate electrode becomes a parasitic resistance when the channel is in the ON state and reduces the ON current. It was

Therefore, an object of the present invention is to provide a thin film semiconductor device having a simple structure which can be manufactured by one-time ion doping, in which the off leak current is suppressed and the decrease of the on current is suppressed, and the thin film semiconductor device. It is to provide a manufacturing method.

[0011]

According to the present invention, a semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film, and a gate electrode formed on the gate insulating film. And a source region and a drain region respectively formed on the semiconductor thin film on both sides of the gate electrode, wherein the gate electrode is a first gate electrode formed on the gate insulating film. A second gate electrode formed on the first gate electrode, wherein the second gate electrode is provided directly above the first gate electrode and in contact with the first gate electrode. The first sub-gate electrode and the second sub-gate electrode provided so as to protrude toward the drain region by a first predetermined distance from the position of the end of the first gate electrode on the drain region side are reduced. Also provided is a thin film semiconductor device characterized in that the drain region is provided at a second predetermined distance from the end of the first gate electrode on the drain region side. .

In the thin film semiconductor device of the present invention, first, the drain region is provided at a second predetermined distance from the end of the first gate electrode on the drain region side,
Due to the offset gate structure, the gate voltage V
_The off-leakage current can be suppressed when _gs is turned off.
In addition, the breakdown voltage between the source and drain also increases, and as a result,
The channel can be miniaturized, ON resistance can be reduced, and ON current can be increased.

Further, the semiconductor device of the present invention comprises a second gate electrode formed on the first gate electrode in addition to the first gate electrode, and the second gate electrode is the first gate electrode.
A first sub-gate electrode provided directly above the first gate electrode in contact with the first gate electrode, and a first predetermined distance from the position of the drain region side end of the first gate electrode to the drain region side. It has at least a second sub-gate electrode provided so as to project a distance. As described above, the second sub-gate electrode protrudes from the first gate electrode to the drain region side while being separated from the gate insulating film upward. A weak electric field is applied to the semiconductor thin film under the second sub-gate electrode, and as a result, an inversion layer (channel) is formed on the surface of the semiconductor thin film under the second sub-gate electrode. Therefore, at the time of turning on, the resistance between the first gate electrode and the drain region can be made extremely small, and the decrease in on-current caused by adopting the offset gate structure can be suppressed. On the other hand, at the time of OFF, since there is a distance between the second sub-gate electrode and the semiconductor thin film, the electric field strength at the drain end is weakened, and therefore the OFF current can be kept low.

As described above, according to the present invention, the drain region is provided with the offset gate structure spaced apart from the first gate electrode, and the second gate electrode is provided on the first gate electrode. By projecting a part of the second gate electrode to the drain region side, it is possible to suppress the off leak current when the gate voltage V _{gs is set} to the off side, and reduce the on current caused by adopting the offset gate structure. Can be suppressed. The thin film semiconductor device having such a structure can be manufactured by performing ion implantation once for forming the drain region and the source region.

In the thin film semiconductor device of the present invention, the first
A semiconductor thin film between the gate electrode and the drain region, further comprising a low-concentration drain region having a lower impurity concentration than the drain region, and the low-concentration drain region is separated from the first gate electrode by a third predetermined distance. It is also possible to provide it while being electrically connected to the drain region. When such a low concentration drain region is provided, the drain region is first
The resistance between the first gate electrode and the drain region can be reduced by the low-concentration drain region even when the gate electrode is formed further apart from the gate electrode. Therefore, the off-leakage current when the gate voltage V _{gs is set} to the off side can be sufficiently suppressed while further suppressing the decrease of the on-current. Further, when such a low impurity concentration drain region is provided,
The drain-to-drain breakdown voltage can be increased, and as a result,
The channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased.

The thin film semiconductor device of the present invention is particularly preferably applied when the semiconductor thin film is a semiconductor thin film made of polycrystalline silicon.

Further, preferably, the first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal and the second metal are different from each other. Different types of metal. By doing so, the lattice constants and crystal structures of the first metal and the second metal are different from each other, and the gate electrode in which these two metals are stacked on top of each other has excellent maskability for ion implantation. become. As a result, the film thickness of the entire gate electrode can be reduced, and disconnection of data lines and the like formed on the gate electrode is less likely to occur.

Preferably, the first gate electrode is composed of a first metal, the second gate electrode is composed of a second metal, and the gate metal (scanning line) (scanning line) is simultaneously formed by the two metals. Line) is also formed. Further, the etching characteristic of the first metal and the etching characteristic of the second metal are different from each other. By thus forming a two-layer structure of metals having different etching characteristics, even if one of the metals is broken, the other metal is conductive, so that the gate line is hard to break during manufacturing.

Preferably, the first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal is an anodizable metal. In this way, by forming the first metal as a metal capable of anodizing, if the upper surface of the first metal is anodized while being covered with a resist or another metal, it is formed on the side surface of the first metal. The upper surface of the anodized film and the upper surface of the first metal thus formed have substantially the same height. As a result, if the second gate electrode made of the second metal is formed on the first metal and the anodic oxide film, the second gate electrode can be easily formed in a state of protruding from the first gate electrode. become able to. Further, it becomes easy to control the width of the anodized film formed on the side surface of the first metal, that is, the distance from the end of the first metal to the outer end of the anodized film. When the drain region is formed by performing an ion implantation method such as ion implantation or ion doping in the semiconductor thin film using the oxide film as a mask, it is easy to control the distance between the gate electrode made of the first metal and the drain region. Becomes

Preferably, the first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal is an anodizable metal.
The second metal is an anodizable metal and the anodization rate of the first metal is greater than the anodization rate of the second metal. Here, the fact that the anodic oxidation rate is fast means that the anodic oxide film formed when the same voltage is applied is thick.

In this way, the first gate made of the first metal is formed by anodizing the metal laminate in which the second metal having the same shape as the first metal is laminated on the first metal. An electrode, an anodized film of a first metal on both sides of the first gate electrode, a second gate electrode made of a second metal, and a second metal on the upper surface and both sides of the second gate electrode. An anodized film is formed, the second gate electrode is wider than the first gate electrode and protrudes on both sides of the first gate electrode, and the protruding parts are formed on the anodized film of the first metal. Although located, the end portions of the anodic oxide film on both sides of the first metal are outside the end portions of the anodic oxide film of the second metal on both sides of the second gate electrode.

Therefore, thereafter, the first gate electrode, the first metal anodic oxide film on both sides of the first gate electrode, the second gate electrode, and the upper surface and both sides of the second gate electrode are formed. When impurities are introduced into the semiconductor thin film by ion implantation or ion doping using the second metal anodic oxide film as a mask to form an impurity region, the semiconductor thin film outside the first metal anodic oxide film is highly doped. An impurity region for the concentration drain region is formed, and an impurity region for the low concentration drain region is formed in the semiconductor thin film between the outside of the anodic oxide film of the second metal and the high concentration drain region, and the first gate electrode To the vicinity of the impurity region for the low-concentration drain region, the second gate electrode is formed so as to project on the anodic oxide film of the first metal. Then, when the impurities are activated by heat treatment or the like thereafter, the impurity region for the high concentration drain region becomes the high concentration drain region and the impurity region for the low concentration drain region becomes the low concentration drain region.

Since the high-concentration drain region is thus formed outside the anodic oxide film of the first metal, an offset gate structure is formed between the high-concentration drain region and the first gate electrode, and the gate voltage V _gs is turned off. Can suppress off-leakage current at
In addition, the breakdown voltage between the source and drain also increases, and as a result,
The channel can be miniaturized, ON resistance can be reduced, and ON current can be increased.

Further, since the low-concentration drain region is formed in the semiconductor thin film between the outside of the anodic oxide film of the second metal and the high-concentration drain region, it is possible to suppress the decrease of the on-current.

Further, since the second gate electrode projects from the first gate electrode to the vicinity of the low concentration drain region and is formed on the anodic oxide film of the first metal, at the time of ON,
A weak electric field is applied to the semiconductor thin film below the portion of the second gate electrode protruding toward the drain region side, and as a result, the drain of the second gate electrode is drained. An inversion layer is formed on the surface of the semiconductor thin film below the portion protruding toward the region side. Therefore,
At the time of turning on, the resistance between the first gate electrode and the drain region can be reduced, and a decrease in on-current caused by adopting the offset gate structure can be suppressed. On the other hand, at the time of off, the electric field strength at the drain end is weakened due to the anodic oxide film of the first metal and the gate insulating film existing under the portion of the second gate electrode protruding toward the drain region, The current drops.

As described above, the first gate electrode is made of the first metal, the second gate electrode is made of the second metal, and the first metal is used as the anodizable metal. The metal of No. 1 as an anodizable metal, and by making the anodization rate of the first metal higher than the anodization rate of the second metal, a thin film semiconductor device having excellent characteristics as described above can be obtained. It can be formed by one-time anodic oxidation and one-time ion implantation or impurity introduction into the semiconductor thin film by ion doping. Further, the offset amount between the first gate electrode and the high-concentration drain region, the width of the low-concentration drain region, the protrusion amount of the second gate electrode toward the drain region side, etc. are controlled by the anodizing conditions. , Can be controlled with high precision.

A metal laminate in which a second metal having the same shape as the first metal is laminated on the first metal formed before anodization is formed from a film made of the first metal and a second metal. Can be easily formed by continuously forming a film made of the first metal and then continuously etching away the film made of the first metal and the film made of the second metal using a single resist. .

Further, in this way, the first gate electrode,
Anodic oxide film of the first metal on both sides of the first gate electrode, a second gate electrode on the first gate electrode, and anodization of a second metal on the upper surface and both sides of the second gate electrode. A film is formed, the second gate electrode is wider than the first gate electrode and protrudes on both sides of the first gate electrode, and the protruding portions are located on the anodic oxide film of the first metal. However, the edges of the anodic oxide film on both sides of the first metal are
Since they are outside the end portions of the second metal anodic oxide film on both sides of the gate electrode and have a step shape, disconnection of data lines and the like formed on them is less likely to occur.

Further, preferably, the first metal is tantalum and the second metal is aluminum.

By doing so, since the lattice constants and crystal structures of tantalum and aluminum are different from each other, the gate electrode in which these two metals are stacked one above the other has excellent maskability during ion implantation. As a result, the film thickness of the entire gate electrode can be reduced, and disconnection of data lines and the like formed on the gate electrode is less likely to occur.

Further, since the etching characteristic of tantalum and the etching characteristic of aluminum are different, the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics is
Difficult to break during manufacturing.

Furthermore, since aluminum having a low electric resistance is used on tantalum, the resistance of the entire gate electrode (gate line) is lowered.

When aluminum is anodized, its surface is covered with aluminum oxide.
As described above, when the surface of aluminum is covered with aluminum oxide, aluminum can be used as a mask for ion implantation during subsequent ion implantation. When manufacturing a C-MOS structure using an ion implantation apparatus, when implanting impurities of one conductivity type, it is necessary to mask a region into which impurities of the other conductivity type are implanted. In the case of ion implantation, a resist is usually used as such a mask. However, in ion doping without mass separation, since a large amount of ions are implanted, the temperature becomes high during doping, and it is difficult to use a resist as a mask for ion doping. Even in the ion implantation method using mass separation, when the ion implantation is performed while the substrate temperature is kept high from about 200 ° C to about 400 ° C, the activation of the ions after implantation may be performed at a low temperature of about 350 ° C or less. It will be possible. Also in this case, the resist cannot be used as a mask.
A suitable material to be used in place of the resist in such a case is aluminum. Aluminum can withstand temperatures up to 300 ° C, which is reached during doping, and
This is because the charge at the time of doping can be quickly released to the ground. However, if aluminum is used for the gate and aluminum is used as the mask for ion doping, the aluminum of the gate electrode is also etched when the mask for ion doping is patterned. It has been difficult to use aluminum as a mask. However, when the aluminum surface of the gate electrode is covered with aluminum oxide in this way,
When the ion doping mask is subsequently patterned, the aluminum under the aluminum oxide is not etched, so that the aluminum can be used as the ion doping mask.

When the aluminum surface of the gate electrode is covered with aluminum oxide, aluminum can be used for the data lines and the like formed on the gate electrode, and the wiring resistance of both the gate line and the data line is increased. Is smaller, the wiring resistance of the entire device can be reduced.

Further, when the surface of aluminum is covered with aluminum oxide, hillocks of aluminum are less likely to occur even after the subsequent heating step.

When the first metal is tantalum, it is particularly effective when the gate insulating film is an insulating film formed by the chemical vapor deposition method. That is, when a thin film semiconductor is manufactured by a low temperature process, the gate insulating film is preferably formed by the chemical vapor deposition method. However, the gate insulating film formed by the chemical vapor deposition method is thermally oxidized. The film quality is inferior to that of the film, and when aluminum is formed on such a gate insulating film by sputtering or the like to form a gate electrode, aluminum enters the insulating film and the transistor characteristics such as the threshold value (Vth) vary. I will end up. On the other hand, when tantalum is used for the lower electrode of the gate electrode, the transistor characteristics such as the threshold value (Vth) almost change even if the gate electrode is formed on the gate insulating film formed by the chemical vapor deposition method. Moreover, a thin film transistor having excellent characteristics can be stably manufactured.

Further, according to the present invention, a semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by a chemical vapor deposition method, and formed on the gate insulating film. A first gate electrode made of tantalum, first and second tantalum oxide films formed on both sides of the first gate electrode by anodizing tantalum, and a second gate electrode made of aluminum. The width of the second gate electrode is larger than the width of the first gate electrode, and the second gate electrode has a central portion in the width direction and first and second portions on both sides of the central portion. A side portion, the central portion of the second gate electrode has the same width as the first gate electrode, and the central portion is in contact with the first gate electrode directly above the first gate electrode. Is provided in the second Wherein both sides of the gate electrode of the first and second
Side portions of the first and second gate electrodes project from the first end position and the second end position in the width direction of the first gate electrode by first and second predetermined distances, respectively. Of the second gate electrode respectively provided on the tantalum oxide film and aluminum oxide formed by anodizing aluminum to cover the second gate electrode on the upper surface and the side surface of the second gate electrode. The membrane and the first
Drain region provided in the semiconductor thin film at a third predetermined distance from the gate electrode, and a source region provided in the semiconductor thin film opposite to the drain region with respect to the first gate electrode. And a thin film semiconductor device.

The thin film semiconductor device having such a structure can be manufactured by performing ion implantation once for forming the drain region and the source region.

In the present invention, the semiconductor thin film is provided with a gate insulating film formed by the chemical vapor deposition method, and the first gate electrode made of tantalum is formed on the gate insulating film. Therefore, even if the gate electrode is formed on the gate insulating film formed by the chemical vapor deposition method, the transistor characteristics such as the threshold value (Vth) hardly change, and a thin film transistor having excellent characteristics can be stably manufactured.

A second gate electrode made of aluminum is provided on the tantalum gate electrode. Therefore, due to the difference in the lattice constant and the crystal structure between tantalum and aluminum, the gate electrode in which these two metals are stacked on each other has an excellent masking property for ion implantation, and as a result, the thickness of the entire gate electrode can be reduced. As a result, disconnection of the data line and the like formed on it is less likely to occur. Further, since the etching characteristics of tantalum and aluminum are different, it is difficult for the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics to be broken during manufacture. Further, since aluminum having a low electric resistance is used on the tantalum, the resistance of the entire gate electrode (gate line) becomes low.

Further, since aluminum is anodized and the aluminum oxide film formed on the upper surface and the side surface of the second gate electrode so as to cover the second gate electrode is provided, the ion implantation for raising the substrate temperature is performed. In doing so, aluminum can be used as a mask for ion implantation. Further, when the surface of the aluminum of the gate electrode is covered with aluminum oxide, aluminum can be used also for the data lines and the like formed thereon,
The wiring resistance of the entire element can be reduced. Furthermore, when the surface of aluminum is covered with aluminum oxide, hillocks of aluminum are less likely to occur even after the subsequent heating step.

Further, since the drain region provided in the semiconductor thin film is provided at a third predetermined distance from the first gate electrode, an offset gate structure is formed and when the gate voltage V _gs is turned off. The off-leakage current can be remarkably suppressed, and the breakdown voltage between the source and the drain can be increased. As a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, the first side portion of the second gate electrode formed on the first gate electrode protrudes from the first gate electrode toward the drain region for the first predetermined distance, and the first tantalum oxide is formed. Since it is provided on the film, when it is turned on, the second side of the protruding second gate electrode is
A weak electric field is applied to the semiconductor thin film under the first side of the gate electrode of the, so that an inversion layer (channel) is formed on the surface of this semiconductor thin film. Therefore, at the time of ON, the resistance between the first gate electrode and the drain region can be reduced, and the decrease of ON current caused by adopting the offset gate structure can be suppressed. On the other hand, when the transistor is off, the electric field at the drain end becomes weak, so the off current is kept low.

Also in this thin-film semiconductor device, the semiconductor thin film between the first gate electrode and the drain region is further provided with a low-concentration drain region having a lower impurity concentration than that of the drain region. The gate electrode may be provided so as to be separated from the gate electrode by a fourth predetermined distance and be electrically connected to the drain region. When such a low-concentration drain region is provided, the resistance between the first gate electrode and the drain region is reduced by the low-concentration drain region even if the drain region is formed further apart from the first gate electrode. it can. Therefore, the off-leakage current when the gate voltage V _{gs is set} to the off side can be sufficiently suppressed while further suppressing the decrease of the on-current. Further, by providing such a low-concentration drain region, the breakdown voltage between the source and drain can be increased, and as a result, the channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased. You can

According to the present invention, a semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by a chemical vapor deposition method, and a gate insulating film formed on the gate insulating film. A first gate electrode made of tantalum, first and second tantalum oxide films formed on both sides of the first gate electrode by anodizing tantalum, and a second gate electrode made of aluminum. The width of the second gate electrode is larger than the width of the first gate electrode, and the second gate electrode has a central portion in the width direction and first and second portions on both sides of the central portion. A side portion, the central portion of the second gate electrode has the same width as the first gate electrode, and the central portion is in contact with the first gate electrode directly above the first gate electrode. Is provided in the second Wherein both sides of the gate electrode of the first and second
Side portions of the first and second gate electrodes project from the first end position and the second end position in the width direction of the first gate electrode by first and second predetermined distances, respectively. Of the second gate electrode respectively provided on the tantalum oxide film and aluminum oxide formed by anodizing aluminum to cover the second gate electrode on the upper surface and the side surface of the second gate electrode. The membrane and the first
Is formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, and the high-concentration drain region provided in the semiconductor thin film at a third predetermined distance from the gate electrode. A low-concentration drain region having a lower impurity concentration than the high-concentration drain region, the low-concentration drain region being provided at a fourth predetermined distance from the first gate electrode and being in contact with the high-concentration drain region. A high-concentration source provided in the high-concentration drain region and the semiconductor thin film on the side opposite to the high-concentration drain region with respect to the first gate electrode, at a fifth predetermined distance from the first gate electrode. A low-concentration source region formed in the semiconductor thin film between the region and the first gate electrode and the high-concentration source region and having a lower impurity concentration than the high-concentration source region, A thin film semiconductor device is provided, which is formed with a sixth predetermined distance from a first gate electrode, and includes a low concentration source region formed in contact with the high concentration source region. It

The thin film semiconductor device having this structure also includes a gate insulating film formed on the semiconductor thin film by the chemical vapor deposition method, and the first insulating film made of tantalum is formed on the gate insulating film.
Forming the gate electrode. Therefore, even if the gate electrode is formed on the gate insulating film formed by the chemical vapor deposition method, the transistor characteristics such as the threshold value (Vth) hardly change, and a thin film transistor having excellent characteristics can be stably manufactured.

A second gate electrode made of aluminum is provided on the tantalum gate electrode. Therefore, due to the difference in the lattice constant and the crystal structure between tantalum and aluminum, the gate electrode in which these two metals are stacked on each other has an excellent masking property for ion implantation, and as a result, the thickness of the entire gate electrode can be reduced. As a result, disconnection of the data line and the like formed on it is less likely to occur. Further, since the etching characteristics of tantalum and aluminum are different, it is difficult for the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics to be broken during manufacture. Further, since aluminum having a low electric resistance is used on the tantalum, the resistance of the entire gate electrode (gate line) becomes low.

Further, since aluminum is anodized and an aluminum oxide film is formed on the upper surface and the side surface of the second gate electrode so as to cover the second gate electrode, when performing ion implantation at high temperature. It will also be possible to use aluminum as a mask for ion implantation. Also,
When the aluminum surface of the gate electrode is covered with aluminum oxide, aluminum can be used also for the data lines and the like formed thereon, and the wiring resistance of the entire element can be reduced. Furthermore, when the surface of aluminum is covered with aluminum oxide, hillocks of aluminum are less likely to occur even after the subsequent heating step.

Further, since the high-concentration drain region provided in the semiconductor thin film is provided at a third predetermined distance from the first gate electrode, an offset gate structure is formed, and the gate voltage V _gs is turned off. Off-leakage current can be suppressed at the same time, and the source-drain breakdown voltage is also increased. As a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, the first side portion of the second gate electrode formed on the first gate electrode protrudes from the first gate electrode toward the high-concentration drain region for the first predetermined distance to form the first side portion.
Since it is provided on the tantalum oxide film, the weak electric field is applied to the semiconductor thin film below the first side portion of the second gate electrode by the protruding first side portion of the second gate electrode when turned on. As a result, an inversion layer (channel) is formed on the surface of this semiconductor thin film. Therefore, at the time of turning on, the resistance between the first gate electrode and the high-concentration drain region can be reduced, and a decrease in on-current caused by adopting the offset gate structure can be suppressed. On the other hand, at the time of off, the electric field strength at the drain end is weakened to reduce the off current.

In this thin film semiconductor device,
The semiconductor thin film between the first gate electrode and the high-concentration drain region is further provided with a low-concentration drain region having an impurity concentration lower than that of the high-concentration drain region, and the low-concentration drain regions are formed from the first gate electrode to the fourth gate electrode. Since it is provided so as to be separated by a predetermined distance and is provided in contact with the high-concentration drain region,
Even if the high-concentration drain region is formed apart from the first gate electrode, the resistance between the first gate electrode and the high-concentration drain region can be reduced by the low-concentration drain region. Therefore, it is possible to sufficiently suppress the off leak current when the gate voltage V _{gs is set} to the off side while suppressing the decrease of the on current. Further, by providing such a low-concentration drain region, the breakdown voltage between the source and drain can be increased, and as a result, the channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased. You can

Preferably, the high-concentration drain region is formed in the semiconductor thin film under the gate insulating film, and the low-concentration drain region is formed in the semiconductor thin film under the first tantalum oxide film and the gate insulating film. Is a polycrystalline silicon thin film, the gate insulating film is a silicon oxide film formed by chemical vapor deposition, and the thickness of the silicon oxide film is t _ox.
(Å) and the thickness of the first tantalum oxide film is t
_{When Taox} (Å) is set, (a · t _ox ² + b · t _ox ) × 1.28 <t _Taox , t _Taox <(a · t _ox ² + b · t _ox ) × 3.09 (where, a = −8.88889 × 10 ⁻⁵ (Å ⁻¹ ), b
= 0.44. ) Relationship is met.

When the film thickness of the gate insulating film made of a silicon oxide film and the film thickness of the first tantalum oxide film satisfy the above relationship, a high concentration drain region and a low concentration drain region are formed by ion implantation through these films. When the drain region is formed, a thin film semiconductor device having a practically excellent structure is manufactured.
If t _Taox is smaller than (a · t _ox ² + b · t _ox ) × 1.28, the impurity concentration of the low-concentration drain region becomes too high, and the off-leak current when the gate voltage V _{gs is set} to the off side is reduced. It will flow. In addition, t _Taox is (a · t _ox ² + b
If it is larger than _tox ) × 3.09, the impurity concentration of the low concentration drain region becomes too low and the on-current becomes too low.

Further, according to the present invention, a semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by a chemical vapor deposition method, and formed on the gate insulating film. A first gate electrode made of tantalum, a second gate electrode made of aluminum formed on the first gate electrode, drain regions formed on the semiconductor thin film on both sides of the first gate electrode, and A thin film semiconductor device is provided, which comprises: a source region.

The thin film semiconductor device having this structure is provided with a gate insulating film formed on the semiconductor thin film by the chemical vapor deposition method, and a first layer made of tantalum is formed on the gate insulating film.
Forming the gate electrode. Therefore, even if the gate electrode is formed on the gate insulating film formed by the chemical vapor deposition method, the transistor characteristics such as the threshold value (Vth) hardly change, and a thin film transistor having excellent characteristics can be stably manufactured.

A second gate electrode made of aluminum is provided on the tantalum gate electrode. Therefore, due to the difference in the lattice constant and the crystal structure between tantalum and aluminum, the gate electrode in which these two metals are stacked on each other has an excellent masking property for ion implantation, and as a result, the thickness of the entire gate electrode can be reduced. As a result, disconnection of the data line and the like formed on it is less likely to occur. Further, since the etching characteristics of tantalum and aluminum are different, it is difficult for the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics to be broken during manufacture. Further, since aluminum having a low electric resistance is used on the tantalum, the resistance of the entire gate electrode (gate line) becomes low.

In this thin film semiconductor device, preferably, tantalum is anodized to form a tantalum oxide film formed on both sides of the first gate electrode, and aluminum is anodized to form an upper surface of the second gate electrode. And the second on the side
And an aluminum oxide film formed so as to cover the gate electrode.

As described above, since the aluminum is anodized and the aluminum oxide film formed to cover the second gate electrode is formed on the upper surface and the side surface of the second gate electrode, ion implantation at high temperature is performed. In doing so, aluminum can be used as a mask for ion implantation.
Further, when the aluminum surface of the gate electrode is covered with aluminum oxide, aluminum can be used also for the data lines and the like formed thereon, and the wiring resistance of the entire element can be reduced. Furthermore, when the surface of aluminum is covered with aluminum oxide, hillocks of aluminum are less likely to occur even after the subsequent heating step.

Further, according to the present invention, the step of forming a semiconductor thin film on an insulating substrate, the step of forming a gate insulating film on the semiconductor thin film, and the formation of a first gate electrode on the gate insulating film. The first gate electrode is a second gate electrode that is wider than the first gate electrode and has a central portion and first and second side portions on both sides of the central portion in the width direction. Formed on the first gate electrode, the central portion having the same width as the first gate electrode, which is the central portion of the second gate electrode, is provided immediately above the first gate electrode.
The first side portion and the second side portion of the second gate electrode in the width direction are located at the position of the first end portion and the second end of the first gate electrode in the width direction. A step of projecting from each position in the width direction, and using the second gate electrode and the first gate electrode as a mask, introducing impurities into the semiconductor thin film by an ion implantation method, And a step of forming an impurity region for a source region and an impurity region for a drain region in the semiconductor thin film on both sides of the gate electrode, respectively.

In the present manufacturing method, a second gate electrode is formed on the first gate electrode, the first side portion of the second gate electrode is projected from the first gate electrode, and these are formed. Using the first gate electrode and the second gate electrode as a mask, impurities are introduced into the semiconductor thin film by an ion implantation method to form an impurity region for a drain region. Therefore, the impurity region for the drain region is formed apart from the first gate electrode. Then, since the drain region impurity region is activated to become the drain region, the final thin film semiconductor device has an offset gate structure in which the drain region is separated from the first gate electrode. Therefore, the off-leakage current can be suppressed when the gate voltage V _gs is turned off. In addition, the breakdown voltage between the source and drain is increased, and as a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, since the second gate electrode is formed on the first gate electrode and the first side portion of the second gate electrode is projected from the first gate electrode, at the time of turning on,
The first side of the second gate electrode exerts a weak electric field on the semiconductor thin film below the first side of the second gate electrode, so that the first side of the second gate electrode An inversion layer (channel) is formed on the surface of the underlying semiconductor thin film.
Therefore, at the time of ON, the resistance between the first gate electrode and the drain region can be reduced, and the decrease of ON current caused by adopting the offset gate structure can be suppressed. On the other hand, when it is off, the electric field strength at the drain end is weakened to reduce the off current.

As described above, in the present manufacturing method, the drain region is provided with an offset gate structure spaced apart from the first gate electrode, and the second gate electrode is provided on the first gate electrode. By projecting the first side portion of the second gate electrode toward the drain region side, it is possible to suppress the off-leakage current when the gate voltage V _{gs is set} to the off side, and it is caused by adopting the offset gate structure. A thin film semiconductor device having a structure capable of suppressing a decrease in on-current can be manufactured by performing ion implantation once for forming a drain region and a source region.

Further, according to the present invention, the step of forming a semiconductor thin film on an insulating substrate, the step of forming a gate insulating film on the semiconductor thin film, the first gate electrode on the gate insulating film and the A first insulating film and a second insulating film on both sides of the first gate electrode are formed, respectively, and have a width wider than that of the first gate electrode, and a central portion in the width direction and first and second insulating layers on both sides of the central portion. A second gate electrode having two sides is formed on the first gate electrode, and the second gate electrode has the same width as the first gate electrode in the central portion of the second gate electrode. A central portion is provided directly above the first gate electrode, and the first side portion and the second side portion in the width direction of the second gate electrode are formed in the width of the first gate electrode. Of the first end and the position of the second end in the direction From the first insulating film and the second insulating film such that the outer end of the first side portion is more protruded than the outer end of the first insulating film on the first insulating film and the second insulating film. Providing each of the second gate electrode, the second gate electrode, and the second and third gate electrodes so that the inner end of the second insulating film is located inside the outer end of the second insulating film; Impurity is introduced into the semiconductor thin film by an ion implantation method using the insulating film and the first gate electrode as a mask, and the high-concentration drain is formed in the semiconductor thin film below the gate insulating film outside the first insulating film. An impurity region for a region, an impurity region for a low-concentration drain region having a lower impurity concentration than the high-concentration drain region in the semiconductor thin film below the first insulating film outside the second gate electrode, The outside of the insulating film of No. 2 A high-concentration source region impurity region in the semiconductor thin film below the insulating film, and a lower impurity concentration in the semiconductor thin film below the second insulating film outside the second gate electrode than in the high-concentration source region. And a step of forming impurity regions for low-concentration source regions each having a high concentration, and a method for manufacturing a thin film semiconductor device is provided.

In this manufacturing method, the first gate electrode and the first gates on both sides of the first gate electrode are formed on the gate insulating film.
And a second insulating film are respectively formed, a second gate electrode having a width wider than that of the first gate electrode is formed on the first gate electrode, and the first side portion of the second gate electrode is formed. First
Is provided so as to protrude from the gate electrode of the first insulating film so that the outer end portion of the first side portion is on the inner side of the outer end portion of the first insulating film. Impurities are introduced into the semiconductor thin film by an ion doping method using the gate electrode, the first insulating film, and the first gate electrode as a mask,
An impurity region for the high-concentration drain region is formed in the semiconductor thin film below the gate insulating film outside the first insulating film, and a high-concentration drain region is formed in the semiconductor thin film below the first insulating film outside the second gate electrode. Also form the impurity regions for the low-concentration drain region having the low impurity concentration. Further, the impurity regions for the high concentration drain region and the impurity regions for the low concentration drain region are then activated by heat treatment or the like,
A high concentration drain region and a low concentration drain region, respectively.

Therefore, in the thin-film semiconductor device manufactured in this way, the high-concentration drain region has an offset gate structure separated from the first gate electrode, so that when the gate voltage V _gs is turned off. In addition, off-leakage current can be suppressed. In addition, the breakdown voltage between the source and drain is increased, and as a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, since the low-concentration drain region is formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, the reduction of the on-current can be suppressed and the breakdown voltage between the source and the drain can be increased. And as a result,
The channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased.

Further, a second gate electrode is formed on the first gate electrode, and the first side portion of the second gate electrode is projected from the first gate electrode so as to be formed on the first insulating film. Since it is formed, the first gate electrode of the second gate electrode is turned on when it is turned on.
Of the semiconductor film under the first side of the second gate electrode, a weak electric field is applied to the surface of the semiconductor thin film under the first side of the second gate electrode. An inversion layer (channel) is created. Therefore, at the time of turning on, the resistance between the first gate electrode and the high-concentration drain region can be reduced, and a decrease in on-current caused by adopting the offset gate structure can be suppressed. On the other hand, when it is off, the electric field at the drain end can be weakened to reduce the off current.

Further, in the present manufacturing method, the first gate electrode and the first and second insulating films on both sides of the first gate electrode are formed on the gate insulating film, and A second gate electrode having a wide width is formed on the first gate electrode, and the first side portion and the second side portion of the second gate electrode are formed on the first insulating film and the second insulating film. The outer edge of the first side portion is inside the outer edge portion of the first insulating film, and the outer edge portion of the second side portion is inner than the outer edge portion of the second insulating film. Since each of them is provided so as to have a stepped shape, disconnection of a data line or the like formed on these is less likely to occur.

In this manufacturing method, the thin-film semiconductor device having the above-mentioned excellent characteristics can be manufactured by one-time ion implantation.

According to the present invention, the step of forming a semiconductor thin film on an insulating substrate, the step of forming a gate insulating film on the semiconductor thin film, and the first anodizable first metal on the gate insulating film. And a second metal film made of a second metal that is anodizable and that has an anodization rate lower than that of the first metal and that is substantially the same as the first metal film. A second layer having the same width and laminated on the first metal film
A step of forming a metal film laminated body made of the metal film, and a step of anodizing the metal film laminated body to form a first gate electrode made of the first metal and a first gate electrode on both sides of the first gate electrode. A first and a second anodic oxide film are formed on the gate insulating film, are made of the second metal and have a width wider than that of the first gate electrode, and a central portion and both sides of the central portion in the width direction. A second gate electrode having first and second side portions of the second gate electrode, the central portion being the central portion of the second gate electrode and having the same width as the first gate electrode. Directly above the gate electrode, and the first side portion and the second side portion in the width direction of the second gate electrode are a first end portion in the width direction of the first gate electrode. From the position of and the position of the second end in the width direction, respectively. Are formed on the first gate electrode so as to be respectively located on the first anodic oxide film and the second anodic oxide film, and on the first side portion of the second gate electrode. A third anodic oxide film is formed on the central portion and the second side portion, and a fourth anodic oxide film is formed on a side surface of the second gate electrode outside the first side portion. The outer edge of the fourth anodic oxide film is formed to be inside the outer edge of the first anodic oxide film, and the outer edge of the second side portion of the second gate electrode is formed. 5th on the side
Forming the anodic oxide film so that the outer end portion of the fifth anodic oxide film is inside the outer end portion of the second anodic oxide film, the second gate electrode, and Impurities are introduced into the semiconductor thin film by an ion implantation method using the third to fifth anodic oxide films, the first and second anodic oxide films, and the first gate electrode as a mask to form the first anode. An impurity region for high-concentration drain region is formed in the semiconductor thin film below the gate insulating film outside the oxide film, and in the semiconductor thin film below the first anodic oxide film outside the fourth anodic oxide film. An impurity region for the low-concentration drain region having a lower impurity concentration than the impurity region for the high-concentration drain region is formed in the semiconductor thin film below the gate insulating film outside the second anodic oxide film in the high-concentration source region impurity region. The fifth anode Forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region in the semiconductor thin film below the second anodic oxide film outside the oxide film. A method for manufacturing a thin film semiconductor device is provided.

In this manufacturing method, the first gate electrode made of the first metal and the first and second anodic oxide films on both sides of the first gate electrode are formed on the gate insulating film, and the second gate electrode is formed. A second gate electrode made of the same metal and wider than the first gate electrode
Forming a gate electrode on the first gate electrode, forming a second side portion of the second gate electrode on the first anodic oxide film so as to protrude from the first gate electrode, and forming a second gate electrode on the first gate electrode. A third anodic oxide film is formed on the first side part, the central part and the second side part of the electrode, and a fourth anodic oxide film is formed on the outer side surface of the first side part. The outer edge of the anodic oxide film is located inside the outer edge of the first anodic oxide film,
Then, impurities are introduced into the semiconductor thin film by an ion doping method using the second gate electrode, the third and fourth anodic oxide films, the first anodic oxide film, and the first gate electrode as a mask, A high-concentration drain region impurity region in the semiconductor thin film under the gate insulating film outside the anodic oxide film, and a high-concentration drain region in the semiconductor thin film under the first anodic oxide film outside the fourth anodic oxide film. The impurity regions for the low-concentration drain region, which have a lower impurity concentration than the impurity region for the impurity, are formed. Further, these impurity regions for the high concentration drain region and the impurity regions for the low concentration drain region are
Then, it is activated by heat treatment or the like to become a high-concentration drain region and a low-concentration drain region, respectively.

Therefore, in the thin-film semiconductor device manufactured in this way, the high-concentration drain region has an offset gate structure separated from the first gate electrode, so that when the gate voltage V _gs is turned off. In addition, off-leakage current can be suppressed. In addition, the breakdown voltage between the source and drain is increased, and as a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, since the low-concentration drain region is formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, the reduction of the on-current can be suppressed and the breakdown voltage between the source and the drain can be increased. And as a result,
The channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased.

Further, a second gate electrode is formed on the first gate electrode, and the first side portion of the second gate electrode is projected from the first gate electrode so that the second gate electrode is formed on the first anodic oxide film. Therefore, when turned on, a weak electric field is applied to the semiconductor thin film below the first side portion of the second gate electrode by the first side portion of the second gate electrode, and as a result, An inversion layer (channel) is formed on the surface of the semiconductor thin film below the first side of the second gate electrode. Therefore, at the time of ON, the resistance between the first gate electrode and the drain region can be reduced, and the decrease of ON current caused by adopting the offset gate structure can be suppressed. On the other hand, when it is off, the electric field at the drain end is reduced, and therefore the off current is reduced.

In this manufacturing method, on the gate insulating film, the first metal film made of the first metal capable of anodizing, and the second metal film capable of anodizing and having a lower anodizing rate than the first metal are formed. And a second metal film made of a metal of
Since the metal film laminated body including the first metal film and the second metal film having substantially the same width as the first metal film is anodized, the first metal film is formed on the gate insulating film by the first metal film. A second gate electrode formed of a second metal and having a width wider than that of the first gate electrode, the first gate electrode being formed of the first metal and the first and second anodic oxide films on both sides of the first gate electrode being formed. Are formed on the first gate electrode, the first side portion of the second gate electrode is formed on the first anodic oxide film so as to protrude from the first gate electrode, and the first side portion of the second gate electrode is formed. A fourth anodic oxide film is formed on the outer side surface of the first side portion so that the outer end of the fourth anodic oxide film is inside the outer end of the first anodic oxide film. The structure can be easily manufactured. Further, the amount of protrusion of the first side portion of the second gate electrode from the first gate electrode, the width of the first anodic oxide film, the width of the fourth anodic oxide film, etc. are controlled by the anodic oxidation conditions. Therefore, it can be controlled accurately. In addition, these second gate electrodes, the third,
Impurities are introduced into the semiconductor thin film by an ion implantation method by using the fourth anodic oxide film, the first anodic oxide film, and the first gate electrode as a mask, and the impurities under the gate insulating film outside the first anodic oxide film are formed. A high-concentration drain region impurity region is provided in the semiconductor thin film, and a low-concentration drain region having a lower impurity concentration than the high-concentration drain region impurity region is provided in the semiconductor thin film below the first anodic oxide film outside the fourth anodic oxide film. Since the impurity regions for use are respectively formed, the positions of these impurity regions can also be controlled accurately by controlling the anodizing conditions.

Further, in this manufacturing method, the first gate electrode made of the first metal and the first and second anodic oxide films on both sides of the first gate electrode are formed on the gate insulating film, A second gate electrode made of a second metal and wider than the first gate electrode is formed on the first gate electrode, and the second gate electrode is formed on the first side portion, the center portion, and the first gate electrode. A second anodic oxide film is formed on the side surface of the second gate electrode, and a fourth anodic oxide film is formed on the outer side surface of the first side portion of the second gate electrode. Is formed so as to be inside the outer end of the first anodized film, and a fifth anodized film is formed on the outer side surface of the second side of the second gate electrode. Since the outer edge of the film is formed so as to be inside the outer edge of the second anodic oxide film, a step shape is formed on top of these. Disconnection of the data lines or the like for forming hardly occurs.

In the present manufacturing method, the thin film semiconductor device having excellent characteristics as described above can be manufactured by one-time ion implantation.

On the gate insulating film, a first metal film made of a first metal that can be anodized and a second metal that can be anodized and has an anodization rate lower than that of the first metal. A metal film laminate, which is a second metal film and includes a second metal film laminated on the first metal film with a width substantially the same as that of the first metal film, is formed on the gate insulating film. A third metal film made of the first metal is formed, and then a fourth metal film made of the second metal is continuously formed on the third metal film,
After that, a resist is selectively formed on the fourth metal film,
Then, using the resist as a mask, the fourth metal film and the third metal film are selectively removed by etching, so that they can be easily formed.

Preferably, the first metal is tantalum, the second metal is aluminum, and the first and second
Is an tantalum oxide film, and the third to fifth anodized films are aluminum oxide films.

In this way, since the lattice constants and crystal structures of tantalum and aluminum are different from each other, the gate electrode in which these two metals are stacked one above the other has excellent masking properties for ion doping. As a result, the film thickness of the entire gate electrode can be reduced, and disconnection of data lines and the like formed on the gate electrode is less likely to occur.

Further, since the etching characteristics of tantalum and the etching characteristics of aluminum are different, the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics is
Difficult to break during manufacturing.

Furthermore, since aluminum having a low electric resistance is used on tantalum, the resistance of the entire gate electrode (gate line) is lowered.

Further, since the surface of aluminum is covered with aluminum oxide obtained by anodizing aluminum, aluminum can be used as a mask for ion doping during subsequent ion doping. Further, when the surface of the aluminum of the gate electrode is covered with aluminum oxide, aluminum can be used also for the data lines and the like formed thereon,
The wiring resistance of the entire element can be reduced. Furthermore, when the surface of aluminum is covered with aluminum oxide, hillocks of aluminum are less likely to occur even after the subsequent heating step.

Further, since the first metal is tantalum,
Even when the gate insulating film is an insulating film formed by the chemical vapor deposition method, the threshold value (V
The transistor characteristics such as th) hardly change and a thin film transistor having excellent characteristics can be stably manufactured.

More preferably, the step of forming the semiconductor thin film on the insulating substrate is the step of forming a polycrystalline silicon thin film on the insulating substrate, and the step of forming the gate insulating film on the semiconductor thin film is the polycrystalline silicon. a step of forming a silicon oxide film by chemical vapor deposition on the thin film, the thickness of the silicon oxide film and t _ox (Å), the thickness of the first anode oxide film was t _Taox (Å) In this case, (a · t _ox ² + b · t _ox ) × 1.28 <t _Taox , t _Taox <(a · t _ox ² + b · t _ox ) × 3.09 (where a = −8.88889) × 10 ^-5 (Å ^-1 ), b
= 0.44. ) Relationship is met.

If the film thickness of the gate insulating film made of a silicon oxide film and the film thickness of the first tantalum oxide film satisfy the above relationship, a high-concentration drain region and a low-concentration drain are formed by ion implantation through these films. When forming a region,
A thin film semiconductor device having a practically excellent structure is manufactured. t
_{If Taox} is smaller than (a · t _ox ² + b · t _ox ) × 1.28, the impurity concentration of the low-concentration drain region becomes too high, and an off-leak current flows when the gate voltage V _gs is turned off. Will end up. Also, t _Taox is (a · t _ox ² + b ·
If it is larger than t _ox ) × 3.09, the impurity concentration of the low-concentration drain region becomes too low, and the on-current becomes too small.

Further, according to the present invention, the step of forming a semiconductor thin film on the insulating substrate, the step of forming a gate insulating film on the semiconductor thin film, and the first anodic oxidizable first layer on the gate insulating film. A first metal film made of the above metal and a second metal film made of a second metal that is difficult to anodize and having a width substantially the same as that of the first metal film and laminated on the first metal film. And a step of forming a metal film laminated body including: and thermally oxidizing the metal film laminated body on the upper surface and the both side surfaces of the second metal film. Thermal oxide films are formed respectively, thermal oxide films of the first metal are formed on both side surfaces of the first metal film, and then the first metal film is anodized to obtain the first metal film. A first gate electrode made of metal and a first gate on both sides of the first gate electrode.
And a second anodic oxide film are formed on the gate oxide film, are made of the second metal and have a width wider than that of the first gate electrode, and a central portion and both sides of the central portion in the width direction are formed. A second gate electrode having first and second side portions, the central portion being the central portion of the second gate electrode and having the same width as the first gate electrode;
Directly above the gate electrode, and the first side portion and the second side portion in the width direction of the second gate electrode are a first end portion in the width direction of the first gate electrode. Of the first gate electrode and the second end portion of the first anodic oxide film so as to project in the width direction from the first anodic oxide film and the second anodic oxide film, respectively. The second and third thermal oxide films formed on both sides of the second gate electrode, the outer end portion of the second thermal oxide film being the outer end portion of the first anodic oxide film. Forming the inner edge of the third thermal oxide film so that the outer end portion of the third thermal oxide film is inner than the outer end portion of the second anodic oxide film; First to third thermal oxide films, the first and second anodic oxide films,
And introducing an impurity into the semiconductor thin film by an ion doping method using the first gate electrode as a mask,
An impurity region for a high-concentration drain region is formed in the semiconductor thin film below the gate insulating film outside the first anodic oxide film,
An impurity region for a low-concentration drain region having a lower impurity concentration than the impurity region for a high-concentration drain region is formed in the semiconductor thin film below the first anodic oxide film outside the second thermal oxide film, A high-concentration source region impurity region in the semiconductor thin film below the gate insulating film outside the anodic oxide film, and the semiconductor thin film below the second anodic oxide film outside the third thermal oxide film. And forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region, respectively.

When the gate electrode is made of the first metal that can be anodized and the second metal that is difficult to anodize, first, the upper surface of the second metal film made of the second metal by thermal oxidation and A thermal oxidation film of the second metal is formed on each side surface, a thermal oxidation film of the first metal is formed on both side surfaces of the first metal film made of the first metal, and then the first metal film is formed. By anodizing, it is possible to avoid the dissolution of the metal that is difficult to anodize during anodization, and to form the first and second anodized films on the side surfaces of the anodizable first metal.

On the gate insulating film, a first metal film made of a first metal that can be anodized and a second metal film made of a second metal that is difficult to anodize have a width substantially the same as that of the first metal film. First
And a second metal film laminated on the metal film, the third metal film laminated body including the first metal on the gate insulating film.
Of the second metal film is formed on the third metal film, and then a resist is selectively formed on the fourth metal film. Then, using the resist as a mask, the fourth metal film and the third metal film are selectively removed by etching, so that they can be easily formed.

Also in the thin film semiconductor device manufactured by this manufacturing method, since the high-concentration drain region has an offset gate structure separated from the first gate electrode, an off leak current is generated when the gate voltage V _gs is turned off. Can be suppressed. In addition, the breakdown voltage between the source and drain is increased, and as a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, since the low-concentration drain region is formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, the reduction of the on-current can be suppressed and the breakdown voltage between the source and the drain can be increased. And as a result,
The channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased.

Further, a second gate electrode is formed on the first gate electrode, and the first side portion of the second gate electrode is projected from the first gate electrode so that the second gate electrode is formed on the first anodized film. Therefore, when turned on, a weak electric field is applied to the semiconductor thin film below the first side portion of the second gate electrode by the first side portion of the second gate electrode, and as a result, An inversion layer (channel) is formed on the surface of the semiconductor thin film below the first side of the second gate electrode. Therefore, at the time of ON, the resistance between the first gate electrode and the drain region can be reduced, and the decrease of ON current caused by adopting the offset gate structure can be suppressed. On the other hand, at the time of off, the electric field from the gate applied to the drain end is reduced, and therefore the off current is reduced.

Further, since the manufacturing method of the present invention is stepwise, disconnection of data lines and the like formed thereon is less likely to occur.

Also in this manufacturing method, the thin film semiconductor device having excellent characteristics as described above can be manufactured by one-time ion implantation.

According to the present invention, the step of forming a semiconductor thin film on an insulating substrate, the step of forming a gate insulating film on the semiconductor thin film, and the first anodic oxidizable first layer on the gate insulating film. Forming a first metal film made of the above metal, selectively forming a resist on the first metal film, and selectively etching away the first metal film using the resist as a mask. And a step of selectively forming a second metal film made of the first metal on the gate insulating film, and thereafter, anodizing the second metal film while leaving the resist. Forming a first gate electrode made of the first metal and first and second anodic oxide films on both sides of the first gate electrode on the gate oxide film; and thereafter removing the resist And then the second metal The second gate electrode having a width wider than that of the first gate electrode and having a central portion and first and second side portions on both sides of the central portion in the width direction. The second gate electrode is formed on the first gate electrode, and the center portion of the second gate electrode is the same width as the first gate electrode. The first side portion and the second side portion in the width direction from the first end position and the second end position in the width direction of the first gate electrode to the width In the direction of the first anodic oxide film and the second anodic oxide film on the first anodic oxide film. It becomes the inner side, and the outer end of the second side part is the outer end of the second anodic oxide film. A step of providing each so that the inside than the second gate electrode,
Impurities are introduced into the semiconductor thin film by an ion implantation method using the first and second anodic oxide films and the first gate electrode as a mask to remove the gate insulating film outside the first anodic oxide film. An impurity region for a high-concentration drain region in the semiconductor thin film below, and a high-concentration drain region in the semiconductor thin film below the first anodized film outside the first side portion of the second gate electrode. The impurity region for the low-concentration drain region having a lower impurity concentration than the impurity region for
A high-concentration source region impurity region in the semiconductor thin film below the gate insulating film outside the second anodic oxide film, and a second outside the second side portion of the second gate electrode;
Forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region in the semiconductor thin film below the anodic oxide film. A manufacturing method is provided.

A first metal film made of a first metal capable of anodizing is formed on the gate insulating film, a resist is selectively formed on the first metal film, and the first metal film is formed using the resist as a mask. Of the first metal is selectively removed by etching to form a second metal film of the first metal on the gate insulating film, and then the second metal film is anodized while leaving the resist. By doing so, the first and second anodic oxide films are formed on both sides of the first gate electrode made of the first metal, the upper surfaces of the first and second anodic oxide films and the upper surface of the first gate electrode. Can be easily formed by making them almost the same height. Then, if a second gate electrode made of the second metal and wider than the first gate electrode is formed on the first gate electrode and the first and second anodic oxide films,
The second gate electrode can be easily formed in a state of protruding from the first gate electrode. According to the present manufacturing method, the second metal forming the second gate electrode does not need to be anodizable and can be selected independently of the first metal. Therefore, the second metal can be selected. The width becomes wider.

The width of the first and second anodic oxide films formed on both sides of the first gate electrode made of the first metal, that is, from the end of the first gate electrode to the first and second anodic oxide films. It becomes easy to control the respective distances to the outer end of the anodic oxide film of, and as a result, the first anodic oxide film is used as a mask to perform ion implantation or ion doping in the semiconductor thin film to form the drain region. In this case, it becomes easy to control the distance between the first gate electrode made of the first metal and the drain region.

Also in the thin film semiconductor device manufactured by this manufacturing method, since the high-concentration drain region has an offset gate structure separated from the first gate electrode, an off-leak current is generated when the gate voltage V _gs is turned off. Can be suppressed. In addition, the breakdown voltage between the source and drain is increased, and as a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be increased.

Further, since the low-concentration drain region is formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, the reduction of the on-current can be suppressed and the breakdown voltage between the source and the drain can be increased. And as a result,
The channel can be miniaturized, the on-resistance can be further reduced, and the on-current can be further increased.

Further, a second gate electrode is formed on the first gate electrode, and the first side portion of the second gate electrode is projected from the first gate electrode so that the second gate electrode is formed on the first anodic oxide film. Therefore, when turned on, a weak electric field is applied to the semiconductor thin film below the first side portion of the second gate electrode by the first side portion of the second gate electrode, and as a result, An inversion layer (channel) is formed on the surface of the semiconductor thin film below the first side of the second gate electrode. Therefore, at the time of ON, the resistance between the first gate electrode and the drain region can be reduced, and the decrease of ON current caused by adopting the offset gate structure can be suppressed. On the other hand, when it is off, the electric field strength at the drain end becomes weak, and the off current becomes small.

Further, since the manufacturing method of the present invention is stepwise, disconnection of data lines and the like formed thereon is less likely to occur.

Also in this manufacturing method, the thin film semiconductor device having excellent characteristics as described above can be manufactured by one-time ion implantation.

[0103]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 is a sectional view for explaining a thin film transistor 100 according to a first embodiment of the present invention.

A semiconductor thin film 20 such as polysilicon is selectively formed on the glass substrate 10. The polysilicon thin film 20 is covered with a gate insulating film 40 made of silicon dioxide formed by chemical vapor deposition. A tantalum gate electrode 51 is formed on the upper surface of the polysilicon thin film 20 with the gate insulating film 40 interposed therebetween. On the gate insulating film 40 on both sides of the tantalum gate 51, tantalum oxide films 52, 5 formed by anodizing tantalum.
3 are formed respectively. Tantalum gate electrode 51
An aluminum gate electrode 72 is formed thereon, and aluminum oxide films 81 and 8 formed by anodizing aluminum on the upper surface and both side surfaces of the aluminum gate electrode 72.
2, 83 respectively.

The aluminum gate electrode 72 has a central portion 75.
And side portions 73 and 74 on both sides of the central portion 75. The aluminum gate electrode central portion 75 has the same width as the tantalum gate electrode 51 and is provided directly above the tantalum gate electrode 51 so as to be in contact with the tantalum gate electrode 51. The aluminum gate electrode side portion 73 is formed on the tantalum oxide film 52 so as to project from the end portion of the tantalum gate electrode 51. The aluminum gate electrode side portion 74 is
It is formed on the tantalum oxide film 53 so as to project from the end of the tantalum gate electrode 51.

The polysilicon thin film 20 includes an n ⁺ drain region 23, an n ⁻ drain region 22, an n ⁻ source region 24,
n ⁺ source region 25 and central polysilicon thin film 2
1 is comprised. The n ⁺ drain region 23 is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 52. n ^- drain region 2
2 is formed on the polysilicon thin film 20 under the tantalum oxide film 52 outside the aluminum oxide film 82.
The n ⁺ source region 25 is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 53. The n ⁻ source region 22 is formed of the aluminum oxide film 8
3 is formed on the polysilicon thin film 20 under the tantalum oxide film 53 on the outer side.

In this embodiment, a gate insulating film 40 made of silicon dioxide formed by chemical vapor deposition is provided on the polysilicon thin film 20, and the gate insulating film 4 is formed.
A tantalum gate electrode 51 is formed on 0. Therefore, even if the gate electrode is formed on the gate insulating film 40 made of silicon dioxide formed by the chemical vapor deposition method, the threshold value (V
The transistor characteristics such as th) hardly change and the thin film transistor 100 having excellent characteristics can be stably manufactured.

An aluminum gate electrode 72 is provided on the tantalum gate electrode 51. Therefore, due to the difference in the lattice constant and the crystal structure between tantalum and aluminum, the gate electrode in which these two metals are stacked on each other has an excellent masking property for ion implantation, and as a result, the thickness of the entire gate electrode can be reduced. As a result, disconnection of the data line and the like formed on it is less likely to occur. Also, because the etching characteristics of tantalum and aluminum are different,
A gate electrode having a two-layer structure of two kinds of metals having different etching characteristics is hard to be broken during manufacturing. Further, since aluminum having a low electric resistance is used on the tantalum, the resistance of the entire gate electrode (gate line) becomes low.

Further, aluminum is anodized, and aluminum oxide films 81, 82, and 83 are formed on the upper surface and both side surfaces of the aluminum gate electrode 72 so as to cover the aluminum gate electrode 72, respectively. When implanting, aluminum can be used as a mask for ion implantation. Further, when the surface of the aluminum gate electrode 72 is covered with the aluminum oxide films 81, 82 and 83, aluminum can be used also for the data lines and the like formed thereon,
The wiring resistance of the entire element can be reduced. Furthermore, when the surface of the aluminum gate electrode 72 is covered with the aluminum oxides 81, 82, and 83, hillocks of aluminum are less likely to occur even after the subsequent heating process.

The n ⁺ drain region 23 is formed in the polysilicon thin film 20 apart from the tantalum gate electrode 51, and has an offset gate structure. Therefore, when the gate voltage V _gs is turned off, the off-leakage current can be suppressed, and the withstand voltage between the source and the drain can be increased. As a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be reduced. Can be raised.

[0112] Further, n ^- drain region 22, separated from the tantalum gate 51 in contact with the n ⁺ drain region 23, is formed between the tantalum gate 51 and the n ⁺ drain region 23. When this n ⁻ drain region 22 is provided, n
^{Even if the +} drain region 23 is formed so as to be separated from the tantalum gate electrode 51, the resistance between the tantalum gate electrode 51 and the n ⁺ drain region 23 is increased by the n ⁻ drain region 22.
Can be made smaller. Therefore, it is possible to suppress the off leakage current when the gate voltage V _{gs is set} to the off side while suppressing the decrease of the on current. Further, by providing such an n ⁻ drain region 22, the breakdown voltage between the source and the drain can be increased, and as a result, the channel can be miniaturized.
The on resistance can be further reduced, and the on current can be further increased.

In the present embodiment, the side portion 73 of the aluminum gate electrode 72 formed on the tantalum gate electrode 51 is further formed on the tantalum oxide film 52 so as to project from the end portion of the tantalum gate electrode 51. Therefore, when turned on, a weak electric field is applied to the polysilicon thin film 21 under the aluminum gate electrode side portion 73 by the protruding aluminum gate electrode side portion 73, and as a result, an inversion layer is formed on the surface of the polysilicon thin film 21. (Channel) is formed, and an electrical n ⁻ region 26 is formed. Similarly, since the side portion 74 of the aluminum gate electrode 72 formed on the tantalum gate electrode 51 is formed on the tantalum oxide film 53 so as to protrude from the end portion of the tantalum gate electrode 51, the side portion 74 protrudes at the time of turning on. A weak electric field is applied to the polysilicon thin film 21 under the aluminum gate electrode side portion 74 by the aluminum gate electrode side portion 74, and as a result, an inversion layer is formed on the surface of the polysilicon thin film 21 and the electrical n ⁻ region 27 is formed. Is formed. Thus, when turned on, the protruding aluminum gate electrode side portion 73 forms the electrical n ⁻ region 26 on the surface of the polysilicon thin film 21, so that the tantalum gate electrode 51 and the n ⁻ drain region 22, n ^+. Drain region 23
It is possible to reduce the resistance between the gate electrode and the gate electrode, and it is possible to suppress the decrease in the on-current caused by adopting the offset gate structure. On the other hand, at the time of off, the electric field strength at the drain end is weakened and the off current is reduced.

Further, as described above, the tantalum gate electrode 5 is
1, tantalum oxide films 52 and 53 on both sides of the tantalum gate electrode 51, an aluminum gate electrode 72 on the tantalum gate electrode 51, and an aluminum gate electrode 72.
Of the aluminum oxide films 81, 82 on the upper surface and both side surfaces of the
And the aluminum gate electrode 72 is wider than the tantalum gate electrode 51 and protrudes on both sides of the tantalum gate electrode 51. The protruding portions are located on the tantalum oxide films 52 and 53. 52,
The end portions of 53 are outside the end portions of the aluminum oxide films 82 and 83 on both side surfaces of the aluminum gate electrode 72, and have a step shape. Breakage is less likely to occur.

This thin film transistor 100 is manufactured as follows.

FIG. 2 is a cross-sectional view for explaining the method of manufacturing the thin film transistor according to the first embodiment of the present invention.

First, as shown in FIG. 2A, the glass substrate 1
0 is selectively formed on the polysilicon thin film 20, and a gate insulating film 40 made of silicon dioxide is formed on the polysilicon thin film 20 by a chemical vapor deposition method.
The tantalum film 60 is formed on the aluminum film 0 by the sputtering method, the aluminum film 70 is formed on the tantalum film 60 by the sputtering method, and the resist 15 is selectively formed on the aluminum film 70.

Next, as shown in FIG. 2B, the resist 15
With the mask as the aluminum film 70 and the tantalum film 6
0 is selectively removed by etching to form a metal film laminate 67 including a tantalum film 61 and an aluminum film 71 having the same width.
To form Then, the resist 15 is removed.

Next, as shown in FIG. 2C, the metal film laminate 67 is anodized to form a tantalum gate electrode 51 on the gate insulating film 40 and tantalum oxide films 52 and 53 on both sides of the tantalum gate 51, respectively. Then, an aluminum gate electrode 72 is formed on the tantalum gate electrode 51, and aluminum oxide films 81, 82 and 83 are formed on the upper surface and both side surfaces of the aluminum gate electrode 72, respectively.

Next, as shown in FIG. 2D, the tantalum gate electrode 51, the tantalum oxide films 52 and 53, the aluminum gate electrode 72, and the aluminum oxide films 81, 82 and 83.
And phosphorus ions are introduced into the polysilicon thin film 20 by ion implantation using the gate insulating film 40 as a mask. In this manner, the single ion implantation forms the n ⁺ drain region impurity region 23 ′ in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 52 and outside the aluminum oxide film 82. Impurity region 22 'for the n ^- drain region is formed in the polysilicon thin film 20 under the tantalum oxide film 52, and the n ⁺ source region is formed in the polysilicon thin film 20 under the gate insulating film 40 outside the tantalum oxide film 53. Impurity regions 25 ′ are formed, and n ⁻ source region impurity regions 2 are formed in the polysilicon thin film 20 below the tantalum oxide film 53 outside the aluminum oxide film 83.
4 'is formed.

Thereafter, heat treatment is performed to activate the ion-implanted impurities, and n ⁺ drain region impurity regions 2 are formed.
3 ′ is an n ⁺ drain region 23, an n ⁻ drain region impurity region 22 ′ is an n ⁻ drain region 22, an n ⁺ source region impurity region 25 ′ is an n ⁺ source region 25, and an n ⁻ source region impurity The thin film transistor 100 of FIG. 1 is formed using the region 24 ′ as the n ⁻ source region 24.

As described above, the thin film transistor 100 of this embodiment can be easily manufactured by adopting a two-layer gate electrode structure in which tantalum having a high anodic oxidation rate is on the lower side and aluminum having a low anodic oxidation rate is on the upper side. It
Moreover, the ion implantation can be performed only once.

In order to form the impurity region 23 ′ for n ⁺ drain region in the polysilicon thin film 20 under the gate insulating film 40 by ion implantation, the peak of the impurity distribution is usually the surface of the polysilicon thin film 20, That is, the accelerating voltage for ion doping is set so as to come to the interface between the gate insulating film 40 and the polysilicon thin film 20. At this time, between the film thickness of the gate insulating film 40, that is, the range x (Å) and the range deviation σ (Å), σ = a · x ² + b · x (1) (where, a = −8.88889 × 10 ⁻⁵ (Å ⁻¹ ), b
= 0.44. ).

Table 1 shows the relationship between the range x, the range deviation σ, and the value of a predetermined multiple of the range deviation.

[0125]

[Table 1]

For example, the gate insulating film 40 has a thickness of 600.
In the case of angstrom, the range x is 600 angstrom, and the peak of the impurity distribution is 600 angstrom from the surface of the gate insulating film 40, that is, at the interface between the gate insulating film 40 and the polysilicon thin film 20. The acceleration voltage for ion doping is set so that At this time, for example, in a portion where the tantalum oxide film 52 having a film thickness of 541 angstroms is formed on the gate insulating film 40, a portion separated by 2.33σ (541 angstroms) from the peak of the impurity distribution is separated from the gate insulating film 40 and the poly. It becomes an interface with the silicon thin film 20.

Next, the concentration of the impurity region 23 ′ for the n ⁺ drain region formed by ion doping so that the peak of the impurity distribution is at the interface between the gate insulating film 40 and the polysilicon thin film 20, A tantalum oxide film 52 having a predetermined thickness is formed on the gate insulating film 40,
1.28σ, 2.33σ from the peak of the impurity distribution, 2.
In each case where 58 σ and 3.09 σ are separated from each other to form an interface between the gate insulating film 40 and the polysilicon thin film 20, the relationship with the concentration of the n ⁻ drain region impurity region 22 ′ formed by ion doping is shown. It shows in Table 2.

[0128]

[Table 2]

From this table, the gate insulating film 40 is located, for example, at a position 2.33σ away from the above peak of the impurity distribution.
And the polysilicon thin film 20 at the interface, the concentration of the n ⁻ drain region impurity region 22 ′ is n.
^It can be seen that the concentration is ⁺ 1.0% of the impurity region 23 'for the drain region.

The concentration of the impurity region 22 ′ for n ⁻ drain region is 1 times the concentration of the impurity region 23 ′ for n ⁺ drain region.
When it is 0% or more, off current flows, which is not preferable. On the other hand, n ^- 'the concentration of, n ⁺ drain region impurity region 23' drain region impurity region 22 0 of the concentration.
If it is 1% or less, even if the n ⁻ drain region 22 is provided,
The resistance between the tantalum gate electrode 51 and the n ⁺ drain region 23 does not become small, and as a result, the on-current is limited, which is not preferable. Therefore, the impurity region 2 for the n ⁻ drain region
The concentration of 2'is preferably higher than 0.1% and lower than 10% of the concentration of the impurity region 23 'for the n ⁺ drain region. That is, the interface between the gate insulating film 40 and the polysilicon thin film 20 is 1.28σ from the peak of the impurity distribution.
When the film thickness of the tantalum oxide film 52 on the gate insulating film 40 is set to be 3.09σ apart, that is, when the film thickness of the tantalum oxide film 52 is t _Taox , 1.28σ <t _Taox <3.09σ It is preferable that the relationship (2) is satisfied.

On the other hand, the thickness of the gate insulating film 40 is t
Assuming that _ox (Å), the film thickness t _ox is equal to the range x. Therefore, from the formulas (1) and (2), the film thickness t _Taox (Å) of the tantalum oxide film 52 and the film of the gate insulating film 40 can be _calculated. relationship between the thickness t _{ox ^{is, (a · t ox 2 +}} b · t ox) × 1.28 <t Taox, ... (3) t Taox <(a · t ox 2 + b · t ox) × 3.09 ... (4) (where a = −8.88889 × 10 ⁻⁵ (Å ⁻¹ ), b
= 0.44. ) Is preferably satisfied.

(Second Embodiment) FIG. 3 is a sectional view for explaining a thin film transistor 100 according to a second embodiment of the present invention.

A polysilicon thin film 20 is formed on the glass substrate 10.
Are selectively formed. The polysilicon thin film 20 is covered with a gate insulating film 40 made of silicon dioxide formed by chemical vapor deposition. A tantalum gate electrode 51 is formed on the upper surface of the polysilicon thin film 20 with the gate insulating film 40 interposed therebetween. Tantalum oxide films 52 and 53 formed by anodizing tantalum are formed on the gate insulating film 40 on both sides of the tantalum gate 51. A chrome gate electrode 91 is formed on the tantalum gate electrode 51.

The chrome gate electrode 91 is composed of a central portion 94 and side portions 52 and 53 on both sides of the central portion 94.
The central portion 94 of the chromium gate electrode is the tantalum gate electrode 51.
It has the same width as and is provided directly above the tantalum gate electrode 51 in contact with the tantalum gate electrode 51. The chromium gate electrode side portion 92 is formed on the tantalum oxide film 52 so as to project from the end portion of the tantalum gate electrode 51. The chromium gate electrode side portion 93 is formed on the tantalum oxide film 53 so as to project from the end portion of the tantalum gate electrode 51.

The polysilicon thin film 20 includes an n ⁺ drain region 23, an n ⁻ drain region 22, an n ⁻ source region 24,
n ⁺ source region 25 and central polysilicon thin film 2
1 is comprised. The n ⁺ drain region 23 is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 52. n ^- drain region 2
2 is formed in the polysilicon thin film 20 below the tantalum oxide film 52 outside the chromium gate electrode 91. n
^{The +} source region 25 is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 53. The n ⁻ source region 22 is formed of the polysilicon thin film 2 below the tantalum oxide film 53 outside the chromium gate electrode 91.
0 is formed.

Also in the present embodiment, the gate insulating film 40 made of silicon dioxide formed by the chemical vapor deposition method is provided on the polysilicon thin film 20, and the gate insulating film 4 is formed.
A tantalum gate electrode 51 is formed on 0. Therefore, even if the gate electrode is formed on the gate insulating film 40 made of silicon dioxide formed by the chemical vapor deposition method, the threshold value (V
The transistor characteristics such as th) hardly change and the thin film transistor 100 having excellent characteristics can be stably manufactured.

A chromium gate electrode 72 is provided on the tantalum gate electrode 51. Therefore, due to the difference in the lattice constant and the crystal structure between tantalum and chromium, the gate electrode in which these two metals are stacked one above the other has excellent maskability for ion implantation, and as a result, the thickness of the entire gate electrode can be reduced. As a result, disconnection of the data line and the like formed on it is less likely to occur. In addition, since the etching characteristics of tantalum and chromium are different, the gate electrode having a two-layer structure of two kinds of metals having different etching characteristics is hard to be broken during manufacturing. Further, since chromium having a low electric resistance is used on tantalum, the resistance of the entire gate electrode (gate line) is reduced.

The n ⁺ drain region 23 is formed in the polysilicon thin film 20 so as to be separated from the tantalum gate electrode 51, and has an offset gate structure. Therefore, when the gate voltage V _gs is turned off, the off-leakage current can be suppressed, and the withstand voltage between the source and the drain can be increased. As a result, the channel can be miniaturized, the on-resistance can be reduced, and the on-current can be reduced. Can be raised.

[0139] Further, n ^- drain region 22, separated from the tantalum gate 51 in contact with the n ⁺ drain region 23, is formed between the tantalum gate 51 and the n ⁺ drain region 23. When this n ⁻ drain region 22 is provided, n
^{Even if the +} drain region 23 is formed so as to be separated from the tantalum gate electrode 51, the resistance between the tantalum gate electrode 51 and the n ⁺ drain region 23 is increased by the n ⁻ drain region 22.
Can be made smaller. Therefore, it is possible to suppress the off leakage current when the gate voltage V _{gs is set} to the off side while suppressing the decrease of the on current. Further, by providing such an n ⁻ drain region 22, the breakdown voltage between the source and the drain can be increased, and as a result, the channel can be miniaturized.
The on resistance can be further reduced, and the on current can be further increased.

Further, in the present embodiment, the chromium gate electrode 91 formed on the tantalum gate electrode 51 is further formed.
Since the side portion 92 of the chrome gate electrode side portion 92 is formed on the tantalum oxide film 52 so as to project from the end portion of the tantalum gate electrode 51, the chrome gate electrode side portion 92 is below the chrome gate electrode side portion 92 when turned on. A weak electric field is applied to the polysilicon thin film 21. As a result, an inversion layer (channel) is formed on the surface of the polysilicon thin film 21, and an electrical n ⁻ region 26 is formed. Similarly, the side portion 9 of the chromium gate electrode 91 formed on the tantalum gate electrode 51 is formed.
Since 3 is formed on the tantalum oxide film 53 so as to project from the end of the tantalum gate electrode 51, at the time of ON,
A weak electric field is applied to the polysilicon thin film 21 under the chromium gate electrode side portion 93 by the projecting chromium gate electrode side portion 93, and as a result, this polysilicon thin film 21 is formed.
An inversion layer (channel) is formed on the surface of and the electrical n ⁻ region 27 is formed. As described above, at the time of turning on, the protruding n ^-side region 92 of the chromium gate electrode forms the electrical n ⁻ region 26 on the surface of the polysilicon thin film 21, so that the tantalum gate electrode 51 and the n ⁻ drain region 22,
It is possible to reduce the resistance between the n ⁺ drain region 23 and the n ⁺ drain region 23, and it is possible to suppress the decrease in the on-current caused by adopting the offset gate structure. On the other hand, when it is off, the electric field at the drain end is weakened, and the off current is reduced.

Further, as described above, the tantalum gate electrode 5 is
1 and tantalum oxide films 52 and 53 on both sides of the tantalum gate electrode 51 and a chrome gate electrode 91 on the tantalum gate electrode 51 are formed. The chrome gate electrode 91 has a width wider than that of the tantalum gate electrode 51. The tantalum oxide film 5 is formed by projecting on both sides of the gate electrode 51, and the projecting portions are located on the tantalum oxide films 52 and 53.
Since the end portions of 2, 53 are outside the end portions of both side portions 92, 93 of the chrome gate electrode 91 and have a step shape, they are formed on these via an interlayer insulating film. Breakage of data lines and the like is less likely to occur.

This thin film transistor 100 is manufactured as follows.

FIG. 4 is a sectional view for explaining the method of manufacturing the thin film transistor according to the second embodiment of the present invention.

First, as shown in FIG. 4A, the glass substrate 1
0 is selectively formed on the polysilicon thin film 20, and a gate insulating film 40 made of silicon dioxide is formed on the polysilicon thin film 20 by a chemical vapor deposition method.
A tantalum film 60 is formed on the silicon oxide film by sputtering, and a resist 15 is selectively formed on the tantalum film 60.

Next, as shown in FIG. 4B, the resist 15
Is used as a mask to selectively remove the tantalum film 60 by etching to form a tantalum film 61.

Next, as shown in FIG. 4C, the resist 15
Then, the tantalum film 61 is anodized with the above remaining to form a tantalum gate electrode 51 and tantalum oxide films 52 and 53 on both sides of the tantalum gate 51 on the gate insulating film 40. Then, the resist 15 is removed.

Next, as shown in FIG. 4D, a chromium gate electrode 9 having a width wider than that of the tantalum gate electrode 51 is formed on the tantalum gate electrode 51 and the tantalum oxide films 52 and 53.
1 is selectively formed by projecting the chromium gate electrode side portions 92 and 93 from the tantalum gate electrode 51. next,
Phosphorus ions are introduced into the polysilicon thin film 20 by an ion implantation method using the chromium gate electrode 91, the tantalum gate electrode 51, the tantalum oxide films 52 and 53, and the gate insulating film 40 as a mask. In this way, by one-time ion implantation, the n ⁺ drain region impurity region 23 ′ is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 52, and the chromium gate electrode 91 is formed.
An impurity region 22 ′ for n ⁻ drain region is formed in the polysilicon thin film 20 under the outer tantalum oxide film 52, and an n ⁺ source is formed in the polysilicon thin film 20 under the gate insulating film 40 outside the tantalum oxide film 53. A region impurity region 25 ′ is formed and n ⁻ is formed in the polysilicon thin film 20 below the tantalum oxide film 53 outside the chromium gate electrode 91.
Impurity regions 22 'for source regions are formed.

Thereafter, heat treatment is performed to activate the ion-implanted impurities, and n ⁺ drain region impurity regions 2 are formed.
3 ′ is an n ⁺ drain region 23, the n ⁻ drain region impurity region 22 ′ is an n ⁻ drain region 22, the n ⁺ source region impurity region 25 ′ is an n ⁺ source region 25, and the n ⁻ source region impurity is The thin film transistor 100 of FIG. 3 is formed using the region 24 ′ as the n ⁻ source region 24.

In the manufacturing method of the present embodiment, the anodizable tantalum film 60 is formed on the gate insulating film 40, the resist 15 is selectively formed on the tantalum film 60, and the resist 15 is masked. As a result, the tantalum film 60 is selectively removed by etching to form a tantalum film 61 on the gate insulating film 50, and then the tantalum film 61 is anodized while the resist 15 is left. 51 on both sides of tantalum oxide film 5
2, 53 can be easily formed by making the upper surfaces of the tantalum oxide films 52, 53 and the upper surface of the tantalum gate electrode 51 substantially at the same height. The chromium gate electrode 9 having a width wider than that of the tantalum gate electrode 51 is formed on the tantalum gate electrode 51 and the tantalum oxide films 52 and 53.
By forming No. 1, the side portions 92 and 93 of the chrome gate electrode can be easily formed in a state of protruding from the tantalum gate electrode 51. According to this manufacturing method, a gate electrode made of a metal such as chromium that is difficult to anodize can be provided on the tantalum gate electrode 51, and the selection range of the metal used for the gate electrode can be widened. Moreover, the ion doping can be performed only once.

FIG. 5 is a sectional view for explaining another method of manufacturing the thin film transistor according to the second embodiment of the present invention.

First, as shown in FIG. 5A, the glass substrate 1
0 is selectively formed on the polysilicon thin film 20, and a gate insulating film 40 made of silicon dioxide is formed on the polysilicon thin film 20 by a chemical vapor deposition method.
A tantalum film 60 is formed on the tungsten film 0 by the sputtering method, a chromium film 90 is formed on the tantalum film 60 by the sputtering method, and the resist 15 is selectively formed on the chromium film 90.

Next, as shown in FIG. 5B, the resist 15
The chrome film 90 and the tantalum film 60 are selectively etched and removed using the mask as a mask to form a metal film laminated body 68 including the tantalum film 61 and the chrome film 95 having the same width. Then, the resist 15 is removed.

Next, as shown in FIG. 5C, the metal film laminate 68 is thermally oxidized to form the tantalum film 6 on the gate insulating film 40.
2 and tantalum oxide films 63 and 6 on both sides of the tantalum film 62.
4 are formed on the tantalum film 62, and the chromium film 9 is formed on the tantalum film 62.
6 is formed, and chromium oxide films 97, 98, 99 are formed on the upper surface and both side surfaces of the chromium film 96, respectively. The chromium film 96 becomes the chromium gate electrode 91.

Next, as shown in FIG. 5D, the tantalum film 6
2 is anodized to form a tantalum gate electrode 51 on the gate insulating film 40 and tantalum oxide films 52 and 53 on both sides of the tantalum gate 51, respectively. Then, phosphorus ions are introduced into the polysilicon thin film 20 by an ion implantation method using the tantalum gate electrode 51, the tantalum oxide films 52 and 53, the chromium gate electrode 51 and the chromium oxide films 97, 98 and 99 as a mask. In this way, by one-time ion implantation, the n ⁺ drain region impurity region 23 ′ is formed in the polysilicon thin film 20 below the gate insulating film 40 outside the tantalum oxide film 52 and outside the chromium oxide film 98. Impurity region 22 ′ for the n ⁻ drain region is formed in the polysilicon thin film 20 under the tantalum oxide film 52, and the n ⁺ source region is formed in the polysilicon thin film 20 under the gate insulating film 40 outside the tantalum oxide film 53. Impurity region 25 '
Then, an impurity region 22 ′ for n ⁻ source region is formed in the polysilicon thin film 20 below the tantalum oxide film 53 outside the chromium oxide film 99.

Thereafter, heat treatment is performed to activate the ion-implanted impurities, and n ⁺ drain region impurity regions 2 are formed.
3 ′ is an n ⁺ drain region 23, the n ⁻ drain region impurity region 22 ′ is an n ⁻ drain region 22, the n ⁺ source region impurity region 25 ′ is an n ⁺ source region 25, and the n ⁻ source region impurity is The thin film transistor 100 is formed using the region 24 ′ as the n ⁻ source region 24.

As described above, even when a metal such as chromium that is difficult to anodize is used, if the surface of chromium is first covered with a thermal oxide film by thermal oxidation, then tantalum is anodized. In this case, dissolution of chromium can be prevented, and even when tantalum and chromium are first continuously formed, the thin film transistor 100 of the present embodiment can be formed by subsequent anodic oxidation. In addition, also in this manufacturing method, the ion implantation may be performed only once.

[0157]

According to the present invention, there is provided a thin film semiconductor device having a simple structure which can be manufactured by one-time ion implantation.
Provided are a thin film semiconductor device that suppresses an off-leakage current and a decrease in an on-current, and a manufacturing method thereof.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a thin film transistor according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the method of manufacturing the thin film transistor according to the first embodiment of the invention.

FIG. 3 is a sectional view for explaining a thin film transistor according to a second embodiment of the present invention.

FIG. 4 is a cross-sectional view for explaining the method of manufacturing the thin film transistor according to the second embodiment of the present invention.

FIG. 5 is a cross-sectional view for explaining another manufacturing method of the thin film transistor according to the second embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a conventional thin film transistor and a method for manufacturing the same.

[Explanation of symbols]

10 ... glass substrate 15 ... resist 20 ... polysilicon thin film 21 ... polysilicon thin film 22 ... n ^- drain region 23 ... n ⁺ drain region 24 ... n ^- source region 25 ... n ⁺ source region 22 '... n ^- drain region impurity region 23 '... n ⁺ drain region impurity region 24' ... n ^- impurity for the source region region 25 '... n ⁺ source region impurity regions 26, 27 ... electric n ^- region 40 ... gate insulating film 51 ... tantalum gate electrode 52, 53, 63, 64 ... Tantalum oxide film 60, 61, 62 ... Tantalum film 67, 68 ... Metal film laminated body 70, 71 ... Aluminum film 72 ... Aluminum gate electrode 73 ... Aluminum gate electrode side portion 74 ... Aluminum gate electrode Side part 75 ... Aluminum gate electrode central part 81, 82, 83 ... Aluminum oxide film 90, 95, 96 ... Chrome film 91 ... Chrome gate electrode 92 ... Chrome gate electrode side part 93 ... Chrome gate electrode side part 94 ... Chrome gate electrode central part 97, 98, 99 ... Chromium oxide film 100 ... Thin film transistor 110 ... Substrate 120 ... Polycrystalline silicon semiconductor layer 122 ... N ^- Drain region 123 ... N ^- Source region 124 ... N ⁺ Drain region 125 ... N ^- Drain region 127 ... N ^- Source region 128 ... N ⁺ Source region 130 ... Gate insulating film 140 ... Tantalum film 141 ... Tantalum gate electrode 150 ... Tantalum oxide film 200 ... Thin film transistor

Claims (24)

[Claims] 1. A semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film, a gate electrode formed on the gate insulating film, and the semiconductors on both sides of the gate electrode. A thin film semiconductor device comprising a source region and a drain region respectively formed in a thin film, wherein the gate electrode is formed on the first gate electrode and the first gate electrode formed on the gate insulating film. A second sub-gate electrode, the second sub-gate electrode being provided directly above the first sub-gate electrode in contact with the first sub-gate electrode; At least a second sub-gate electrode provided so as to protrude from the drain region side end portion of the first gate electrode toward the drain region side by a first predetermined distance, A thin film semiconductor device, wherein the thin film semiconductor device is provided at a second predetermined distance from the end of the first gate electrode on the drain region side. 2. A low-concentration drain region formed in the semiconductor thin film between the first gate electrode and the drain region, wherein the low-concentration drain region has a lower impurity concentration than the drain region. The low-concentration drain region is provided at a third predetermined distance from the first gate electrode and is electrically connected to the drain region. 1. The thin film semiconductor device according to 1. 3. The thin film semiconductor device according to claim 1, wherein the semiconductor thin film is a semiconductor thin film made of polycrystalline silicon. 4. The first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal and the second metal are different types. The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is a metal. 5. The first gate electrode is made of a first metal, the second gate electrode is made of a second metal, the etching characteristics of the first metal, and the etching of the second metal. The characteristics are different from each other.
4. The thin film semiconductor device according to any one of 3 to 3. 6. The first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal is an anodizable metal. 4. The thin film semiconductor device according to claim 1. 7. The first gate electrode is made of a first metal, the second gate electrode is made of a second metal, and the first metal is an anodizable metal. 7. The thin film according to claim 1, wherein the metal is an anodizable metal, and the anodizing rate of the first metal is higher than the anodizing rate of the second metal. Semiconductor device. 8. The thin film semiconductor device according to claim 7, wherein the first metal is tantalum and the second metal is aluminum. 9. The thin film semiconductor device according to claim 8, wherein the gate insulating film is an insulating film formed by a chemical vapor deposition method. 10. A semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by chemical vapor deposition, and tantalum formed on the gate insulating film.
The first and second tantalum oxide films respectively formed on both sides of the first gate electrode by anodizing tantalum, and a second gate electrode made of aluminum, The width of the gate electrode is larger than the width of the first gate electrode, and the second gate electrode has a central portion and first and second side portions on both sides of the central portion in the width direction. The central portion of the second gate electrode is the first
Has the same width as the gate electrode, the central portion is provided directly above the first gate electrode in contact with the first gate electrode, and the first and second gate electrodes on both sides of the second gate electrode are provided. The side portions project from the first end position and the second end position in the width direction of the first gate electrode by first and second predetermined distances, respectively. The second layers provided on the tantalum oxide film, respectively.
And an aluminum oxide film formed by anodizing aluminum to cover the second gate electrode on the upper surface and the side surface of the second gate electrode, and from the first gate electrode to the third gate electrode. A drain region provided in the semiconductor thin film at a predetermined distance from each other; and a source region provided in the semiconductor thin film on the side opposite to the drain region with respect to the first gate electrode. Thin film semiconductor device. 11. A low-concentration drain region formed in the semiconductor thin film between the first gate electrode and the drain region, the low-concentration drain region having a lower impurity concentration than the drain region is further formed. The low-concentration drain region is provided at a fourth predetermined distance from the first gate electrode and is electrically connected to the drain region. 1
0. The thin film semiconductor device according to item 0. 12. A semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by chemical vapor deposition, and tantalum formed on the gate insulating film.
The first and second tantalum oxide films respectively formed on both sides of the first gate electrode by anodizing tantalum, and a second gate electrode made of aluminum, The width of the gate electrode is larger than the width of the first gate electrode, and the second gate electrode has a central portion and first and second side portions on both sides of the central portion in the width direction. The central portion of the second gate electrode is the first
Has the same width as the gate electrode, the central portion is provided directly above the first gate electrode in contact with the first gate electrode, and the first and second gate electrodes on both sides of the second gate electrode are provided. The side portions project from the first end position and the second end position in the width direction of the first gate electrode by first and second predetermined distances, respectively. The second layers provided on the tantalum oxide film, respectively.
And an aluminum oxide film formed by anodizing aluminum to cover the second gate electrode on the upper surface and the side surface of the second gate electrode, and from the first gate electrode to the third gate electrode. A high-concentration drain region formed at a predetermined distance in the semiconductor thin film, and formed in the semiconductor thin film between the first gate electrode and the high-concentration drain region, and having a lower concentration than the high-concentration drain region. A low-concentration drain region having a low impurity concentration, the low-concentration drain region formed at a fourth predetermined distance from the first gate electrode and in contact with the high-concentration drain region; A high-concentration saw provided in the semiconductor thin film on the side opposite to the high-concentration drain region with respect to the first gate electrode, at a fifth predetermined distance from the first gate electrode. A low-concentration source region formed in the semiconductor thin film between the first gate electrode and the high-concentration source region and having a lower impurity concentration than the high-concentration source region,
A low-concentration source region formed at a sixth predetermined distance from the gate electrode and in contact with the high-concentration source region. 13. The high concentration drain region is formed in the semiconductor thin film under the gate insulating film, and the low concentration drain region is formed in the semiconductor thin film under the first tantalum oxide film and the gate insulating film. Formed, the semiconductor thin film is a polycrystalline silicon thin film, the gate insulating film,
A silicon oxide film formed by chemical vapor deposition,
When the film thickness of the silicon oxide film is t _ox (Å) and the film thickness of the first tantalum oxide film is t _Taox (Å), (a · t _ox ² + b · t _ox ) × 1.28 <T _Taox , t _Taox <(a · t _ox ² + b · t _ox ) × 3.09 (where, a = −8.88889 × 10 ⁻⁵ (Å ⁻¹ ), b
= 0.44. 13. The thin film semiconductor device according to claim 12, wherein the relationship of (4) is satisfied. 14. A semiconductor thin film formed on an insulating substrate, a gate insulating film formed on the semiconductor thin film by a chemical vapor deposition method, and tantalum formed on the gate insulating film.
A gate electrode, a second gate electrode made of aluminum formed on the first gate electrode, and a drain region and a source region formed on the semiconductor thin film on both sides of the first gate electrode. A thin-film semiconductor device, comprising: 15. Tantalum is anodized to form tantalum oxide films formed on both sides of the first gate electrode, and aluminum is anodized to form the second gate electrode on the upper surface and the side surface of the second gate electrode. 15. The thin film semiconductor device according to claim 14, further comprising an aluminum oxide film formed so as to cover the gate electrode of. 16. A step of forming a semiconductor thin film on an insulating substrate; a step of forming a gate insulating film on the semiconductor thin film; a step of forming a first gate electrode on the gate insulating film; Forming a second gate electrode on the first gate electrode, the second gate electrode being wider than the gate electrode and having a central portion and first and second side portions on both sides of the central portion in the width direction; The central portion of the second gate electrode, which has the same width as the first gate electrode, is provided directly above the first gate electrode, and the width direction of the second gate electrode is The first side portion and the second side portion of the first gate electrode in the width direction from the position of the first end portion and the second end portion of the first gate electrode in the width direction, respectively. The step of allowing the second gate electrode and the second gate electrode Impurities are introduced into the semiconductor thin film by ion implantation using the gate electrode as a mask to form a source region impurity region and a drain region impurity region in the semiconductor thin film on both sides of the second gate electrode. A method of manufacturing a thin film semiconductor device, comprising: 17. A step of forming a semiconductor thin film on an insulating substrate, a step of forming a gate insulating film on the semiconductor thin film, a first gate electrode and the first gate electrode on the gate insulating film.
Forming first and second insulating films on both sides of the gate electrode respectively, and having a width wider than that of the first gate electrode in the width direction, and a first portion and a second portion on both sides of the center portion in the width direction. A second gate electrode having side portions is formed on the first gate electrode, and the central portion is the central portion of the second gate electrode and has the same width as the first gate electrode. Is provided directly above the first gate electrode, and the second gate electrode is provided.
The first side portion and the second side portion of the gate electrode in the width direction, the first end position and the second end position of the first gate electrode in the width direction. On the first insulating film and the second insulating film so that the outer end portion of the first side portion is more protruded in the width direction than the outer end portion of the first insulating film. And a second gate electrode, the first and second gate electrodes are provided so as to be inside and the outside end of the second side portion is inside the outside end of the second insulating film. Impurities are introduced into the semiconductor thin film by ion implantation using the insulating film and the first gate electrode as a mask,
A high-concentration drain region impurity region in the semiconductor thin film below the gate insulating film outside the insulating film, and in the semiconductor thin film below the first insulating film outside the second gate electrode. A low-concentration drain region impurity region having a lower impurity concentration than the high-concentration drain region; a high-concentration source region impurity region in the semiconductor thin film below the gate insulating film outside the second insulating film; Forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region in the semiconductor thin film below the second insulating film outside the gate electrode. Method for manufacturing thin film semiconductor device. 18. A step of forming a semiconductor thin film on an insulating substrate, a step of forming a gate insulating film on the semiconductor thin film, and a first anodizable first metal formed on the gate insulating film. And a second metal that can be anodized and has a lower anodization rate than the first metal.
Forming a metal film laminate comprising a first metal film and a second metal film laminated on the first metal film with substantially the same width as the first metal film; The film stack is anodized to form a first gate electrode made of the first metal and first and second anodized films on both sides of the first gate electrode on the gate insulating film. A second gate electrode made of the second metal and having a width wider than that of the first gate electrode and having a central portion and first and second side portions on both sides of the central portion in the width direction. The central portion of the second gate electrode having the same width as the first gate electrode is directly above the first gate electrode, and the width direction of the second gate electrode is The first side portion and the second side portion of the first gate electrode in the width direction. In the width direction from the position of the first end portion and the position of the second end portion in, respectively so as to be respectively located on the first anodic oxide film and the second anodic oxide film,
Forming a third anodic oxide film on the first gate electrode, forming a third anodic oxide film on the first side portion, the central portion, and the second side portion of the second gate electrode; A fourth anodic oxide film is formed on a side surface of the second gate electrode on the outer side of the first side portion, and an outer end portion of the fourth anodic oxide film is formed from an outer end portion of the first anodic oxide film. A second anodic oxide film is formed on the outer side surface of the second side portion of the second gate electrode, and an outer end portion of the fifth anodic oxide film is formed on the outer side surface of the second gate electrode. A step of forming the anodic oxide film so as to be inside the outer end portion of the anodic oxide film, the second gate electrode, the third to fifth anodic oxide films, the first and second anodic oxide films, In addition, impurities are introduced into the semiconductor thin film by an ion implantation method using the first gate electrode as a mask to perform the first anodic oxidation. An impurity region for a high-concentration drain region is provided in the semiconductor thin film below the gate insulating film outside the film, and the high concentration is provided in the semiconductor thin film below the first anodic oxide film outside the fourth anodic oxide film. An impurity region for a low concentration drain region having a lower impurity concentration than that of the impurity region for a concentration drain region is formed, and an impurity region for a high concentration source region is formed in the semiconductor thin film below the gate insulating film outside the second anodic oxide film. And forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region in the semiconductor thin film outside the fifth anodic oxide film and under the second anodic oxide film. A method of manufacturing a thin film semiconductor device, comprising: 19. A first metal film made of a first metal capable of anodizing on the gate insulating film, and a second metal capable of anodizing and having an anodizing rate lower than that of the first metal. A second metal film formed of a second metal film having a width substantially the same as that of the first metal film and a second metal film stacked on the first metal film. A step of forming a third metal film made of the first metal on the gate insulating film, and then continuously forming a fourth metal made of the second metal on the third metal film. Forming a film, and then selectively forming a resist on the fourth metal film,
After that, the fourth metal film and the third metal film are selectively etched away using the resist as a mask, and the first metal film made of the first metal is formed on the gate insulating film. And a second metal film formed of the second metal and having a width substantially the same as that of the first metal film and stacked on the first metal film, thereby forming the metal film laminate. 19. The method of manufacturing a thin film semiconductor device according to claim 18, which is a step. 20. A step of forming a semiconductor thin film on an insulating substrate, a step of forming a gate insulating film on the semiconductor thin film, and a first anodizable first metal formed on the gate insulating film. And a second metal film that is made of a second metal that is difficult to be anodized and that is laminated on the first metal film and has a width substantially the same as that of the first metal film. A step of forming a body, and thermally oxidizing the metal film stack to form first, second and third metal layers on the upper surface and both side surfaces of the second metal film.
Thermal oxidation films of the first metal film are formed on both side surfaces of the first metal film, and then the first metal film is anodized. A first gate electrode made of the above metal and first and second anodic oxide films on both sides of the first gate electrode are formed on the gate oxide film, and made of the second metal. A second electrode having a width wider than that of the gate electrode and having a central portion and first and second side portions on both sides of the central portion in the width direction.
The gate electrode of the second gate electrode is the central portion having the same width as the first gate electrode, and the central portion is directly above the first gate electrode. The width of the first side portion and the width of the second side portion in the width direction are changed from the position of the first end portion and the position of the second end portion in the width direction of the first gate electrode. Are formed on the first gate electrode so as to be respectively located on the first anodic oxide film and the second anodic oxide film by projecting in the respective directions, and are formed on both sides of the second gate electrode. The second and third thermal oxide films are arranged such that the outer end of the second thermal oxide film is inside the outer end of the first anodic oxide film and the outer end of the third thermal oxide film is Formed so that the end portion is inside the outer end portion of the second anodic oxide film. That step and the second gate electrode, the first to third thermal oxide film,
Impurities are introduced into the semiconductor thin film by an ion implantation method using the first and second anodic oxide films and the first gate electrode as a mask to remove the gate insulating film outside the first anodic oxide film. An impurity region for the high-concentration drain region is formed in the semiconductor thin film below, and a impurity region for the high-concentration drain region is formed in the semiconductor thin film below the first anodic oxide film outside the second thermal oxide film. The impurity region for the low-concentration drain region having the impurity concentration, the impurity region for the high-concentration source region in the semiconductor thin film below the gate insulating film outside the second anodic oxide film, and the impurity region for the third thermal oxide film Forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region in the semiconductor thin film below the outer second anodic oxide film. A method for manufacturing a thin film semiconductor device, comprising: 21. On the gate insulating film, a first metal film made of a first metal capable of anodizing and a second metal film made of a second metal which is difficult to anodize are substantially the same as the first metal film. A step of forming a metal film stack including a second metal film stacked on the first metal film with a width, a third metal including the first metal on the gate insulating film; A film is formed, then a fourth metal film made of the second metal is continuously formed on the third metal film, and then a resist is selectively formed on the fourth metal film. Then
After that, the fourth metal film and the third metal film are selectively etched away using the resist as a mask, and the first metal film made of the first metal is formed on the gate insulating film. And a second metal film formed of the second metal and having a width substantially the same as that of the first metal film and stacked on the first metal film, thereby forming the metal film laminate. 21. The method of manufacturing a thin film semiconductor device according to claim 20, which is a step. 22. A step of forming a semiconductor thin film on an insulating substrate, a step of forming a gate insulating film on the semiconductor thin film, and a first anodizable first metal formed on the gate insulating film. Forming a metal film of 1., selectively forming a resist on the first metal film, and selectively etching away the first metal film using the resist as a mask to remove the first metal film. A step of selectively forming a second metal film made of a metal on the gate insulating film; and thereafter, anodizing the second metal film while leaving the resist to remove the second metal film from the first metal. Forming a first gate electrode and first and second anodic oxide films on both sides of the first gate electrode on the gate oxide film; thereafter, removing the resist; The first metal made of a second metal A second gate electrode having a width wider than that of the gate electrode and having a central portion and first and second side portions on both sides of the central portion in the width direction is formed on the first gate electrode, The central portion of the second gate electrode, which has the same width as the first gate electrode, is provided directly above the first gate electrode, and the width direction of the second gate electrode is Of the first
The side portion and the second side portion of the first gate electrode in the width direction from the first end position and the second end portion in the width direction, respectively. On the first anodic oxide film and the second anodic oxide film, the outer end portion of the first side portion is inside the outer end portion of the first anodic oxide film, and the second end portion of the second side portion is Providing each of the outer end portions of the second anodic oxide film inside the outer end portion of the second anodic oxide film, the second gate electrode, the first and second anodic oxide films, and the first and second anodic oxide films. An impurity is introduced into the semiconductor thin film by an ion doping method using the first gate electrode as a mask to form a high concentration drain region impurity region in the semiconductor thin film below the gate insulating film outside the first anodic oxide film. , The first of the second gate electrode An impurity region for the low-concentration drain region having a lower impurity concentration than the impurity region for the high-concentration drain region is formed in the semiconductor thin film below the first anodic oxide film on the outside of the side portion of the second anodic oxide film. A high-concentration source region impurity region in the semiconductor thin film under the outer gate insulating film, and the semiconductor under the second anodic oxide film outside the second side portion of the second gate electrode. Forming a low-concentration source region impurity region having a lower impurity concentration than the high-concentration source region impurity region in the thin film, and manufacturing the thin-film semiconductor device. 23. The first metal is tantalum, the second metal is aluminum, and the first and second
20. The method of manufacturing a thin film semiconductor device according to claim 18, wherein the anodic oxide film is a tantalum oxide film, and the third to fifth anodic oxide films are aluminum oxide films. 24. The step of forming a semiconductor thin film on the insulating substrate is a step of forming a polycrystalline silicon thin film on the insulating substrate, and the step of forming a gate insulating film on the semiconductor thin film comprises: on the polycrystalline silicon thin film is a step of forming a silicon oxide film by a chemical vapor deposition method, the thickness of the silicon oxide film and t _ox (Å), the thickness of the first anode oxide film t _TaOx ( Å), (a · t _ox ² + b · t _ox ) × 1.28 <t _Taox , t _Taox <(a · t _ox ² + b · t _ox ) × 3.09 (where a = −8.88889 × 10 ⁻⁵ (Å ⁻¹ ), b
= 0.44. 24. The method of manufacturing a thin film semiconductor device according to claim 23, wherein the relationship of (4) is satisfied.