JPH0897138A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To form a crystalline silicon film, which has a higher crystallinity than the crystallinity obtained by ordinary heat treatment with good productivity and that by low-temperature heat treatment by introducing an catalyst element into an amorphous film, controlling the quantity of addition precisely to a small value and with good uniformity under a board face and with good reproducibility between boards. CONSTITUTION: An amorphous silicon film 103 is exposed to alkaline solution 105 including a catalyst element, and then by heat treatment, the catalyst element adsorbed to the surface of the amorphous silicon film is introduced into the amorphous silicon film 13, and also the amorphous silicon film 103 is crystallized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a crystalline silicon film obtained by crystallizing an amorphous silicon film as an active region and a manufacturing method thereof. In particular, the present invention is effective for a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate, and can be applied to an active matrix type liquid crystal display device, a contact image sensor, a three-dimensional IC and the like.

[0002]

2. Description of the Related Art In recent years, large-sized, high-resolution liquid crystal display devices,
High-speed, high-resolution contact image sensor, three-dimensional IC
In order to realize the above, an attempt has been made to form a high-performance semiconductor element on an insulating substrate such as glass or on an insulating film. A thin film silicon semiconductor layer is generally used for a semiconductor element used in these devices.

The thin-film silicon semiconductor layer is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low fabrication temperature, can be fabricated relatively easily by the vapor phase method, and have high mass productivity. It is inferior to the silicon semiconductors it has. Therefore, in order to obtain higher speed characteristics in the future, there is a strong demand for establishment of a method for manufacturing a semiconductor device made of a crystalline silicon semiconductor. Known crystalline silicon semiconductors include polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, and semi-amorphous silicon having an intermediate state between crystalline and amorphous.

As a method for obtaining these thin film silicon semiconductor layers having crystallinity, (1) a semiconductor film is formed while the semiconductor film has crystallinity (2) an amorphous semiconductor A film is formed, and then the semiconductor film is made crystalline by the energy of laser light. (3) An amorphous semiconductor film is formed, and then thermal energy is applied to the semiconductor film. To have crystallinity,
Such methods are known.

However, in the method (1), crystallization progresses at the same time as the film forming step. Therefore, in order to obtain crystalline silicon having a large grain size, it is indispensable to increase the thickness of the silicon film. It is technically difficult to uniformly form a film having a film on the entire surface of the substrate. Further, in this method, since the film forming temperature is as high as 600 ° C. or higher, there is a cost problem that an inexpensive glass substrate cannot be used.

Further, in the method (2), since the crystallization phenomenon in the melting and solidification process is utilized, the grain boundaries are favorably processed with a small grain size, and a high quality crystalline silicon film can be obtained. Taking the most commonly used excimer laser as an example, there is a problem that the irradiation area of laser light is small and throughput is low. In addition, the crystallization treatment with laser light is not sufficient in the stability of the laser for uniformly treating the entire surface of a large-area substrate, and is strongly regarded as a next-generation technology.

The method (3) has an advantage that it can be applied to a large area as compared with the methods (1) and (2), but heat treatment for several tens of hours at a high temperature of 600 ° C. or more is required for crystallization. is necessary. On the other hand, considering the use of an inexpensive glass substrate and the improvement of throughput, it is necessary to lower the heating temperature and crystallize it in a shorter time. Therefore, in the method (3), it is necessary to simultaneously solve the above-mentioned conflicting problems.

Further, in the method (3), since the solid phase crystallization phenomenon is utilized, the crystal grains spread parallel to the substrate surface and are several μm.
Although even those with a grain size of 1 appear, the grown crystal grains collide with each other to form a grain boundary, and the grain boundary acts as a trap level for carriers, which is a major cause of lowering the mobility of the TFT. Will end up.

A method for solving the above-mentioned problem of grain boundaries by utilizing the method (3) is disclosed in Japanese Patent Laid-Open No. 5-55142.
Japanese Patent Laid-Open Publication No. 5-136048. In these methods, a foreign particle serving as a nucleus for crystal growth is introduced into the amorphous silicon film, and then a heat treatment is performed to obtain a large-grain crystalline silicon film having the foreign particle as a nucleus.

In the former case, silicon (Si ⁺ ) is introduced into the amorphous silicon film by an ion implantation method, and then a heat treatment is performed to obtain a polycrystalline silicon film having crystal grains with a grain size of several μm.
In the latter, Si particles having a particle diameter of 10 to 100 nm are blown onto the amorphous silicon film together with a high pressure nitrogen gas to form a growth nucleus. It is the same in both cases that a semiconductor element is formed using a high-quality crystalline silicon film in which a foreign substance is selectively introduced into an amorphous silicon film and crystal growth is performed using the foreign substance as a nucleus.

However, in these techniques proposed in Japanese Patent Application Laid-Open No. 5-55142 or Japanese Patent Application Laid-Open No. 5-136048, the introduced foreign matter acts only as growth nuclei, so that the crystal grows. Although it is effective for controlling nucleation and crystal growth direction, the above-mentioned problems in the heat treatment step for crystallization still remain.

In JP-A-5-55142, a temperature of 6
Crystallization is performed by heat treatment at 00 ° C. for 40 hours. Further, in Japanese Patent Laid-Open No. 5-136048, heat treatment is performed at a heating temperature of 650 ° C. or higher. Therefore, these technologies are applied to SOI (Silicon-On-Insulator) substrates and SOS.
Although this is an effective technique for a (Silicon-On-Sapphire) substrate, it is difficult to form a crystalline silicon film on an inexpensive glass substrate to form a semiconductor device using these techniques. For example, Corning 7059 (trade name of Corning Incorporated) used for an active matrix type liquid crystal display device.
Glass has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of the substrate.

In order to solve the above-mentioned various problems, the present inventors have made it possible to lower the temperature required for crystallization and shorten the processing time, and to minimize the influence of grain boundaries. We have found a method for producing a crystalline silicon thin film that is limited to the above.

According to the research conducted by the present inventors, a trace amount of a metal element such as nickel, palladium, or lead is introduced into the surface of the amorphous silicon film, and thereafter, the metal element is heated to 5
It has been found that crystallization can be performed at 50 ° C. for a treatment time of about 4 hours. It is understood that this mechanism is that crystal nucleation with a metal element as a nucleus occurs at an early stage of the heat treatment, and then the metal element serves as a catalyst to promote crystal growth and crystallization rapidly progresses. In that sense, these metal elements are hereinafter referred to as catalyst elements. Crystalline silicon film that has been crystallized by promoting crystallization by these catalytic elements,
While the amorphous silicon film crystallized by the usual solid phase growth method has a twin structure, it is composed of many needle-like crystals or columnar crystals. Is in an ideal single crystal state.

When a TFT is manufactured by using such a crystalline silicon film in the active region, the field effect mobility is 1.2 times that in the case of using the crystalline silicon film formed by the usual solid phase growth method. Improve. In addition, by irradiating laser light or intense light after the crystallization treatment using the catalyst element to promote the crystallinity, the difference in the field effect mobility becomes more remarkable.

That is, when the crystalline silicon film is irradiated with laser light or intense light, the grain boundary portions are intensively processed due to the difference in melting points between the crystalline silicon film and the amorphous silicon film. However, in the crystalline silicon film formed by the usual solid phase growth method, since the crystal structure is in a twin state, twin crystal defects remain inside the crystal grain boundaries even after laser light irradiation. In comparison, the crystalline silicon film crystallized by introducing the catalytic element,
It is formed of needle-like crystals or columnar crystals, and the inside is in a single-crystal state. Therefore, when the crystal grain boundary is processed by irradiation with laser light or strong light, a high-quality crystal close to a single-crystal state is obtained over the entire surface of the substrate. A crystalline silicon film is obtained.

[0017]

By the way, in order to introduce a small amount of the catalyst element as described above, plasma treatment, ion implantation, and a method of applying a solution containing the catalyst element may be used. Here, the plasma treatment means plasma C
In the VD apparatus, a material containing a catalytic element is used as an electrode, and plasma is generated in an atmosphere such as nitrogen or hydrogen to add the catalytic element to the amorphous silicon film.

However, the presence of a large amount of the above-mentioned elements in the semiconductor impairs the reliability and electrical stability of the device using these semiconductors and is not preferable.

That is, the above-mentioned catalytic element that promotes crystallization of nickel or the like is necessary when crystallizing the amorphous silicon region, but it should be contained as little as possible in the crystallized silicon region. Preferably. In order to achieve this purpose, select a catalyst element that has a strong tendency to be inert in the crystalline silicon region, at the same time reduce the amount of the catalyst element necessary for crystallization as much as possible, and crystallize in the minimum amount. Need to be converted. In order to do so, it is necessary to precisely control the introduction amount of the above-mentioned catalyst element, and further, the uniformity of the addition amount of the catalyst element in the treatment method in the substrate and the stability between the substrates (reproduction) Property), that is, it is inevitable to ensure that the variation between the substrates to be processed is small.

Further, in the case of using nickel as a catalytic element, the crystallization process in the process of forming a crystalline silicon film by forming an amorphous silicon film and adding nickel by a plasma treatment method was examined in detail. However, the following matters were found.

(1) When nickel is introduced onto the amorphous silicon film by plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before the heat treatment.

(2) The initial nuclei of crystals are generated from the surface of the region where nickel is introduced.

(3) When the crystalline silicon film crystallized by introducing nickel into the amorphous silicon film by the plasma treatment is irradiated with laser light, excess nickel is deposited on the surface of the crystalline silicon film.

From these facts it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. That is, it is considered that there is nickel that does not function sufficiently even if a large amount of nickel is introduced. From this, it is considered that the contact portion or the contact surface portion where nickel and silicon are in contact with each other functions at the time of low temperature crystallization. Then, it is concluded that nickel should be dispersed as finely as possible in atomic form. In other words, it is concluded that "what is necessary is to introduce nickel in the vicinity of the surface of the amorphous silicon film in a range where low temperature crystallization is possible and in a concentration as low as possible in atomically dispersed state." To be done.

For the above reasons, the method in which the catalytic element penetrates deep into the amorphous silicon film is unsuitable,
The thin film formation by the sputtering method and the catalytic element introduction method by ion implantation have the same problems as the plasma treatment. As a method of forming the catalytic element as a thin film and introducing it only near the surface of the amorphous silicon film, there are a vacuum vapor deposition method and a plating method. At this time, a catalyst necessary for crystallization of the amorphous silicon film is used. The element amount is an extremely thin film (thickness of 1 nm or less) that is invisible to the naked eye, and it is very difficult to control the low concentration of the catalyst element amount introduced into the amorphous silicon film.

Now, a method for efficiently introducing a very small amount of nickel only in the vicinity of the surface of the amorphous silicon film, in other words, a very small amount of a catalytic element that promotes crystallization only in the vicinity of the surface of the amorphous silicon film. As a method of introducing, there is a method of applying a solvent in which a catalytic element is dissolved on the surface of the amorphous silicon film by a spinner. In this method, by controlling the nickel concentration in the solution, it is easy to control the amount of nickel introduced into the amorphous silicon film, and the minimum amount of catalytic element necessary for crystallization can be added. It will be possible. When a crystalline silicon film crystallized by this method is irradiated with laser light, nickel is not deposited and a high-quality crystalline silicon film is obtained.

However, the method of applying the solvent in which the catalytic element is dissolved to the amorphous silicon film by the spinner has a problem that the uniformity in the substrate is not good. The reason for this will be described below. In this method, a nickel salt such as nickel nitrate or nickel acetate is used as a solute when the catalyst element is nickel, and water or ethanol is used as a solvent for dissolving the nickel salt. Although this solution is spin-coated on the surface of the amorphous silicon film, the catalyst element is actually deposited on the surface of the amorphous silicon film not by spin coating but by a drying process by spin. Therefore, this method is not an image of coating,
The image that the ionic catalytic element is deposited and placed on the surface of the amorphous silicon film is more correct. Therefore, in this method, the unevenness in the drying of the solution appears as it is in the introduced amount of the catalyst element and further in the non-uniformity of the crystallinity of the crystalline silicon film obtained by heating. The nonuniformity referred to here includes both macroscopic nonuniformity due to the influence of the spinner and microscopic nonuniformity due to minute (μm order) water droplets remaining during the drying process. In particular, the latter microscopic non-uniformity appears more notably on a substrate having a pattern step, such as when a catalyst element is selectively introduced. Further, in this method, the maximum point is how uniformly the solution containing the catalytic element dropped onto the surface of the amorphous silicon film was dried while being in contact with the surface by the spinner. The wettability of the solution becomes important. Therefore, in order to improve the wettability, a process such as thin film oxidation of the amorphous silicon film surface is required, and not only the extra process is increased, but also the parameter that governs the introduction amount of the catalytic element is further increased. Also becomes less stable. When using this method, the macroscopic variation in the actual amount of catalyst element added was ± 10 to 20% on a 127 mm square substrate.

When the nonuniformity of the amount of catalyst element added in the substrate is large, there are regions where crystal growth does not occur locally due to insufficient amount of catalyst element, and regions where the catalyst element is contained in a large amount so as to affect the semiconductor element. Appear. Therefore, it is difficult for the above method to uniformly manufacture several hundreds of thousands of TFTs on one substrate like the manufacturing process of the active matrix substrate of the liquid crystal display device. At present, in order to further reduce the cost and increase the area of the device, a semiconductor device excellent in uniformity and stability and a manufacturing method thereof, which can cope with a glass substrate of 400 mm square or more, are required. It was difficult to meet the demand by the above method using.

The present invention has been made to solve the above-mentioned problems, and the minimum required amount of catalytic element is
It can be introduced into an amorphous silicon film with precise control over the amount added and with good in-plane uniformity and reproducibility between substrates, and higher than the crystallinity obtained by ordinary heat treatment. It is an object of the present invention to obtain a semiconductor device capable of forming a crystalline silicon film having crystallinity with high productivity by a low temperature heat treatment at 600 ° C. or less and a method for manufacturing the semiconductor device.

[0030]

[Means for Solving the Problems]

(1) A semiconductor device according to the present invention includes a substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film by heat treatment. . The active region contains a catalytic element that promotes crystallization of the amorphous silicon film. The catalytic element contained in the active region is introduced into the amorphous silicon film by exposing the amorphous silicon film or its underlying film to an alkaline solvent containing the catalytic element. Thereby, the above object is achieved.

(2) The semiconductor device according to the present invention comprises a substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film by heat treatment. I have it. The active region is formed by the heat treatment from a crystallization region in the vicinity of the lateral region, which is formed by crystal growth in a direction parallel to the substrate surface. It is a part. The crystallization region contains a catalytic element that promotes crystallization of the amorphous silicon film. The catalytic element contained in the active region is obtained by selectively exposing the amorphous silicon film or the underlying film thereof to an alkaline solvent containing the catalytic element to selectively introduce the amorphous silicon film into the amorphous silicon film. Thereby, the above object is achieved.

(3) In the present invention, the active region is obtained by subjecting the crystallized region obtained by the heat treatment of the amorphous silicon film to laser light or intense light irradiation treatment to treat the crystal. Is preferred.

(4) In the present invention, it is preferable that the catalytic element that promotes crystallization of the amorphous silicon film is surface-adsorbed on the amorphous silicon film in an ionic state.

(5) In the present invention, the alkaline solvent in which the catalyst element is dissolved preferably has a pH value within the range of 8-14.

(6) In the present invention, the alkaline solvent in which the catalytic element is dissolved preferably has a pH value within the range of 9 to 12.

(7) In the present invention, it is preferable that the alkaline solvent in which the catalyst element is dissolved is composed mainly of aqueous ammonia.

(8) In the present invention, the alkaline solvent in which the catalyst element is dissolved is preferably a mixed solution of ammonia water and hydrogen peroxide water.

(9) In the present invention, as the catalyst element, Ni, Co, Pd, Pt, Cu, Ag, Au, I
It is preferable to use one or more kinds of elements selected from n, Sn, Al, P, As, and Sb.

(10) In the present invention, the concentration of the catalyst element in the active layer region is 1 × 10 ¹⁵ atoms.
/ Cm ³ to 1 × 10 ¹⁹ atoms / cm ³ are preferable.

(11) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a catalytic element that promotes crystallization of the amorphous silicon film are dissolved or dispersed. A step of exposing the amorphous silicon film or its underlying film to an alkaline solution; and a step of introducing the catalyst element into the amorphous silicon film by heat treatment and crystallizing the amorphous silicon film. The above object is achieved thereby.

(12) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a catalytic element that promotes crystallization of the amorphous silicon film are dissolved or dispersed. By the step of partially exposing the amorphous silicon film or the underlying film thereof to an alkaline solution and the heat treatment, the amorphous silicon film or the underlying film is exposed from the region exposed to the alkaline solution to the amorphous silicon film. By the step of selectively introducing the catalyst element to selectively crystallize the amorphous silicon film and the subsequent heat treatment, crystal growth is performed in a direction substantially parallel to the substrate surface from the crystallized portion. And a step of forming a lateral crystal growth region in the amorphous silicon film, whereby the above object is achieved.

(13) The present invention includes the step of crystallizing the amorphous silicon film by heat treatment and then irradiating the amorphous silicon film with laser light or strong light to treat the crystal. It is preferable.

(14) In the present invention, the treatment of exposing the amorphous silicon film to the alkaline solution is preferably performed by immersing the substrate having the amorphous silicon film formed on the surface thereof in the alkaline solution.

(15) In the present invention, the method may further include the step of exposing the amorphous silicon film to the alkaline solution, and then cleaning the portion of the amorphous silicon film exposed to the alkaline solution with pure water. preferable.

[0045]

In the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating. The crystalline silicon film forming the active region, which is obtained by crystallizing the film, can have a crystallinity higher than that obtained by a usual solid phase growth method.

Since the crystallization of the amorphous silicon film by heating is promoted by the catalytic element, a high-quality crystalline silicon film can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower, an inexpensive glass substrate can be used.

The concentration of the catalytic element in the active region in the film is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , this catalytic element can effectively function when the amorphous silicon film is crystallized.

In the method of manufacturing a semiconductor device according to the present invention, the amorphous silicon film or the underlying film thereof is exposed to an alkaline solvent containing a catalytic element that promotes crystallization of the amorphous silicon film, and the above catalytic element is added. Since it is introduced into the amorphous silicon film, it is possible to reduce variations in the addition amount of the catalytic element within the substrate surface, and to control the addition amount of the catalytic element to a small amount.

In the method of manufacturing a semiconductor device of the present invention, the amorphous silicon film or the underlying film thereof is selectively exposed to an alkaline solution containing a catalytic element by heat treatment,
While selectively diffusing the catalytic element into the amorphous silicon film, the amorphous silicon is selectively crystallized, and by subsequent heat treatment, crystal growth from the crystallized portion in a direction substantially parallel to the substrate surface. Then, a lateral crystal growth region is formed in the amorphous silicon film, so that a crystallized region having significantly better crystallinity can be obtained as compared with the region into which the catalytic element is introduced.

[0050]

EXAMPLES The basic principle of the present invention will be described below.

In the present invention, as a method of introducing the catalyst element that promotes crystallization of the amorphous silicon film, a method of dissolving the catalyst element in an alkaline solvent and holding it so as to be in contact with the amorphous silicon film is used.

The present inventors have searched for a method of introducing a catalytic element using a solution, which is different from a coating method using a spinner and does not depend on a drying process at all. As a result, they have found that the catalyst element can be uniformly introduced into the amorphous silicon film at a low concentration by using the above method. When the present invention is used, the variation in the amount of catalytic element added in the substrate is
In the experiments conducted by the present inventors, a 127 mm square substrate was within ± 5%.

In the present invention, since the catalytic element is adsorbed on the surface of the amorphous silicon film in an ionic state during the introduction process of the catalytic element, the required amount of the catalytic element is still present even if the surface is washed with pure water thereafter. It is not removed and as a result does not depend on the subsequent drying step. Therefore, it is possible to use a method (dipping method) of simply immersing the substrate on which the amorphous silicon film is formed in an alkaline solution in which a catalytic element is dissolved without using a spinner, and it is possible to cope with a large area substrate exceeding 400 mm square. It becomes easy, the process can be simplified, and the cost can be reduced. In addition, since the adsorption action is used, in principle, the catalytic element is present on the surface of the amorphous silicon film in a state close to a monoatomic layer, and it is possible to almost eliminate the microscopic variation found in the spin coating method. it can.

Further, in the present invention, since only the catalyst atoms adsorbed on the surface of the amorphous silicon film contribute to the crystal growth, all the catalytic elements introduced into the amorphous silicon film function efficiently. Therefore, by using the present invention, all problems in introducing the catalytic element into the amorphous silicon film are solved, and the catalytic element can be introduced uniformly over the entire surface of the substrate and in the necessary minimum amount. It will be possible. Therefore, in the case of using the present invention, the precipitation of the catalytic element does not occur even after irradiation with laser light or intense light after crystallization by heating,
A high-performance semiconductor device with excellent uniformity and stability can be realized on a large-area substrate.

The mechanism of the present invention is because the ionic state of the catalytic element in the solution is greatly different between when the catalytic element is dissolved in the alkaline solution and when the catalytic element is dissolved in the neutral solution. I think that the. That is,
When the catalytic element is dissolved in an alkaline solution, it is presumed that the catalytic element is in an unstable complex ion state in which OH groups are coordinated. This state is a state in which it is easily adsorbed on the surface of the amorphous silicon film, and it is presumed that it is electrically bonded to O and OH on the Si surface. Therefore, the introduction amount of the catalytic element largely depends on the pH value of the solution, and in the present invention, the pH of the alkaline solvent in which the catalytic element is dissolved is 8 to 14,
More preferably, the best effect can be obtained at 9-12.

FIG. 6 shows the correlation between the pH value of the solvent in which the catalytic element is dissolved and the amount of the catalytic element added to the amorphous silicon film. The graph of FIG. 6 is obtained by dipping the amorphous silicon substrate in a solution of nickel salt dissolved in nickel having a concentration of 25 ppm for 10 minutes and then washing with pure water. It can be seen from FIG. 6 that when the pH value of the solvent becomes 8 or more, the amount of catalyst atoms added begins to increase, and an adsorption action occurs that is not removed in the subsequent pure water washing step.
Therefore, in order to obtain the effect of the present invention, an alkaline solution having a pH value of 8 or more is required. Furthermore, when the pH value of the solvent is in the range of 9 to 12, as shown by the error bar at the measurement point in FIG.
It is within 5%. When manufacturing multiple semiconductor elements on a substrate such as an active matrix substrate,
Since the non-uniformity of the semiconductor element appears as unevenness, it is preferable to suppress the non-uniformity of the catalyst element addition amount within ± 5%. Further, the small variation in the pH value range of 9 to 12 is evidence that a sufficient adsorption action has occurred, and means that stable treatment is possible. Therefore, the pH of the alkaline solvent that dissolves the catalytic element
The value is more preferably in the range of 9-12.

As the alkaline solvent used in the present invention, any liquid having a pH value within the above range will cause almost no problem. However, considering the influence on the semiconductor, an inorganic alkali, particularly ammonia water is used. Is desirable. Further, since the alkaline solution has an etching action on the amorphous silicon film, it is necessary to form the amorphous silicon film thicker than a desired film thickness in anticipation of the amount to be pre-etched. In order to prevent etching of the amorphous silicon film, it is effective to use a mixed solution of ammonia water and hydrogen peroxide water. In this case, since the hydrogen peroxide solution oxidizes the surface of the silicon film, it becomes possible to prevent the etching reaction due to the alkaline solution.

As an application example of the present invention, by selectively introducing a catalyst element into a part of the amorphous silicon film and heating it, crystal growth is carried out in the lateral direction (direction parallel to the substrate) from the introduced region. There is a way to do it. Inside this, needle-like crystals with the growth direction aligned in one direction and columnar makeup are crowded together, and the crystallinity is significantly better than in the region where the crystallographic angles are randomly generated by the direct introduction of catalytic elements. It has become an area. When the lateral crystal growth region is irradiated with laser light or strong light, the crystal grain boundaries between needle-like crystals or columnar crystals are processed, and a crystalline silicon film almost like a single crystal is obtained. Also in this case, by using the present invention as a method of introducing the catalyst atoms, the lateral crystal growth is efficiently performed, and the catalyst element that contributes to crystallization is the needle crystal, the tip of the columnar crystal, that is, the tip of the crystal growth. Exists in the department. That is, if the catalytic element functions efficiently for crystallization, the catalytic element exists only at the crystal growth tip where crystallization is performed,
It means that the catalytic element is almost absent in the already crystallized lateral crystal growth region. In fact, the nickel concentration in this lateral crystal growth region when nickel was used as the catalyst element was 1 × 10 ^{18 to} 5 × 10 ¹⁸ at in the plasma treatment method.
While it was oms / cm ³ , the value of 1 × 10 ^{16 to} 5 × 10 ¹⁶ atoms / cm ³ was about two orders of magnitude smaller when the present invention was used. Further, in this case, it is necessary to perform a catalytic element addition treatment after forming a pattern of a mask film for selectively introducing the catalytic element into the amorphous silicon film. There was no effect of the pattern step, and it was possible to perform uniform and stable processing even on the substrate after pattern formation.

The lower the concentration of the catalytic element introduced into the amorphous silicon film, the better, but if it is too low, it will not function to promote crystallization of the amorphous silicon film. As a result of examination by the present inventors, the minimum concentration of the catalytic element in which crystallization occurs is 1 × 10 ¹⁵ atoms / cm ³ , and at a concentration lower than this, crystal growth by the catalytic element does not occur.

Further, if the concentration of the catalytic element is high, the influence on the device becomes a problem. The phenomenon that occurs when the concentration of the catalyst element is high is mainly an increase in leak current in the off region of the TFT. It is understood that this is due to the influence of the impurity level formed by the catalytic element in the silicon film and the tunnel current through the level. As a result of examination by the present inventors,
The maximum concentration of the catalytic element that can suppress the influence on the device is 1 × 10 ¹⁹ atoms / cm ³ . Therefore, the concentration of the catalytic element in the film is 1 × 10 ^{15 to} 5 × 10 ¹⁹
If it is atoms / cm ³ , the catalytic element functions most effectively.

In the present invention, the most prominent effect can be obtained when Ni is used as the catalyst element, but other usable catalyst elements include Co, Pd,
Pt, Cu, Ag, Au, In, Sn, Al, P, A
s and Sb can be used. A single element or a plurality of elements selected from these elements have a small amount of the effect of promoting crystallization, and therefore have little effect on the semiconductor element.

[Embodiment 1] FIG. 1 is a sectional view for explaining a thin film transistor according to a first embodiment of the present invention and a method for manufacturing the same, and FIGS. 1 (a) to 1 (e) show the present embodiment. The manufacturing method of the example TFT is shown in the order of steps.

In the figure, reference numeral 100 denotes a semiconductor device having an N-type thin film transistor (TFT) 10.
Is formed on a glass substrate 101 with an insulating base film 102 such as a silicon oxide film interposed therebetween. The insulating base film 10
An island-shaped crystalline silicon film 103i forming the above TFT is formed on the TFT 2. This crystalline silicon film 103
A central portion of i is a channel region 110, and both side portions thereof are source and drain regions 111 and 112. An aluminum gate electrode 108 is provided on the channel region 110 via a gate insulating film 107. The surface of the gate electrode 108 is covered with the oxide layer 109. The entire surface of the TFT 10 is covered with an interlayer insulating film 113, and a contact hole 113a is formed in a portion of the interlayer insulating film 113 corresponding to the source / drain regions 111 and 112. The source / drain regions 111 and 112 are provided with electrode wirings 114, through the contact holes 113a.
It is connected to 115.

In this embodiment, the crystalline silicon film 103i contains a catalytic element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in this film are in a substantially single crystal state. Of needle-like crystals or columnar crystals.

Of course, the TFT 10 of this embodiment can be used as an element constituting a driver circuit or a pixel portion of an active matrix type liquid crystal display device.
CPU mounted on the same substrate as these circuits and pixel parts
It can also be used as an element constituting the. In addition, T
The application range of FT is not limited to liquid crystal display devices,
It goes without saying that it can be applied to a thin film integrated circuit generally called.

Next, the manufacturing method will be described. First, a base film 102 made of silicon oxide and having a thickness of about 200 nm is formed on a glass substrate 101 by, for example, a sputtering method. This silicon oxide film is provided to prevent the diffusion of impurities from the glass substrate. Next, a thickness of 25 to 100 n is obtained by a low pressure CVD method or a plasma CVD method
An intrinsic (I-type) amorphous silicon film (a-Si film) 103 having a thickness of, for example, 80 nm is formed.

Next, as shown in FIG. 1A, the substrate 101 on which the a-Si film 103 is formed is dipped in a mixed solution 105 of ammonia water and hydrogen peroxide solution in which nickel salt is dissolved, for example, for 10 minutes. After that, overflow cleaning with pure water is performed, and spin drying is performed. At this time, nickel acetate was used as the nickel salt, and the nickel concentration in the solution was adjusted to 10 ppm. Also, the solution 10
The pH value of 5 was adjusted to be about 10. At this time, the surface density of nickel added to the surface of the a-Si film 103 was about 3 × 10 ¹² atoms / cm ² .

Then, this is annealed in a hydrogen reducing atmosphere or an inert atmosphere at a heating temperature of 520 to 580 ° C. for several hours to several tens hours and at 550 ° C. for 8 hours to be crystallized. At this time, nickel added to the surface serves as nuclei, and the amorphous silicon film 103 is crystallized in the direction perpendicular to the substrate 101. Simultaneously with this crystallization, nickel diffuses in the film. As a result, the nickel concentration in the crystalline silicon film 103a is about 5 × 10 ¹⁷ atoms / cm ³ .

Subsequently, as shown in FIG. 1B, laser light is irradiated to promote the crystallinity of the crystalline silicon film 103a. The laser light at this time is XeC
l Excimer laser (wavelength 308nm, pulse width 40n
sec) was used. Irradiation with laser light is performed by holding the substrate so that it is heated to 200 to 450 ° C., for example, 400 ° C. at the time of irradiation, and energy density is 200 to 400 mj / c.
m ^2, for example, was performed at 300 mj / cm ^2.

Next, as shown in FIG. 1C, the crystalline silicon film 103a in an unnecessary portion is removed to perform element isolation, and then the active region (source / drain region, channel region) of the TFT is formed. The island-shaped crystalline silicon film 103i is formed.

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 107 so as to cover the crystalline silicon film 103i to be the active region. Here, TEO is used for forming the silicon oxide film.
S (Tetra Ethoxy Ortho Sili
Cate) as a raw material, and the substrate temperature is 150 to 150 with oxygen.
It was decomposed and deposited by the RF plasma CVD method at 600 ° C., preferably 300 to 450 ° C. The above silicon oxide film is a low pressure CV made from TEOS together with ozone gas.
The substrate temperature is set to 350 by the D method or the atmospheric pressure CVD method.
˜650 ° C., preferably 400 to 550 ° C. After this film formation, in order to improve the bulk characteristics of the gate insulating film itself and the interface characteristics of the crystalline silicon film / gate insulating film, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an inert gas atmosphere.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 to 800 nm, for example 600 nm, is formed. Then, the aluminum film is patterned to form the gate electrode 108. Further, the surface of this aluminum electrode is anodized to form an oxide layer 109 on the surface (FIG. 1 (d)). Here, the anodic oxidation is performed in an ethylene glycol solution containing tartaric acid in an amount of 1 to 5%, the voltage is first increased to 220 V with a constant current, and the state is maintained for 1 hour to complete the treatment. The thickness of the obtained oxide layer 109 is 200 nm. Since the thickness of the oxide layer 109 has a length that defines the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined in the anodizing process.

Next, an impurity (phosphorus) is implanted into the active region by ion doping using the gate electrode 108 and the oxide layer 109 around it as a mask. Phosphine (PH ₃ ) is used as the doping gas, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and the dose amount is 1 × 10.
^{It is set to 15} to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2 . By this step, the regions 111 and 112 into which the impurities are implanted will later become the source and drain regions of the TFT, and the region 110 which is masked by the gate electrode 108 and the oxide layer 109 around the gate electrode and into which the impurities are not implanted will later become the channel region of the TFT. Become.

Thereafter, as shown in FIG. 1D, annealing is performed by laser light irradiation to activate the ion-implanted impurities, and at the same time, the crystal in the portion where the crystallinity is deteriorated in the above-mentioned impurity introduction step is performed. Improve sex. On this occasion,
The laser used is a XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec), and irradiation is performed with an energy density of 150 to 400 mj / cm ² , preferably 200 to 250 mj / cm ² . The sheet resistance of the N-type impurity (phosphorus) regions 111 and 112 thus formed is 200 to 800 Ω / □.

Subsequently, a silicon oxide film or a silicon nitride film having a thickness of about 600 nm is formed as the interlayer insulating film 113. When a silicon oxide film is used, if TEOS is used as a raw material and it is formed by a plasma CVD method of this and oxygen, or a low pressure CVD method or an atmospheric pressure CVD method of this and ozone, excellent step coverage is obtained. An interlayer insulating film is obtained. Further, if a silicon nitride film formed by plasma CVD using SiH ₄ and NH ₃ as source gases is used,
By supplying hydrogen atoms to the interface of the active region / gate insulating film,
This has the effect of reducing dangling bonds that deteriorate the FT characteristics.

Next, a contact hole 113a is formed in the interlayer insulating film 113, and the electrode wiring 11 of the TFT is made of a two-layer film of a metal material such as titanium nitride and aluminum.
4 and 115 are formed. At this time, the titanium nitride film is provided as a barrier film for the purpose of preventing aluminum from diffusing into the semiconductor layer. And finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm, and then, as shown in FIG.
The TFT 10 shown in is completed.

When this TFT is used as an element for switching the pixel electrode, the electrode 114 or 115 is I
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used in a thin film integrated circuit, a contact hole may be formed also on the gate electrode 108 and necessary wiring may be provided.

NTF produced according to the above examples
T has a field effect mobility of 120 to 150 cm ² / Vs,
The S value was 0.2 to 0.4 V / digit, and the threshold voltage was 2 to 3 V, which was a good characteristic. Here, the S value is a rise coefficient in the sub-threshold region of the TFT, and in the graph showing the relationship between the gate voltage and the drain current, the slope of the graph at the point where the drain current sharply rises indicates that the drain current is 1 It is shown by the change in the gate voltage when the number of digits increases. In addition, variations in TFT characteristics within the substrate are
The field effect mobility was within ± 12%, and the threshold voltage was within ± 8%.

As described above, in this embodiment, the active region 103i formed on the insulating surface of the substrate is covered with the amorphous silicon film 1.
03 has a structure containing a catalytic element that promotes crystallization by heating, so that the crystalline silicon film 103a forming the active region, which is obtained by crystallization of the amorphous silicon film 103, is obtained.
Can have crystallinity higher than that obtained by a normal solid phase growth method.

Further, the crystallization of the amorphous silicon film 103 by heating is promoted by the catalytic element, so that the crystalline silicon film 103a of high quality can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower, an inexpensive glass substrate can be used.

The concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , the amorphous silicon film 1
In crystallization of 03, this catalytic element can effectively function.

Further, in this embodiment, the amorphous silicon film 1 is used.
The amorphous silicon film 103 is exposed to an alkaline solvent 105 containing a catalytic element that promotes crystallization of 03, and then the catalytic element adsorbed to the amorphous silicon film 103 is introduced into the amorphous silicon film by heat treatment. Therefore, it is possible to reduce variations in the addition amount of the catalyst element within the surface of the substrate and to control the addition amount of the catalyst element to a small amount.

[Embodiment 2] FIGS. 2 (a) and 2 (b) are plan views for explaining a thin film transistor according to a second embodiment of the present invention and a method for manufacturing the same, and FIG. −
FIGS. 3A to 3F are cross-sectional views corresponding to the line A ′ portion, and FIGS. 3A to 3F show a method of manufacturing the TFT of this embodiment in the order of steps.

In the figure, reference numeral 200 denotes a semiconductor device having a P-type thin film transistor (TFT) 20.
Has the same sectional structure as the N-type TFT 10 in the semiconductor device of the first embodiment except that it does not have an anodized film. 2 and 3, the constituent elements of the present embodiment denoted by reference numerals in the 200 series are the same as those in the 100 series in the first embodiment shown in FIG. 1 except for the mask 204 made of a silicon nitride film or the like. It corresponds to the components with reference numerals. However, in this embodiment, the crystalline silicon film 203i has a crystalline silicon region 203 in the vicinity thereof.
It is a part of a lateral crystal region 203b formed by crystal growth proceeding from a in a direction parallel to the substrate surface. The crystallized silicon region 203a and the lateral crystal region 203b
Contains a catalytic element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in the film are needle crystals or columnar crystals in a substantially single crystal state.

Next, the manufacturing method will be described. First, a base film 202 made of silicon oxide having a thickness of about 200 nm is formed on the glass substrate 201 by, for example, a sputtering method. Next, an intrinsic (I-type) amorphous silicon film (a-Si film) 203 having a thickness of 25 to 100 nm, for example, 50 nm is formed by a low pressure CVD method or a plasma CVD method.

Next, a mask layer 204 made of a silicon oxide film, a silicon nitride film, or the like and having a mask opening 204a at a predetermined position is formed on the amorphous silicon film 203.
In the opening 204a of the mask 204, the a-Si film 203 is exposed in a slit shape. That is, when the state of FIG. 3A is viewed from above, the a-Si film 203 is exposed in a slit shape in the region 200a, and the other portions are masked. Here, as shown in FIG.
The TFT 20 is manufactured by arranging the source / drain regions 211 and 212 in the lateral crystal growth direction 206. However, as shown in FIG. 2B, the source / drain regions 211 and 21 are formed.
Even if the two are arranged in the direction perpendicular to the direction 206, the TFT can be produced by the same method without any problem.

After forming the mask 204, as shown in FIG.
As shown in (b), the substrate 201 is held so that the alkaline solution 205 in which nickel is dissolved is in contact with the region 200a where the surface of the a-Si film 203 is exposed. In this example, aqueous ammonia having a pH value of about 12 was used as the alkaline solvent, and nickel nitrate was used as the solute. The nickel concentration in the solution was set to 50 ppm, and the substrate 201 was dipped in the solution 205 for 5 minutes to add a small amount of nickel. By this step, the a-Si film 203 in the portion exposed in the region 200a is etched and the film thickness is reduced to about 40 nm.
Since the a-Si film 203 of a is not used as an element region and is removed in a later step, there is no particular problem. Then, this is annealed in an inert atmosphere, for example, at a heating temperature of 550 ° C. for 16 hours to be crystallized.

At this time, in the area 200a, a-S
Crystallization of the silicon film 203 occurs in the direction perpendicular to the substrate 201 using nickel added to the surface of the i film as nuclei to form a crystalline silicon film 203a. Simultaneously with this crystallization, nickel diffuses in the film. As a result, the nickel concentration in the crystalline silicon film 203a is 5 × 10 ¹⁸ atoms.
/ A cm ^3. At this time, the portion other than the region 200a is blocked by the mask film 204, and nickel is a- of the lower layer.
It cannot reach the Si film 203. Then, in the peripheral area of the area 200a, the arrow 2 in FIG.
As indicated by 06, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 200a to form the crystalline silicon film 203b which is laterally crystal-grown. The region remains as the amorphous silicon film region 203c as it is. The concentration of nickel in the crystalline silicon film 203b that has undergone lateral crystal growth is 5 × 10 ¹⁶ atom.
s / cm ³ and can be said to be the seed region of the crystalline silicon film 203a obtained by crystal growth by directly adding nickel.
Compared with, the value is smaller by one digit or more. In the crystal growth, the distance of crystal growth in the direction parallel to the substrate indicated by arrow 206 is about 80 μm.

After that, the mask 204 is removed, and unnecessary portions of the silicon film 203 are removed to perform element isolation. Through the above steps, an island-shaped crystalline silicon film 203 to be an active region (source / drain region, channel region) of the TFT later is formed.
i is formed (FIG. 3D).

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 207 so as to cover the crystalline silicon film 203i to be the active region. In this embodiment, a sputtering method is used as a method for forming the gate insulating film 207. For sputtering, silicon oxide is used as a target, and the substrate temperature during sputtering is 200 to 400 ° C., for example 350.
The sputtering atmosphere is oxygen and argon, and the argon / oxygen is 0 to 0.5, for example 0.1 or less.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 nm is formed. Then, after patterning the aluminum film to form the gate electrode 208, the gate electrode 2 is formed by an ion doping method.
Impurity (boron) is implanted into the active region using 08 as a mask. Diborane (B ₂ H ₆ ) is used as a doping gas, the acceleration voltage is set to 40 kV to 80 kV, for example, 65 kV, and the dose amount is set to 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . To do. By this step, the regions 211 and 212 into which the impurities have been implanted will be the source of the TFT later,
The region 210 that becomes the drain region and is masked by the gate electrode 208 and into which no impurities are implanted will later become the channel region of the TFT.

After that, as shown in FIG. 3E, annealing is performed by laser light irradiation to activate the ion-implanted impurities, and at the same time, the crystallinity of the portion where the crystallinity is deteriorated in the above-mentioned impurity introduction step is performed. Improve sex. On this occasion,
The laser used is a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec), energy density 150 to 400 mj / cm ² , preferably 20.
Irradiation was performed at 0 to 250 mj / cm ² . The sheet resistance of the P-type impurity (boron) regions 211 and 212 thus formed was 500 to 900 Ω / □.

Subsequently, a silicon oxide film having a thickness of about 600 nm is formed as an interlayer insulating film 213. In the case of using a silicon oxide film, TEOS is used as a raw material and a plasma CVD method of this and oxygen or a reduced pressure C of this and ozone is used.
If it is formed by the VD method or the atmospheric pressure CVD method, a good interlayer insulating film having excellent step coverage can be obtained.

Next, a contact hole 213a is formed in the interlayer insulating film 213, and the electrode wiring 21 of the TFT is formed by a two-layer film of a metal material such as titanium nitride and aluminum.
4, 215 are formed. Finally, annealing is performed in a hydrogen plasma atmosphere at 350 ° C. for 30 minutes, and then, as shown in FIG.
The TFT 20 shown in (f) is completed.

When this TFT is used as an element for switching the pixel electrode, the electrode 214 or 215 is set to I
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used in a thin film integrated circuit, a contact hole may be formed also on the gate electrode 208 and necessary wiring may be provided.

PTF produced according to the above examples
T20 is a field effect mobility of 35 to 50 cm ² / Vs, S
Good values of 0.9 to 1.2 V / digit and a threshold voltage of -5 to -6 V were shown. The variation of TFT characteristics in the substrate is ± 10% in field effect mobility and ±± in threshold voltage.
It was within 5%.

In this embodiment, in addition to the effect of the above embodiment, the alkaline solution 2 containing the catalytic element is heated by the heat treatment.
No. 05 selectively exposes the amorphous silicon film 203 to selectively diffuse the catalyst element into the amorphous silicon film 203, and selectively crystallizes the amorphous silicon 203. Crystal growth is carried out from the crystallized portion in a direction substantially parallel to the substrate surface to form a lateral crystal growth region 203b in the amorphous silicon film, so that it is much more remarkable than in the region into which the catalytic element is introduced. A crystallized region with favorable crystallinity can be obtained.

[Embodiment 3] FIG. 4 is a plan view for explaining a thin film transistor and a method of manufacturing the same according to a third embodiment of the present invention, and FIG. 5 is a cross-sectional view corresponding to a portion taken along line BB ′ of FIG. 5A to 5E show the method of manufacturing the TFT of this embodiment in the order of steps.

In the figure, reference numeral 300 denotes a semiconductor device of this embodiment, which has a peripheral drive circuit of an active matrix type liquid crystal display device and a CMOS circuit 30 which constitutes a general thin film integrated circuit. This CMOS circuit is
The N-type TFT 31 and the P-type TFT 32 are connected so that they perform complementary operations, and are formed on the glass substrate 301.

The N-type TFT 31 and the P-type TFT 32 are formed on a glass substrate 301 with an insulating base film 302 such as a silicon oxide film interposed therebetween. The insulating base film 3
On 02, island-shaped crystalline silicon films 303n and 303p forming the TFTs 31 and 32 are formed adjacent to each other. Central portions of the crystalline silicon films 303n and 303p are an N channel region 310 and a P channel region 311 respectively. Both sides of the crystalline silicon film 303n are N-type source / drain regions 31 of an N-type TFT.
2, 313, and both side portions of the crystalline silicon film 303p are P-type source / drain regions 314 and 315 of a P-type TFT.
Has become.

Aluminum gate electrodes 308 and 309 are provided on the N-channel region 310 and the P-channel region 311 with a gate insulating film 307 interposed therebetween.
The entire surface of the TFTs 31 and 32 is the interlayer insulating film 316.
N-type TF of the interlayer insulating film 316
A contact hole 316n is formed in a portion of the T31 corresponding to the source / drain regions 312 and 313, and a contact hole 316p is formed in a portion of the interlayer insulating film 316 corresponding to the source / drain regions 314 and 315 of the P-type TFT 32. Has been formed. And the N-type TFT 31
The source / drain regions 312 and 313 are connected to the electrode wirings 317 and 318 through the contact holes 316n. Further, the source / drain regions 314 and 315 of the P-type TFT 32 have the contact holes 316.
It is connected to the electrode wirings 318 and 319 via p.

In this embodiment, the crystalline silicon films 303n and 303p are formed in one catalytic element addition region 303.
It is a part of the laterally grown crystalline silicon film 303b on both sides of the laterally grown crystal from a.

Next, the manufacturing method will be described. First, a base film 302 made of silicon oxide and having a thickness of about 100 nm is formed on the glass substrate 301 by, for example, a sputtering method. Next, a thickness of 25 to 10
An intrinsic (I-type) amorphous silicon film (a-Si film) 303 having a thickness of 0 nm, for example, 50 nm is formed.

Next, a mask 304 made of a silicon oxide film or a silicon nitride film having a thickness of about 100 nm is formed. The mask 304 is selectively removed, and an opening 304a for injecting a catalytic element is opened.

In the opening 304a, the a-Si film 30 is formed.
3 is exposed in a slit shape. That is, when the state of FIG. 5A is viewed from above, the a-Si film 303 is exposed in a slit shape in the region 300a, and the other portions are masked.

After forming the mask 304, as shown in FIG.
As shown in (b), the substrate 301 is held so that the alkaline solution 305 in which nickel is dissolved is in contact with the region 300a where the surface of the a-Si film 303 is exposed. In this example, aqueous ammonia having a pH value of about 10 was used as the alkaline solvent, and nickel acetate was used as the solute. The nickel concentration in the solution was set to 20 ppm, and the substrate 301 was dipped in the solution 305 for 5 minutes to add a small amount of nickel. By this step, the a-Si film 303 in the portion exposed in the region 300a is etched and the film thickness is reduced to about 45 nm.
There is no particular problem because the a-Si film 303 of a is not used as an element region and is removed in a later step. Then, this is annealed in an inert atmosphere, for example, at a heating temperature of 550 ° C. for 16 hours to be crystallized.

At this time, in the area 300a, aS
Substrate 3 with nickel added to the surface of i film 303 as a nucleus
Crystallization of the silicon film 303 occurs in the direction perpendicular to 01 to form a crystalline silicon film 303a. Simultaneously with this crystallization, nickel diffuses in the film. As a result, the nickel concentration in the crystalline silicon film 303a is 8 × 10 ¹⁷ at
It is about oms / cm ³ . At this time, the portion other than the region 300a is blocked by the mask film 304, and the nickel 306 is removed.
Cannot reach the underlying a-Si film 303.
Then, in the peripheral region of the region 300a, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 300a as indicated by an arrow 306 in FIG. The other region of the amorphous silicon film 303 where the 303b is formed remains as the amorphous silicon film region 303c. The concentration of nickel in the crystalline silicon film 303b that has grown laterally is 3 × 10 5.
^{The value} is about ¹⁶ atoms / cm ^3, which is smaller than that of the crystalline region of the crystalline silicon film 303a, which is a seed region of the crystalline silicon film 303a by directly adding nickel. In the crystal growth, the distance of crystal growth in the direction parallel to the substrate indicated by arrow 306 is about 80 μm.

Subsequently, the mask 304 is removed and laser light is irradiated to promote the crystallinity of the crystalline silicon film 303b. The laser light at this time is XeC
l Excimer laser (wavelength 308nm, pulse width 40n
sec) was used. Irradiation with laser light is performed by holding the substrate so that it is heated to 200 to 450 ° C., for example, 400 ° C. at the time of irradiation, and energy density is 200 to 400 mj / c.
m ^2, for example, was performed at 300 mj / cm ^2.

Then, as shown in FIG.
The crystalline silicon film to be the active regions (element regions) 303n and 303p of the FT is left, and the other regions are removed by etching to perform element isolation.

Next, a 100 nm-thickness is formed so as to cover the crystalline silicon films 303n and 303p which will be the active regions.
Is formed as the gate insulating film 307.
In this embodiment, T is used as a method for forming the gate insulating film 307.
Using EOS as a raw material, with oxygen at a substrate temperature of 350 ° C
It is decomposed and deposited by the RF plasma CVD method.

Subsequently, as shown in FIG. 5D, an aluminum film (containing silicon of 0.1 to 2%) having a thickness of 400 to 800 nm, for example, 500 nm is formed by a sputtering method, and the aluminum film is patterned. Then, the gate electrodes 308 and 309 are formed.

Next, impurities (phosphorus and boron) are implanted into the active regions 303n and 303p by ion doping using the gate electrodes 308 and 309 as masks. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and in the latter case,
The dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , and phosphorus is 2 × 10, for example.
¹⁵ cm ^-2 and boron is 5 x 10 ¹⁵ cm ^-2 . By this step, the regions which are masked by the gate electrodes 308 and 309 and in which impurities are not implanted are later formed into the channel region 31 of the TFT.
It becomes 0 and 311. At the time of doping, a region where doping is unnecessary is covered with a photoresist, thereby selectively doping each element. As a result,
N-type impurity regions 312 and 313, P-type impurity region 3
14 and 315 are formed, and as shown in FIG. 5D, an N channel type TFT (NTFT) and a P channel type TFT (P
TFT) can be formed.

Thereafter, as shown in FIG. 5D, annealing is performed by irradiation with laser light to activate the ion-implanted impurities. As the laser light, an XeCl excimer laser (wavelength 308 nm, pulse width 40 nse
Using c), the laser beam was irradiated under the condition of energy density of 250 mj / cm ² for 2 shots at one place.

Subsequently, as shown in FIG. 5E, the thickness 6
A silicon oxide film having a thickness of 00 nm is formed as an interlayer insulating film 316 by a plasma CVD method, contact holes 316n and 316p are formed in the film, and a two-layer film of a metal material such as titanium nitride and aluminum is used to form a TFT electrode wiring 317. 318 and 319 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete the TFTs 31 and 32.

CMOs produced according to the above examples
In the S structure circuit, the field effect mobility of each TFT is 150 to 180 cm ² / Vs for NTFT and PTFT.
Is as high as 100-120 cm ² / Vs, and the threshold voltage is NT
FT has a very good characteristic of 1.5 to 2V and PTFT has a very good characteristic of -2 to -3V.

The third embodiment having such a structure also has the same effect as that of the second embodiment.

Although the third embodiment of the present invention has been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications can be made based on the technical idea of the present invention. is there.

For example, in the above three examples,
As a method of introducing nickel, a method of immersing the surface of the amorphous silicon film in an alkaline solution in which a nickel salt is dissolved to add a small amount of nickel and perform crystal growth is adopted. However, before the amorphous silicon film is formed, the surface of the base film may be dipped in an alkaline solution in which a nickel salt is dissolved to allow nickel to diffuse from the lower layer for crystal growth. That is, crystal growth may be performed from the upper surface side or the lower surface side of the amorphous silicon film. Further, as an impurity metal element that promotes crystallization, cobalt, palladium, platinum, copper, silver, gold, indium, tin, aluminum, phosphorus, arsenic, or antimony can be used in addition to nickel, and the same effect can be obtained.

Further, in the present embodiment, as a means for promoting the crystallinity of the crystalline silicon film, the heating method by irradiation of excimer laser which is a pulse laser is used, but other lasers (for example, continuous wave Ar laser) are also used. Similar processing is possible. Further, infrared light or light emitted from a flash lamp (so-called strong light) is used instead of laser light to raise the temperature to 1000 to 1200 ° C. (temperature of silicon monitor) in a short time to heat the sample.
TA (Rapid Thermal Annealing) or RT
A heat treatment also called P (rapid thermal process) may be used.

Further, as an application of the present invention, in addition to the active matrix type substrate for liquid crystal display, for example, a contact type image sensor, a thermal head with a built-in driver, an organic EL (Electroluminescence) element or the like is used as a light emitting element. A driver-incorporated optical writing element, a display element, a three-dimensional IC, or the like can be considered. Here, the organic EL element is an electroluminescent element using an organic material as a light emitting material.
Further, by using the present invention, high performance such as high speed and high resolution of these elements can be realized.

Furthermore, the present invention is not limited to the MOS type transistors described in the above embodiments, but is widely applied to all semiconductor processes of devices including bipolar transistors and static induction transistors using crystalline semiconductors as element materials. can do.

[0122]

As described above, according to the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate is
Since it has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating, the crystalline silicon film constituting the active region obtained by crystallization of the amorphous silicon film,
The crystallinity can be higher than that obtained by an ordinary solid phase growth method.

Further, the crystallization of the amorphous silicon film by heating is promoted by the catalytic element, so that a high quality crystalline silicon film can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower, an inexpensive glass substrate can be used.

Further, the concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , this catalytic element can effectively function when the amorphous silicon film is crystallized.

According to the method of manufacturing a semiconductor device of the present invention, the amorphous silicon film or the underlying film thereof is exposed to an alkaline solvent containing a catalytic element that promotes crystallization of the amorphous silicon film, and Since the element is introduced into the amorphous silicon film, it is possible to reduce variations in the addition amount of the catalyst element within the surface of the substrate and to control the addition amount of the catalyst element to a small amount.

According to the method of manufacturing a semiconductor device of the present invention, the amorphous silicon film or the underlying film thereof is selectively exposed to the alkaline solution containing the catalytic element by heat treatment to selectively remove the catalytic element. Amorphous silicon is selectively crystallized while being diffused into a crystalline silicon film, and by subsequent heat treatment, crystal growth is performed in a direction substantially parallel to the substrate surface from the crystallized portion to obtain the amorphous silicon. Since the lateral crystal growth region is formed in the silicon film, it is possible to obtain a crystallized region having significantly better crystallinity than the region into which the catalytic element is introduced.

Thus, by using the present invention,
A semiconductor device having a high-performance thin film transistor having uniform and stable characteristics over a large-area substrate can be obtained by a simple manufacturing process. Especially in a liquid crystal display device, pixel switching TF required for an active matrix substrate
It is possible to realize a driver monolithic type active matrix substrate having an active matrix portion and a peripheral driving circuit portion on the same substrate while simultaneously satisfying the uniformity of the characteristics of T and the high performance required for the TFT constituting the peripheral driving circuit portion. ,
This has the effect of making the module compact, improving the performance, and reducing the cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention.

FIG. 2 is a plan view illustrating a semiconductor device and a manufacturing method thereof according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment in the order of steps.

FIG. 4 is a plan view illustrating a semiconductor device and a method for manufacturing the same according to a third embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the method of manufacturing the semiconductor device of the third embodiment in the order of steps.

FIG. 6 is a diagram showing a correlation of the amount of a catalyst element added to an amorphous silicon film with respect to the pH value of a solvent in which the catalyst element is dissolved.

[Explanation of symbols]

10, 20, 31 N-type TFT 30 CMOS circuit 32 P-type TFT 100, 200, 300 Semiconductor device 200a, 300a Nickel trace addition region 101, 201, 301 Glass substrate 102, 202, 302 Base insulating film 103, 203, 303 Non Crystalline silicon film 103a, 203a, 303a Crystalline silicon film 103i, 203i, 303n, 303p Active region 105, 205, 305 Alkaline solution 206, 306 Crystal growth direction 107, 207, 307 Gate insulating film 108, 208, 308, 309 Gate electrode 109 Anodized layer 110, 210, 310, 311 Channel region 111, 112, 211, 212, 312, 313, 3
14, 315 Source / drain regions 113, 213, 316 Interlayer insulators 113a, 213a, 316n, 316p Contact holes 114, 115, 214, 215, 317, 318, 3
19 electrode wiring 203b, 303b lateral crystal growth region 204, 304 mask

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/786 21/336

Claims (15)

[Claims] 1. A substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film by heat treatment, wherein the active region is amorphous. A catalyst element which promotes crystallization of the silicon oxide film, and the catalyst element contained in the active region is exposed to an alkaline solvent containing the catalyst element to expose the amorphous silicon film or the underlying film A semiconductor device introduced into a crystalline silicon film. 2. A substrate having an insulative surface, and an active region formed on the insulative surface of the substrate by crystallizing an amorphous silicon film by heat treatment, the active region being heat treated. The crystal grains are part of the lateral crystal growth region in which the crystal grains are in a substantially single crystal state and are formed by the crystal growth progressing in the direction parallel to the substrate surface from the crystallization region in the vicinity thereof. The activated region contains a catalytic element that promotes crystallization of the amorphous silicon film, and the catalytic element contained in the active region contains the amorphous silicon film or the underlying film thereof in an alkaline state containing the catalytic element. A semiconductor device, which is partially exposed to a solvent and selectively introduced into the amorphous silicon film. 3. The semiconductor device according to claim 1, wherein in the active region, a crystallized region obtained by heat treatment of the amorphous silicon film is irradiated with laser light or intense light. A semiconductor device in which the crystal is processed. 4. The semiconductor device according to claim 1, wherein the catalytic element that promotes crystallization of the amorphous silicon film is surface-adsorbed on the amorphous silicon film in an ionic state. apparatus. 5. The semiconductor device according to claim 1, wherein the alkaline solvent that dissolves the catalyst element has a pH value within a range of 8 to 14. 6. The semiconductor device according to claim 1, wherein the alkaline solvent that dissolves the catalytic element has a pH value within a range of 9 to 12. 7. The semiconductor device according to claim 1, wherein the alkaline solvent in which the catalytic element is dissolved has ammonia water as a main component. 8. The semiconductor device according to claim 1, wherein the alkaline solvent in which the catalyst element is dissolved is a mixed solution of ammonia water and hydrogen peroxide water. 9. The semiconductor device according to claim 1, wherein the catalyst element is Ni, Co, Pd, Pt, Cu,
A semiconductor device using one or a plurality of kinds of elements selected from Ag, Au, In, Sn, Al, P, As, and Sb. 10. The semiconductor device according to claim 1, wherein the concentration of the catalyst element in the active region is 1 × 10 ^15.
A semiconductor device having atoms / cm ³ to 1 × 10 ¹⁹ atoms / cm ³ . 11. A step of forming an amorphous silicon film on a substrate, and the step of forming the amorphous silicon film or a lower layer thereof in an alkaline solution in which a catalytic element that promotes crystallization of the amorphous silicon film is dissolved or dispersed. A method of manufacturing a semiconductor device, comprising: a step of exposing a ground film; and a step of introducing the catalyst element into the amorphous silicon film by heat treatment and crystallizing the amorphous silicon film. 12. A step of forming an amorphous silicon film on a substrate, and the step of forming the amorphous silicon film or a lower layer thereof in an alkaline solution in which a catalytic element that promotes crystallization of the amorphous silicon film is dissolved or dispersed. The catalytic element is selectively introduced into the amorphous silicon film from the region of the amorphous silicon film or the underlying film exposed to the alkaline solution by the step of partially exposing the underlying film and the heat treatment, and By the step of selectively crystallizing the crystalline silicon film and the subsequent heat treatment, crystal growth is carried out in a direction substantially parallel to the substrate surface from this crystallized portion, and lateral crystal is grown in the amorphous silicon film. A method of manufacturing a semiconductor device, the method including the step of forming a growth region. 13. The method of manufacturing a semiconductor device according to claim 11, wherein after the amorphous silicon film is crystallized by heat treatment,
A method of manufacturing a semiconductor device, comprising the step of irradiating the amorphous silicon film with laser light or strong light to process the crystal. 14. The method of manufacturing a semiconductor device according to claim 11, wherein the step of exposing the amorphous silicon film to the alkaline solution is performed by subjecting the substrate having the amorphous silicon film formed on the surface thereof to the alkaline solution. A method of manufacturing a semiconductor device by immersing the semiconductor device in the substrate. 15. The semiconductor device according to claim 11, wherein after exposing the amorphous silicon film to the alkaline solution, a portion of the amorphous silicon film exposed to the alkaline solution is
A method for manufacturing a semiconductor device, comprising a step of cleaning with pure water.