JPH0888270A - Method of forming element isolating region - Google Patents

Abstract

PURPOSE: To enhance an element in reliability and yield by a method wherein a step caused by an element isolating region is lessened without deteriorating the element in performance. CONSTITUTION: A first oxide film 31 is selectively formed along the sides of a region (element forming region) of a semiconductor substrate 11 where an element is formed (first process). Then, the upper part of the first oxide film 31 is removed so as to make its surface nearly flush with that of the semiconductor substrate 11 (second process). Thereafter, a second oxide film 32 thinner than the first oxide film 31 is selectively formed on a part of the semiconductor substrate 11 where the first oxide film 31 is not effective when, for example, elements are isolated from each other in a BiCMOS device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an element isolation region for element isolation of a semiconductor device.

[0002]

2. Description of the Related Art Large-scale integrated circuits (LSIs) are required to have large scale and high performance. Among them, BiCMOS devices, which have the features of high integration and low power consumption of CMOS devices and the features of high speed of bipolar transistors, have attracted attention. Here, attention is paid to the element isolation technology of the BiCMOS device.

First, in the CMOS device process, L
In order to reduce the conversion difference due to so-called bird's beak that occurs during OCOS oxidation, it is necessary to reduce the film thickness of the LOCOS oxide film. Therefore, the LOCOS oxide film cannot be formed excessively thick. For example, in the process of a CMOS device having a gate length of about 0.3 μm to 0.5 μm, the film thickness of the LOCOS oxide film is 0.25 μm to
The thickness is about 0.4 μm.

On the other hand, in a bipolar transistor process, an epitaxial layer of about 1.0 μm is usually formed as a LO layer.
It is necessary to separate the COS oxide film or the LOCOS oxide film by a PN junction. Therefore, the film thickness of the LOCOS oxide film needs to be about 0.8 μm to 1.0 μm.

The BiCMOS process requires LOCOS oxide films having different thicknesses. Therefore, Japanese Patent Application No. 3
In the "Method for manufacturing a BiCMOS device and its element isolation region" disclosed in JP-A-351101, a semiconductor layer around a formation region of a bipolar transistor is etched to form a groove having a depth of about 600 nm, and the groove and the groove side. A thin LOCOS oxide film (for example, a thickness of 40
0 nm) is proposed. By forming the groove in this way, even if the LOCOS oxide film is thin, the element isolation region is effectively thickened by the depth of the groove. The above conventional example has the same effect as that of forming the element isolation region at a depth of about 800 nm.

[0006]

However, in the above-described method for manufacturing the element isolation region, since the semiconductor layer is etched to form the groove, a step is formed by the amount of the groove formed.
The level difference is as large as about 400 nm with respect to the semiconductor layer surface. As a result, the flatness deteriorates, so that it becomes impossible to perform exposure in the optimum depth of focus range during exposure, for example. Therefore, the shape of the resist pattern obtained by the development process after exposure deteriorates. When etching is performed using such a resist pattern, a short circuit or disconnection occurs in the wiring process. In addition, the coverage is deteriorated in the film forming process due to the deterioration of the flatness. Therefore, when a pattern is formed with a film having low coverage, a short circuit or disconnection occurs.

Further, since the element isolation film thickness around the bipolar transistor is about 400 nm, the capacitance between the metal wiring on the element isolation region and the semiconductor substrate increases. Therefore, for example, the operating speed of the bipolar transistor is reduced.

An object of the present invention is to provide a method for forming an element isolation region having excellent flatness without deteriorating the characteristics of a bipolar transistor and a CMOS transistor of a BiCMOS device.

[0009]

SUMMARY OF THE INVENTION The present invention is a method of forming an element isolation region, which is made to achieve the above object.
That is, in the first step, the first peripheral portion of the region of the surface of the semiconductor substrate where the element is to be formed is selectively
Form an oxide film. Then, in a second step, the upper portion of the first oxide film is removed to a height substantially equal to the surface of the semiconductor substrate, and the surface of the semiconductor substrate and the surface of the first oxide film are formed on substantially the same plane. Then, in a third step, a second oxide film thinner than the first oxide film is selectively formed on the surface of the semiconductor substrate on which the first oxide film is not formed.

Further, before forming the first oxide film, a groove may be formed in the semiconductor substrate at the position where the first oxide film is formed, and then the first oxide film may be formed in the groove.

Impurity is introduced into the semiconductor substrate through at least one of the first and second oxide films, and element isolation diffusion is performed in a state of connecting to the one of the first and second oxide films through which the impurity is passed. Form the layers.

The first oxide film is formed on the peripheral side of the bipolar transistor formation planned region of the BiCMOS device in which the bipolar transistor and the CMOS transistor are formed on the same semiconductor substrate, and the space between the MOS transistor formation planned regions of the BiCMOS device is described above. It is formed of the second oxide film. Further, the second oxide film is formed between the region where the base of the bipolar transistor is to be formed and the region where the collector extraction diffusion layer is to be formed.

[0013]

In the above method for forming the element isolation region, after the first oxide film is formed, the upper portion of the first oxide film is removed to a height almost equal to the surface of the semiconductor substrate, so that the semiconductor substrate and the first oxide film are removed. Each surface of is flattened on substantially the same plane. Since the second oxide film thinner than the first oxide film is formed in this state, the step difference due to the element isolation region is minimized. If the first oxide film is formed thick, the oxide film region is formed deep. Further, by forming the second oxide film thinner than the first oxide film, an element isolation region is formed of the first oxide film in a region where a thick element isolation region is required, such as a peripheral region of a bipolar transistor, and a MOS transistor is formed. A second oxide film is formed in a sufficient area such as a thin element isolation region between transistors. As a result, the length of the bird's beak of the oxide film is minimized, and the area occupied by the element isolation region is reduced.

Further, in the method of forming the groove in the semiconductor substrate in the first step and then forming the first oxide film in the groove, the same effect as described above can be obtained. In this case, the first oxide film, which is thinner than the above method, forms an element isolation region having a depth approximately the same as the above method.

In the method of forming the element isolation diffusion layer by introducing impurities into the semiconductor substrate through at least one of the first and second oxide films, the element isolation diffusion layer is formed below the impurity-doped oxide film. Since the element isolation diffusion layer is formed, the element isolation region becomes deeper by the amount corresponding to the element isolation diffusion layer. Therefore, the element isolation performance is improved.

In the method of forming the second oxide film on the element formation region side of the first oxide film and in the state of being connected to the first oxide film, the stress generated at the end of the first oxide film is applied to the second oxidation film. Relax with a membrane.

Since the element isolation region is formed by the first oxide film on the side periphery of the bipolar transistor formation planned region of the BiCMOS device in which the bipolar transistor and the CMOS transistor are formed on the same semiconductor substrate, the element isolation region is formed in a deep state. Is formed. BiCMO
First between the regions where the MOS transistor of the S device is to be formed
Since the element isolation region is formed by the second oxide film having a thickness smaller than that of the oxide film, the bird's beak length becomes short.
Further, the length of the bird's beak is shortened by forming the second oxide film between the region where the base is to be formed and the region where the collector extraction diffusion layer is to be formed. Therefore, the area of the element isolation region in the chip is reduced.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to the process chart of FIG. As shown in (1) of FIG. 1, the semiconductor substrate 11 includes, for example, a P-type silicon substrate 12, and an N-type epitaxial layer 13 having a thickness of 1.0 μm formed on the surface of the P-type silicon substrate 12 by epitaxial growth. Consists of.

First, in the first step, the first oxide film 31 is selectively formed on a side peripheral portion of a region (hereinafter, referred to as an element formation region) 21 in which an element is to be formed in the semiconductor substrate 11 by, for example, a LOCOS oxidation method. To form. This first oxide film 3
1 is formed to have a film thickness of, for example, about 1.6 μm, and is formed to a depth of about 800 nm with respect to the epitaxial layer 13. Therefore, the first oxide film 31 having a height of about 800 nm is exposed on the surface of the epitaxial layer 13.

Although the LOCOS oxidation method has been described as an example of the method of forming the first oxide film 31, the so-called improved LOCOS oxidation method for suppressing bird's beak, the pad LOCOS oxidation method using a polycrystalline silicon film, etc. It is also possible to use.

After that, the silicon nitride film (not shown) used in the LOCOS oxidation method is removed by, for example, wet etching.

Next, the second step shown in FIG. 1B is performed. In this step, a flattening film 14 having a flat upper surface and covering the first oxide film 31 is formed on the entire surface of the semiconductor substrate 11 on the side where the first oxide film 31 is formed. The flattening film 14 is, for example, a resist or SOG (Spin on glass) having an etching rate substantially equal to that of the first oxide film 31.
And is formed by a coating technique.

Then, for example, oxygen (O
₂) And trifluoromethane (CHF ₃) With mixed gas
By performing the etch back used, the first oxide film 3
1 has the surface of the semiconductor substrate 11 (epitaxial layer 1
This first oxide film 31 is formed to a height almost equal to the surface of 3).
Remove the upper layer. As a result, as shown in (3) of FIG.
And the surface of the semiconductor substrate 11 (epitaxial layer 13)
The surface of the first oxide film 31 is formed in substantially the same plane.

In the above-mentioned planarization technique, the method of etching back is explained. However, as another method of the planarization technique, for example, by polishing, the first higher than the surface of the semiconductor substrate 11 is used.
It is also possible to polish and remove the portion of the oxide film 31 to form the surface of the semiconductor substrate 11 and the surface of the first oxide film 31 at substantially the same height.

Thereafter, the third step shown in FIG. 1 (4) is performed. In this step, for example, by the LOCOS oxidation method,
Semiconductor base 11 on which the first oxide film 31 is not formed
The second oxide film 32 is selectively formed on the surface of the (epitaxial layer 13). Then, the first and second oxide films 31, 3
2 is the element isolation region. For the second oxide film 32, in addition to the LOCOS oxidation method, a so-called improved LOCOS oxidation method that suppresses bird's beak, a pad LOCOS oxidation method that forms a polycrystalline silicon film and performs oxidation, or the like may be used. It is possible.

After that, the silicon nitride film (not shown) used in the LOCOS oxidation method when forming the second oxide film 32 is removed by, for example, wet etching.

In the method of forming the element isolation region, after forming the first oxide film 31, the first oxide film 31 is formed on the semiconductor substrate 1.
1 is removed to the same height as the semiconductor substrate 11
The surface side of is flattened. Therefore, by forming the first oxide film 31 thick, even if the first oxide film 31 is formed deep in the semiconductor substrate 11, no step is formed on the surface of the semiconductor substrate 11. Further, since the second oxide film 32 thinner than the first oxide film is formed, the step due to the element isolation region is minimized. In this case, the step is the second oxide film 32.
It will be about half of the thickness. For example, the second oxide film 32
When the film thickness is 400 nm, the step difference is about 200 nm. Therefore, the step is about half of the conventional element isolation region. Therefore, in the exposure process, the margin of the depth of focus is increased, and the exposure of the fine pattern can be performed with high accuracy. In addition, the coverage can be improved in the film forming process. Further, since the short circuit and the disconnection are eliminated in the wiring process, the reliability of the wiring can be improved.

The second oxide film 32 is replaced with the first oxide film 31.
Since it is formed to be thinner than that, a device isolation region is formed by the first oxide film 31 in a region where a deep device isolation region is required (for example, the periphery of a bipolar transistor), and a sufficient device isolation region (for example, between MOS transistors) is formed. ) Is second
The oxide film 31 is formed. As a result, bird's beaks that grow in proportion to the thickness of the oxide film can be minimized.
Therefore, the area occupied by the element isolation region becomes small.

In addition, the element formation region 2 is formed from the first oxide film 31
Since the second oxide film 32 is formed on the first side and in a state of being connected to the first oxide film 31, the stress generated at the end of the first oxide film 31 is relieved by the second oxide film 32.

Next, a second embodiment of the method of forming the element isolation region will be described with reference to the process chart of FIG. In the figure, the same components as those described with reference to FIG.

As shown in FIG. 2A, the semiconductor substrate 1
1 includes, for example, a P-type silicon substrate 12, and an N-type epitaxial layer 13 having a thickness of about 1.0 μm formed on the surface of the P-type silicon substrate 12 by epitaxial growth.

First, in the first step, a groove 33 is selectively formed in a side peripheral portion of a region (hereinafter, referred to as an element formation region) 21 in which an element is to be formed in a semiconductor substrate 11 by a lithography technique and etching. To do. The groove 33 is
For example, the depth is about 400 nm. After that, the resist film (not shown) serving as an etching mask formed by the lithography technique is removed by, for example, an ashing process or a wet etching process.

Next, as shown in FIG. 2B, the first oxide film 34 is formed in the groove 33 (the portion indicated by the chain double-dashed line) by, for example, the LOCOS oxidation method. The first oxide film 34 is formed to have a film thickness of about 0.8 μm, for example. Normally, the oxide film formed by thermal oxidation is
2 is formed on the surface, the first oxide film 34 is formed at substantially the same height as the surface of the semiconductor substrate 11 (epitaxial layer 13). Therefore, about 400 nm is formed from the surface of the epitaxial layer 13 to the inside thereof.

For the second oxide film 34, in addition to the LOCOS oxidation method, a so-called improved LOCOS oxidation method for suppressing bird's beaks, a pad LOCOS oxidation method for forming a polycrystalline silicon film for oxidation, and the like are used. It is also possible to use.

After that, the silicon nitride film (not shown) used in the LOCOS oxidation method is removed by, for example, wet etching.

Then, in the same manner as described in (2) to (4) of FIG. 1, the flattening step of the second step is first performed.
In this step, a flattening film (not shown) is formed, and then etch back is performed to remove the bird's head 31B (portion indicated by a chain double-dashed line) as shown in (3) of FIG. As a result, the surface of the semiconductor substrate 11 and the surface of the first oxide film 34 are formed on substantially the same plane. And the second of the third step
A step of forming an oxide film is performed. As a result, as shown in (4) of FIG. 2, the second oxide film is selectively formed on the surface of the semiconductor substrate 11 (epitaxial layer 13) where the first oxide film 34 is not formed.
The oxide film 32 is formed. Then, the first and second oxide films 34 and 32 become element isolation regions.

In the method of forming the element isolation region described above with reference to FIG. 2, since the groove 33 is formed in the semiconductor substrate 11 and then the first oxide film 34 is formed in the groove 33, the film of the first oxide film 34 is formed. The thickness is the first oxide film (3
An element isolation region having an equivalent depth is formed by ½ of the film thickness of 1). Therefore, the stress concentration at the end of the first oxide film 34 is relaxed as compared with the case of the first embodiment. Further, the same effects as those described in the first embodiment can be obtained.

Next, a method of forming an element isolation diffusion layer below the oxide film will be described with reference to the process chart of FIG.

By the method described in the first (or second) embodiment, as shown in (1) of FIG. 3, the first oxide film 31 and the first oxide film 31 are formed on the outer peripheral portion of the element forming region 21 of the semiconductor substrate 11. A two oxide film 32 is formed. The first oxide film 31 is
Although not shown here, the first oxide film 34 described in FIG. 2 may be used.

Then, an ion implantation mask 35 made of a resist is formed by a coating technique. Then, an opening 36 is provided in the ion implantation region of the ion implantation mask 35 by the lithography technique.

Then, as shown in FIG. 3B, the first oxide film 31 is formed through the opening 36 by ion implantation.
Impurities such as boron (B ⁺ ) or boron difluoride (BF ₂ ) are introduced into the semiconductor substrate 11 through at least one of the second oxide film 32 and the second oxide film 32.
⁺ )] Is introduced. Then, a P ⁺ type element isolation diffusion layer (hereinafter referred to as an element isolation diffusion layer) 37 connected to the lower portion of the first oxide film 31 is formed by the introduced impurities.

After that, the ion implantation mask 35 is removed by an ashing process, a wet process or the like.

In the method of forming the element isolation diffusion layer,
Impurities are introduced into the semiconductor substrate 11 through at least one of the first and second oxide films 31 and 32,
Since the element isolation diffusion layer 37 is formed in a state of being connected to one of the oxide films 31 and 32 through which the impurity passes, the element isolation region is further deepened by this element isolation diffusion layer 37. Therefore, the element isolation performance is improved.

Next, an example in which the method for forming an element isolation region described in the above first and second embodiments is applied to the method for forming an element isolation region of a BiCMOS device in which a bipolar transistor and a CMOS transistor are formed on the same substrate. ,
This will be described below with reference to the manufacturing process chart of FIG.

As shown in FIG. 4A, for example, P type <
100> Silicon substrate (hereinafter referred to as “silicon substrate”) 51
Using, the buried layer 53 is formed in a region where a bipolar transistor is to be formed (hereinafter referred to as a bipolar region) 52 by a known technique such as antimony (Sb) diffusion. Then, using an epitaxial growth technique, for example, the resistance ρ = 1.0Ω
The N type epitaxial layer 54 having a thickness of cm and a thickness t of 1.0 μm is formed. At this time, the buried layer 53 formed previously
Is also diffused into the lower portion of the epitaxial layer 54. In this way, the semiconductor substrate (for example, silicon substrate) 55 including the silicon substrate 51 and the epitaxial layer 54 is formed.

Next, a groove 56 is formed on the side of the bipolar region 52 of the semiconductor substrate 55 by lithography and etching. This groove 56 is LOCOS
The first oxide film to be formed by the oxidation method is formed to a depth of about ½ (for example, a depth of 400 nm). After that, the resist mask (not shown) formed by the lithography technique is removed by, for example, an ashing process.

Then, as shown in (2) of FIG.
By the OS oxidation method, the first oxide film 57 (the first oxide film shown in FIG. 1) is formed so as to fill the groove 56 (the portion indicated by the two-dot chain line).
Corresponding to the oxide film 31) is formed. By thus forming the first oxide film 57 in the groove 56, the surface of the epitaxial layer 54 of the semiconductor substrate 55 and the surface of the first oxide film 57 are formed at substantially the same height.

Next, a flattening film 58 made of resist or SOG (Spin on glass) is formed on the entire surface of the semiconductor substrate 55 by a coating technique. Then, by dry etching using a mixed gas of oxygen (O ₂ ) and trifluoromethane (CHF ₃ ) as an etching gas, the flattening film 58 and the so-called bird's head 57B generated at the time of LOCOS oxidation are removed.

As a result, as shown in FIG. 4C, the surface of the semiconductor substrate 55 is flattened. The flattening step can also be performed by polishing.

Next, PMO is formed by the LOCOS oxidation method.
An S transistor formation planned region (hereinafter referred to as a PMOS region) 61 and an NMOS transistor formation planned region (hereinafter referred to as N region)
A second oxide film 63 (corresponding to the second oxide film 32 in FIG. 1) having a film thickness of about 400 nm, which functions as an element isolation between the second oxide film 32 and the MOS region 62, is formed. The second oxide film 63 cannot be formed excessively thick because, for example, a so-called bird's beak increases an element isolation region and stress generated during selective oxidation causes crystal defects in the silicon substrate. Furthermore, if necessary, the second oxide film 63 is formed between the base formation planned region 64 of the bipolar region 52 and the collector extraction diffusion layer formation planned region 65, and on the side peripheral portion of the first oxide film and the like. . As described above, the element isolation region is formed by the first and second oxide films 57 and 63.

In the method of forming the element isolation region described with reference to FIG. 4 above, the thick first oxide film 57 is formed on the side peripheral side of the bipolar region 52 of the BiCMOS device in which the bipolar transistor and the CMOS transistor are formed on the same substrate. Since the element isolation region is formed, the element isolation region is formed in a deep state. Since the surface side of the semiconductor substrate 55 is flattened, the step due to the first oxide film 57 is eliminated. In addition, the PMOS regions 61 and N of the BiCMOS device
Since the element isolation region is formed between the MOS region 62 and the second oxide film 63 which is thinner than the first oxide film, the bird's beak is reduced. Therefore, the area of the element isolation region in the chip is reduced.

The thickness of the first oxide film 57 is, for example, 8
When the thickness is set to about 00 nm, when a metal wiring layer (not shown) is formed on the first oxide film 57, the capacitance between the metal wiring layer and the silicon substrate 51 is reduced.
Therefore, the operating speed of the element can be improved. Further, the second oxide film 63 functions as a separation film between the planned formation region 64 of the base and the planned formation region 65 of the collector extraction diffusion layer, and reduces the capacitance between the base and the collector.

[0053]

As described above, according to the present invention,
After the first oxide film is formed, the semiconductor substrate and each surface of the first oxide film are flattened so as to be substantially flush with each other, and then the second oxide film thinner than the first oxide film is formed. The step difference due to the area is minimized. Therefore, it is possible to improve the accuracy of exposure, improve the coverage of film formation, improve the reliability of wiring, and the like. Further, since the second oxide film is formed to be thinner than the first oxide film, the second oxide film can be formed in a sufficient area in the thin element isolation region. Therefore, the length of the bird's beak of the oxide film is minimized, and the area occupied by the element isolation region is reduced. As a result, high integration of the device can be achieved.

According to the method of forming the first oxide film in the groove after forming the groove in the semiconductor substrate, the first oxide film can be thinly formed, so that the growth of bird's beak can be reduced. As a result, the area occupied by the element isolation region is narrowed, so that high integration of the element can be achieved.

According to the method of forming the element isolation diffusion layer,
The device isolation region becomes deeper by the amount of the device isolation diffusion layer. Therefore, the element isolation performance can be improved.

According to the method of forming the second oxide film on the element formation region side of the first oxide film and in the state of being connected to the first oxide film, the stress generated at the end of the first oxide film is It can be relaxed with a two-oxide film. Therefore, the leak characteristic can be improved.

In a method of forming an element isolation region with the first oxide film on the side peripheral side of the bipolar transistor formation planned region of the BiCMOS device, and forming the element isolation region with the second oxide film between the MOS transistor formation planned regions. Thus, the effects of the above invention can be incorporated in the BiCMOS process. Therefore, reliability and yield can be improved. Further, the same effect as above can be obtained by the method of forming the element isolation region with the second oxide film between the region where the base is to be formed and the region where the collector extraction diffusion layer is to be formed.

[Brief description of drawings]

FIG. 1 is a process drawing of forming an element isolation region of a first embodiment.

FIG. 2 is a process drawing of forming an element isolation region of a second embodiment.

FIG. 3 is a process drawing of forming an element isolation diffusion layer.

FIG. 4 is a process drawing of forming an element isolation region in a BiCMOS process.

[Explanation of symbols]

 11 semiconductor substrate 21 element formation region 31 first oxide film 32 second oxide film 33 groove 34 first oxide film 37 element isolation diffusion layer 52 bipolar region 55 semiconductor substrate 57 first oxide film 61 PMOS region 62 NMOS region 63 second oxide Film 64 Base formation area 65 Collector extraction diffusion layer formation area

Claims (6)

[Claims] 1. A first step of selectively forming a first oxide film on a side peripheral portion of a region where an element is to be formed on a surface of a semiconductor substrate, and to a height approximately equal to the surface of the semiconductor substrate. A second step of removing an upper portion of the first oxide film to form a surface of the semiconductor substrate and a surface of the first oxide film on substantially the same plane; and the semiconductor in which the first oxide film is not formed A method for forming an element isolation region, comprising a third step of selectively forming a second oxide film thinner than the first oxide film on the surface of the substrate. 2. The method for forming an element isolation region according to claim 1, wherein, before forming the first oxide film, the element isolation region is selectively formed on a side peripheral portion of a region where an element is to be formed on a surface of the semiconductor substrate. A method of forming an element isolation region, which comprises forming a groove in the groove and then forming the first oxide film in the groove. 3. The method for forming an element isolation region according to claim 1, wherein impurities are introduced into the semiconductor substrate through at least one of the first oxide film and the second oxide film, 1. A method of forming an element isolation region, characterized in that an element isolation diffusion layer is formed in a state of being connected to a side of the second oxide film through which the impurity passes. 4. Any one of claim 1 to claim 3.
The method for forming an element isolation region according to the item 1, wherein the second oxide film is formed on the element formation region side of the first oxide film and connected to the first oxide film. Forming method. 5. Any one of claims 1 to 4.
In the method for forming an element isolation region described in the item 1, the element isolation region is formed by the first oxide film on a side peripheral side of a bipolar transistor formation planned region of a BiCMOS device in which a bipolar transistor and a CMOS transistor are formed on the same semiconductor substrate. A method for forming an element isolation region, characterized in that the element isolation region is formed by the second oxide film between the MOS transistor formation planned regions of the BiCMOS device. 6. The method for forming an element isolation region according to claim 1, wherein the element isolation region is formed by the first oxide film on a side peripheral side of a bipolar transistor formation planned region. A method of forming an element isolation region, characterized in that an element isolation region is formed of the second oxide film between a region where a base of the bipolar transistor is to be formed and a region where a collector extraction diffusion layer is to be formed.