JPH0883918A - Semiconductor device - Google Patents

Abstract

PURPOSE: To form a depletion layer in such a manner that a diode is scarcely damaged at the time of backward biasing by deviating a resistive conductive film to be formed in a multilayer, and increasing the sheet resistance of its outer peripheral side. CONSTITUTION: A resistive conductive film 9 made of a combination of first - third films 13-15 is divided in a direction from an anode electrode 7 toward an outer periphery into an inner peripheral side part L1 laminated with first, second and third film 13-15, an intermediate part L2 laminated with the second and third films 14, 15, and an outer peripheral side part L3 of only the third film 15. Since the first - third films 13-15 have substantially equal resistivities, when it is regarded as being one film, the thicknesses are sequentially reduced from the part L1, the part L2 and the part L3, and the sheet resistances are sequentially increased. Accordingly, a depletion layer of the shape in which a field concentration is more weakened as compared with conventional potential gradient can be formed, thereby obtaining the withstand voltage improving effect.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a resistive field plate.

[0002]

2. Description of the Related Art In a planar semiconductor device, it is known that when a reverse bias is applied, the breakdown voltage of the peripheral portion (bent portion) of the PN junction is lower than the breakdown voltage of the central portion (planar portion) of the PN junction. There is. This is because electric field concentration is likely to occur in the peripheral portion of the PN junction, which makes it difficult to increase the breakdown voltage. As means for solving such a problem, Japanese Patent Laid-Open No. 58-53860 discloses a high breakdown voltage structure including a resistive field plate. A high breakdown voltage diode adopting this high breakdown voltage structure is a silicon or compound having an N ⁺ type semiconductor region 1, an N type semiconductor region 2, a P type semiconductor region 3 and an N ⁺ type semiconductor region 4 as shown in FIG. A semiconductor substrate 5 such as a semiconductor (for example, GaAs) is electrically connected to the P-type semiconductor region 3 and the N ⁺ -type semiconductor region 4, respectively, through an opening of an insulating film 6 formed on one main surface of the semiconductor substrate 5. Anode electrode 7 and EQR (equipotential ring) electrode 8 made of a metal film (low resistance conductive film)
And a resistive conductive film 9 formed to bridge between the anode electrode 7 and the EQR electrode 8, and a metal film (low-resistance conductive film) formed on the other main surface of the semiconductor substrate 5. Have 10. Here, the N ⁺ type semiconductor region 1
The N-type semiconductor region 2 is a cathode region of the diode, and the P-type semiconductor region 3 having a lower resistivity than the N-type semiconductor region 2 is an anode region. The resistive conductive film 9 has a sheet resistance of about 10 ⁶ to 10 ¹⁴ Ω / □. The resistive conductive film 9 is formed on the entire upper surface of the insulating film 6 located between the anode electrode 7 and the EQR electrode 8, surrounds the anode electrode 7 in a ring shape, and functions as a so-called resistive field plate. It contributes to the improvement of the breakdown voltage around the PN junction.

In the diode of FIG. 1, a PN junction 1 formed by an N-type semiconductor region 2 and a P-type semiconductor region 3 is formed.
When a voltage is applied between the anode and cathode electrodes 7 and 10 so that 1 is in the reverse bias state, the resistive conductive film 9 is connected to the N ⁺ type semiconductor region 4 from the connection side (outer peripheral side). A minute current flows toward the connection side (inner peripheral side) with the anode electrode 7. Therefore, in the resistive conductive film 9, a voltage gradient based on this minute current causes a potential gradient in which the potential decreases linearly (linearly) from the N ⁺ type semiconductor region 4 side toward the anode electrode 7 side. As a result, the resistive conductive film 9 functions as a field plate whose potential changes linearly, satisfactorily expands the depletion layer 12 generated adjacent to the PN junction 11, and relaxes the electric field concentration in the peripheral portion of the PN junction. It contributes to the improvement of breakdown voltage.

[0004]

By the way, if the diode has the structure shown in FIG. 1, it is possible to obtain a certain degree of withstand voltage improving effect, but it is difficult to obtain a sufficiently satisfactory withstand voltage improving effect. Since this is a field plate in which the potential of the resistive conductive film 9 changes linearly,
This is because the expansion of the depletion layer 12 formed adjacent to the PN junction 11 cannot sufficiently weaken the electric field concentration. This kind of problem also occurs in a Schottky barrier semiconductor device.

Therefore, an object of the present invention is to provide a semiconductor device capable of sufficiently improving the breakdown voltage.

[0006]

The present invention for solving the above-mentioned problems has a first and a second semiconductor region having a substantially flat surface, and the first semiconductor region is formed on the surface. The second semiconductor region has an exposed portion and has a first conductivity type, and the second semiconductor region is arranged in an island shape in the first semiconductor region so as to have an exposed portion on the surface. A semiconductor substrate having a second conductivity type opposite to the first conductivity type; a first electrode directly or indirectly connected to the second semiconductor region; and a first electrode directly connected to the first semiconductor region. Alternatively, a second electrode that is indirectly connected, an insulating film that is formed on the surface of the semiconductor substrate so as to surround the first electrode, and the first electrode that surrounds the second semiconductor region.
Of the semiconductor region is arranged on the insulating film so as to face the surface of the semiconductor region, the inner peripheral side portion thereof is connected to the first electrode, and the outer peripheral side portion thereof is connected to the first semiconductor region. The present invention relates to a semiconductor device including a resistive conductive film, wherein a sheet resistance of the inner peripheral side portion of the resistive conductive film is smaller than a sheet resistance of the outer peripheral side portion. Incidentally, in the Schottky barrier semiconductor device as shown in claim 2, the sheet resistance can be changed as in the case of claim 1. Further, as described in claim 3, the sheet resistance can be changed by changing the thickness of the resistive conductive film.

[0007]

According to the invention of each claim, the potential change rate in the direction from the inner circumference to the outer circumference in the inner peripheral side portion of the resistive conductive film is smaller than that in the outer peripheral side portion, and the pn junction is formed. Alternatively, the boundary between the depletion layer based on the Schottky barrier and the depletion layer due to the resistive field plate action becomes gentle, and the breakdown voltage becomes sufficiently high. According to the invention of claim 3, regions having different sheet resistances can be easily formed.

[0008]

First Embodiment Next, a high breakdown voltage planar type diode having a resistive field plate according to a first embodiment of the present invention will be described with reference to FIGS. However, as shown in FIGS. 2 and 3, the diode of this embodiment is the same as the diode of FIG. 1 showing the conventional example except for the resistive field plate structure, and therefore, the same parts are designated by the same reference numerals. And its description is omitted.

The resistive conductive film 9 as the resistive field plate of the diode of this embodiment is composed of first, second and third films 13, 14 and 15 formed in a ring shape. Each of the first to third films 13 to 15 is, for example, SIPO.
It is a resistive conductive film called S (Semi Insulallng Polystallnc Sllicon) made of oxygen-added semi-insulating polycrystalline silicon film. First to third films 13 to 1
The resistivities of No. 5 are substantially the same, and the film thicknesses T1, T2 and T3 are set to T1 = 2T2 = 2T3.

The first film 13 is formed to have a region facing the main surface of the N-type semiconductor region 2 adjacent to the PN junction 11 with the insulating film 6 interposed therebetween, and is arranged so as to surround the electrode 7 in a ring shape. It is also connected to the electrode 7. The second film 14 is arranged on the outer peripheral side of the first film 14 on the insulating film 6 and also on the first film 13 and is connected to the electrode 7. The third film 15 is the second
Is disposed on the outer peripheral side of the film 14 on the insulating film 6 and also on the second film 14 and is connected to the electrode 7 and the EQR electrode 8.

The resistive conductive film 9 composed of a combination of the first to third films 13 to 15 is formed in the direction from the anode electrode 7 toward the outer periphery of the first, second and third films 13, 14 and 1.
Inner peripheral part L1 in which 5 is laminated, and second and third films 1
It can be divided into an intermediate portion L2 in which 4 and 15 are laminated and an outer peripheral portion L3 of only the third film 15. Since the first to third films 13 to 15 have substantially the same resistivity, the first to third films 13 to 15 can be regarded as one film together. In this way, when regarded as one film, the thickness becomes thinner in the order of the inner peripheral side portion L1, the intermediate portion L2, and the outer peripheral side portion L3, and the sheet resistance becomes the inner peripheral side portion L1,
The intermediate portion L2 and the outer peripheral side portion L3 become larger in this order. Further, in this embodiment, the inner peripheral side portion L1, the intermediate portion L2 and the outer peripheral side portion L3 are set to have the same width in the direction from the inner peripheral side to the outer peripheral side, each of which is about 40 μm. is there. Here, the regions where the thickness is changed in three steps between the anode electrode 7 and the EQR electrode 8 are the inner peripheral region L1, the intermediate region L2, and the outer peripheral region L.
It is defined as 3.

Next, a method of manufacturing the diode of FIG. 1 will be described with reference to FIG.
Will be described with reference to. First, as shown in FIG.
A plane-shaped quadrilateral semiconductor substrate 5 including the N ⁺ type semiconductor region 1, the N-type semiconductor region 2, the plane-shaped quadrangular P-type semiconductor region 3, and the ring-shaped N ⁺ type semiconductor region 4 is prepared. An insulating film 6 made of a silicon oxide film is formed on the upper surface of the semiconductor substrate 5. The insulating film 6 is composed of a thick portion used as a mask when the P type semiconductor region 3 and the N ⁺ type semiconductor region 4 are formed by diffusion and a thin portion formed at the time of diffusion. In the figure, the thickness is made uniform for convenience.

Next, the SIPO is formed on the entire upper surface of the semiconductor substrate 5.
The S film is formed, for example, by CVD (Chemical Vapor Deposition)
Form by the method. The sheet resistance of this SIPOS film can be set as desired by controlling the amount of oxygen introduced into the furnace during CVD, and in this embodiment, it is set to about 1 × 10 ¹⁰ Ω / □. . continue,
As shown in FIG. 3B, the SIPOS film is etched to form an annular first film 13 on a part of the insulating film 6. The first film 13 is formed in an annular shape so as to partially overlap with and surround the outer edge of the P-type semiconductor region 3 when seen in a plan view.

Next, SIPO having a sheet resistance of 2 × 10 ¹⁰ Ω / □ is formed on the entire upper surface of the first film 13 and the insulating film 6.
Like the first film 13, the S film is formed by the CVD method. Then, as shown in FIG.
The film is etched to form the second film 14. Second
The film 14 of the first film 13 and the part arranged on the upper surface of the first film 13
And a portion facing the N-type semiconductor region 2 with the insulating film 6 interposed therebetween. The second film 14 also has an annular shape when seen in a plan view, and the inner edge portion is located outside the inner edge portion of the first film 13.

Next, a sheet resistance of 2 × 10 ¹⁰ Ω / □ is formed on the upper surfaces of the first and second films 13 and 14 and the entire upper surface of the insulating film 6.
The SIPOS film is formed by the CVD method. continue,
This SIPOS film is etched as shown in FIG. 3D to form a third film 15. The third film 15 extends to the portion disposed on the upper surface of the second film 14 and outside the second film 14, and the N-type semiconductor region 2 and the N ⁺ -type semiconductor region are provided with the insulating film 6 interposed therebetween. Facing 4 This third membrane 1
5 is also formed in an annular shape when seen in a plan view, and the inner peripheral side edge portion is located outside the second film 14.

Finally, openings 6a and 6b are formed in the insulating film 6, and a metal such as Al is vacuum-deposited on the upper surface of the semiconductor substrate 5 and is then etched to form the P-type semiconductor regions 3 and N ^+. An anode electrode 7 and an EQR electrode 8 which are in contact with the type semiconductor region 4 are formed as shown in FIG.
The anode electrode 7 is electrically connected to the inner peripheral edges of the first to third films 13 to 15 and has a portion facing the N-type semiconductor region 2 outside the outer peripheral edge of the PN junction 11. It extends on the first to third films 13 to 15.
The EQR electrode 8 is electrically connected to the outer peripheral end of the third film 15. As a result, the first to third films 13 to 1
The resistive field plate composed of the resistive conductive film 5 is formed between the anode electrode 7 and the EQR electrode 8 in a bridge shape. In addition, a metal such as Al is vacuum-deposited on the lower surface of the semiconductor substrate 5 to form an N ⁺ type semiconductor region 1.
A cathode electrode 10 is formed in contact with.

When a voltage that reverse-biases the PN junction 11 of the diode of this embodiment is applied between the anode electrode 7 and the cathode electrode 10, the depletion layer spreads from the PN junction 11 as in the case of the conventional diode. Also, the first to the third
E on the resistive field plate consisting of the membranes 13-15 of
A minute current flows from the QR electrode 8 toward the anode electrode 7, and a potential gradient based on the minute current is formed in the lateral direction of the substrate 5. Here, the resistive field plate, that is, the resistive conductive film 9 formed of the combination of the first to third films 13 to 15 is
The layer thickness is 3 from the anode electrode 7 to the EQR electrode 8.
And the resistivity of the first to third films 13 to 15 is the same. As a result, the layer resistance (sheet resistance) of the resistive field plate, that is, the resistive insulating film 9 increases in three steps from the anode electrode 7 to the EQR electrode 8.
The ratio of the sheet resistances R1, R2 and R3 of the inner peripheral portion L1, the intermediate portion L2 and the outer peripheral portion L3 is 1: 2: 4. As a result, the potential gradient becomes gentle on the anode electrode 7 side and steep on the outside as shown by the characteristic line A in FIG. be able to. Therefore, the effect of improving the breakdown voltage can be obtained more remarkably than the conventional example.

[0018]

[Second Embodiment] Next, a diode according to a second embodiment and a method of manufacturing the same will be described with reference to FIGS. However, in FIGS. 5A to 5E, substantially the same parts as those in FIGS. 1 and 2 are designated by the same reference numerals, and the description thereof will be omitted.

The diode of the second embodiment is shown in FIG.
As shown in FIG. 5, the resistive conductive film 9 is composed of a combination of three regions having the same thickness but different resistivities.

In order to form the diode of FIG. 5E, first, the same one as that of FIG. 3A showing the first embodiment is prepared, and as shown in FIG. A Ti (titanium) film 20 is formed on the entire upper surface of the insulating film 6 formed by vapor deposition.

Next, Al (aluminum) is vapor-deposited on the Ti film 20, and this is etched into a predetermined pattern to form a metal mask 21 made of Al (aluminum) shown in FIG. To form. That is, the metal mask 21 is formed so as to cover the P-type semiconductor region 3 and a part of the N-type semiconductor region 2 around the P-type semiconductor region 3. Next, the metal mask 2
1 is provided in an oxidizing atmosphere (air) at 300 ° C.,
The Ti film on the outer peripheral side of the metal mask 21 is lightly oxidized by heat treatment for 30 minutes to form a Ti oxide region 22 of TiOx (where x is a value smaller than 2). The Ti oxide region 22 opposes the N ⁺ type semiconductor region 4 and a part of the N type semiconductor region 2 inside the N ⁺ type semiconductor region 4 with the insulating film 6 interposed therebetween.

Next, the outer peripheral portion of the metal mask 21 is removed by etching to expose a part of the Ti film 20 in a ring shape, and a heat treatment is performed at 275 ° C. for 25 minutes in an oxidizing atmosphere (air), and then, as shown in FIG. The Ti oxide region 23 shown in (C) is formed in a ring shape.

Next, the metal mask 21 of FIG. 5C is removed, and heat treatment is performed at 200 ° C. for 10 minutes in an oxidizing atmosphere (air) to form a Ti oxide region 24 shown in FIG. 5D. To do.

Next, the Ti oxide regions 22 and 24 are formed in FIG.
Etching is performed as shown in (E), and the insulating film 6 is also etched to form a metal anode electrode 7 made of Al and an EQR.
The electrode 8 and the cathode electrode 10 are formed.

The completed diode shown in FIG.
As is clear from comparison with the diode of the first embodiment of FIG. 2, only the configuration of the resistive conductive film 9 is different from that of FIG. 2, and the other configurations are the same. The resistive conductive film 9 of FIG. 5E is composed of three Ti oxide regions 22, 23 and 24 having different sheet resistances. The Ti oxide region 22 as the outer peripheral side portion of the annular shape is arranged on a part of the N ⁺ type semiconductor region 4 and a part of the N type semiconductor region 2 on the inner peripheral side with the insulating film 6 interposed therebetween. , EQR electrodes 8 are connected. The Ti oxide region 23 as the annular intermediate portion is arranged on the N-type semiconductor region 2 with the insulating film 6 interposed therebetween.
The Ti oxide region 24 as the annular inner peripheral side portion is arranged on a part of the N-type semiconductor region 2 and the P-type semiconductor region 3 with the insulating film 6 interposed therebetween and is connected to the anode electrode 7. Three Ti oxide regions 22, 2 electrically connected to each other
Nos. 3 and 24 have different degrees of oxidation, and the Ti oxide region 22 on the outer peripheral side is most strongly oxidized, and thus has the largest sheet resistance and resistivity. Ti oxide region 24 on the inner peripheral side
Has the lowest sheet resistance and resistivity since it is the weakest oxidized. The Ti oxide region 23 in the middle portion is 2
The degree of oxidation is intermediate between the two regions 22 and 24, and the sheet resistance and resistivity also have intermediate values. Therefore, FIG. 5 (E)
The field plate effect due to the resistive conductive film 9 of FIG.
Is substantially the same as that of.

The embodiment of FIG. 5 has an advantage that the method of forming the resistive conductive film 9 is easy because the regions having different sheet resistances are formed based on one Ti film 20.

[0027]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) EQ between the three Ti oxide regions 22, 23, 24 of the diode shown in FIG. 5E as shown in FIG.
R metal electrodes 31 and 32 may be provided. Thereby, the potential distribution can be made uniform. (2) In FIG. 5A, an opening is formed in the insulating film 6 on the P-type semiconductor region 3 before the Ti film 20 is formed, and the Ti film 20 is formed so as to be in contact with the P-type semiconductor region 3. This may be left under the Al anode electrode 7 as shown in FIG. As a result, good electrical connection between the resistive conductive film 9 and the anode electrode 7 is achieved. (3) As shown in FIG. 7, the thickness of the resistive conductive film 6 is gradually or gradually reduced from the anode electrode 7 to the EQR electrode 8 to reduce the sheet resistance on the inner peripheral side portion and to reduce the outer peripheral portion. The sheet resistance of the side portion can be increased. (4) As shown in FIG. 8, the P-type semiconductor region 3 is omitted from the diode of FIG. 2, and the N-type semiconductor region 2 is brought into contact with an electrode 7a capable of producing a Schottky barrier action,
A resistive conductive film 9 similar to that shown in FIG. 2 can be provided between the electrode 7a and the EQR 8. The P-type semiconductor region 3 can be omitted from the diodes of FIGS. 5E, 6 and 7 to form a Schottky barrier diode. (5) The sheet resistance of the resistive conductive film 9 is preferably 10
It can be changed within the range of ⁶ to 10 ¹⁴ Ω / □.
Further, the resistive conductive film 9 can be formed of a resistance material other than SIPOS and Ti oxide. (6) Connecting the resistive conductive film 9 to the N ⁺ type semiconductor region 4 by omitting the EQR electrode 8, or the EQR electrode 8 and the N ⁺
The semiconductor region 4 is omitted and the outer peripheral edge portion of the resistive conductive film is
It can be connected to the type semiconductor region 2. (7) The present invention can be applied to transistors, ICs and the like.

[Brief description of drawings]

FIG. 1 is a central longitudinal sectional view showing a diode having a conventional resistive field plate.

FIG. 2 is a central longitudinal sectional view showing a diode having a resistive field plate according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the diode of the first embodiment in the order of manufacturing steps.

FIG. 4 is a diagram showing a potential change of a diode of the first embodiment.

FIG. 5 is a cross-sectional view showing the diode of the second embodiment in the order of manufacturing steps.

FIG. 6 is a central vertical sectional view showing a diode of a modified example.

FIG. 7 is a central longitudinal sectional view showing a diode of another modification.

FIG. 8 is a central vertical cross-sectional view showing a Schottky diode of another modification.

[Explanation of symbols]

 6 Insulating Film 7 Anode Electrode 8 EQR Electrode 9 Resistive Conductive Film 13, 14, 15 First, Second and Third Films

Claims (3)

[Claims] 1. A first having a substantially flat surface and
And a second semiconductor region, wherein the first semiconductor region has a portion exposed to the surface and has a first conductivity type, and the second semiconductor region has a portion exposed to the surface. A semiconductor substrate arranged in an island shape in the first semiconductor region and having a second conductivity type opposite to the first conductivity type, and directly or in the second semiconductor region. First connected indirectly
Electrode and a second electrode directly or indirectly connected to the first semiconductor region.
Electrode, an insulating film formed on the surface of the semiconductor substrate so as to surround the first electrode, and the insulation so as to face the surface of the first semiconductor region that surrounds the second semiconductor region. A semiconductor device comprising: a resistive conductive film which is arranged on a film, an inner peripheral portion of which is connected to the first electrode, and an outer peripheral portion of which is connected to the first semiconductor region, A semiconductor device, wherein the sheet resistance of the inner peripheral side portion of the resistive conductive film is smaller than the sheet resistance of the outer peripheral side portion. 2. A semiconductor substrate having a substantially flat surface, a first electrode formed on the surface of the semiconductor substrate and made of a material capable of producing a Schottky barrier, and an ohmic contact to the semiconductor substrate. A bonded second electrode; an insulating film formed on the surface of the semiconductor substrate so as to surround the first electrode; and an inner peripheral portion of the insulating film, which is disposed on the insulating film. Of the resistive conductive film, the sheet resistance of the inner peripheral side portion of the resistive conductive film is the outer peripheral side portion of the resistive conductive film. A semiconductor device characterized by being smaller than the sheet resistance of. 3. The semiconductor device according to claim 1, wherein the thickness of the inner peripheral side portion of the resistive conductive film is larger than the thickness of the outer peripheral side portion.