JPH08330497A - Lead frame and semiconductor device having the same - Google Patents
Lead frame and semiconductor device having the sameInfo
- Publication number
- JPH08330497A JPH08330497A JP7133826A JP13382695A JPH08330497A JP H08330497 A JPH08330497 A JP H08330497A JP 7133826 A JP7133826 A JP 7133826A JP 13382695 A JP13382695 A JP 13382695A JP H08330497 A JPH08330497 A JP H08330497A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- plating layer
- minute
- plated layer
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/183—Connection portion, e.g. seal
- H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
Landscapes
- Led Device Packages (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体チップ搭載用の
リードフレームおよびこれを用いた半導体装置に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for mounting a semiconductor chip and a semiconductor device using the same.
【０００２】[0002]
【従来の技術】従来のリードフレームを、例えば発光ダ
イオードランプ（ＬＥＤランプ）に使用されるリードフ
レームを用いて説明する。図６にそのリードフレームの
外観図を示す。2. Description of the Related Art A conventional lead frame will be described using a lead frame used for a light emitting diode lamp (LED lamp), for example. FIG. 6 shows an external view of the lead frame.
【０００３】従来のリードフレーム１は、チップ搭載用
リード２と結線用リード３とを有し、前記チップ搭載用
リード２の一端側には発光ダイオードチップを搭載する
反射カップ２ａを備えてなる。図６中、４はタイバーで
あり、５は細条である。A conventional lead frame 1 has a chip mounting lead 2 and a connection lead 3, and a reflection cup 2a for mounting a light emitting diode chip is provided at one end of the chip mounting lead 2. In FIG. 6, 4 is a tie bar, and 5 is a strip.
【０００４】リードフレーム１を図７に従って具体的に
説明する。図７は、従来のリードフレームの製造工程図
である。The lead frame 1 will be described in detail with reference to FIG. FIG. 7 is a manufacturing process diagram of a conventional lead frame.
【０００５】前記リードフレーム１は、図７（ａ）に示
すようなリードフレーム素材（例えば、鉄，銅合金，鉄
ニッケル合金等）１ａに、まず図７（ｂ）に示すように
一次メッキ（銅メッキまたはニッケルメッキ）層１ｂが
形成され、さらに図７（ｃ）に示すように二次メッキ
（銀メッキ，金メッキ又はパラジウムメッキ）層１ｃが
形成されてなる。The lead frame 1 is formed by first plating a lead frame material (for example, iron, copper alloy, iron-nickel alloy, etc.) 1a as shown in FIG. 7 (a) with primary plating (see FIG. 7 (b)). A copper plating or nickel plating layer 1b is formed, and a secondary plating (silver plating, gold plating or palladium plating) layer 1c is further formed as shown in FIG. 7 (c).
【０００６】該リードフレーム１を用いて発光ダイオー
ドランプ形成する際には、図６に示す前記素子搭載用リ
ード２の反射カップ２ａに発光ダイオードチップが銀ペ
ーストを介して搭載され、該発光ダイオードチップと結
線用リード３の一端側とがボンディングワイヤにて接続
され、前記タイバー４を切断した後に透光性の封止用エ
ポキシ樹脂等の封止樹脂にて前記発光ダイオードチップ
及びリードフレーム１の一部が封止されてなる。前記リ
ードフレーム１の該封止樹脂にて封止されていない部分
には、場合によってその表面に半田メッキ或は錫メッキ
が施される。When forming a light emitting diode lamp using the lead frame 1, a light emitting diode chip is mounted on the reflection cup 2a of the element mounting lead 2 shown in FIG. 6 through a silver paste, and the light emitting diode chip is mounted. And one end side of the connection lead 3 are connected by a bonding wire, and after cutting the tie bar 4, a part of the light emitting diode chip and the lead frame 1 is sealed with a sealing resin such as a translucent sealing epoxy resin. The part is sealed. A portion of the lead frame 1 which is not sealed with the sealing resin may be solder-plated or tin-plated on the surface in some cases.
【０００７】[0007]
【発明が解決しようとする課題】上記リードフレーム１
は、その表面の二次メッキ層１ｃ、即ち銀，金又はパラ
ジウムの表面がボンディング性に優れていることからダ
イボンドやワイヤーボンドには通常支障なく利用されて
いる。The above-mentioned lead frame 1
Since the secondary plating layer 1c on the surface thereof, that is, the surface of silver, gold or palladium has excellent bonding properties, it is normally used for die bonding or wire bonding without any trouble.
【０００８】しかしながら、これらボンディング性を損
なわないためには、メッキ表面の光沢度に注意を要し、
特にセレンＳｅの共析には注意を払わないと著しいボン
ディング性の低下を招くことになった。However, in order not to impair these bonding properties, attention must be paid to the glossiness of the plating surface,
In particular, unless paying attention to the co-deposition of selenium Se, the bondability is remarkably deteriorated.
【０００９】また、最適なボンディング性を得るために
は、高価な貴金属（銀、金、パラジウム等）をある一定
厚みメッキしなければならなく、コストアップの要因と
なっていた。Further, in order to obtain the optimum bondability, expensive precious metal (silver, gold, palladium, etc.) must be plated to a certain thickness, which has been a factor of cost increase.
【００１０】さらに、半導体チップをダイボンドするた
めの銀ペーストの主成分が銀とエポキシ樹脂であり、リ
ードフレーム１との密着性に関与しているのはそのエポ
キシ樹脂であり、リードフレーム１の表面の銀，金，パ
ラジウムのいずれもそのエポキシ樹脂との密着性が良く
なかった。Further, the main components of the silver paste for die-bonding the semiconductor chip are silver and epoxy resin, and it is the epoxy resin that is involved in the adhesiveness with the lead frame 1, and the surface of the lead frame 1 None of the silver, gold and palladium had good adhesion to the epoxy resin.
【００１１】加えて、リードフレーム１を封止する封止
樹脂についても、封止用エポキシ樹脂によるパッケージ
を行うと、その境目に剥離が生じ、水分の浸透が発生し
たりした。 本発明は、上記課題に鑑み、塗布される接着剤及び又は
被覆される封止樹脂との強固な密着性が得られるリード
フレームおよびこれを用いた半導体装置を提供すること
を目的とするものである。In addition, with respect to the encapsulating resin for encapsulating the lead frame 1, when the encapsulating epoxy resin is used for packaging, peeling occurs at the boundary and water penetration occurs. In view of the above problems, the present invention has an object to provide a lead frame and a semiconductor device using the same, which can obtain strong adhesion with an applied adhesive and / or a sealing resin. is there.
【００１２】[0012]
【課題を解決するための手段】本発明の請求項１記載の
リードフレームは、リードフレーム素材と、該リードフ
レーム素材を被覆するメッキ層とを備え、該メッキ層表
面に半導体チップが接着剤を介して搭載されるリードフ
レームにおいて、前記メッキ層は前記接着剤と同一組成
からなる微小物体を含有してなり、該微少物体がメッキ
層表面より露出してなることを特徴とするものである。A lead frame according to claim 1 of the present invention comprises a lead frame material and a plating layer covering the lead frame material, and the semiconductor chip has an adhesive on the surface of the plating layer. In the lead frame mounted via the above, the plating layer contains a minute object having the same composition as the adhesive, and the minute object is exposed from the surface of the plating layer.
【００１３】また、本発明の請求項２記載のリードフレ
ームは、前記メッキ層が前記微少物体を含有しリードフ
レーム素材を被覆する一次メッキ層と、貴金属よりなり
前記微少物体を外部に露出させた状態で前記一次メッキ
層を被覆する二次メッキ層とからなることを特徴とする
ものである。According to a second aspect of the present invention, the lead frame is made of a noble metal and a primary plating layer in which the plating layer contains the minute object and covers the lead frame material, and the minute object is exposed to the outside. It is characterized by comprising a secondary plating layer which covers the primary plating layer in a state.
【００１４】さらに、本発明の請求項３記載のリードフ
レームは、半導体チップの搭載部表面及び又はワイヤー
ボンド部表面に露出する微小物体を除去してなることを
特徴とするものである。Further, the lead frame according to claim 3 of the present invention is characterized in that minute objects exposed on the surface of the mounting portion of the semiconductor chip and / or the surface of the wire bond portion are removed.
【００１５】加えて、本発明の請求項４記載の半導体装
置は、上記リードフレームを備えてなる半導体装置であ
って、前記リードフレームは反射カップを備え、該反射
カップ内に異なる発光色の複数個の発光チップが配置さ
れ、該反射カップ内面の微少物体がその表面より突出し
てなることを特徴とするものである。In addition, a semiconductor device according to a fourth aspect of the present invention is a semiconductor device including the lead frame, wherein the lead frame includes a reflection cup, and a plurality of different emission colors are provided in the reflection cup. One light emitting chip is arranged, and a minute object on the inner surface of the reflection cup is projected from the surface.
【００１６】加えて、本発明の請求項５記載の半導体装
置は、上記リードフレームを備えてなる半導体装置であ
って、前記リードフレームの一部分が前記微小物体と同
一組成からなる封止樹脂にて封止されてなることを特徴
とするものである。In addition, a semiconductor device according to a fifth aspect of the present invention is a semiconductor device including the lead frame, wherein a part of the lead frame is made of a sealing resin having the same composition as the minute object. It is characterized by being sealed.
【００１７】加えて、本発明の請求項６記載の半導体装
置は、前記リードフレームの封止樹脂より突出する部分
表面に露出する微小物体を除去してなることを特徴とす
るものである。In addition, a semiconductor device according to a sixth aspect of the present invention is characterized in that a minute object exposed on a partial surface of the lead frame protruding from the sealing resin is removed.
【００１８】[0018]
【作用】上記構成によれば、本発明の請求項１記載のリ
ードフレームは、その表面、即ちメッキ層表面に露出す
る微小物体とメッキ層表面に塗布される接着剤とが同一
組成であることから、互いが強い密着力で結び付き半導
体チップを強固に固定することができる。 また、本発明の請求項２記載のリードフレームは、微少
物体が露出する部分以外が貴金属よりなる二次メッキ層
にて被覆されてなる構成なので、二次メッキ層表面のボ
ンディング性を向上することができる。According to the above structure, in the lead frame according to claim 1 of the present invention, the minute object exposed on the surface, that is, the surface of the plating layer and the adhesive applied on the surface of the plating layer have the same composition. Therefore, the semiconductor chips can be firmly fixed to each other with a strong adhesion. Further, since the lead frame according to claim 2 of the present invention is configured such that the portion other than the portion where the minute object is exposed is covered with the secondary plating layer made of a noble metal, the bonding property of the surface of the secondary plating layer is improved. You can
【００１９】さらに、本発明の請求項３記載のリードフ
レームは、半導体チップの搭載部表面及び又はワイヤー
ボンド部表面に露出する微小物体を除去してなる構成な
ので、その表面が梨地状で表面積が広くなり、接着剤と
リードフレームとの密着性を向上することができ、また
ワイヤーボンドのボンディング性を向上することができ
る。Furthermore, since the lead frame according to claim 3 of the present invention has a structure in which minute objects exposed on the surface of the mounting portion of the semiconductor chip and / or the surface of the wire bond portion are removed, the surface is satin-like and has a surface area. It becomes wider, the adhesiveness between the adhesive and the lead frame can be improved, and the bondability of the wire bond can be improved.
【００２０】加えて、本発明の請求項４記載の半導体装
置は、上記リードフレームに反射カップを備え、該反射
カップ内に発光色の異なる複数個の発光チップが配置さ
れ、該反射カップ内面の微少物体がその表面より突出し
てなる構成なので、複数個の発光チップより出射される
光は反射カップ内のリードフレーム表面で突出する微小
物体によって反射を繰り返し、該反射カップ内での光反
射を拡散することになり、複数個の発光チップの同時発
光時の色混合性を向上することができる。 加えて、本発明の請求項５記載の半導体装置は、上記リ
ードフレームの一部分が上記微小物体と同一組成からな
る封止樹脂にて封止されてなる構成なので、リードフレ
ームと封止樹脂との間においても強い密着力を得ること
ができる。In addition, in the semiconductor device according to claim 4 of the present invention, the lead frame is provided with a reflection cup, a plurality of light emitting chips having different emission colors are arranged in the reflection cup, and the inner surface of the reflection cup is formed. Since a minute object projects from the surface, the light emitted from a plurality of light emitting chips is repeatedly reflected by the minute object projecting on the surface of the lead frame in the reflection cup, and diffuses the light reflection in the reflection cup. As a result, it is possible to improve the color mixing property when a plurality of light emitting chips emit light simultaneously. In addition, the semiconductor device according to claim 5 of the present invention is configured such that a part of the lead frame is sealed with a sealing resin having the same composition as the minute object. A strong adhesion can be obtained even in the interval.
【００２１】加えて、本発明の請求項６記載の半導体装
置は、上記リードフレームの封止樹脂より突出する部分
表面に露出する微小物体を除去してなる構成なので、そ
の表面が梨地状で表面積が広くなり、実装部品として必
要な良好な半田付け性を得ることができる。In addition, the semiconductor device according to claim 6 of the present invention has a structure in which minute objects exposed on the surface of the portion of the lead frame protruding from the sealing resin are removed. Can be widened, and good solderability required for mounting parts can be obtained.
【００２２】[0022]
【実施例】図１は本発明の第一実施例よりなるリードフ
レームおよびこれを用いた半導体装置を示す断面図であ
る。1 is a sectional view showing a lead frame according to a first embodiment of the present invention and a semiconductor device using the same.
【００２３】本実施例のリードフレーム１１は、表面に
半導体ベアチップ１２が銀ペースト１３を介して搭載さ
れるものであって、具体的に説明すると鉄，銅合金，鉄
ニッケル合金等のリードフレーム素材１４を前記銀ペー
スト１３と同一組成からなる微小エポキシボール１５を
含有する一次メッキ層１６にて被覆し、該一次メッキ層
１６が二次メッキ層１７にて被覆され、前記一次メッキ
層１６に含有された微小エポキシボール１５が前記二次
メッキ層１７表面より突出してなるものである。In the lead frame 11 of this embodiment, a semiconductor bare chip 12 is mounted on the surface via a silver paste 13. Specifically, a lead frame material such as iron, copper alloy, iron nickel alloy, etc. will be described. 14 is coated with a primary plating layer 16 containing fine epoxy balls 15 having the same composition as the silver paste 13, and the primary plating layer 16 is coated with a secondary plating layer 17 and contained in the primary plating layer 16. The minute epoxy balls 15 thus formed protrude from the surface of the secondary plating layer 17.
【００２４】該リードフレーム１１の製造工程を図２に
従って説明する。The manufacturing process of the lead frame 11 will be described with reference to FIG.
【００２５】まず、図２（ａ）に示すようなリードフレ
ーム素材１４に、図２（ｂ），（ｂ′）に示すように、
銅メッキ液或はニッケルメッキ液の中に大きさがφ０．
３μｍ〜φ１０μｍからなる微少エポキシボール１５を
分散させて激しく撹拌しながら電気メッキを行うことで
リードフレーム素材１４上に微少エポキシボール１５が
共析した一次メッキ層１６を形成する。なお、図２
（ｂ′）は同図（ｂ）のＡ部拡大図である。First, a lead frame material 14 as shown in FIG. 2 (a) is formed on the lead frame material 14 as shown in FIGS. 2 (b) and 2 (b ').
The size is φ0 in copper plating solution or nickel plating solution.
The minute epoxy balls 15 of 3 μm to φ10 μm are dispersed and electroplated with vigorous stirring to form the primary plating layer 16 on the lead frame material 14 in which the minute epoxy balls 15 are co-deposited. Note that FIG.
(B ') is an enlarged view of a portion A of FIG.
【００２６】上記銅メッキ液及びニッケルメッキ液の代
表的なメッキ組成を図３に示す。これらのメッキ液から
なる一次メッキ層１６は内部応力が高いことから前もっ
て下地に分散剤を含まない通常のメッキを施しておく場
合もある。また、リードフレーム素材１４との密着力を
向上させるためにストライク銅メッキ或はストライクニ
ッケルメッキ（活性力を高めるための還元力の高いメッ
キ）を行う場合もある。Typical plating compositions of the above copper plating solution and nickel plating solution are shown in FIG. Since the primary plating layer 16 made of these plating solutions has a high internal stress, there is a case in which a normal plating containing no dispersant is applied to the base in advance. In addition, strike copper plating or strike nickel plating (plating with high reducing power to enhance activity) may be performed in order to improve the adhesion with the lead frame material 14.
【００２７】次に、図２（ｃ），（ｃ′）に示すよう
に、さらにその上に銀，金，パラジュウム等の貴金属を
前記微少エポキシボール１５が完全に隠れない程度の厚
みでメッキを施し、二次メッキ層１７を形成する。な
お、図２（ｃ′）は同図（ｃ）のＢ部拡大図である。Next, as shown in FIGS. 2 (c) and 2 (c '), a noble metal such as silver, gold or palladium is further plated thereon with a thickness such that the minute epoxy balls 15 are not completely hidden. Then, the secondary plating layer 17 is formed. Incidentally, FIG. 2 (c ') is an enlarged view of portion B of FIG. 2 (c).
【００２８】これによって、表面に微少エポキシボール
１５が突出したリードフレーム１１が得られる。As a result, the lead frame 11 having the minute epoxy balls 15 protruding on the surface is obtained.
【００２９】また、前記一次メッキ層１６の形成後に、
図４に示すように、所定部分の微少エポキシボール１５
の組成を溶剤によって溶解することによって、その表面
状態が梨地状で表面積を広く形成することができる。具
体的には、図４（ａ）に示すように一次メッキ層１６を
形成した後、微少エポキシボール１５を溶解する部分に
ついて図４（ｂ）に示すようにエポキシボール溶解液に
浸し微少エポキシボール１５を溶解する。これにより、
図４（ｃ）に示すような構造となり、最後に図４（ｄ）
に示すように二次メッキ層１７を施してなる。After the formation of the primary plating layer 16,
As shown in FIG. 4, a minute epoxy ball 15 in a predetermined portion
By dissolving the composition of (1) in a solvent, the surface state of the composition can be satin and a large surface area can be formed. Specifically, after the primary plating layer 16 is formed as shown in FIG. 4A, the portion in which the minute epoxy balls 15 are dissolved is dipped in an epoxy ball solution as shown in FIG. Dissolve 15. This allows
The structure shown in FIG. 4C is obtained, and finally, the structure shown in FIG.
The secondary plating layer 17 is applied as shown in FIG.
【００３０】本実施例よりなるリードフレーム１１は、
その半導体ベアチップ１２搭載部分及びワイヤー１８に
よるワイヤーボンディング部分において微少エポキシボ
ール１５を除去しており、これによってその表面形状に
よりワイヤーボンディングのボンディング性を高め、更
に銀ペースト１３とリードフレーム１１との密着力をリ
ードフレーム１１の表面積が大きくなった分だけ向上す
ることができる。The lead frame 11 according to this embodiment is
The minute epoxy balls 15 are removed at the portion where the semiconductor bare chip 12 is mounted and the portion where the wires 18 are wire-bonded. This improves the bondability of wire bonding due to the surface shape thereof, and further the adhesive force between the silver paste 13 and the lead frame 11. Can be improved by the increase in the surface area of the lead frame 11.
【００３１】また、本実施例においては、半導体ベアチ
ップ１２搭載部分の微少エポキシボール１５を除去した
が、除去しない構造であっても、銀ペースト１３と微少
エポキシボール１５とが同一組成からなることから強い
密着力を得ることができる。Further, in this embodiment, the minute epoxy balls 15 on the portion where the semiconductor bare chip 12 is mounted are removed, but even if the structure is not removed, the silver paste 13 and the minute epoxy balls 15 have the same composition. A strong adhesion can be obtained.
【００３２】さらに、リードフレーム表面が銀，金、パ
ラジューム等よりなる貴金属の二次メッキ層１７からな
るので、従来同様、ダイボンド，ワイヤーボンドが良好
なボンディング性を得ることができる。しかも、リード
フレーム表面の数パーセント〜数十パーセントが微少エ
ポキシボール１５で覆われていることから、従来よりも
貴金属のメッキ量を低減することができ、コスト低減を
図ることができる。Further, since the surface of the lead frame is made of the noble metal secondary plating layer 17 made of silver, gold, palladium, etc., good bondability can be obtained by die bonding and wire bonding as in the conventional case. Moreover, since a few percent to several tens percent of the surface of the lead frame is covered with the minute epoxy balls 15, the plating amount of the noble metal can be reduced more than before, and the cost can be reduced.
【００３３】上記リードフレーム１１を半導体装置に用
いる、即ち、半導体ベアチップ１２及び該半導体ベアチ
ップ１２を搭載したリードフレーム１１の一部を封止用
エポキシ樹脂１９にて封止することにより、リードフレ
ーム１１表面に突出した微少エポキシボール１５と封止
用エポキシ樹脂１９とが同一組成からなり、両者の間で
強い密着力を得ることができる。したがって、リードフ
レーム１１と封止用エポキシ樹脂１９との間より水分が
侵入することを防止でき、半導体装置として信頼性の向
上が図れる。By using the lead frame 11 in a semiconductor device, that is, by sealing the semiconductor bare chip 12 and a part of the lead frame 11 on which the semiconductor bare chip 12 is mounted with a sealing epoxy resin 19, the lead frame 11 is formed. The minute epoxy balls 15 protruding on the surface and the sealing epoxy resin 19 have the same composition, and a strong adhesion can be obtained between them. Therefore, moisture can be prevented from entering between the lead frame 11 and the epoxy resin 19 for sealing, and the reliability of the semiconductor device can be improved.
【００３４】また、前記リードフレーム１１の封止用エ
ポキシ樹脂１９より突出する部分表面に突出する微少エ
ポキシボール１５を除去することにより、その表面が梨
地状で表面積が広くなり、表面実装部品として必要な良
好な半田付け性を備えた半導体装置を得ることができ
る。さらに、腐食電流の集中を防ぐことができ、錆びに
くくなり、屋外等の環境の悪いところでの使用される半
導体装置において好耐食性を持たせることができる。By removing the minute epoxy balls 15 protruding from the surface of the lead frame 11 protruding from the encapsulating epoxy resin 19, the surface becomes matte and has a large surface area, which is necessary as a surface mount component. A semiconductor device having excellent solderability can be obtained. Further, the concentration of corrosion current can be prevented, rust is less likely to occur, and good corrosion resistance can be provided in a semiconductor device used in a bad environment such as outdoors.
【００３５】図５（ａ）は、本発明の第二実施例よりな
るリードフレームおよびこれを用いた半導体装置を示す
断面図である。本実施例について、上記実施例と相違す
る点のみ説明する。FIG. 5A is a sectional view showing a lead frame according to the second embodiment of the present invention and a semiconductor device using the same. Only the points of this embodiment different from the above embodiments will be described.
【００３６】本実施例のリードフレーム２１は、チップ
搭載用リード２２と結線用リード２３とからなり、前記
チップ搭載用リード２２の一端側に発光色の異なる複数
個の発光ダイオードチップ２４が搭載される反射カップ
２２ａを備えてなり、該リードフレーム２１は、上記実
施例同様、リードフレーム素材を微小エポキシボール２
５を含有する一次メッキ層にて被覆し、該一次メッキ層
が二次メッキ層にて被覆され、前記一次メッキ層に含有
された微小エポキシボール２５を前記二次メッキ層表面
より突出してなるものである。The lead frame 21 of this embodiment comprises a chip mounting lead 22 and a connection lead 23, and a plurality of light emitting diode chips 24 of different emission colors are mounted on one end side of the chip mounting lead 22. The lead frame 21 is made of the same material as that of the above-described embodiment.
A primary plating layer containing 5 is coated with the primary plating layer with a secondary plating layer, and the minute epoxy balls 25 contained in the primary plating layer are projected from the surface of the secondary plating layer. Is.
【００３７】前記発光ダイオードチップ２４としては、
例えばレッド，グリーン，ブルーの３色の発光ダイオー
ドチップを用い、これによってフルカラー表現が可能と
なる。なお、図５においては、２つの発光ダイオードチ
ップをＲ，Ｙにて示している。As the light emitting diode chip 24,
For example, a light emitting diode chip of three colors of red, green and blue is used, which enables full color expression. In FIG. 5, two light emitting diode chips are shown by R and Y.
【００３８】これにより、従来のリードフレーム２１′
を用いた半導体装置では、図５（ｂ）に示すように、発
光ダイオードチップ２４′から出た光束が反射カップ２
２ａ′内面で鏡面反射をしていたのに対し、本実施例の
上記リードフレーム２１を用いた半導体装置では、図５
（ａ）に示すように、発光ダイオードチップ２４から出
た光束は反射カップ２２ａ内面に突出する微少エポキシ
ボール２５で乱反射し、反射カップ２２ａ内部で発光色
の異なる複数個の発光ダイオードチップ２４が同時発光
した際に複数の発光色の色混合性を向上することができ
る。As a result, the conventional lead frame 21 '
In the semiconductor device using, the light flux emitted from the light emitting diode chip 24 'is reflected by the reflection cup 2 as shown in FIG.
In contrast to the specular reflection at the inner surface of 2a ', the semiconductor device using the lead frame 21 of the present embodiment has the structure shown in FIG.
As shown in (a), the luminous flux emitted from the light emitting diode chip 24 is diffusely reflected by the minute epoxy balls 25 protruding on the inner surface of the reflection cup 22a, and a plurality of light emitting diode chips 24 having different emission colors are simultaneously generated inside the reflection cup 22a. It is possible to improve the color mixing property of a plurality of emission colors when emitting light.
【００３９】[0039]
【発明の効果】以上説明したように、本発明の請求項１
記載のリードフレームによれば、その表面に露出する微
小物体と該表面に塗布される接着剤とが強い密着力で結
び付き、半導体チップが強固に固定することが可能なリ
ードフレームを提供することができる。As described above, according to the first aspect of the present invention.
According to the described lead frame, a minute object exposed on the surface and an adhesive applied to the surface are bound by a strong adhesive force, and a lead frame capable of firmly fixing a semiconductor chip can be provided. it can.
【００４０】また、本発明の請求項２記載のリードフレ
ームは、微少物体が露出する部分以外が貴金属よりなる
二次メッキ層にて被覆されてなる構成なので、二次メッ
キ層表面、即ちリードフレーム表面のボンディング性を
向上することができる。The lead frame according to the second aspect of the present invention has a structure in which the secondary plating layer made of a noble metal is coated except for the portion where the minute object is exposed. Therefore, the surface of the secondary plating layer, that is, the lead frame. The surface bondability can be improved.
【００４１】さらに、本発明の請求項３記載のリードフ
レームは、半導体チップの搭載部表面及び又はワイヤー
ボンド部表面に露出する微小物体を除去してなる構成な
ので、その表面が梨地状で表面積が広くなり、接着剤と
リードフレームとの密着性を向上することができ、また
ワイヤーボンドのボンディング性を向上することができ
る。Further, since the lead frame according to claim 3 of the present invention has a structure in which minute objects exposed on the surface of the mounting portion of the semiconductor chip and / or the surface of the wire bond portion are removed, the surface is satin-like and has a surface area. It becomes wider, the adhesiveness between the adhesive and the lead frame can be improved, and the bondability of the wire bond can be improved.
【００４２】加えて、本発明の請求項４記載の半導体装
置は、上記リードフレームに反射カップを備え、該反射
カップ内に発光色の異なる複数個の発光チップが配置さ
れ、前記反射カップ内面の微少物体がその表面より突出
してなる構成なので、複数個の発光チップより出射され
る光はそれぞれ反射カップ内で突出する微少物体によっ
て光反射を拡散することになり、複数個の発光チップの
同時発光時の色混合性が向上された半導体装置を提供す
ることができる。 加えて、本発明の請求項５記載の半導体装置は、上記リ
ードフレームの一部分が上記微小物体と同一組成からな
る封止樹脂にて封止されてなる構成なので、リードフレ
ームと封止樹脂とが強い密着力で結び付き、リードフレ
ームと封止樹脂との間より水分が侵入することを防止で
き、半導体装置の信頼性の向上が図れる。In addition, in the semiconductor device according to the fourth aspect of the present invention, the lead frame is provided with a reflection cup, a plurality of light emitting chips having different emission colors are arranged in the reflection cup, and the inner surface of the reflection cup is formed. Since the minute objects project from the surface, the light emitted from a plurality of light emitting chips diffuses the light reflection by the protruding minute objects in the reflection cups, respectively, and the light emission of a plurality of light emitting chips occurs simultaneously. It is possible to provide a semiconductor device with improved color mixing properties. In addition, in the semiconductor device according to claim 5 of the present invention, a part of the lead frame is sealed with a sealing resin having the same composition as the minute object, so that the lead frame and the sealing resin are separated from each other. Bonding with a strong adhesive force can prevent moisture from entering between the lead frame and the sealing resin, and the reliability of the semiconductor device can be improved.
【００４３】加えて、本発明の請求項６記載の半導体装
置は、上記リードフレームの封止樹脂より突出する部分
表面に露出する微小物体を除去してなる構成なので、そ
の表面が梨地状で表面積が広くなり、実装部品として必
要な良好な半田付け性を備えた半導体装置が得られる。In addition, the semiconductor device according to claim 6 of the present invention has a structure in which minute objects exposed on the surface of the portion of the lead frame protruding from the sealing resin are removed, so that the surface is matte and has a surface area. Thus, a semiconductor device having good solderability required as a mounting component can be obtained.
【図１】本発明の第一実施例よりなるリードフレームお
よびこれを用いた半導体装置を示す断面図である。FIG. 1 is a sectional view showing a lead frame according to a first embodiment of the present invention and a semiconductor device using the same.
【図２】図１に示すリードフレームの製造工程図であ
る。FIG. 2 is a manufacturing process diagram of the lead frame shown in FIG.
【図３】銅メッキ液及びニッケルメッキ液の代表的なメ
ッキ組成を示す図である。FIG. 3 is a diagram showing typical plating compositions of a copper plating solution and a nickel plating solution.
【図４】図１に示すリードフレームの製造工程図であ
る。FIG. 4 is a manufacturing process diagram of the lead frame shown in FIG. 1;
【図５】（ａ）は本発明の第二実施例よりなるリードフ
レームおよびこれを用いた半導体装置を示す断面図であ
り、（ｂ）は該実施例に対応する従来例を示す断面図で
ある。5A is a sectional view showing a lead frame according to a second embodiment of the present invention and a semiconductor device using the same, and FIG. 5B is a sectional view showing a conventional example corresponding to the embodiment. is there.
【図６】従来のリードフレームを示す外観図である。FIG. 6 is an external view showing a conventional lead frame.
【図７】図６に示すリードフレームの製造工程図であ
る。FIG. 7 is a manufacturing process diagram of the lead frame shown in FIG. 6;
１１，２１ リードフレーム １２ 半導体ベアチップ（半導体チップ） １３ 銀ペースト（接着剤） １４ リードフレーム素材 １５，２５ 微少エポキシボール １６ 一次メッキ層 １７ 二次メッキ層 １９ 封止用エポキシ樹脂 ２２ チップ搭載用リード ２２ａ 反射カップ ２４ 発光ダイオードチップ（半導体チップ） 11,21 Lead frame 12 Semiconductor bare chip (semiconductor chip) 13 Silver paste (adhesive) 14 Lead frame material 15,25 Micro epoxy ball 16 Primary plating layer 17 Secondary plating layer 19 Encapsulating epoxy resin 22 Chip mounting lead 22a Reflection cup 24 Light emitting diode chip (semiconductor chip)
Claims (6)
ム素材を被覆するメッキ層とを備え、該メッキ層表面に
半導体チップが接着剤を介して搭載されるリードフレー
ムにおいて、 前記メッキ層は前記接着剤と同一組成からなる微小物体
を含有してなり、該微少物体がメッキ層表面より露出し
てなることを特徴とするリードフレーム。1. A lead frame comprising a lead frame material and a plating layer covering the lead frame material, wherein a semiconductor chip is mounted on the surface of the plating layer via an adhesive, wherein the plating layer is the adhesive. A lead frame comprising a minute object having the same composition as that of the above, wherein the minute object is exposed from the surface of the plating layer.
リードフレーム素材を被覆する一次メッキ層と、貴金属
よりなり前記微少物体を外部に露出させた状態で前記一
次メッキ層を被覆する二次メッキ層とからなることを特
徴とする請求項１記載のリードフレーム。2. The plating layer includes a primary plating layer that covers the lead frame material and contains the minute object, and a secondary layer that covers the primary plating layer with a noble metal exposed to the outside. The lead frame according to claim 1, comprising a plated layer.
ヤーボンド部表面に露出する微小物体を除去してなるこ
とを特徴とする請求項１記載のリードフレーム。3. The lead frame according to claim 1, wherein minute objects exposed on the surface of the mounting portion of the semiconductor chip and / or the surface of the wire bond portion are removed.
装置であって、前記リードフレームは反射カップを備
え、該反射カップ内に異なる発光色の複数個の発光チッ
プが配置され、前記反射カップ内面の微少物体がその表
面より突出してなることを特徴とする半導体装置。4. A semiconductor device comprising the lead frame, wherein the lead frame comprises a reflection cup, and a plurality of light emitting chips of different emission colors are arranged in the reflection cup, A semiconductor device characterized in that a minute object is projected from its surface.
装置であって、前記リードフレームの一部分が前記微小
物体と同一組成からなる封止樹脂にて封止されてなるこ
とを特徴とする半導体装置。5. A semiconductor device including the lead frame, wherein a part of the lead frame is sealed with a sealing resin having the same composition as the minute object.
する部分表面に露出する微小物体を除去してなることを
特徴とする請求項５記載の半導体装置。6. The semiconductor device according to claim 5, wherein a minute object exposed on a surface of a portion of the lead frame protruding from the sealing resin is removed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07133826A JP3127098B2 (en) | 1995-05-31 | 1995-05-31 | Lead frame and semiconductor device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP07133826A JP3127098B2 (en) | 1995-05-31 | 1995-05-31 | Lead frame and semiconductor device using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08330497A true JPH08330497A (en) | 1996-12-13 |
| JP3127098B2 JP3127098B2 (en) | 2001-01-22 |
Family
ID=15113952
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP07133826A Expired - Fee Related JP3127098B2 (en) | 1995-05-31 | 1995-05-31 | Lead frame and semiconductor device using the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3127098B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008258541A (en) * | 2007-04-09 | 2008-10-23 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2010212691A (en) * | 2009-03-10 | 2010-09-24 | Lg Innotek Co Ltd | Light emitting element package |
| JP2011091454A (en) * | 2005-01-31 | 2011-05-06 | Samsung Led Co Ltd | Light emitting diode element |
| JP2011205100A (en) * | 2010-03-25 | 2011-10-13 | Lg Innotek Co Ltd | Light-emitting element package and illumination system equipped with the same |
| JP2014078605A (en) * | 2012-10-10 | 2014-05-01 | Furukawa Electric Co Ltd:The | Lead frame for optical semiconductor device, manufacturing method of lead frame for optical semiconductor device and optical semiconductor device |
| KR20140063539A (en) * | 2014-03-31 | 2014-05-27 | 서울반도체 주식회사 | Light emitting diode package |
| CN111312881A (en) * | 2020-02-27 | 2020-06-19 | 盐城东山精密制造有限公司 | Integrally formed LED device and manufacturing method thereof |
-
1995
- 1995-05-31 JP JP07133826A patent/JP3127098B2/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011091454A (en) * | 2005-01-31 | 2011-05-06 | Samsung Led Co Ltd | Light emitting diode element |
| JP2008258541A (en) * | 2007-04-09 | 2008-10-23 | Nec Electronics Corp | Semiconductor device and its manufacturing method |
| JP2010212691A (en) * | 2009-03-10 | 2010-09-24 | Lg Innotek Co Ltd | Light emitting element package |
| US8987775B2 (en) | 2009-03-10 | 2015-03-24 | Lg Innotek Co., Ltd. | Light emitting device package |
| US9318677B2 (en) | 2009-03-10 | 2016-04-19 | Lg Innotek Co., Ltd. | Light emitting device package |
| JP2011205100A (en) * | 2010-03-25 | 2011-10-13 | Lg Innotek Co Ltd | Light-emitting element package and illumination system equipped with the same |
| US8309983B2 (en) | 2010-03-25 | 2012-11-13 | Lg Innotek Co., Ltd. | Light emitting device package and lighting system having the same |
| JP2014078605A (en) * | 2012-10-10 | 2014-05-01 | Furukawa Electric Co Ltd:The | Lead frame for optical semiconductor device, manufacturing method of lead frame for optical semiconductor device and optical semiconductor device |
| KR20140063539A (en) * | 2014-03-31 | 2014-05-27 | 서울반도체 주식회사 | Light emitting diode package |
| CN111312881A (en) * | 2020-02-27 | 2020-06-19 | 盐城东山精密制造有限公司 | Integrally formed LED device and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3127098B2 (en) | 2001-01-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7994616B2 (en) | Multilayered lead frame for a semiconductor light-emitting device | |
| JP3993736B2 (en) | Manufacturing method of chip component type light emitting device and manufacturing method of package for chip component type light emitting device | |
| WO2011122665A1 (en) | Leadframe or substrate for led, semiconductor device, and method for manufacturing leadframe or substrate for led | |
| US7557384B2 (en) | Semiconductor light emitting device and semiconductor light emitting unit | |
| KR100978028B1 (en) | Light-emitting device | |
| JP5245594B2 (en) | Light emitting device and manufacturing method thereof | |
| US6960823B2 (en) | Semiconductor device and method of manufacturing the same | |
| JP2007201420A (en) | Semiconductor light-emitting device, semiconductor light-emitting element, and method of manufacturing semiconductor light-emitting device | |
| JP2007067116A (en) | Light-emitting device | |
| JP3991624B2 (en) | Surface mount type light emitting device and manufacturing method thereof | |
| JP3940124B2 (en) | apparatus | |
| US20100193825A1 (en) | Light-emitting diode package and method for fabricating the same | |
| JP2011204790A (en) | Semiconductor light emitting device | |
| JP3127098B2 (en) | Lead frame and semiconductor device using the same | |
| TWI472067B (en) | Optical package and method of manufacturing the same | |
| JP2011228687A (en) | Led lead frame or substrate, semiconductor device, and method of manufacturing led lead frame or substrate | |
| JP7148792B2 (en) | METAL MATERIAL FOR OPTO-SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND OPTO-SEMICONDUCTOR DEVICE USING THE SAME | |
| JP2989703B2 (en) | Chip component type light emitting diode | |
| US20070080354A1 (en) | Power package and fabrication method thereof | |
| JP6899226B2 (en) | Semiconductor device | |
| JP6398541B2 (en) | Lead frame and light emitting device | |
| JP3455191B2 (en) | Semiconductor device and light emitting diode lamp | |
| JP7339566B2 (en) | METHOD FOR MANUFACTURING METAL STRUCTURE FOR OPTO-SEMICONDUCTOR DEVICE, PACKAGE, AND SOLUTION CONTAINING POLYALLYLAMINE POLYMER | |
| US11227820B2 (en) | Through hole side wettable flank | |
| JP7148793B2 (en) | METAL MATERIAL FOR OPTO-SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND OPTO-SEMICONDUCTOR DEVICE USING THE SAME |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20081102 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091102 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091102 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101102 Year of fee payment: 10 |
|
| LAPS | Cancellation because of no payment of annual fees |